Fairchild 74LVX132 service manual

74LVX132 — Low Voltage Quad 2-Input NAND Schmitt Trigger
February 2008
Features
Input voltage level translation from 5V to 3V Ideal for low power/low noise 3.3V applications
Guaranteed simultaneous switching noise level and dynamic threshold performance
Ordering Information
Order
Number
74LVX132M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LVX132SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVX132MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Package
Number Package Description
General Description
The LVX132 contains four 2-input NAND Schmitt Trigger Gates. The pin configuration and function are the same as the LVX00 but the inputs have hysteresis between the positive-going and negative-going input thresholds, which are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals, thus providing greater noise margins than conventional gates.
The inputs tolerate voltages up to 7V allowing the inter­face of 5V systems to 3V systems.
©1996 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LVX132 Rev. 1.4.0
74LVX132 — Low Voltage Quad 2-Input NAND Schmitt Trigger
Connection Diagram
Pin Description
Pin Names Descriptions
A
, B
n
n
Y
n
Inputs Outputs
Logic Diagram
©1996 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LVX132 Rev. 1.4.0 2
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Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.
Symbol Parameter Rating
V
CC
I
IK
V
I
OK
V
O
I
O
I
or I
CC
T
STG
PPower Dissipation 180mW
Supply Voltage –0.5V to +7.0V DC Input Diode Current, V DC Input Voltage –0.5V to 7V
I
–0.5V –20mA
I
DC Output Diode Current
–0.5V –20mA
V
O
V
V
O
+ 0.5V +20mA
CC
DC Output Voltage –0.5V to V DC Output Source or Sink Current ±25mA
GND
DC V
or Ground Current ±50mA
CC
Storage Temperature –65°C to +150°C
CC
+ 0.5V
74LVX132 — Low Voltage Quad 2-Input NAND Schmitt Trigger
Recommended Operating Conditions
(1)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings.
Symbol Parameter Rating
V
CC
V
V
O
T
A
t
/
Note:
1. Unused inputs must be held HIGH or LOW. They may not float.
Supply Voltage 2.0V to 3.6V Input Voltage 0V to 5.5V
I
Output Voltage 0V to V Operating Temperature –40°C to +85°C
V Input Rise and Fall Time 0ns/V to 100ns/V
CC
©1996 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LVX132 Rev. 1.4.0 3
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