Fairchild 74LVX125 service manual

H =
74LVX125 — Low Voltage Quad Buffer with 3-STATE Outputs
February 2008
Features
Input voltage level translation from 5V to 3V Ideal for low power/low noise 3.3V applications
Guaranteed simultaneous switching noise level and dynamic threshold performance
General Description
The LVX125 contains four independent non-inverting buffers with 3-STATE outputs. The inputs tolerate volt­ages up to 7V allowing the interface of 5V systems to 3V systems.
Ordering Information
Order
Number
74LVX125M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LVX125SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVX125MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Connection Diagram
Package
Number Package Description
Logic Symbol
IEEE/IEC
Pin Description
Pin Names Description
A
n
OE
n
O
n
©1994 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LVX125 Rev. 1.4.0
Inputs Output Enable Inputs Outputs
Truth Table
Inputs Output
OE
n
LLL LHH
HXZ
HIGH Voltage Level L = LOW Voltage Level Z = High Impedance X = Immaterial
A
n
O
n
=
=
=
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.
Symbol Parameter Rating
V
CC
I
IK
V
I
OK
V
I
O
I
or I
CC
T
STG
PPower Dissipation 180mW
Supply Voltage –0.5V to +7.0V DC Input Diode Current, V DC Input Voltage –0.5V to 7V
I
–0.5V –20mA
I
DC Output Diode Current
–0.5V –20mA
V
O
V
V
O
DC Output Voltage –0.5V to V
O
+ 0.5V +20mA
CC
DC Output Source or Sink Current ±25mA
GND
DC V
or Ground Current ±50mA
CC
Storage Temperature –65°C to +150°C
CC
+ 0.5V
74LVX125 — Low Voltage Quad Buffer with 3-STATE Outputs
Recommended Operating Conditions
(1)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings.
Symbol Parameter Rating
V
CC
V
V
O
T
A
t
/
Note:
1. Unused inputs must be held HIGH or LOW. They may not float.
Supply Voltage 2.0V to 3.6V Input Voltage 0V to 5.5V
I
Output Voltage 0V to V Operating Temperature –40°C to +85°C
V Input Rise and Fall Time 0ns/V to 100ns/V
CC
©1994 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LVX125 Rev. 1.4.0 2
DC Electrical Characteristics
Symbol Parameter V
V
V
V
V
I
I
I
OH
OL
OZ
IN
CC
HIGH Level Input
IH
Voltage
LOW Level Input
IL
Voltage
HIGH Level Output Voltage
LOW Level Output Voltage
3-STATE Output Off-State Current
Input Leakage Current
Quiescent Supply Current
CC
2.0 1.5 1.5 V
3.0 2.0 2.0
3.6 2.4 2.4
2.0 0.5 0.5 V
3.0 0.8 0.8
3.6 0.8 0.8
2.0 V
3.0 V
2.0 V
3.0 V
3.6 V
3.6
3.6 V
Conditions
V
IN
I
–50µA
OH
V
IN
I
–50µA
OH
V
V
IN
I
–4mA
OH
V
IN
I
50µA
OL
V
IN
I
50µA
OL
V
V
IN
I
4mA
OL
V
IN
V
OUT
V
5.5V or GND
IN
V
IN
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
T
–40°C to
A
+85°C
IL
IL
IL
IL
IL
IL
IL
V
or V
or V
or V
or V
or V
or V
or V
or GND
CC
T
+25°C
A
,
IH
,
IH
,
IH
,
IH
,
IH
,
IH
,
IH
1.9 2.0 1.9 V
2.9 3.0 2.9
2.58 2.48
0.0 0.1 0.1 V
0.0 0.1 0.1
0.36 0.44
±0.25 ±2.5 µA
±0.1 ±1.0 µA
or GND 4.0 40.0 µA
CC
=
=
=
=
=
=
74LVX125 — Low Voltage Quad Buffer with 3-STATE Outputs
UnitsMin. Typ. Max. Min. Max.
Noise Characteristics
Symbol Parameter V
V
V V
V
OLP
OLV
IHD
ILD
Quiet Output Maximum Dynamic V Quiet Output Minimum Dynamic V Minimum HIGH Level Dynamic Input Voltage 3.3 50 2.0 V Maximum LOW Level Dynamic Input Voltage 3.3 50 0.8 V
(2)
OL
OL
T
25°C
A
(V) C
CC
(pF)
L
3.3 50 0.3 0.8 V
3.3 50 –0.3 –0.8 V
UnitsTyp. Limit
Note:
2. Input t
©1994 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LVX125 Rev. 1.4.0 3
t
3ns
r
f
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