Fairchild 74LCXH162374 service manual

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74LCXH162374
Low Voltage 16-Bit D-Type Flip-Flop with Bushold

and 26

Ω Series Resistors in Outputs

74LCXH162374 Low Voltage 16-Bit D-Type Flip-Flop with Bushold and 26

February 2001
Revised October 2001

General Description

The LCXH162374 contains sixteen non-inverting D-type
flip-flops with 3-STATE outputs and is intended for bus ori­ented applications. The dev ice is byte controlled. A buff­ered clock (CP) and Output E nable (OE
each byte and can be shorted together for full 16-bit opera­tion.

The LCXH162374 is designed for low voltage (2.5V or

3.3V) V
include active bushold circuitry, eliminating the need for

external pull-up resi stors to hold unused or floa ting data
inputs at a valid logic level. The 2 6
output helps reduce output overshoot and undershoot.

The LCXH162374 is fa bricated with an advanced CMOS
technology to achieve high speed operation while maintain­ing CMOS low power dissipation.

applications. The LCXH162374 data inputs

CC

) are common to

Ω series resistor in the

Features

■ 5V tolerant control inputs and outputs

■ 2.3V–3.6V V

■ 7.0 ns t

■ Power down high impedance inputs and outputs

■

±12 mA output drive (V

■ Implements patented noise/EMI reduction circuitry

■ Latch-up performance exce eds 500 mA

■ ESD performance:

Human body model
Machine model

■ Equivalent 26

■ Bushold on inputs eliminates the need for external

pull-up/pull-down resistors

■ Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA) (Preliminary)

specifications provided

CC

max (VCC = 3.3V), 20 µA ICC max

PD

= 3.0V)

CC

> 2000V

> 200V

Ω series resistors on output

Ordering Code:

Order Number

74LCXH162374GX
(Note 1)

74LCXH162374MEA MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

74LCXH162374MEX
(Note 2)

74LCXH162374MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

74LCXH162374MTX
(Note 2)

Note 1: BGA package available in Tape and Reel only.
Note 2: Use this order number to receive devices in Tape and Reel.

Package

Number

BGA54A

(Preliminary)

MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[TAPE and REEL]

[TUBES]

[TAPE and REEL]

[TUBES]

[TAPE and REEL]

Package Description

Ω

Series Resistors in Outputs

Logic Symbol

GTO is a trademark of Fa irc hild Semiconduct or C orporation.

© 2001 Fairchild Semiconductor Corporation DS500446 www.fairchildsemi.com

Connection Diagrams

Pin Descriptions

Pin Assignment for SSOP and TSSOP

74LCXH162374

Pin Assignment for FBGA

Pin Names Description

OE
CP
I

0–I15

O

n
n

0–O15

Output Enable Input (Active LOW)
Clock Pulse Input

Inputs (Bushold)
Outputs

NC No Connect

FBGA Pin Assignments

123456

A O
B O
C O
D O
E O
F O
G O
H O

J O

NC OE1CP1NC I

0

O1NC NC I

2

O3V

4
6

8
10
12O11VCCVCCI11
14O13

15

CCVCCI3

O5GND GND I
O7GND GND I
O9GND GND I

NC NC I

NC OE2CP2NC I

1

5
7
9

13I14

Truth Tables

Inputs Outputs

CP

1




LL X O
XH X Z

OE

1

I0–I

7

O0–O

LH H
LL L

0

I

2

I

4

I

6

I

8

I

10

I

12

15

7

0

(Top Thru View)

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Inputs Outputs

CP




2

OE

2

I8–I

15

O8–O

LH H
LL L

LL X O

XH X Z

H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance

= Previous O0 before HIGH-to-LOW of CP

O

0

15

0

Functional Description

The LCXH162374 consists of sixteen edge-triggered
flip-flops with individual D-type inputs and 3-STATE true
outputs. The device i s byte contr olled wit h each byte func ­tioning identically, but independent of the other. The control
pins can be shorted to gether to obtain f ull 1 6-b it o per ati o n.
Each byte h a s a bu ffered clock a nd bu ffered Output En ab le
common to all flip-flops within that byte. The description
which follows applies to each byte. Each flip-flop will store

Logic Diagrams

Byte 1 (0:7)

Byte 2 (8:15)

the state of their individual D inputs that meet the setup and
hold time requirements on t he LOW-to-HIGH Clock (CP

transition. With the Output Enable (OE
tents of the flip-flops ar e available at the outputs. When

OE

is HIGH, the outputs go to the high impedan ce state.

n

Operation of the OE
flip-flops.

input does not affect the stat e of the

n

) LOW, the con-

n

74LCXH162374

)

n

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

3 www.fairchildsemi.com

Absolute Maximum Ratings(Note 3)

Symbol Parameter Value Conditions Units

V

CC

V

I

V

O

74LCXH162374

I

IK

I

OK

I

O

I

CC

I

GND

T

STG

Supply Voltage −0.5 to +7.0 V
DC Input Voltage I0 - I

OE

n

15

, LE

n

−0.5 to V

CC

−0.5V to 7.0V

+ 0.5

DC Output Voltage −0.5 to +7.0 3-STATE

−0.5 to V

+ 0.5 Output in HIGH or LOW State (Note 4)

CC

DC Input Diode Current −50 VI < GND mA
DC Output Diode Current −50 VO < GND

+50 V

> V

O

CC

DC Output Source/Sink Current ±50 mA
DC Supply Current per Supply Pin ±100 mA
DC Ground Current per Ground Pin ±100 mA
Storage Temperature −65 to +150 °C

Recommended Operating Conditions (Note 5)

Symbol Parameter Min Max Units

V

CC

V

I

V

O

I

OH/IOL

T

A

∆t/∆V Input Edge Rate, V

Note 3: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated
at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recom-
mended Operat ing Conditions” table w ill define the condition s fo r ac t ual device operation.

Note 4: I
Note 5: Floating or unused control inputs must be HIGH or LOW.

Supply Voltage Operating 2.0 3.6

Data Retention 1.5 3.6
Input Voltage 0 V
Output Voltage HIGH or LOW State 0 V

CC
CC

3-STATE 0 5.5

Output Current in IOH/I

OL

VCC = 3.0V − 3.6V ±12

= 2.7V − 3.0V ±8

CC

= 2.3V − 2.7V ±4

V

CC

Free-Air Operating Temperature −40 85 °C

= 0.8V–2.0V, VCC = 3.0V 0 10 ns/V

IN

Absolute Maximum Rating must be observed.

O

V

V

mA

V
V
V

mAV

DC Electrical Characteristics

Symbol Parameter Conditions

V

IH

V

IL

V

OH

V

OL

I

I

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HIGH Level Input Voltage 2.3 − 2.7 1.7

LOW Level Input Voltage 2.3 − 2.7 0.7

HIGH Level Output Voltage IOH = −100 µA2.3 − 3.6 VCC − 0.2

IOH = −4 mA 2.3 1.8
IOH = −4mA 2.7 2.2
IOH = −6 mA 3.0 2.4
IOH = −8 mA 2.7 2.0
IOH = −12 mA 3.0 2.0

LOW Level Output Voltage IOL = 100 µA2.3 − 3.6 0.2

IOL = 4 mA 2.3 0.6
IOL = 4 mA 2.7 0.4
IOL = 6 mA 3.0 0.55
IOL = 8 mA 2.7 0.6
IOL = 12 mA 3.0 0.8

Input Leakage Current Data VI = VCC or GND 2.3 − 3.6 ±5.0

Control 0V ≤ VI ≤ 5.5V 2.3 − 3.6 ±5.0

V

CC

(V) Min Max

2.7 − 3.6 2.0

2.7 − 3.6 0.8

TA = −40°C to +85°C

Units

V

V

V

V

µA