Fairchild 74AC240 service manual
74AC240, 74ACT240
Octal Buffer/Line Driver with 3-STATE Outputs
74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs
January 2008
Features
ICC and IOZ reduced by 50%
■
■
Inverting 3-STATE outputs drive bus lines or buffer
memory address registers
Outputs source/sink 24mA
■
■
ACT240 has TTL-compatible inputs
General Description
The AC/ACT240 is an octal buffer and line driver
designed to be employed as a memory address driver,
clock driver and bus oriented transmitter or receiver
which provides improved PC board density.
Ordering Information
Package
Order Number
74AC240SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74AC240SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC240MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
74AC240PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
74ACT240SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74ACT240SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ACT240MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
74ACT240PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
Number Package Description
Wide
Wide
All packages are lead free per JEDEC: J-STD-020B standard.
©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com
74AC240, 74ACT240 Rev. 1.2.0
74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs
Connection Diagram
1
OE
1
2
I
0
3
O
4
4
I
1
5
O
5
6
I
2
7
O
6
8
I
3
9
O
7
10
GND
Pin Description
Pin Names Description
OE1, OE
I0–I
7
O
0–O7
2
3-STATE Output Enable Inputs
Inputs
Outputs
Logic Symbol
I
I
I
I
I
I
I
I
1
0
1
2
3
2
4
5
6
7
IEEE/IEC
EN
EN
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
20
V
CC
19
OE
2
18
O
0
17
I
4
16
O
1
15
I
5
14
O
2
13
I
6
12
O
3
11
I
7
OE
OE
Truth Tables
Inputs
1
LL H
LH L
HX Z
I
n
Outputs
(Pins 12, 14, 16, 18)OE
Inputs
2
I
n
Outputs
(Pins 3, 5, 7, 9)OE
LL H
LH L
HX Z
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com
74AC240, 74ACT240 Rev. 1.2.0 2
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol Parameter Rating
V
CC
I
IK
V
I
OK
V
O
I
O
or I
I
CC
T
STG
T
Supply Voltage
DC Input Diode Current
VI = −0.5V
VI = VCC + 0.5
DC Input Voltage
I
−
0.5V to VCC + 0.5V
DC Output Diode Current
VO = −0.5V
VO = VCC + 0.5V
DC Output Voltage
−
0.5V to VCC + 0.5V
DC Output Source or Sink Current
DC VCC or Ground Current per Output Pin
GND
Storage Temperature
Junction Temperature 140°C
J
−65°
−
0.5V to +7.0V
−
20mA
+
20mA
−
20mA
+
20mA
±
50mA
±
50mA
C to +150°C
74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol Parameter Rating
V
∆
V / ∆
∆
V
CC
V
V
O
T
A
/
Supply Voltage
AC 2.0V to 6.0V
ACT 4.5V to 5.5V
Input Voltage 0V to V
I
Output Voltage 0V to V
Operating Temperature
t Minimum Input Edge Rate, AC Devices:
from 30% to 70% of VCC, VCC @ 3.3V, 4.5V, 5.5V
V
IN
∆
t Minimum Input Edge Rate, ACT Devices:
from 0.8V to 2.0V, VCC @ 4.5V, 5.5V
V
IN
−40°
C to +85°C
125mV/ns
125mV/ns
CC
CC
©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com
74AC240, 74ACT240 Rev. 1.2.0 3
DC Electrical Characteristics for AC
TA = +25°CTA = −40°C to +85°C
Symbol Parameter V
V
V
V
V
I
IN
I
I
OLD
I
OHD
I
CC
Notes:
1. All outputs loaded; thresholds on input associated with output under test.
2. I
IN
3. Maximum test duration 2.0ms, one output loaded at a time.
Minimum HIGH Level
IH
Input Voltage
Maximum LOW Level
IL
Input Voltage
Minimum HIGH Level
OH
Output Voltage
Maximum LOW Level
OL
Output Voltage
(2)
Maximum Input
Leakage Current
Maximum 3-STATE
OZ
Leakage Current
Minimum Dynamic
Output Current
5.5 V
(2)
Maximum Quiescent
(3)
Supply Current
and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC.
(V) Conditions
CC
3.0 V
4.5 2.25 3.15 3.15
= 0.1V or
OUT
VCC – 0.1V
1.5 2.1 2.1 V
5.5 2.75 3.85 3.85
3.0 V
4.5 2.25 1.35 1.35
= 0.1V or
OUT
VCC – 0.1V
1.5 0.9 0.9 V
5.5 2.75 1.65 1.65
3.0 I
= –50µA 2.99 2.9 2.9 V
OUT
4.5 4.49 4.4 4.4
5.5 5.49 5.4 5.4
3.0 V
4.5 V
5.5 V
3.0 I
= VIL or V
IN
= –12mA
I
OH
= VIL or VIH,
IN
= –24mA
I
OH
= VIL or VIH,
IN
= –24mA
I
OH
= 50µA 0.002 0.1 0.1 V
OUT
IH
(1)
,
2.56 2.46
3.86 3.76
4.86 4.76
4.5 0.001 0.1 0.1
5.5 0.001 0.1 0.1
3.0 V
4.5 V
5.5 V
= VIL or VIH,
IN
= 12mA
I
OL
= VIL or VIH,
IN
= 24mA
I
OL
= VIL or VIH,
IN
= 24mA
I
OL
(1)
0.36 0.44
0.36 0.44
0.36 0.44
5.5 VI = VCC, GND ±0.1 ±1.0 µA
5.5 VI (OE) = VIL, VIH;
V
= VCC, GND;
I
V
= VCC, GND
O
5.5 V
= 1.65V Max. 75 mA
OLD
= 3.85V Min. -75 mA
OHD
±0.25 ±2.5 µA
5.5 VIN = VCC or GND 4.0 40.0 µA
74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs
UnitsTyp. Guaranteed Limits
©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com
74AC240, 74ACT240 Rev. 1.2.0 4
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