Fairchild 100314 service manual

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100314
Low Power Quint Differential Line Receiver

100314 Low Power Quint Differential Line Receiver

February 1990
Revised August 2000

General Description

The 100314 is a mo nolithic quint differential li ne receiver
with emitter-followe r outputs. An internal re ference supply
(V

) is available for single-ended reception. When used in

BB

single-ended operati on the a pparent in put thresh old of t he
true inputs is 25 mV to 30 mV higher (positive) than the
threshold of the complementary inputs. Unlike other F100K
ECL devices, the inputs do not have i nput pul l-down resis­tors.

Active current sources provi de common-mode re jection of

1.0V in either the posit ive or negativ e direction. A defin ed
output state exists if both inverting and non-inverting inputs
are at the same potential between V

defined state is logic HIGH on the O

and VCC. The

EE

outputs.

a–Oe

Features

■ 35% power reduction of the 100114

■ 2000V ESD protection

■ Pin/function compatible with 100114

■ Voltage compensated operating range

■ Available to industrial grade temperature range

(PLCC package only)

= −4.2V to −5.7V

Ordering Code:

Order Number Package Number Package Description

100314SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
100314PC N24E 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
100314QC V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
100314QI V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square

Devices also availab l e in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering code.

Logic Symbol

Industrial Temperature Range (

Connection Diagrams

−40°C to +85°C)

24-Pin DIP/SOIC

28-Pin PLCC

Pin Descriptions

Pin Names Description

D

a–De

D

a–De

O

a–Oe

O

a–Oe

© 2000 Fairchild Semiconductor Corporation DS010260 www.fairchildsemi.com

Data Inputs
Inverting Data Inputs
Data Outputs
Complementary Data Outputs

Absolute Maximum Ratings(Note 1) Recommended Operating

Storage Temperature (T

100314

Maximum Junction Temperature (T
Pin Potential to Ground Pin (V

) −65°C to +150°C

STG

) −7.0V to +0.5V

EE

Input Voltage ( DC) V
Output Current (DC Output HIGH)
ESD (Note 2)

) +150°C

J

to +0.5V

EE

−50 mA
≥2000V

Conditions

Case Temperature (T

Commercial 0
Industrial

Supply Voltage ( V

Note 1: The “Absolute Maximum Ratings” are those values bey ond which
the safety of the d evice cannot be guaranteed. The device sh ould not be
operated at these limit s. The parametric values defin ed in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recomme nded O peratin g Cond itions ” table will defin e the condition s
for actual device operation.

Note 2: ESD testing conf orm s to MIL-STD-883 , M ethod 3015.

)

C

) −5.7V to −4.2V

EE

Commercial Version

°C to +85°C

−40°C to +85°C

DC Electrical Characteristics

V

= −4.2V to −5.7V, VCC = V

EE

Symbol Parameter Min Typ Max Units Conditions

V

OH

V

OL

V

OHC

V

OLC

V

BB

V

DIFF

V

CM

V

IH

V

IL

I

IL

I

IH

I

CBO

I

EE

Note 3: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional
noise immunity and guardbanding can be achieved by decreasing the all owable syste m opera ti ng r anges. Co ndi ti ons fo r t est ing shown in the ta ble s are cho­sen to guarantee operation under “worst case” con dit ions.

Output HIGH Voltage −1025 −955 −870 mV VIN = VIH (Max) Loading with
Output LOW Voltage −1830 −1705 −1620 mV or VIL (Min) 50Ω to −2.0V
Output HIGH Voltage −1035 mV VIN = VIH Loading with
Output LOW Voltage −1610 mV or VIL (Max) 50Ω to −2.0V
Output Reference Voltage −1380 −1320 −1260 mV I
Input Voltage Differential 150 mV Required for Full Output Swing
Common Mode Voltage VCC − 2.0 VCC − 0.5 V
Single-Ended Guaranteed HIGH Signal for All
Input HIGH Voltage −1110 −870 mV Inputs (with one input tied to VBB)

Single-Ended Guaranteed LOW Signal for All
Input LOW Voltage −1830 −1530 mV Inputs (with one input tied to VBB)

Input LOW Current 0.50 µAVIN = VIL (Min)
Input HIGH Current 240 µAVIN = V

Input Leakage Current −10 µAVIN = VEE, Da–De = VBB,

Power Supply Current −60 −30 mA Da–De = VBB, Da–De = V

CCA

= GND, T

(Note 3)

= 0°C to +85°C

C

VBB

V

V

D

D

BB

BB

a–De

a–De

= −250 µA

(Max) + V

(Min) − V

IH (Max)

= V

IL(Min)

= V

IL (Min)

DIFF

DIFF

, Da–De = VBB,

IL (Min)

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Commercial Version (Continued)
DIP AC Electrical Characteristics

V

= −4.2V to −5.7V, VCC = V

EE

Symbol Parameter

f

MAXFS

Toggle Frequency
(Full Swing)

f

MAXRS

Toggle Frequency
(Reduced Swing)

t

PLH

t

PHL

t

TLH

t

THL

Propagation Delay
Data to Output
Transition Time
20% to 80%, 80% to 20%

CCA

= GND

TC = 0°CT

= +25°CT

C

= +85°C

C

Min Max Min Max Min Max

250 250 250 MHz (Note 2)

700 700 700 MHz (Note 3)

0.65 1.90 0.65 2.00 0.70 2.00 ns

0.35 1.20 0.35 1.20 0.35 1.20 ns

Units Conditions

Figures 1, 2

SOIC and PLCC AC Electrical Characteristics

V

= −4.2V to −5.7V, VCC = V

EE

Symbol Parameter

f

MAXFS

Toggle Frequency
(Full Swing)

f

MAXRS

Toggle Frequency
(Reduced Swing)

t

PLH

t

PHL

t

TLH

t

THL

t

PLH

t

PHL

t

OSHL

Propagation Delay
Data to Output
Transition Time
20% to 80%, 80% to 20%
Propagation Delay
Data to Output
Maximum Skew Common Edge PLCC only
Output-to-Output Variation 280 280 280 ps (Note 6)(Note 7)
Data to Output Path

t

OSLH

Maximum Skew Common Edge PLCC only
Output-to-Output Variation 330 330 330 ps (Note 6)(Note 7)
Data to Output Path

t

OST

Maximum Skew Opposite Edge PLCC only
Output-to-Output Variation 330 330 330 ps (Note 6)(Note 7)
Data to Output Path

t

PS

Maximum Skew PLCC only
Pin (Signal) Transition Variation 320 320 320 ps (Note 6)(Note 7)
Data to Output Path

Note 4: Maximum toggle frequency at which VOH and VOL DC specifications are maintained.
Note 5: Maximum toggle frequency at which output s maintain 150 mV swi ng.
Note 6: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same pack-

aged device. The sp ecifica tions a pply to an y outp uts swit ching in the sam e direc tion eithe r HIGH -to-LOW (t
directions both HL and LH (t

Note 7: All skews calculated usin g input crossing poin t to output crossing point propagation del ay s .

OST

= GND

CCA

). Parameters t

TC = 0°CT

= +25°CT

C

= +85°C

C

Min Max Min Max Min Max

250 250 250 MHz (Note 4)

700 700 700 MHz (Note 5)

0.65 1.70 0.65 1.80 0.70 1.80 ns

0.35 1.10 0.35 1.10 0.35 1.10 ns

0.70 1.50 0.80 1.60 0.90 1.80 ns PLCC only

), or LOW-to-HIGH (t

and tPS guaranteed by de s ign.

OST

OSHL

Units Conditions

Figures 1, 2

), or in opposite

OSLH

100314

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