Espressif Systems ESP32 Series, ESP32-D2WD, ESP32-S0WD, ESP32-D0WDQ6, ESP32-D0WD Hardware Design Manuallines
ESP32
Hardware Design Guidelines
www.espressif.com
Version 2.7
Espressif Systems
Copyright © 2019
About This Document
The guidelines outline recommended design practices when developing standalone or add-on systems based on
the ESP32 series of products, including ESP32 SoCs, ESP32 modules and ESP32 development boards.
Revision History
For the revision history of this document, please refer to the last page.
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ITY, NON-INFRINGEMENT, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANY WARRANTY OTHERWISE
ARISING OUT OF ANY PROPOSAL, SPECIFICATION OR SAMPLE.
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ment is disclaimed. No licenses express or implied, by estoppel or otherwise, to any intellectual property rights
are granted herein. The Wi-Fi Alliance Member logo is a trademark of the Wi-Fi Alliance. The Bluetooth logo is a
registered trademark of Bluetooth SIG.
All trade names, trademarks and registered trademarks mentioned in this document are property of their respective
owners, and are hereby acknowledged.
Copyright © 2019 Espressif Inc. All rights reserved.
Contents
1 Overview 1
2 Schematic Checklist and PCB Layout Design 2
2.1 Schematic Checklist 2
2.1.1 Power Supply 3
2.1.1.1 Digital Power Supply 3
2.1.1.2 Analog Power Supply 4
2.1.2 Power-on Sequence and System Reset 4
2.1.2.1 Power-on Sequence 4
2.1.2.2 Reset 4
2.1.3 Flash 5
2.1.4 Crystal Oscillator 5
2.1.4.1 External Clock Source (Compulsory) 5
2.1.4.2 RTC (Optional) 6
2.1.5 RF 7
2.1.6 ADC 7
2.1.7 External Capacitor 8
2.1.8 UART 8
2.2 PCB Layout Design 8
2.2.1 Standalone ESP32 Module 9
2.2.1.1 General Principles of PCB Layout 9
2.2.1.2 Positioning a ESP32 Module on a Base Board 10
2.2.1.3 Power Supply 11
2.2.1.4 Crystal Oscillator 12
2.2.1.5 RF 13
2.2.1.6 External RC 14
2.2.1.7 UART 14
2.2.1.8 Touch Sensor 15
2.2.2 ESP32 as a Slave Device 16
2.2.3 Typical Layout Problems and Solutions 17
2.2.3.1 Q: The current ripple is not large, but the TX performance of RF is rather poor. 17
2.2.3.2 Q: The power ripple is small, but RF TX performance is poor. 18
2.2.3.3 Q: When ESP32 sends data packages, the power value is much higher or lower than the
target power value, and the EVM is relatively poor. 18
2.2.3.4 Q: TX performance is not bad, but the RX sensitivity is low. 18
3 Hardware Development 19
4 Applications 20
4.1 ESP32 Smart Audio Platform 20
4.1.1 ESP32-LyraT Audio Development Board 20
4.1.2 ESP32-LyraTD-MSC Audio Development Board 21
4.2 ESP32 Touch Sensor Application—ESP32-Sense Kit 22
4.3 ESP-Mesh Application—ESP32-MeshKit 23
Revision History 24
List of Figures
1 ESP32 Schematics (ESP32-D0WD used as an example for all illustrations in this section) 2
2 ESP32 Digital Power Supply Pins 3
3 ESP32 Analog Power Supply Pins 4
4 ESP32 Flash 5
5 ESP32 Crystal Oscillator 6
6 Schematic for ESP32’s External Crystal (RTC) 6
7 Schematic of External Oscillator 7
8 ESP32 RF Matching Schematics 7
9 ESP32 External Capacitor 8
10 ESP32 UART 8
11 ESP32 PCB Layout 9
12 ESP32 Module Antenna Position on Base Board 10
13 Keepout Zone for ESP32 Module’s Antenna on the Base Board 11
14 ESP32 Power Traces in a Four-layer PCB Design 11
15 ESP32 Power Traces in a Two-layer PCB Design 12
16 ESP32 Crystal Oscillator Layout 13
17 ESP32 RF Layout in a Four-layer PCB Design 14
18 ESP32 RF Layout in a Two-layer PCB Design 14
19 ESP32 UART Design 15
20 A Typical Touch Sensor Application 15
21 Electrode Pattern Requirements 16
22 Sensor Track Routing Requirements 16
23 PAD/TV Box Layout 17
24 Top View of ESP32-LyraT 20
25 Bottom View of ESP32-LyraT 21
26 ESP32-LyraTD-MSC 22
27 ESP32-Sense Kit 22
28 ESP32-MeshKit-Light � 23
29 ESP32-MeshKit-Sense Development Board 23
1. Overview
1. Overview
ESP32 is a single 2.4 GHz Wi-Fi and Bluetooth combo chip designed with TSMC ultra-low-power 40 nm technol-
ogy. It is designed to achieve the best power and RF performance, robustness, versatility, and reliability in a wide
variety of applications and different power profiles.
ESP32 is a highly-integrated solution for Wi-Fi + Bluetooth applications in the IoT industry with around 20 external
components. ESP32 integrates the antenna switch, RF balun, power amplifier, low noise receive amplifier, filters,
and power management modules. As such, the entire solution occupies minimal Printed Circuit Board (PCB)
area.
ESP32 uses CMOS for single-chip fully-integrated radio and baseband, and also integrates advanced calibration
circuitries that allow the solution to dynamically adjust itself to remove external circuit imperfections or adjust to
changes in external conditions. As such, the mass production of ESP32 solutions does not require expensive and
specialized Wi-Fi test equipment.
The ESP32 series of chips include ESP32-D0WDQ6, ESP32-D0WD, ESP32-D2WD and ESP32-S0WD. For details
of part number and ordering information, please refer to ESP32 Datasheet.
Espressif Systems 1 ESP32 Hardware Design Guidelines V2.7
2. Schematic Checklist and PCB Layout Design
4
3
The capacitance of C1 and C2 varies
with the selection of the crystal.
SENSOR_VP
SENSOR_VN
GPIO32
GPIO33
CHIP_PU
GPIO35
SCK/CLK
SCS/CMD
SENSOR_VP
SHD/SD2 SWP/SD3
SDI/SD1
SDO/SD0
SENSOR_VN
GPIO34
GPIO26
GPIO27
GPIO14
GPIO12
GPIO2
GPIO15
GPIO0
GPIO4
CHIP_PU
GPIO34
GPIO35
GPIO25
GPIO26
GPIO27
GPIO14
GPIO32
GPIO33
GPIO21
U0TXD
U0RXD
GPIO25
GPIO13
GPIO16
SDI/SD1
SDO/SD0
SCK/CLK
SCS/CMD
SWP/SD3
SHD/SD2
GPIO5
GPIO18
GPIO23
GPIO17
GPIO19
GPIO22
GND
VDD33
GND
VDD33
GND
GND
GND
VDD33
GND
GND
VDD_SDIO
GND
VDD_SDIO
GND
GND
GND
GNDGND
VDD33
VDD33
GNDGND
GND
GND
GND
GND GND
VDD33
GND
GND
L5
2.0nH
R1 20K(5%)
C13
10uF
U3 FLASH
/CS
1
DO
2
/WP
3
GND
4
DI
5
CLK
6
/HOLD
7
VCC
8
J23
CON1
1
C5
10nF/6.3V(10%)
C14
TBD
J26
CON1
1
J31
CON1
1
C6
3.3nF/6.3V(10%)
D1
ESD3.3V88D-LCDN
C9
0.1uF
J4
CON1
1
R3 499R
C11
1uF
J22
CON1
1
J14
CON1
1
J35
1
C15
TBD
ANT1
PCB ANT
1
2
C16
270pF(NC)
J7
CON1
1
J25
CON1
1
J33
CON1
1
J17
CON1
1
C17
270pF(NC)
J10
CON1
1
J1
CON1
1
J2
CON1
1
U2 ESP32-D0WD
VDDA
1
LNA_IN
2
VDD3P3
3
VDD3P3
4
SENSOR_VP
5
SENSOR_CAPP
6
SENSOR_CAPN
7
SENSOR_VN
8
CHIP_PU
9
VDET_1
10
VDET_2
11
32K_XP
12
32K_XN
13
GPIO25
14
GPIO2615GPIO2716MTMS17MTDI18VDD3P3_RTC19MTCK20MTDO21GPIO222GPIO023GPIO4
24
VDD_SDIO
26
GPIO16
25
GPIO17
27
SD_DATA_2
28
SD_DATA_3
29
SD_CMD
30
SD_CLK
31
SD_DATA_0
32
GND
49
SD_DATA_1
33
GPIO5
34
GPIO18
35
GPIO19
38
CAP2
47
VDDA
43
XTAL_N
44
XTAL_P
45
GPIO23
36
U0TXD
41
GPIO2239GPIO21
42
VDD3P3_CPU
37
CAP1
48
VDDA
46
U0RXD
40
C20
1uF
L4 TBD
C1
TBD
C18
1uF
J20
CON1
1
J16
CON1
1
J5
CON1
1
C12
NC
U1
40MHz+/-10ppm
XIN1GND
2
XOUT
3
GND
4
C21
NC
J29
CON1
1
J8
CON1
1
J13
CON1
1
C2
TBD
J19
CON1
1
C4
0.1uF
C10
0.1uF
C3
100pF
C19
0.1uF
J11
CON1
1
R2
0R
J28
CON1
1
2. Schematic Checklist and PCB Layout Design
ESP32’s integrated circuitry requires only 20 resistors, capacitors and inductors, one crystal and one SPI flash
memory chip. ESP32 integrates the complete transmit/receive RF functionality including the antenna switches, RF
balun, power amplifier, low noise receive amplifier, filters, power management module, and advanced calibration
circuitries.
ESP32’s high integration allows for simple peripheral circuit design. This document details ESP32 schematics and
PCB layout design.
While the high level of integration makes the PCB design and layout process simple, the performance of the system
strongly depends on system design aspects. To achieve the best overall system performance, please follow the
guidelines specified in this document for circuit design and PCB layout. All the common rules associated with
good PCB design still apply and this document is not an exhaustive list of good design practices.
2.1 Schematic Checklist
ESP32 schematics is as shown in Figure 1.
Figure 1: ESP32 Schematics (ESP32-D0WD used as an example for all illustrations in this section)
Any basic ESP32 circuit design may be broken down into eight major sections:
• Power supply
• Power-on sequence and system reset
• Flash
• Crystal oscillator
Espressif Systems 2 ESP32 Hardware Design Guidelines V2.7
2. Schematic Checklist and PCB Layout Design
3
SENSOR_VP
SENSOR_VN
GPIO32
GPIO33
SCK/CLK
SCS/CMD
SHD/SD2 SWP/SD3
SDI/SD1
SDO/SD0
GPIO2
GPIO15
GPIO0
GPIO2
GPIO4
SHD/SD2
SWP/SD3
SCS/CMD
SCK/CLK
SDO/SD0
SDI/SD1
CHIP_PU
GPIO34
GPIO35
GPIO25
GPIO26
GPIO27
GPIO14
GPIO13
GPIO15
GPIO21
U0TXD
U0RXD
GPIO13
GPIO16
SDI/SD1
SDO/SD0
SCK/CLK
SCS/CMD
SWP/SD3
SHD/SD2
GPIO5
GPIO18
GPIO23
GPIO17
GPIO19
GPIO22
GND
GND
GND
GND
VDD_SDIO
GND
VDD_SDIO
GND
GND
GND
VDD33
VDD33
VDD33
U3 FLASH
/CS
1
DO
2
/WP
3
GND
4
DI
5
CLK
6
/HOLD
7
VCC
8
J23
CON1
1
J26
CON1
1
J31
CON1
1
D1
ESD3.3V88D-LCDN
J4
CON1
1
R3 499R
J22
CON1
1
J14
CON1
1
J35
1
J7
CON1
1
J25
CON1
1
J33
CON1
1
J17
CON1
1
J10
CON1
1
J1
CON1
1
J2
CON1
1
MTDI
VDD3P3_RTC19MTCK20MTDO21GPIO222GPIO023GPIO4
24
VDD_SDIO
26
GPIO16
25
GPIO17
27
SD_DATA_2
28
SD_DATA_3
29
SD_CMD
30
SD_CLK
31
SD_DATA_0
32
SD_DATA_1
33
GPIO5
34
GPIO18
35
GPIO19
38
VDDA
43
XTAL_N
44
XTAL_P
GPIO23
36
U0TXD
41
GPIO22
39
GPIO21
42
VDD3P3_CPU
37
U0RXD
40
C18
1uF
J20
CON1
1
J16
CON1
1
J5
CON1
1
U1
40MHz+/-10ppm
XIN
1
GND
2
XOUT
3
GND
4
J29
CON1
1
J8
CON1
1
J13
CON1
1
C2
TBD
J19
CON1
1
C4
0.1uF
C19
0.1uF
J11
CON1
1
R2
0R
J28
CON1
1
• RF
• ADC
• External capacitors
• UART
2.1.1 Power Supply
For further details of using the power supply pins, please refer to Section 2.3 Power Scheme in ESP32 Datasheet.
2.1.1.1 Digital Power Supply
Pin19 and pin37 are the power supply pins for RTC and CPU, respectively. The digital power supply operates in
a voltage range of 1.8 V ~ 3.6 V. We recommend adding extra filter capacitors of 0.1 µF close to the digital power
supply pins.
VDD_SDIO works as the power supply for the related IO, and also for an external device.
• When VDD_SDIO operates at 1.8 V, it can be generated from ESP32’s internal LDO. The maximum current
this LDO can offer is 40 mA, and the output voltage range is 1.65 V ~ 2.0 V. When the VDD_SDIO outputs
1.8 V, the value of GPIO12 should be set to 1 when the chip boots and it is recommended that users add a
2 kΩ ground resistor and a 4.7 µF filter capacitor close to VDD_SDIO.
• When VDD_SDIO operates at 3.3 V, it is driven directly by VDD3P3_RTC through a 6 Ω resistor, therefore,
there will be some voltage drop from VDD3P3_RTC. When the VDD_SDIO outputs 3.3 V, the value of GPIO12
is 0 (default) when the chip boots and it is recommended that users add a 1 µF capacitor close to VDD_SDIO.
VDD_SDIO can also be driven by an external power supply.
When using VDD_SDIO as the power supply pin for the external 3.3 V flash/PSRAM, the supply voltage should be
2.7 V or above, so as to meet the requirements of flash/PSRAM’s working voltage.
Figure 2: ESP32 Digital Power Supply Pins
Espressif Systems 3 ESP32 Hardware Design Guidelines V2.7
2. Schematic Checklist and PCB Layout Design
4
The capacitance of C1 and C2 varies
with the selection of the crystal.
SENSOR_VP
GPIO21
U0TXD
U0RXD
GPIO5
GPIO18
GPIO23
GPIO19
GPIO22
GND
VDD33
GND
VDD33
GND
GND
VDD33
VDD_SDIO
GND
GND
GND
GNDGND
VDD33
GNDGND
GND
GND
GND
GND
L5
2.0nH
R1 20K(5%)
C13
10uF
8
C5
10nF/6.3V(10%)
C14
C6
3.3nF/6.3V(10%)
C9
0.1uF
R3 499R
C11
1uF
C15
ANT1
1
2
C16
VDDA
1
LNA_IN
2
VDD3P3
3
VDD3P3
4
5
GND
49
34
GPIO18
35
GPIO19
38
CAP2
47
VDDA
43
XTAL_N
44
XTAL_P
45
GPIO23
36
U0TXD
41
GPIO22
39
GPIO21
42
VDD3P3_CPU
37
CAP1
48
VDDA
46
U0RXD
40
C20
1uF
L4 TBD
C1
TBD
C12
NC
U1
40MHz+/-10ppm
XIN
1
GND
2
XOUT
3
GND
4
C21
NC
C2
TBD
C4
0.1uF
C10
0.1uF
C3
100pF
R2
0R
2.1.1.2 Analog Power Supply
Pin1, pin3, pin4, pin43 and pin46 are the analog power supply pins. It should be noted that the sudden increase
in current draw, when ESP32 is in transmission mode, may cause a power rail collapse. Therefore, it is highly
recommended to add another 10 µF capacitor to the power trace, which can work in conjunction with the 0.1 µF
capacitor. LC filter circuit needs to be added near the power pin so as to suppress high-frequency harmonics.
The inductor’s rated current is preferably 500 mA and above.
Figure 3: ESP32 Analog Power Supply Pins
Notice:
• The recommended voltage of the power supply for ESP32 is 3.3 V, and its recommended output current is 500 mA
or more.
• It is suggested that users add an ESD tube at the power entrance.
2.1.2 Power-on Sequence and System Reset
2.1.2.1 Power-on Sequence
ESP32 uses a 3.3 V system power supply. The chip should be activated after the power rails have stabilized. This
is achieved by delaying the activation of CHIP_PU (Pin9) after the 3.3 V rails have been brought up. More details
can be found in section Power Scheme in ESP32 Datasheet.
Notice:
If CHIP_PU is driven by a power management chip, then the power management chip controls the ESP32 power
state. When the power management chip turns on/off Wi-Fi through the high/low level on GPIO, a pulse current
may be generated. To avoid level instability on CHIP_PU, an RC delay circuit is required.
2.1.2.2 Reset
CHIP_PU serves as the reset pin of ESP32. The input level (V
and remain so for a period of time. More details can be found in section Power Scheme in ESP32 Datasheet.
Espressif Systems 4 ESP32 Hardware Design Guidelines V2.7
IL_nRS T
) for resetting the chip should be low enough
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