ESP32-S2-WROVER &
ESP32-S2-WROVER-I
Datasheet
www.espressif.com
Version 1.0
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Copyright © 2020
About This Document
This document provides the specifications for the ESP32-S2-WROVER and ESP32-S2-WROVER-I module.
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For revision history of this document, please refer to the last page.
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PROVIDED AS IS WITH NO WARRANTIES WHATSOEVER, INCLUDING ANY WARRANTY OF MERCHANTABIL-
ITY, NON-INFRINGEMENT, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANY WARRANTY OTHERWISE
ARISING OUT OF ANY PROPOSAL, SPECIFICATION OR SAMPLE.
All liability, including liability for infringement of any proprietary rights, relating to use of information in this docu-
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are granted herein. The Wi-Fi Alliance Member logo is a trademark of the Wi-Fi Alliance. The Bluetooth logo is a
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owners, and are hereby acknowledged.
Copyright © 2020 Espressif Systems (Shanghai) Co., Ltd. All rights reserved.
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ESP32-S2-WROVER & ESP32-S2-WROVER-I Datasheet V1.0
1. Module Overview
1. Module Overview
1.1 Features
MCU
• ESP32-S2 embedded, Xtensa®single-core 32-bit
LX7 microprocessor, up to 240 MHz
• 128 KB ROM
• 320 KB SRAM
• 16 KB SRAM in RTC
Wi-Fi
• 802.11 b/g/n
• Bit rate: 802.11n up to 150 Mbps
• A-MPDU and A-MSDU aggregation
• 0.4 µs guard interval support
• Center frequency range of operating channel:
2412 ~ 2484 MHz
1.1 OTG, ADC, DAC, touch sensor, temperature
sensor
• 40 MHz crystal oscillator
• 4 MB SPI flash
• 2 MB PSRAM
• Operating voltage/Power supply: 3.0 ~ 3.6 V
• Operating temperature range: –40 ~ 85 °C
• Dimensions: (18 × 31 × 3.3) mm
Certification
• Green certification: RoHS/REACH
• RF certification: FCC/CE-RED/SRRC
Hardware
• Interfaces: GPIO, SPI, LCD, UART, I2C, I2S, Cam-
era interface, IR, pulse counter, LED PWM, USB
Test
• HTOL/HTSL/uHAST/TCT/ESD
1.2 Description
ESP32-S2-WROVER and ESP32-S2-WROVER-I are two powerful, generic Wi-Fi MCU modules that have a rich
set of peripherals. They are an ideal choice for a wide variety of application scenarios relating to Internet of Things
(IoT), wearable electronics and smart home.
ESP32-S2-WROVER comes with a PCB antenna, and ESP32-S2-WROVER-I with an IPEX antenna. They both
feature a 4 MB external SPI flash and an additional 2 MB SPI Pseudo static RAM (PSRAM). The information in this
datasheet is applicable to both modules. The ordering information of the two modules is listed as follows:
Table 1: Ordering Information
Module Chip embedded Flash PSRAM Module dimensions (mm)
ESP32-S2-WROVER (PCB)
ESP32-S2-WROVER-I (IPEX)
Notes:
1. The module with various capacities of flash is available for custom order.
2. For dimensions of the IPEX connector, please see Section 7.3.
ESP32-S2 4 MB 2 MB (18.00±0.15)×(31.00±0.15)×(3.30±0.15)
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1. Module Overview
At the core of this module is ESP32-S2 *, an Xtensa® 32-bit LX7 CPU that operates at up to 240 MHz. The
chip has a low-power co-processor that can be used instead of the CPU to save power while performing tasks
that do not require much computing power, such as monitoring of peripherals. ESP32-S2 integrates a rich set
of peripherals, ranging from SPI, I²S, UART, I²C, LED PWM, LCD, Camera interface, ADC, DAC, touch sensor,
temperature sensor, as well as up to 43 GPIOs. It also includes a full-speed USB 1.1 On-The-Go (OTG) interface
to enable USB communication.
Note:
* For more information on ESP32-S2, please refer to ESP32-S2 Datasheet.
1.3 Applications
• Generic Low-power IoT Sensor Hub
• Generic Low-power IoT Data Loggers
• Cameras for Video Streaming
• Over-the-top (OTT) Devices
• USB Devices
• Speech Recognition
• Image Recognition
• Mesh Network
• Home Automation
• Smart Home Control Panel
• Smart Building
• Industrial Automation
• Smart Agriculture
• Audio Applications
• Health Care Applications
• Wi-Fi-enabled Toys
• Wearable Electronics
• Retail & Catering Applications
• Smart POS Machines
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ESP32-S2-WROVER & ESP32-S2-WROVER-I Datasheet V1.0
CONTENTS
Contents
1 Module Overview 3
1.1 Features 3
1.2 Description 3
1.3 Applications 4
2 Block Diagram 8
3 Pin Definitions 9
3.1 Pin Layout 9
3.2 Pin Description 10
3.3 Strapping Pins 11
4 Electrical Characteristics 13
4.1 Absolute Maximum Ratings 13
4.2 Recommended Operating Conditions 13
4.3 DC Characteristics (3.3 V, 25 °C) 13
4.4 Current Consumption Characteristics 14
4.5 Wi-Fi RF Characteristics 15
4.5.1 Wi-Fi RF Standards 15
4.5.2 Transmitter Characteristics 15
4.5.3 Receiver Characteristics 15
5 Schematics 17
6 Peripheral Schematics 19
7 Physical Dimensions and PCB Land Pattern 20
7.1 Physical Dimensions 20
7.2 Recommended PCB Land Pattern 21
7.3 U.FL Connector Dimensions 22
8 Product Handling 23
8.1 Storage Condition 23
8.2 ESD 23
8.3 Reflow Profile 23
9 MAC Addresses and eFuse 24
10Learning Resources 25
10.1 Must-Read Documents 25
10.2 Must-Have Resources 25
Revision History 26
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LIST OF TABLES
List of Tables
1 Ordering Information 3
2 Pin Definitions 10
3 Strapping Pins 11
4 Absolute Maximum Ratings 13
5 Recommended Operating Conditions 13
6 DC Characteristics (3.3 V, 25 °C) 13
7 Current Consumption Depending on RF Modes 14
8 Current Consumption Depending on Work Modes 14
9 Wi-Fi RF Standards 15
10 Transmitter Characteristics 15
11 Receiver Characteristics 16
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LIST OF FIGURES
List of Figures
1 ESP32-S2-WROVER Block Diagram 8
2 ESP32-S2-WROVER-I Block Diagram 8
3 Pin Layout (Top View) 9
4 ESP32-S2-WROVER Schematics 17
5 ESP32-S2-WROVER-I Schematics 18
6 Peripheral Schematics 19
7 Physical Dimensions 20
8 Recommended PCB Land Pattern 21
9 U.FL Connector Dimensions 22
10 Reflow Profile 23
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2. Block Diagram
ESP32-S2
RF Matching
40 MHz
Crystal
3V3
ESP32-S2-WROVER
EN GPIOs
Antenna
SPI FLASH
SPICS0
SPICLK
SPIDI
SPIDO
SPIWP
SPIHD
VDD_SPI
SPI PSRAM
SPICLK
SPICS1
VDD_SPI
SIO0
SIO1
SIO2
SIO3
SPI FLASH
ESP32-S2
RF Matching
40 MHz
Crystal
SPICS0
SPICLK
SPIDI
SPIDO
SPIWP
SPIHD
3V3
VDD_SPI
ESP32-S2-WROVER-I
EN GPIOs
Antenna
SPI PSRAM
SPICLK
SPICS1
VDD_SPI
SIO0
SIO1
SIO2
SIO3
2. Block Diagram
Figure 1: ESP32-S2-WROVER Block Diagram
Figure 2: ESP32-S2-WROVER-I Block Diagram
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3. Pin Definitions
1
GND
2
3V3
3
IO0
4 IO1
5
IO2
6
IO3
Keepout Zone
7 IO4
8
IO5
9
IO6
10
IO7
11 IO8
12 IO9
13
IO10
14 IO11
15
IO12
16
IO13
42GND
41EN
40
IO46
39
IO45
38RXD0
37
TXD0
36IO42
35IO41
34IO40
33IO39
32IO38
31
IO37
30
IO36
29
IO35
28
IO34
27IO33
Pin 43
GND
GND
GND GND GND
GND
GNDGNDGND
17 IO14
18 IO15
19 IO16
20 IO17
21 IO18
22 IO19
23 IO20
24 IO21
25
IO26
26
GND
3. Pin Definitions
3.1 Pin Layout
Figure 3: Pin Layout (Top View)
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3. Pin Definitions
Note:
The pin diagram shows the approximate location of pins on the module. For the actual mechanical diagram, please refer
to Figure 7.1 Physical Dimensions.
3.2 Pin Description
The module has 42 pins. See pin definitions in Table 2.
Table 2: Pin Definitions
Name No. Type Function
GND 1 P Ground
3V3 2 P Power supply
IO0 3 I/O/T RTC_GPIO0, GPIO0
IO1 4 I/O/T RTC_GPIO1, GPIO1, TOUCH1, ADC1_CH0
IO2 5 I/O/T RTC_GPIO2, GPIO2, TOUCH2, ADC1_CH1
IO3 6 I/O/T RTC_GPIO3, GPIO3, TOUCH3, ADC1_CH2
IO4 7 I/O/T RTC_GPIO4, GPIO4, TOUCH4, ADC1_CH3
IO5 8 I/O/T RTC_GPIO5, GPIO5, TOUCH5, ADC1_CH4
IO6 9 I/O/T RTC_GPIO6, GPIO6, TOUCH6, ADC1_CH5
IO7 10 I/O/T RTC_GPIO7, GPIO7, TOUCH7, ADC1_CH6
IO8 11 I/O/T RTC_GPIO8, GPIO8, TOUCH8, ADC1_CH7
IO9 12 I/O/T RTC_GPIO9, GPIO9, TOUCH9, ADC1_CH8, FSPIHD
IO10 13 I/O/T RTC_GPIO10, GPIO10, TOUCH10, ADC1_CH9, FSPICS0, FSPIIO4
IO11 14 I/O/T RTC_GPIO11, GPIO11, TOUCH11, ADC2_CH0, FSPID, FSPIIO5
IO12 15 I/O/T RTC_GPIO12, GPIO12, TOUCH12, ADC2_CH1, FSPICLK, FSPIIO6
IO13 16 I/O/T RTC_GPIO13, GPIO13, TOUCH13, ADC2_CH2, FSPIQ, FSPIIO7
IO14 17 I/O/T RTC_GPIO14, GPIO14, TOUCH14, ADC2_CH3, FSPIWP, FSPIDQS
IO15 18 I/O/T RTC_GPIO15, GPIO15, U0RTS, ADC2_CH4, XTAL_32K_P
IO16 19 I/O/T RTC_GPIO16, GPIO16, U0CTS, ADC2_CH5, XTAL_32K_N
IO17 20 I/O/T RTC_GPIO17, GPIO17, U1TXD, ADC2_CH6, DAC_1
IO18 21 I/O/T RTC_GPIO18, GPIO18, U1RXD, ADC2_CH7, DAC_2, CLK_OUT3
IO19 22 I/O/T RTC_GPIO19, GPIO19, U1RTS, ADC2_CH8, CLK_OUT2, USB_D-
IO20 23 I/O/T RTC_GPIO20, GPIO20, U1CTS, ADC2_CH9, CLK_OUT1, USB_D+
IO21 24 I/O/T RTC_GPIO21, GPIO21
IO26 25 I/O/T SPICS1, GPIO26 (See the note below the table.)
GND 26 P Ground
IO33 27 I/O/T SPIIO4, GPIO33, FSPIHD
IO34 28 I/O/T SPIIO5, GPIO34, FSPICS0
IO35 29 I/O/T SPIIO6, GPIO35, FSPID
IO36 30 I/O/T SPIIO7, GPIO36, FSPICLK
IO37 31 I/O/T SPIDQS, GPIO37, FSPIQ
IO38 32 I/O/T GPIO38, FSPIWP
IO39 33 I/O/T MTCK, GPIO39, CLK_OUT3
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3. Pin Definitions
Name No. Type Function
IO40 34 I/O/T MTDO, GPIO40, CLK_OUT2
IO41 35 I/O/T MTDI, GPIO41, CLK_OUT1
IO42 36 I/O/T MTMS, GPIO42
TXD0 37 I/O/T U0TXD, GPIO43, CLK_OUT1
RXD0 38 I/O/T U0RXD, GPIO44, CLK_OUT2
IO45 39 I/O/T GPIO45
IO46 40 I GPIO46
High: on, enables the chip.
EN 41 I
Low: off, the chip powers off.
Note: Do not leave the EN pin floating.
GND 42 P Ground
Notice:
• By default, IO26 is connected to the CS pin of the PSRAM and cannot be used for other functions.
• For peripheral pin configurations, please refer to ESP32-S2 Datasheet.
3.3 Strapping Pins
ESP32-S2 has three strapping pins: GPIO0, GPIO45, GPIO46. The pin-pin mapping between ESP32-S2 and the
module is as follows, which can be seen in Chapter 5 Schematics:
• GPIO0 = IO0
• GPIO45 = IO45
• GPIO46 = IO46
Software can read the values of corresponding bits from register ”GPIO_STRAPPING”.
During the chip’s system reset (power-on-reset, RTC watchdog reset, brownout reset, analog super watchdog
reset, and crystal clock glitch detection reset), the latches of the strapping pins sample the voltage level as strapping
bits of ”0” or ”1”, and hold these bits until the chip is powered down or shut down.
IO0, IO45 and IO46 are connected to the internal pull-up/pull-down. If they are unconnected or the connected
external circuit is high-impedance, the internal weak pull-up/pull-down will determine the default input level of these
strapping pins.
To change the strapping bit values, users can apply the external pull-down/pull-up resistances, or use the host
MCU’s GPIOs to control the voltage level of these pins when powering on ESP32-S2.
After reset, the strapping pins work as normal-function pins.
Refer to Table 3 for a detailed boot-mode configuration of the strapping pins.
Table 3: Strapping Pins
VDD_SPI Voltage
1
Pin Default 3.3 V 1.8 V
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3. Pin Definitions
2
IO45
Pull-down 0 1
Booting Mode
Pin Default SPI Boot Download Boot
IO0 Pull-up 1 0
IO46 Pull-down Don’t-care 0
Enabling/Disabling ROM Code Print During Booting
3 4
Pin Default Enabled Disabled
IO46 Pull-down See the fourth note See the fourth note
Note:
1. Firmware can configure register bits to change the settings of ”VDD_SPI Voltage”.
2. The strapping combination of GPIO46 = 1 and GPIO0 = 0 is invalid and will trigger unexpected behavior.
3. Internal pull-up resistor (R1) for IO45 is not populated in the module, as the flash in the module works at 3.3 V by
default (output by VDD_SPI). Please make sure IO45 will not be pulled high when the module is powered up by
external circuit.
4. ROM code can be printed over TXD0 (by default) or DAC_1 (IO17), depending on the eFuse bit.
5. When eFuse UART_PRINT_CONTROL value is:
0, print is normal during boot and not controlled by IO46.
1 and IO46 is 0, print is normal during boot; but if IO46 is 1, print is disabled.
2 and IO46 is 0, print is disabled; but if IO46 is 1, print is normal.
3, print is disabled and not controlled by IO46.
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4. Electrical Characteristics
4. Electrical Characteristics
4.1 Absolute Maximum Ratings
Table 4: Absolute Maximum Ratings
Symbol Parameter
VDD33 Power supply voltage
T
ST O RE
Storage temperature
4.2 Recommended Operating Conditions
Table 5: Recommended Operating Conditions
Symbol Parameter
VDD33 Power supply voltage
I
V DD
Current delivered by external power supply
T Operating temperature
Humidity Humidity condition
4.3 DC Characteristics (3.3 V, 25 °C)
Table 6: DC Characteristics (3.3 V, 25 °C)
Symbol Parameter
C
IN
V
IH
V
IL
I
IH
I
IL
2
V
OH
2
V
OL
I
OH
I
OL
R
P U
R
P D
V
IH _nRST
V
IL_nRS T
Pin capacitance
High-level input voltage
Low-level input voltage
High-level input current
Low-level input current
High-level output voltage
Low-level output voltage
High-level source current (VDD = 3.3 V, VOH>=
2.64 V, PAD_DRIVER = 3)
Low-level sink current (VDD = 3.3 V, VOL=
0.495 V, PAD_DRIVER = 3)
Pull-up resistor
Pull-down resistor
Chip reset release voltage
Chip reset voltage
Min Max
–0.3 3.6
–40 85
Unit
V
°C
Min Typ Max
3.0 3.3 3.6
0.5 — —
–40 — 85
— 85 —
Min Typ Max
— 2 —
0.75 × VDD — VDD + 0.3
–0.3 — 0.25 × VDD
— — 50
— — 50
0.8 × VDD — —
— — 0.1 × VDD
— 40 —
— 28 —
— 45 —
— 45 —
0.75 × VDD — VDD + 0.3
–0.3 — 0.25 × VDD
Unit
V
A
°C
%RH
Unit
pF
V
V
nA
nA
V
V
mA
mA
kΩ
kΩ
V
V
Note:
1. VDD is the I/O voltage for a particular power domain of pins.
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4. Electrical Characteristics
2. VOHand VOLare measured using high-impedance load.
4.4 Current Consumption Characteristics
With the use of advanced power-management technologies, the module can switch between different power
modes. For details on different power modes, please refer to Section RTC and Low-Power Management in ESP32-
S2 Datasheet.
Table 7: Current Consumption Depending on RF Modes
Work mode Description Average Peak
802.11b, 20 MHz, 1 Mbps, @19.5 dBm 190 mA 310 mA
TX
Active (RF working)
RX
802.11g, 20 MHz, 54 Mbps, @15 dBm 145 mA 220 mA
802.11n, 20 MHz, MCS7, @13 dBm 135 mA 200 mA
802.11n, 40 MHz, MCS7, @13 dBm 120 mA 160 mA
802.11b/g/n, 20 MHz 63 mA 63 mA
802.11n, 40 MHz 68 mA 68 mA
Note:
• The current consumption measurements are taken with a 3.3 V supply at 25 °C of ambient temperature at the RF
port. All transmitters’ measurements are based on a 50% duty cycle.
• The current consumption figures for in RX mode are for cases when the peripherals are disabled and the CPU idle.
Table 8: Current Consumption Depending on Work Modes
Work mode Description Current consumption (Typ)
240 MHz 22 mA
160 MHz 17 mA
Normal speed: 80 MHz 14 mA
Modem-sleep
The CPU is
powered on
Light-sleep — 550 µA
The ULP co-processor is powered on. 235 µA
Deep-sleep
ULP sensor-monitored pattern 22 µA @1% duty
RTC timer + RTC memory 25 µA
RTC timer only 20 µA
Power off CHIP_PU is set to low level, the chip is powered off. 1 µA
Note:
• The current consumption figures in Modem-sleep mode are for cases where the CPU is powered on and the cache
idle.
• When Wi-Fi is enabled, the chip switches between Active and Modem-sleep modes. Therefore, current consump-
tion changes accordingly.
• In Modem-sleep mode, the CPU frequency changes automatically. The frequency depends on the CPU load and
the peripherals used.
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4. Electrical Characteristics
• During Deep-sleep, when the ULP co-processor is powered on, peripherals such as GPIO and I²C are able to
operate.
• The ”ULP sensor-monitored pattern” refers to the mode where the ULP coprocessor or the sensor works periodi-
cally. When touch sensors work with a duty cycle of 1%, the typical current consumption is 22 µA.
4.5 Wi-Fi RF Characteristics
4.5.1 Wi-Fi RF Standards
Table 9: Wi-Fi RF Standards
Name Description
Center frequency range of operating channel
Wi-Fi wireless standard IEEE 802.11b/g/n
Data rate
20 MHz
40 MHz 11n: MCS0-7, 150 Mbps (Max)
Antenna type PCB antenna, IPEX antenna
note1
2412~2484 MHz
11b: 1, 2, 5.5 and 11 Mbps
11g: 6, 9, 12, 18, 24, 36, 48, 54 Mbps
11n: MCS0-7, 72.2 Mbps (Max)
1. Device should operate in the center frequency range allocated by regional regulatory authorities. Target center frequency
range is configurable by software.
2. For the modules that use IPEX antennas, the output impedance is 50 Ω. For other modules without IPEX antennas,
users do not need to concern about the output impedance.
4.5.2 Transmitter Characteristics
Table 10: Transmitter Characteristics
Parameter
TX Power
note1
Rate Typ
11b, 1 Mbps 19.5
11b, 11 Mbps 19.5
11g, 6 Mbps 18
11g, 54 Mbps 15
11n, HT20, MCS0 18
11n, HT20, MCS7 13.5
11n, HT40, MCS0 18
11n, HT40, MCS7 13.5
Unit
dBm
1. Target TX power is configurable based on device or certification requirements.
4.5.3 Receiver Characteristics
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4. Electrical Characteristics
Parameter Rate Typ Unit
RX Sensitivity
RX Maximum Input Level
Adjacent Channel Rejection
Table 11: Receiver Characteristics
1 Mbps –97
2 Mbps –95
5.5 Mbps –93
11 Mbps –88
6 Mbps –92
9 Mbps –91
12 Mbps –89
18 Mbps –86
24 Mbps –83
36 Mbps –80
48 Mbps –76
54 Mbps –74
11n, HT20, MCS0 –92
11n, HT20, MCS1 –88
11n, HT20, MCS2 –85
11n, HT20, MCS3 –82
11n, HT20, MCS4 –79
11n, HT20, MCS5 –75
11n, HT20, MCS6 –73
11n, HT20, MCS7 –72
11n, HT40, MCS0 –89
11n, HT40, MCS1 –85
11n, HT40, MCS2 –83
11n, HT40, MCS3 –79
11n, HT40, MCS4 –76
11n, HT40, MCS5 –72
11n, HT40, MCS6 –70
11n, HT40, MCS7 –68
11b, 1 Mbps 5
11b, 11 Mbps 5
11g, 6 Mbps 5
11g, 54 Mbps 0
11n, HT20, MCS0 5
11n, HT20, MCS7 0
11n, HT40, MCS0 5
11n, HT40, MCS7 0
11b, 11 Mbps 35
11g, 6 Mbps 31
11g, 54 Mbps 14
11n, HT20, MCS0 31
11n, HT20, MCS7 13
11n, HT40, MCS0 19
11n, HT40, MCS7 8
dBm
dBm
dB
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5
4
3
2
1
Pin.2
3V3
Pin.41
EN
Pin.42
GND
Pin.3
IO0
Pin.4
IO1
Pin.5
IO2
Pin.6
IO3
Pin.7
IO4
Pin.8
IO5
Pin.9
IO6
Pin.10
IO7
Pin.11
IO8
Pin.12
IO9
Pin.14
IO11
Pin.15
IO12
Pin.13
IO10
Pin.18
IO15
Pin.19
IO16
Pin.16
IO13
Pin.21
IO18
Pin.22
IO19
Pin.37
TXD0
Pin.20
IO17
Pin.23
IO20
Pin.36
IO42
Pin.28
IO34
Pin.32
IO38
Pin.27
IO33
Pin.24
IO21
Pin.35
IO41
Pin.30
IO36
Pin.25
IO26
Pin.34
IO40
Pin.29
IO35
Pin.33
IO39
Pin.31
IO37
Pin.1
GND
PCB ANTENNA
Flash and PSRAM
Pin.38
RXD0
Pin.39
IO45
Pin.40
IO46
Pin.17
IO14
Pin.26
GND
The values of C11, L2 and C12
vary with the actual PCB board.
EPAD
The values of C1 and C4 vary with
the selection of the crystal.
The value of R4 varies with the actual
PCB board.
NC: No component.
SPICLK
SPICS0
SPIHD
SPICS1SPID
SPIWP
SPIQ SPICLK
SPIHD
SPID
SPIWP
SPIQ
GPIO0
GPIO1
GPIO4
GPIO5
GPIO36
GPIO19
GPIO41
GPIO40
GPIO42
GPIO39
GPIO37
GPIO12
GPIO14
GPIO15
GPIO16
GPIO17
U0TXD
CHIP_PU
GPIO2
GPIO3
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO20
GPIO18
GPIO21
GPIO35
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
SPIHD
SPIWP
SPID
SPIQ
SPICS1GPIO26
SPICS0
LAN_IN
ANT1
ANT2
RF_ANT
GPIO39
GPIO40
GPIO41
GPIO42
GPIO46
CHIP_PU
GPIO45
U0TXD
GPIO33
GPIO34
GPIO38
U0RXD
GPIO45
GPIO46
GPIO26
U0RXD
GPIO13
SPICLK
VDD_SPI VDD_SPI
GND
GND
VDD33
VDD33
GND
GND
GND
GND
GND GND
VDD33
GND GND GND
GNDGND
GND
GND
VDD33
VDD33
GND
GNDGND
VDD33
GND
GNDGND
VDD33
GND
VDD_SPI
VDD33
GND GND
GND
GND
GND
VDD33
C11
TBD
1
1
1
R2 0
1
C12
TBD
1
1
C13
0.1uF
1
C4
TBD
1
1
R3 499
1
1
1
1
1
R8
10K(NC)
1
C14
1uF
1
1
U1 ESP32-S2
VDDA
1
LNA_IN
2
VDD3P3
3
VDD3P3
4
GPIO0
5
GPIO1
6
GPIO2
7
GPIO3
8
GPIO4
9
GPIO5
10
GPIO6
11
GPIO7
12
GPIO1015GPIO1116GPIO1217GPIO1318GPIO1419XTAL_32K_P21VDD3P3_RTC20XTAL_32K_N22DAC_123DAC_224GPIO1925GPIO20
26
VDD_SPI
30
SPICS1
29
SPIWP
32
SPICS0
33
SPIQ
35
SPID
36
SPICLK
34
GPIO33
37
GND
57
GPIO34
38
GPIO35
39
MTCK
43
GPIO46
55
VDDA
51
XTAL_N
52
XTAL_P
53
MTMS
47
MTDO
44
U0TXD
48
VDD3P3_CPU
45
CHIP_PU
56
VDDA
54
MTDI
46
GPIO8
13
GPIO9
14
VDD3P3_RTC_IO27GPIO21
28
SPIHD
31
GPIO36
40
GPIO37
41
GPIO38
42
U0RXD
49
GPIO45
50
1
1
C9
0.1uF
1
1
C6
10uF
1
1
1
L1 2.0nH
1
R1
10K(NC)
U2
FLASH-3V3
/CS
1
DO
2
/WP
3
GND
4
DI
5
CLK
6
/HOLD
7
VCC
8
C10
0.1uF
Y1
40MHz(±10ppm)
XIN1GND
2
XOUT
3
GND
4
C2
100pF
1
1
1
1
L2 TBD
C7
1uF
1
D1
LESD8D3.3CAT5G
R7 0
1
C1
TBD
ANT2
PCB_ANT
1
2
ANT1
IPEX
1
2
3
1
R10 0
1
1
U3
PSRAM-3V3
VDD
8
VSS
4
CS
1
SCLK
6
SIO37SIO2
3
SO/SIO1
2
SI/SIO0
5
C3
1uF
1
1
1
C16
0.1uF
1
C15
0.1uF
R6 0(NC)
1
1
R4
0
1
C8
0.1uF
1
R9
10K(NC)
C5
0.1uF
Espressif Systems 17
5. Schematics
5. Schematics
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ESP32-S2-WROVER & ESP32-S2-WROVER-I Datasheet V1.0
Figure 4: ESP32-S2-WROVER Schematics
5
4
3
2
1
Pin.2
3V3
Pin.41
EN
Pin.42
GND
Pin.3
IO0
Pin.4
IO1
Pin.5
IO2
Pin.6
IO3
Pin.7
IO4
Pin.8
IO5
Pin.9
IO6
Pin.10
IO7
Pin.11
IO8
Pin.12
IO9
Pin.14
IO11
Pin.15
IO12
Pin.13
IO10
Pin.18
IO15
Pin.19
IO16
Pin.16
IO13
Pin.21
IO18
Pin.22
IO19
Pin.37
TXD0
Pin.20
IO17
Pin.23
IO20
Pin.36
IO42
Pin.28
IO34
Pin.32
IO38
Pin.27
IO33
Pin.24
IO21
Pin.35
IO41
Pin.30
IO36
Pin.25
IO26
Pin.34
IO40
Pin.29
IO35
Pin.33
IO39
Pin.31
IO37
Pin.1
GND
PCB ANTENNA
Flash and PSRAM
Pin.38
RXD0
Pin.39
IO45
Pin.40
IO46
Pin.17
IO14
Pin.26
GND
The values of C11, L2 and C12
vary with the actual PCB board.
EPAD
The values of C1 and C4 vary with
the selection of the crystal.
The value of R4 varies with the actual
PCB board.
NC: No component.
SPICLK
SPICS0
SPIHD
SPICS1SPID
SPIWP
SPIQ SPICLK
SPIHD
SPID
SPIWP
SPIQ
GPIO0
GPIO1
GPIO4
GPIO5
GPIO36
GPIO19
GPIO41
GPIO40
GPIO42
GPIO39
GPIO37
GPIO12
GPIO14
GPIO15
GPIO16
GPIO17
U0TXD
CHIP_PU
GPIO2
GPIO3
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO20
GPIO18
GPIO21
GPIO35
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
SPIHD
SPIWP
SPID
SPIQ
SPICS1GPIO26
SPICS0
LAN_IN
ANT1
ANT2
RF_ANT
GPIO39
GPIO40
GPIO41
GPIO42
GPIO46
CHIP_PU
GPIO45
U0TXD
GPIO33
GPIO34
GPIO38
U0RXD
GPIO45
GPIO46
GPIO26
U0RXD
GPIO13
SPICLK
VDD_SPI VDD_SPI
GND
GND
VDD33
VDD33
GND
GND
GND
GND
GND GND
VDD33
GND GND GND
GNDGND
GND
GND
VDD33
VDD33
GND
GNDGND
VDD33
GND
GNDGND
VDD33
GND
VDD_SPI
VDD33
GND GND
GND
GND
GND
VDD33
1
R2 0
1
1
1
C11
TBD
C13
0.1uF
1
1
C12
TBD
C4
TBD
1
R3 499
1
1
1
1
1
1
1
1
C14
1uF
1
R8
10K(NC)
1
C9
0.1uF
1
1
U1 ESP32-S2
VDDA
1
LNA_IN
2
VDD3P3
3
VDD3P3
4
GPIO0
5
GPIO1
6
GPIO2
7
GPIO3
8
GPIO4
9
GPIO5
10
GPIO6
11
GPIO7
12
GPIO1015GPIO1116GPIO1217GPIO1318GPIO1419XTAL_32K_P21VDD3P3_RTC20XTAL_32K_N22DAC_123DAC_224GPIO1925GPIO20
26
VDD_SPI
30
SPICS1
29
SPIWP
32
SPICS0
33
SPIQ
35
SPID
36
SPICLK
34
GPIO33
37
GND
57
GPIO34
38
GPIO35
39
MTCK
43
GPIO46
55
VDDA
51
XTAL_N
52
XTAL_P
53
MTMS
47
MTDO
44
U0TXD
48
VDD3P3_CPU
45
CHIP_PU
56
VDDA
54
MTDI
46
GPIO8
13
GPIO9
14
VDD3P3_RTC_IO27GPIO21
28
SPIHD
31
GPIO36
40
GPIO37
41
GPIO38
42
U0RXD
49
GPIO45
50
L1 2.0nH
1
1
1
C6
10uF
1
1
1
C2
100pF
Y1
40MHz(±10ppm)
XIN1GND
2
XOUT
3
GND
4
C10
0.1uF
U2
FLASH-3V3
/CS
1
DO
2
/WP
3
GND
4
DI
5
CLK
6
/HOLD
7
VCC
8
R1
10K(NC)
1
1
1
1
R7 0(NC)
D1
LESD8D3.3CAT5G
1
C7
1uF
L2 TBD
1
ANT2
PCB_ANT
1
2
C1
TBD
U3
PSRAM-3V3
VDD
8
VSS
4
CS
1
SCLK
6
SIO37SIO2
3
SO/SIO1
2
SI/SIO0
5
1
1
R10 0
1
ANT1
IPEX
1
2
3
C16
0.1uF
1
1
1
C3
1uF
1
R6 0
C15
0.1uF
1
R4
0
1
C5
0.1uF
R9
10K(NC)
1
C8
0.1uF
1
Espressif Systems 18
5. Schematics
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ESP32-S2-WROVER & ESP32-S2-WROVER-I Datasheet V1.0
Figure 5: ESP32-S2-WROVER-I Schematics
6. Peripheral Schematics
4
3
2
D
C
B
X1: ESR = Max. 70 KΩ
NC: No component.
EN
IO0
IO12
IO13
IO1
IO2
IO3
IO4
IO5
IO6
IO7
IO8
IO9
IO10
IO11
IO42
IO41
IO37
IO36
IO38
IO40
IO39
IO14
IO15
IO16
IO17
IO19
IO20
IO21
IO46
RXD0
TXD0
IO45
EN
IO35
IO34
IO33
TMS
TDI
TDO
TCK
IO0
USB_D+
USB_D-
IO18
GND
GND GND
VDD33
GND GND
GND
GND
VDD33
GND
GND
GND
GND GND
VDD33
GND
JP3
USB OTG
1
1
2
2
C3
0.1uF
SW1
R3 0(NC)
C2
TBD
U1
ESP32-S2-WROVER/ESP32-S2-WROVER-I
GND
1
3V3
2
IO0
3
IO1
4
IO2
5
IO3
6
IO4
7
IO5
8
IO6
9
IO7
10
IO8
11
IO9
12
IO10
13
IO11
14
GND
42
IO45
39
RXD0
38
TXD0
37
IO42
36
IO41
35
IO40
34
IO39
33
IO38
32
IO37
31
IO36
30
IO35
29
IO34
28
IO33
27
IO1417IO1518IO1619IO1720IO1821IO1922IO2023IO2124IO2625GND
26
EPAD
43
IO12
15
IO13
16
EN
41
IO46
40
C7 12pF(NC)
C6
20pF(NC)
R7 0
R4 0
R2 NC
X1
32.768KHz(NC)
12
JP4
Boot Option
112
2
R1 TBD
C5
20pF(NC)
JP1
UART
1
1
2
2
3
3
4
4
C4 12pF(NC)
C1
22uF
C8 0.1uF
R5 0(NC)
R6 0
R8 10K
JP2
JTAG
1
1
2
2
3
3
4
4
6. Peripheral Schematics
Figure 6: Peripheral Schematics
Note:
• Soldering the EPAD to the ground of the base board is not a must, though doing so can get optimized thermal
performance. If users do want to solder it, they need to ensure that the correct quantity of soldering paste is applied.
• To ensure the power supply to the ESP32-S2 chip during power-up, it is advised to add an RC delay circuit at the
EN pin. The recommended setting for the RC delay circuit is usually R = 10 kΩ and C = 0.1 µF. However, specific
parameters should be adjusted based on the power-up timing of the module and the power-up and reset sequence
timing of the chip. For ESP32-S2’s power-up and reset sequence timing diagram, please refer to Section Power
Scheme in ESP32-S2 Datasheet.
• GPIO18 works as U1RXD and is in an uncertain state when the chip is powered on, which may affect the chip’s
entry into download boot mode. To solve this issue, add an external pull-up resistor.
Espressif Systems 19
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ESP32-S2-WROVER & ESP32-S2-WROVER-I Datasheet V1.0
7. Physical Dimensions and PCB Land Pattern
31.00±0.15
18.00±0.15
0.80
3.30±0.15
1.50
0.9
0.45
1
0.90
0.85
15.45
10.19
4.00
4.00
2.25
0.45
Unit: mm
Tolerance: +/-0.1 mm
Top View
Side View
Bottom View
6.30
8.35
23.10
15.84
19.30
2,25
10.44
1.50
1.00
0.50
1.00
0.50
0.85
0.90
0.1
7. Physical Dimensions and PCB Land Pattern
7.1 Physical Dimensions
Figure 7: Physical Dimensions
Espressif Systems 20
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ESP32-S2-WROVER & ESP32-S2-WROVER-I Datasheet V1.0
7. Physical Dimensions and PCB Land Pattern
42x0.90
42x1.50
0.50
0.50
1.00
2.25
1.50
1.50
15.45
Antenna Area
18.00
31.00
6.30
1
17
26
42
4.10
4.10
1.10
0.40
1.10
0.40
7.81
Unit: mm
Copper
Via for thermal pad
7.2 Recommended PCB Land Pattern
Figure 8: Recommended PCB Land Pattern
Espressif Systems 21
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ESP32-S2-WROVER & ESP32-S2-WROVER-I Datasheet V1.0
7. Physical Dimensions and PCB Land Pattern
Unit: mm
7.3 U.FL Connector Dimensions
Figure 9: U.FL Connector Dimensions
Espressif Systems 22
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ESP32-S2-WROVER & ESP32-S2-WROVER-I Datasheet V1.0
8. Product Handling
50
150
0
25
1 ~ 3 ℃/s
0
200
250
200
–1 ~ –5 ℃/s
Cooling zone
100
217
50
100 250
Reflow zone
217 ℃ 60 ~ 90 s
Temperature (℃)
Preheating zone
150 ~ 200 ℃ 60 ~ 120 s
Ramp-up zone
Peak Temp.
235 ~ 250 ℃
Soldering time
> 30 s
Time (sec.)
Ramp-up zone — Temp.: 25 ~ 150 ℃ Time: 60 ~ 90 s Ramp-up rate: 1 ~ 3 ℃/s
Preheating zone — Temp.: 150 ~ 200 ℃ Time: 60 ~ 120 s
Reflow zone — Temp.: >217 ℃ 60 ~ 90 s; Peak Temp.: 235 ~ 250 ℃ Time: 30 ~ 70 s
Cooling zone — Peak Temp. ~ 180 ℃ Ramp-down rate: –1 ~ –5 ℃/s
Solder — Sn-Ag-Cu (SAC305) lead-free solder alloy
8. Product Handling
8.1 Storage Condition
The products sealed in Moisture Barrier Bag (MBB) should be stored in a noncondensing atmospheric environment
of < 40 °C/90%RH.
The module is rated at moisture sensitivity level (MSL) 3.
After unpacking, the module must be soldered within 168 hours with factory conditions 25±5 °C and /60%RH.
The module needs to be baked if the above conditions are not met.
8.2 ESD
• Human body model (HBM): 2000 V
• Charged-device model (CDM): 500 V
• Air discharge: 6000 V
• Contact discharge: 4000 V
8.3 Reflow Profile
Figure 10: Reflow Profile
Note:
Solder the module in a single reflow. If the PCBA requires multiple reflows, place the module on the PCB during the final
reflow.
Espressif Systems 23
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ESP32-S2-WROVER & ESP32-S2-WROVER-I Datasheet V1.0
9. MAC Addresses and eFuse
9. MAC Addresses and eFuse
The eFuse in ESP32-S2 has been burnt into 48-bit mac_address. The actual addresses the chip uses in station
or AP modes correspond to mac_address in the following way:
• Station mode: mac_address
• AP mode: mac_address + 1
There are seven blocks in eFuse for users to use. Each block is 256 bits in size and has independent write/read
disable controller. Six of them can be used to store encrypted key or user data, and the remaining one is only used
to store user data.
Espressif Systems 24
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ESP32-S2-WROVER & ESP32-S2-WROVER-I Datasheet V1.0
10. Learning Resources
10. Learning Resources
10.1 Must-Read Documents
The following link provides documents related to ESP32-S2.
• ESP32-S2 Datasheet
This document provides an introduction to the specifications of the ESP32-S2 hardware, including overview,
pin definitions, functional description, peripheral interface, electrical characteristics, etc.
• ESP-IDF Programming Guide
It hosts extensive documentation for ESP-IDF ranging from hardware guides to API reference.
• ESP32-S2 Technical Reference Manual
The manual provides detailed information on how to use the ESP32-S2 memory and peripherals.
• Espressif Products Ordering Information
10.2 Must-Have Resources
Here are the ESP32-S2-related must-have resources.
• ESP32-S2 BBS
This is an Engineer-to-Engineer (E2E) Community for ESP32-S2 where you can post questions, share knowl-
edge, explore ideas, and help solve problems with fellow engineers.
Espressif Systems 25
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ESP32-S2-WROVER & ESP32-S2-WROVER-I Datasheet V1.0
Revision History
Revision History
Date Version Release notes
2020-06-01 V1.0 Official release
2020-03-16 V0.5 Preliminary release
Espressif Systems 26
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ESP32-S2-WROVER & ESP32-S2-WROVER-I Datasheet V1.0
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