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ESC
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CRU51-M7
Schematic
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ESC CRU51-M7 Schematic

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Page 1
5
TITLE
COVER SHEET BLOCK DIAGRAM RESET&CLK MAP SPEC&CHANGE LIST
D D
PROCESSOR K8 754 DDR 1 DDR 2
4
3
2
1
SHEET
1 2 3 4 5,6,7,8,9 10
11 DDR ADD/CTL/VTT TERMINATI 12 NORTH BRIDGE(C51G) SOURTH BRIDGE(MCP51G) PCI 1&2 FRONT PANEL HEADER PCI EXPRESS X16 & X1
C C
IDE CONN POWER CONN & FAN CONTROL FLOOPY / KB / MOUSE / CMOS VGA CONN & TV OUT USB DEVICE SERIAL & PARALLEL
AUDIO CODEC AUDIO CONN VCORE POWER SUPPLY MEM_VREG/MEM_VTT
B B
LPC SUPER IO(IT8712) FLASH ROM & H/W MON POWER SEQUENCING LAN 10/100/1000 OVER VOLTAGE C51 CORE BOM
13,14,15
16,17,18,19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
CRU51G+MCP51G
VER:1.3A
A A
Title
COVER SHEET
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
CRU51-M7
1
139Monday, April 10, 2006
1.3
of
Page 2
5
4
3
2
1
D D
POWER SUPPLY
VREG
CONN
PEX X16 (1)
PEX X1 (1)
PRIMARY IDE
C C
PS2/KBRD CONN
SECONDARY IDE
SATA CONN(X4)
INTEGRATED SATA 1/2 LPC BUS 33MHZ
SIOFLOPPY CONN IT8712
AMD K8 SOCKET 754
NFORCE CRUSH 51G 468BGA
ATA 133
NFORCE MCP 51G 508BGA
HT 16X16 1GHZ
HT 4X4 800MHZ
MEMORY
DDR DIMM(2)
128-BIT 200/266/333/400 MHZ
VGA
CONN
TV OUT
(C51PV ONLY)
PCI 33MHZ
PCI SLOT (2)
AZALILA/AC97
AUDIO CODEC
USB2.0 (X8)
DOUBLE STACK USB2 PORTS 3-2
BACK PANEL CONNUSB2 PORTS 5-4
LAN RJ45
PARALLEL CONN
B B
SERIAL CONN
USB2 PORTS 1-0 FRONT PANEL HDR
USB2 PORTS 7-6
H/W MON
RGMII
4MB FLASH
A A
5
4
3
MII/RGMII
Title
SYSTEM BLOCK
Size Document Number Rev
Custom
2
Date: Sheet
CRU51-M7
1
239Monday, April 10, 2006
1.3
of
Page 3
5
4
3
2
1
K8 754 CPU
HT_CPU_TXCLK0
HT_CPU_TXCLK0* HT_CPU_RXCLK0
D D
HT_CPU_RXCLK0*
HT_CPU_TXCLK1
HT_CPU_TXCLK1* HT_CPU_RXCLK1
HT_CPU_RXCLK1*
CPUCLK_IN*
CPUCLK_IN
MEMORY_A1_CLK[2:0]
MEMORY_A1_CLK[2:0]*
MEMORY_B1_CLK[2:0]
MEMORY_B1_CLK[2:0]*
MEMORY_A2_CLK[2:0]
MEMORY_A2_CLK[2:0]*
MEMORY_B2_CLK[2:0]
MEMORY_B2_CLK[2:0]*
CRUSH 51
CLKOUT_200MHZ CLKOUT_200MHZ*
HT_CPU_RXCLK1* HT_CPU_RXCLK1 HT_CPU_TXCLK1*
C C
HT_CPU_TXCLK1 HT_CPU_RXCLK0*
HT_CPU_RXCLK0 HT_CPU_TXCLK0*
HT_CPU_TXCLK0 HT_MCP_TXCLK0
HT_MCP_TXCLK0* HT_MCP_RXCLK0
HT_MCP_RXCLK0* CLKIN_25MHZ
CLKIN_200MHZ*
CLKIN_200MHZ
PE0_REFCLK PE0_REFCLK*
PE1_REFCLK PE1_REFCLK*
PE2_REFCLK PE2_REFCLK*
XTAL_IN
XTAL_OUT
CHANNEL A1 0-63
DIMM 0
PEX X16
PEX X1
PEX X1 /NI
DIMM 1
DIMM 2 /NI
DIMM 3 /NI
CHANNEL B1 64-127
CHANNEL A2 0-63
CHANNEL B2 64-127
CLOCK DISTRIBUTION
27 MHZ (TV OUT ONLY)
OPTIONAL
OPTIONAL
PWR SWTCH
PWR CONN
PS ON PWR GOOD
8712
PWR BUTTON*
PS ON
RESET MAP
PWRBT
ON*
SLP_S3*
CIRCUIT
PEX X16
PEX X1
PEX X1 /NI
PWRBTN*
SLP_S3*
POWER_GOOD
PWRGD_SB
CRUSH 51
PE_RESET*
MCP 51
PWR BUTTON
SLP S3*
PWRGD
PWRGD_SB
GPIO_AUX*
LAN_PHY RESET*
K8 SKT 754
CPU RST*
CPU PWRGD
HT CPU PWRGD
HT CPU RST*
HT MCP PWRGD
HT MCP RST*
HT MCP RST*
HT MCP PWRGD
PCI RST0* PCI RST1* PCI RST2* PCI RST3* LPC_RST*PWRGD SB AC_RESET*
AUDIO_PHY RESET*
CPU_RST*
CPU_PWRGD
HT_CPU_PWRGD
HT_CPU_RST*
HT_MCP_PWRGD
HT_MCP_RST*
HT_MCP_RST*
HT_MCP_PWRGD
PCIRST_SLOT1* PCIRST_SLOT2* PCIRST_SLOT3-4* PCIRST_IDE* LPCRST_FLASH* LPCRST_SIO*
SIO FLASH
PRI IDE
SEC IDE
PCI SLOT 3 /NI
PCI SLOT4 /NI
PCI SLOT2 PCI SLOT1
B B
32.0 KHZ
25 MHZ
A A
5
MCP 51
MCPCLK_OUT MCPCLK_OUT* 25MHZ_CLKOUT
HT_MCP_RXCLK0* HT_MCP_RXCLK0 HT_MCP_RXCLK0*
HT_MCP_RXCLK0
RTC_XTAL
XTAL_IN
XTAL_OUT
BUF_SIO SUSCLK
LPC_CLK0 PCI_CLK0
PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4 PCI_CLK_FB
LPC_CLK1 AC_97CLK AC_BITCLK BUF_25MHZ
14MHZ OR 24MHZ
AC97/AZALIA LINK
4
SIO
AC97 CODEC
LAN PHY
PCI SLOT2
PCI SLOT1
PCI SLOT 3 /NI
PCI SLOT4 /NI
FLASH
LPC HEADER
Title
RESET&CLOCK MAP
Size Document Number Rev
Custom
3
2
Date: Sheet
CRU51-M7
1
339Monday, April 10, 2006
1.3
of
Page 4
5
4
3
2
1
CPU VID TABLE
VID [4..0] 0X10000 0X10001 0X10010 0X10011 0X10100 0X10101 0X10110 0X10111 0X11000 0X11001 0X11010 0X11011 0X11100
0X11110 0X11111
1010 000 = 0X500 1010 001 = 0X51 1010 010 = 0X52 1010 011 = 0X53 0101 101 = 0X2D ARP ARP ARP ARP ? ?
G
TO-263
PHB55N03 90N02
VDD
1.150V
1.125V0X00001
1.100V
1.075V
1.050V
1.025V
1.000V
0.975V
0.950V
0.925V
0.900V
0.875V
0.850V
0.825V0X11101
0.800V OFF
D
VDD
VID [4..0]
1.550V
0X00000
D D
C C
B B
1.525V
1.500V
0X00010 0X00011
1.475V
1.450V
0X00100
1.425V
0X00101
1.400V
0X00110 0X00111
1.375V
1.350V
0X01000
1.325V
0X01001 0X01010 1.300V 0X01011
1.275V
0X01100
1.250V
0X01101
1.225V
1.200V
0X01110 0X01111
1.175V
SMBUS ADDRESS MAP
DEVICE SLOT DIMM 0 DIMM 1 DIMM 2 DIMM 3 SIO PCI SLOT 1 1 PCI SLOT 2 PCI SLOT 3 PCI SLOT 4
22U/25DE 5*7 mm 100U/16DE 220U/10DE 470U/16DE 1000U/10DE 1500U/16DE 3300U/25DE
SMBUS # ADDRESS
0 0 0 1
1 1 1 ADDC BUS BDDC BUS
6.3*11 mm
6.3*11 mm 8*11 mm 8*14 mm 10*25 mm 10*25 mm
PCI INTERRUPT/IDSEL MAP
DEVICE#
0X05 0X06 0X07 0X08 0X09 0X0A
IDSEL PIN
27 26 25 24 23 22 P_INTY*
BACK PANEL SLOT 1 2 3 4 5
PCI BUS#
01 01 01 01 01 016
PCI DEVICE MAP
DEVICE
MCP51
MAC /MAC PCI-PCI BRIDGE SATA1 SATA0 IDE MODEM CODEC AUDIO CODEC USB 2.0 USB 1.1 SHAPE TRIM LDT SMBUS2 LEGACY SLAVE LPC LOGICAL PCI BUS PCI SLOT 1 PCI SLOT 2 PCI SLOT 3 PCI SLOT 4 PCI SLOT 5
D
G TO-252
20N03 TM3055TL-S PHD55N03
A
S
SOT-223
AMS1117
PCI BUS# FUNCTION MCP51
LOGICAL
0X01-0X0F
PCI BUS 0
XA
0
X9
0
X8
0
X8
0
X6
0 0
X4
0
X4
0
X2
0
X2
0
X1
0
X0
0
X1
0
?
0
X1
1
?
O
O
A
I
C
SOT-23
RE
IDSEL PIN
- -
0 0 0 0 0 1 0 1 0 2 0 1 ? 0 ?
G
SOT-23
2N7002 SI2303S SI2301S
PCI SLOT INTA* P_INTZ* P_INTY* P_INTX* P_INTW* P_INTZ*
D
S
DEVICE ID
- -
0X56/57 0X005C 0X0055 0X0054 0X0053 0X0058 0X0059 0X005B 0X005A 0X005F 0X005E 0X0052 0X00D3 0X0050/51 ?
B
SOT-23
2N3904 2N3906 MMBT2907A 2N2222A
PCI SLOT
PCI SLOT
INTB*
INTC*
P_INTW*
P_INTX*
P_INTZ*
P_INTW*
P_INTY*
P_INTZ*
P_INTX*
P_INTY* P_INTX*
P_INTZ*
P_INTW*
C
KA
A
BAT54CKLM431 2N2222ALM431 BAT54S 78L05-DS2N2097A
PCI SLOT INTD* P_INTY* P_INTX* P_INTW* P_INTZ* P_INTY*P_INTW* P_INTX*
G
I
TO-92SOT-23
LM432
REQ/GNT
5/5 4/4 3/3 2/2 1/1 0/0
O
N51IGP-A7
1. CPU --- AMD Socket 754(3-Phase Power)
2. CHIPSET --- NF C51 IGP + NF MCP51
3. MEMORY --- DDR SDRAM X 2 (Max. 2GB)
4. SLOTS --- PEX X16 (x1),PEX X1 (x1),PCI (x2)
5. CODEC --- Realtek ALC655 5.1 Channel Audio
6. LAN PHY --- RTL8201
7. LPC/SIO --- IT8712F
8. SATA -- INTEGRATED
9. PCB Size --- 24.4cmx24.4cm, 4-Layer
CHANGE LIST
B
EC
B
C
E
TO-92
TO-92
HSD882-D
A A
Title
SPEC&CHANGE LIST
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
CRU51-M7
1
439Monday, April 10, 2006
1.3
of
Page 5
5
4
3
2
1
D D
+1.2V_HT +1.2V_HT_CPU
HTCPU_UP[15..0]13
C C
HTCPU_UP-[15..0]13
HTCPU_UPCLK113
HTCPU_UPCLK-113
HTCPU_UPCLK013
HTCPU_UPCLK-013
+1.2V_HT_CPU
HTCPU_UPCNTL13
B B
HTCPU_UPCNTL-13
HTCPU_UP[15..0] HTCPU_UP15 HTCPU_UP-15 HTCPU_UP14 HTCPU_UP-14 HTCPU_UP13 HTCPU_UP-13 HTCPU_UP12 HTCPU_UP-12 HTCPU_UP11 HTCPU_UP-11 HTCPU_UP10 HTCPU_UP-10 HTCPU_UP9 HTCPU_UP-9 HTCPU_UP8 HTCPU_UP-8 HTCPU_UP7 HTCPU_UP-7 HTCPU_UP6 HTCPU_UP-6 HTCPU_UP5 HTCPU_UP-5 HTCPU_UP4 HTCPU_UP-4 HTCPU_UP3 HTCPU_UP-3 HTCPU_UP2 HTCPU_UP-2 HTCPU_UP1 HTCPU_UP-1 HTCPU_UP0 HTCPU_UP-0 HTCPU_UP-[15..0]
HTCPU_UPCLK1 HTCPU_UPCLK-1 HTCPU_UPCLK0 HTCPU_UPCLK-0
R45 49.9 1% R44 49.9 1%
HTCPU_UPCNTL HTCPU_UPCNTL-
CTLIP1 CTLIN1
W27
W26 AA27 AA26 AB25 AA25 AC27 AC26 AD25 AC25
W29 AB29 AA29 AB27 AB28 AD29 AC29 AD27 AD28
W25
D29 D27 D25 C28 C26 B29 B27
T25 R25 U27 U26 V25 U25
T27 T28 V29 U29 V27 V28 Y29
Y25 Y27
Y28 R27
R26 T29 R29
CPU1A
VLDT_A6 VLDT_A5 VLDT_A4 VLDT_A3 VLDT_A2 VLDT_A1 VLDT_A0
L0_CADIN_H15 L0_CADIN_L15 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H0 L0_CADIN_L0
L0_CLKIN_H1 L0_CLKIN_L1 L0_CLKIN_H0 L0_CLKIN_L0
L0_CTLIN_H1 L0_CTLIN_L1 L0_CTLIN_H0 L0_CTLIN_L0
VLDT0_B6 VLDT0_B5 VLDT0_B4 VLDT0_B3 VLDT0_B2 VLDT0_B1 VLDT0_B0
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
+1.2V_HT_CPU
AH29 AH27 AG28 AG26 AF29 AE28 AF25
HTCPU_DWN[15..0] HTCPU_DWN15
N26
HTCPU_DWN-15
N27
HTCPU_DWN14
L25
HTCPU_DWN-14
M25
HTCPU_DWN13
L26
HTCPU_DWN-13
L27
HTCPU_DWN12
J25
HTCPU_DWN-12
K25
HTCPU_DWN11
G25
HTCPU_DWN-11
H25
HTCPU_DWN10
G26
HTCPU_DWN-10
G27
HTCPU_DWN9
E25
HTCPU_DWN-9
F25
HTCPU_DWN8
E26
HTCPU_DWN-8
E27
HTCPU_DWN7
N29
HTCPU_DWN-7
P29
HTCPU_DWN6
M28
HTCPU_DWN-6
M27
HTCPU_DWN5
L29
HTCPU_DWN-5
M29
HTCPU_DWN4
K28
HTCPU_DWN-4
K27
HTCPU_DWN3
H28
HTCPU_DWN-3
H27
HTCPU_DWN2
G29
HTCPU_DWN-2
H29
HTCPU_DWN1
F28
HTCPU_DWN-1
F27
HTCPU_DWN0
E29
HTCPU_DWN-0
F29
HTCPU_DWN-[15..0]
HTCPU_DWNCLK1
J26
HTCPU_DWNCLK-1
J27
HTCPU_DWNCLK0
J29
HTCPU_DWNCLK-0
K29 N25
P25
HTCPU_DWNCNTL
P28
HTCPU_DWNCNTL-
P27
C101
C97
1UF 16V 0805 Y5V
0.1UF 25V Y5V
HTCPU_DWN[15..0] 13
HTCPU_DWN-[15..0] 13
HTCPU_DWNCLK1 13 HTCPU_DWNCLK-1 13 HTCPU_DWNCLK0 13 HTCPU_DWNCLK-0 13
HTCPU_DWNCNTL 13 HTCPU_DWNCNTL- 13
LAYOUT: Place HT bypass caps on topside near unconnected Clawhammer HT Link
+1.2V_HT
C180
C181
C233
1UF 16V 0805 Y5V
1UF 16V 0805 Y5V
C320
0.1UF 25V Y5V
0.1UF 25V Y5V
BGA754S-DIP
A A
Title
K8 HT
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
CRU51-M7
1
539Wednesday, April 12, 2006
1.3
of
Page 6
5
4
3
2
1
CPU1B
AE13
VTT_SENSE
MEMZN MEMZP
MD63 MD62 MD61 MD60 MD59 MD58 MD57 MD56 MD55 MD54 MD53 MD52 MD51 MD50 MD49 MD48 MD47 MD46 MD45 MD44 MD43 MD42 MD41 MD40 MD39 MD38 MD37 MD36 MD35 MD34 MD33 MD32 MD31 MD30 MD29 MD28 MD27 MD26 MD25 MD24 MD23 MD22 MD21 MD20 MD19 MD18 MD17 MD16 MD15 MD14 MD13 MD12 MD11 MD10 MD9 MD8 MD7 MD6 MD5 MD4 MD3 MD2 MD1 MD0
DQS17 DQS16 DQS15 DQS14 DQS13 DQS12 DQS11 DQS10 DQS9 DQS8 DQS7 DQS6 DQS5 DQS4 DQS3 DQS2 DQS1 DQS0
AG12
D14 C14
A16 B15 A12 B11 A17 A15 C13 A11 A10
C11
AC1 AC3
AC2 AD1 AE1 AE3 AG3
AJ4
AE2
AF1
AH3
AJ3 AJ5 AJ6
AJ7 AH9 AG5
AH5
AJ9
AJ10
AH11
AJ11
AH15
AJ15
AG11
AJ12 AJ14 AJ16
A13
AA1 AG1 AH7
AH13
A14
AB1
AJ2
AJ8
AJ13
B9 C7 A6
A9 A5 B5 C5 A4 E2 E1 A3 B3 E3
F1 G2 G1
L3
L1 G3
J2
L2 M1 W1 W3
W2
Y1
R1
A7
C2
H1
T1
A8
D1
J1
MEMVREF1
MEMZN MEMZP
MEMDATA63 MEMDATA62 MEMDATA61 MEMDATA60 MEMDATA59 MEMDATA58 MEMDATA57 MEMDATA56 MEMDATA55 MEMDATA54 MEMDATA53 MEMDATA52 MEMDATA51 MEMDATA50 MEMDATA49 MEMDATA48 MEMDATA47 MEMDATA46 MEMDATA45 MEMDATA44 MEMDATA43 MEMDATA42 MEMDATA41 MEMDATA40 MEMDATA39 MEMDATA38 MEMDATA37 MEMDATA36 MEMDATA35 MEMDATA34 MEMDATA33 MEMDATA32 MEMDATA31 MEMDATA30 MEMDATA29 MEMDATA28 MEMDATA27 MEMDATA26 MEMDATA25 MEMDATA24 MEMDATA23 MEMDATA22 MEMDATA21 MEMDATA20 MEMDATA19 MEMDATA18 MEMDATA17 MEMDATA16 MEMDATA15 MEMDATA14 MEMDATA13 MEMDATA12 MEMDATA11 MEMDATA10 MEMDATA9 MEMDATA8 MEMDATA7 MEMDATA6 MEMDATA5 MEMDATA4 MEMDATA3 MEMDATA2 MEMDATA1 MEMDATA0
MEMDQS17 MEMDQS16 MEMDQS15 MEMDQS14 MEMDQS13 MEMDQS12 MEMDQS11 MEMDQS10 MEMDQS9 MEMDQS8 MEMDQS7 MEMDQS6 MEMDQS5 MEMDQS4 MEMDQS3 MEMDQS2 MEMDQS1 MEMDQS0
MEMRESET_L
MEMCLK_H7 MEMCLK_L7 MEMCLK_H6 MEMCLK_L6 MEMCLK_H5 MEMCLK_L5 MEMCLK_H4 MEMCLK_L4 MEMCLK_H3 MEMCLK_L3 MEMCLK_H2 MEMCLK_L2 MEMCLK_H1 MEMCLK_L1 MEMCLK_H0 MEMCLK_L0
MEMRASA_L MEMCASA_L
MEMWEA_L
MEMBANKA1 MEMBANKA0
RSVD_MEMADDA15 RSVD_MEMADDA14
MEMADDA13 MEMADDA12 MEMADDA11 MEMADDA10
MEMADDA9 MEMADDA8 MEMADDA7 MEMADDA6 MEMADDA5 MEMADDA4 MEMADDA3 MEMADDA2 MEMADDA1 MEMADDA0
MEMRASB_L MEMCASB_L
MEMWEB_L
MEMBANKB1 MEMBANKB0
RSVD_MEMADDB_B15 RSVD_MEMADDB_B14
MEMADDB_B13 MEMADDB_B12 MEMADDB_B11 MEMADDB_B10
MEMADDB_B9 MEMADDB_B8 MEMADDB_B7 MEMADDB_B6 MEMADDB_B5 MEMADDB_B4 MEMADDB_B3 MEMADDB_B2 MEMADDB_B1 MEMADDB_B0
MEMCHECK7 MEMCHECK6 MEMCHECK5 MEMCHECK4 MEMCHECK3 MEMCHECK2 MEMCHECK1 MEMCHECK0
BGA754S-DIP
+1.25VREF_CLAW
+2.5VDIMM
LAYOUT: 10/5/10
D D
C C
B B
A A
LAYOUT: PLACE WITHIN 1 INCH OF CPU
R78 33 1% R79 33 1%
MD[63:0]12
DQS[17:0]12
VTT_A4 VTT_A1 VTT_A2 VTT_A3 VTT_B1 VTT_B2 VTT_B3 VTT_B4
MEMCKEA MEMCKEB
MEMCS_L7 MEMCS_L6 MEMCS_L5 MEMCS_L4 MEMCS_L3 MEMCS_L2 MEMCS_L1 MEMCS_L0
D17 A18 B17 C17 AF16 AG16 AH16 AJ17
AG10 AE8
AE7 D10
C10 E12 E11 AF8 AG8 AF10 AE10 V3 V4 K5 K4 R5 P5 P3 P4
D8 C8 E8 E7 D6 E6 C4 E5
H5 D4 G5
K3 H3
E13 C12 E10 AE6 AF3 M5 AE5 AB5 AD3 Y5 AB4 Y3 V5 T5 T3 N5
H4 F5 F4
L5 J5
E14 D12 E9 AF6 AF4 M4 AD5 AC5 AD4 AA5 AB3 Y4 W5 U5 T4 M3
N3 N1 U3 V1 N2 P1 U1 U2
-CS3
-CS2
-CS1
-CS0
DCLK7+ DCLK7­DCLK6+ DCLK6­DCLK5+ DCLK5­DCLK4+ DCLK4-
DCLK1+ DCLK1­DCLK0+ DCLK0-
MAA13 MAA12 MAA11 MAA10 MAA9 MAA8 MAA7 MAA6 MAA5 MAA4 MAA3 MAA2 MAA1 MAA0
MAB13 MAB12 MAB11 MAB10 MAB9 MAB8 MAB7 MAB6 MAB5 MAB4 MAB3 MAB2 MAB1 MAB0
MECC7 MECC6 MECC5 MECC4 MECC3 MECC2 MECC1 MECC0
+1.25VTT
CKE0 10,11,12 CKE1 10,11,12
DCLK7+ 10,12 DCLK7- 10,12 DCLK6+ 11,12 DCLK6- 11,12 DCLK5+ 10,12 DCLK5- 10,12 DCLK4+ 11,12 DCLK4- 11,12
DCLK1+ 11,12 DCLK1- 11,12 DCLK0+ 10,12 DCLK0- 10,12
-CS3 11,12
-CS2 11,12
-CS1 10,12
-CS0 10,12
-SRASA 10,12
-SCASA 10,12
-SWEA 10,12 MEMBAA1 10,12
MEMBAA0 10,12
MAA[13:0] 10,12
-SRASB 11,12
-SCASB 11,12
-SWEB 11,12 MEMBAB1 11,12
MEMBAB0 11,12
MAB[13:0] 11,12
MECC[7:0] 12
Clawhammer DDR Interface
+1.25VREF_CLAW
+2.5VDIMM
R30 110 1%
C54
0.01UF 50V X7R
R29 110 1%
C53
0.01UF 50V X7R
Change to 1%
LAYOUT: Place on the bottom of the board.
C60
0.1UF 25V Y5V
C51
C52
33P 50V NPO
0.1UF 25V Y5V
LAYOUT: Place 39pF EMI cap near output
C50
0.1UF 25V Y5V
C57
1000P 50V X7R /NI
+1.25VREF_CLAW
LAYOUT: Locate caps close to socket.
Title
K8 CNTL/STRAPS
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
CRU51-M7
1
639Wednesday, April 12, 2006
1.3
of
Page 7
5
LAYOUT: Route +2.5VDDA approx. 50mil wide and 500mils long.(Reference to ground)
CPU1C
LVREF1 LVREF0
CPU_CORE_FB CPU_CORE_FB-
SNS_+2.5VDIMM
CPUCK+ CPUCK-
BPSCLK+ BPSCLK-
DBRDY
TMS TCK
-TRST TDI
SINCHN
-BRN
CLAW_ANALOG3 CLAW_ANALOG2 CLAW_ANALOG1 CLAW_ANALOG0
+2.5VDDA
AH25
AJ25
AF20 AE18
AJ27
AF27 AE26
AE12 AF12 AE11
AJ21
AH21
AJ23
AH23 AE24
AF24
AG15 AH17
AJ28
AE23 AF23 AF22 AF21
AG2 AH1
AE21
AG4 AG6
AE9 AG9
A23 A24 B23
C16
C15 E20
E17 B21 A21
C18 A19
A28
AA2
B18
C20
C1 R3 D3
C6
VDDA1 VDDA2
RESET_L PWROK LDTSTOP_L
L0_REF1 L0_REF0
COREFB_H COREFB_L CORE_SENSE
VDDIOFB_H VDDIOFB_L VDDIO_SENSE
CLKIN_H CLKIN_L
NC NC
NC NC
VTT_A5 VTT_B5
DBRDY
NC TMS
TCK TRST_L TDI
NC NC
KEY1 KEY0
NC NC NC NC
FREE29
J3
FREE31 FREE33 FREE35 FREE1 FREE37 FREE4 FREE38 FREE41 FREE7 FREE11 FREE12 FREE13 FREE14 FREE40
D D
PLACE WITHIN 1 INCH 10/5/10
CPU_CLK13
CPU_CLK-13
ROUTE AS DIF 20/5/5/5/20 LAYOUT: PLACE 169 OHM WITHIN 0.5INCH OF CPU
C C
B B
C84 47P 50V NPO /NI
HTCPU_RST-13
HTCPU_PWRGD13
HTCPU_STOP-13
+1.2V_HT_CPU
CPU_CORE_FB31 CPU_CORE_FB-31
ROUTE AS DIFF PAIR 10/5/10 10
VDDIO_SENSE32
3900P 50V X7RC75 3900P 50V X7RC83
+1.25VTT
HTCPU_RST­HTCPU_PWRGD HTCPU_STOP-
R49 44.2 1% R48 44.2 1%
R50 169 1%
4
+3.3V_STBY
C69 2200P 50V X7R /NI
THERMDA THERMDC
VID4 VID3 VID2 VID1 VID0
DBREQ_L
TDO
RSVD_SCL
RSVD_SDA
FREE26 FREE28 FREE30 FREE32 FREE34 FREE36 FREE10 FREE18 FREE19 FREE42 FREE24 FREE25 FREE27
A20
A26 A27
VID4
AG13
VID3
AF14
VID2
AG14
VID1
AF15
VID0
AE15 AG18
NC
AH18
NC
AG17
NC
AJ18
NC
AH19 AJ19
AE19
D20
NC
C21
NC
D18
NC
C19
NC
B19
NC
A22 AF18
NC
D22 C22
B13 B7 C3 K1 R2 AA3 F3 C23 AG7 AE22 C24 A25 C9
BP1 BP0
80.6 1%-->82 1%
FBCLKOUT+
R53 80.6 1%
FBCLKOUT-
LAYOUT: Route differentially with 20/8/5/8/20
LAYOUT: PLACE WITHIN 0.5 INCH OF CPU
-DBREQ
SCANCLK1 SCANCLK2 SCANEN SCANSHENB SCANSHENA
TDO
R31 0 /NI
THERMTRIP_L
G_FBCLKOUT_H
G_FBCLKOUT_L
3
U2
1
VDD
SMB_CL
2
D+
SMB_DA
3
D-
ALERT#
4 5
T_CRIT_A# VSS
LM90 MSOP8 /NI
R36 0 /NI R276 680
R42 0 R40 0
K8_VID4 37 K8_VID3 37 K8_VID2 37 K8_VID1 37 K8_VID0 37
+2.5VDIMM
SMB_SCL
8
SMB_SDA
7
SMB_ALLERT-
6
CHIP_THERM- 18,33 CPU_THERMTRIP- 16
+2.5VDDA
CPU_THERMDA 33 CPU_THERMDC 33,34
SMB_SCL 18,20,22,37 SMB_SDA 18,20,22,37 SMB_ALLERT- 33
ROUTING : 10/10/10
SCANSHENA SCANSHENB SCANCLK1 SCANCLK2
SCANEN BP1 BP0
+2.5VDDA
BPSCLK+ BPSCLK-
LVREF0 LVREF1
1 2 3 4 5 6 7 8
R51 820 R52 820
0.01UF 50V X7R /NIC68
2
RN37
680 8P4R RN9
680 8P4R
1000P 50V X7RC77 1000P 50V X7RC78
78 56 34 12
+2.5VDIMM
RN38 680 8P4R
TDI
-TRST TMS TDO
Modify circuit
SINCHN
R76 680
-BRN
R75 680
+2.5VDDA
78
1
+2.5VDIMM
123456
+2.5VDDA
BGA754S-DIP
+2.5VDDA
A A
5
4
3
+2.5VDDA
RN11
680 8P4R
1 2 3 4 5 6 7 8
RN12
1 2 3 4 5 6 7 8
680 8P4R
2
HTCPU_PWRGD
-DBREQ DBRDY TCK
HTCPU_STOP-
HTCPU_RST-
CLAW_ANALOG3 CLAW_ANALOG2
CLAW_ANALOG1 CLAW_ANALOG0
Title
K8 DDR MEM 0-63
Size Document Number Rev
Custom
Date: Sheet
78 56 34 12
RN15 680 8P4R
CRU51-M7
739Wednesday, April 12, 2006
1
of
1.3
Page 8
5
AC15
H18 B20 E21 H22
H24 F26
V10 G13 K14 Y14
AB14
G15
AA15
H16 K16 Y16
AB16
G17
AA17 AC17 AE17
F18 K18
Y18 AB18 AD18 AG19
E19
G19 AC19 AA19
F20
H20
K20
M20
P20
T20
V20
Y20 AB20 AD20
G21
N21
R21
U21
W21 AA21 AC21
F22 K22
M22
P22 T22 V22
Y22 AB22 AD22
E23
G23
N23
R23
U23
W23 AA23 AC23
B24 D24 F24 K24
M24
P24 T24 V24
Y24 AB24 AD24 AH24 AE25
K26
P26
V26
J23
N7
J15
J17
J19
J21 L21
L23
CPU1D
L7
VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10
L9
VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 VDD33 VDD34 VDD35 VDD36 VDD37 VDD38 VDD39 VDD40 VDD41 VDD42 VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54 VDD55 VDD56 VDD57 VDD58 VDD59 VDD60 VDD61 VDD62 VDD63 VDD64 VDD65 VDD66 VDD67 VDD68 VDD69 VDD70 VDD71 VDD72 VDD73 VDD74 VDD75 VDD76 VDD77 VDD78 VDD79 VDD80 VDD81 VDD82 VDD83 VDD84 VDD85 VDD86 VDD87 VDD88 VDD89 VDD90 VDD91 VDD92
BGA754S-DIP
5
VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO7 VDDIO8
VDDIO9 VDDIO10 VDDIO11 VDDIO12 VDDIO13 VDDIO14 VDDIO15 VDDIO16 VDDIO17 VDDIO18 VDDIO19 VDDIO20 VDDIO21 VDDIO22 VDDIO23 VDDIO24 VDDIO25 VDDIO26 VDDIO27 VDDIO28 VDDIO29 VDDIO30 VDDIO31 VDDIO32 VDDIO33 VDDIO34 VDDIO35 VDDIO36 VDDIO37 VDDIO38 VDDIO39 VDDIO40 VDDIO41 VDDIO42 VDDIO43 VDDIO44 VDDIO45 VDDIO46 VDDIO47 VDDIO48 VDDIO49 VDDIO50
VDDIO6
VDD96 VDD97 VDD98
VDD99 VDD100 VDD101 VDD102 VDD103 VDD104 VDD105 VDD106 VDD107 VDD108 VDD109 VDD110 VDD111 VDD112 VDD113 VDD114 VDD115 VDD116 VDD117 VDD118 VDD119 VDD120 VDD121 VDD122 VDD123 VDD124 VDD125 VDD126 VDD127 VDD128 VDD129 VDD130 VDD131 VDD132 VDD133
VDD93
VDD94
VDD95
E4 G4 J4 L4 N4 U4 W4 AA4 AC4 AE4 D5 AF5 F6 H6 K6 M6 P6 T6 V6 Y6 AB6 AD6 D7 G7 J7 AA7 AC7 AF7 F8 H8 AB8 AD8 D9 G9 AC9 AF9 F10 AD10 D11 AF11 F12 AD12 D13 AF13 F14 AD14 F16 AD16 D15 R4
N28 U28 AA28 AE27 R7 U7 W7 K8 M8 P8 T8 V8 Y8 J9 N9 R9 U9 W9 AA9 H10 K10 M10 P10 T10 Y10 AB10 G11 J11 AA11 AC11 H12 K12 Y12 AB12 J13 AA13 AC13 H14 AB26 E28 J28
VCORE
VCORE +2.5VDIMM
D D
C C
B B
A A
4
CPU1E
B2
VSS1
AH20
VSS3
AB21
VSS4
W22
VSS5
M23
VSS6
L24
VSS7
AG25
VSS8
AG27
VSS9
D2
VSS10
AF2
VSS11
W6
VSS12
Y7
VSS13
AA8
VSS14
AB9
VSS15
AA10
VSS16
J12
VSS17
B14
VSS18
Y15
VSS19
AE16
VSS20
J18
VSS21
G20
VSS22
R20
VSS23
U20
VSS24
W20
VSS25
AA20
VSS26
AC20
VSS27
AE20
VSS28
AG20
VSS29
AJ20
VSS30
D21
VSS31
F21
VSS32
H21
VSS33
K21
VSS34
M21
VSS35
P21
VSS36
T21
VSS37
V21
VSS38
Y21
VSS39
AD21
VSS40
AG21
VSS41
B22
VSS42
E22
VSS43
G22
VSS44
J22
VSS45
L22
VSS46
N22
VSS47
R22
VSS48
U22
VSS49
AG29
VSS50
AA22
VSS51
AC22
VSS52
AG22
VSS53
AH22
VSS54
AJ22
VSS55
D23
VSS56
F23
VSS57
H23
VSS58
K23
VSS59
P23
VSS60
T23
VSS61
V23
VSS62
Y23
VSS63
AB23
VSS64
AD23
VSS65
AG23
VSS66
E24
VSS67
G24
VSS68
J24
VSS69
N24
VSS70
R24
VSS71
U24
VSS72
W24
VSS73
AA24
VSS74
AC24
VSS75
AG24
VSS76
AJ24
VSS77
B25
VSS78
C25
VSS79
B26
VSS80
D26
VSS81
H26
VSS82
M26
VSS83
T26
VSS84
Y26
VSS85
AD26
VSS86
AF26
VSS87
AH26
VSS88
C27
VSS89
B28
VSS90
D28
VSS91
G28
VSS92
F15
VSS187
H15
VSS188
AB17
VSS206
AD17
VSS207
B16
VSS208
G18
VSS209
AA18
VSS210
AC18
VSS211
D19
VSS212
F19
VSS213
H19
VSS214
K19
VSS215
Y19
VSS216
AB19
VSS217
AD19
VSS218
AF19
VSS219
J20
VSS220
L20
VSS221
N20
VSS222
BGA754S-DIP
4
VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS189 VSS190 VSS191 VSS192 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS223 VSS201 VSS202 VSS203 VSS204 VSS205
L28 R28 W28 AC28 AF28 AH28 C29 F2 H2 K2 M2 P2 T2 V2 Y2 AB2 AD2 AH2 B4 AH4 B6 G6 J6 L6 N6 R6 U6 AA6 AC6 AH6 F7 H7 K7 M7 P7 T7 V7 AB7 AD7 B8 G8 J8 L8 N8 R8 U8 W8 AC8 AH8 F9 H9 K9 M9 P9 T9 V9 Y9 AD9 B10 G10 J10 L10 N10 R10 U10 W10 AC10 AH10 F11 H11 K11 Y11 AB11 AD11 B12 G12 AA12 AC12 AH12 F13 H13 K13 Y13 AB13 AD13 AF17 G14 J14 AA14 AC14 AE14 D16 E15 K15 AB15 AD15 AH14 E16 G16 J16 AA16 AC16 AE29 AJ26 E18 F17 H17 K17 Y17
3
2
1
Clawhammer Power and Ground Connections
+2.5VDIMMVCORE
VCORE
+1.25VTT
VCORE
BC4 10UF 10V 0805 Y5V /NI BC2 10UF 10V 0805 Y5V BC8 10UF 10V 0805 Y5V
LAYOUT: Place in uPGA socket cavity.
LAYOUT: Place 1000p caps between VRM & CPU..
LAYOUT: Place 1 cap every 1~1.5" along VCORE perimiter.
+2.5VDIMM
0.1UF 25V Y5VC159
0.1UF 25V Y5VC86
10UF 10V 0805 Y5V /NIBC6 10UF 10V 0805 Y5V /NIBC7
+2.5VDIMM
C128 1UF 16V 0805 Y5V C170 1UF 16V 0805 Y5V
C194 1UF 16V 0805 Y5V
LAYOUT: Located close to socket
+2.5VDIMM
0.1UF 25V Y5VC223
Title
K8 DDR MEM 64-127
Size Document Number Rev
Custom
2
Date: Sheet
CRU51-M7
839Monday, April 10, 2006
1
1.3
of
VCORE
10UF 10V 0805 Y5VC147 10UF 10V 0805 Y5VC146 10UF 10V 0805 Y5VC132
LAYOUT: Place 6 EMI caps along bottom right side of CPU,2 in middle of HT link,and 12 along bottom left side of CPU.
10UF 10V 0805 Y5V /NIBC5 10UF 10V 0805 Y5VBC3 1UF 16V 0805 Y5V /NIC141 10UF 10V 0805 Y5VBC9
VCORE
1UF 16V 0805 Y5V /NIC137 1UF 16V 0805 Y5V /NIC142 10UF 10V 0805 Y5VC131 1UF 16V 0805 Y5V /NIC136
3
Page 9
5
4
3
2
1
2.5V/150mA
D D
C C
+3.3V
D S
D5
LM431 SOT23 /NI
Q15
G
2N7002 SOT23 /NI
R24 1K 1% /NI
C
R
to 1%
A
R32 20 1% /NI
+12V
R33
1K 1% /NI
FB8 BEAD 60 0805 1A /NI
+
R1
-
CT7 100UF 16V 5X11 2mm /NI
Vout=Vref (2.5V) X ( 1+R1/R2 ) =2.55V
C81 1UF 16V 0805 Y5V
R2Change
+2.5VDDA
B B
A A
Title
AMD-K8-POWER
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
CRU51-M7
1
939Monday, April 10, 2006
1.3
of
Page 10
5
4
+2.5VDIMM
3
2
1
DIMM1
D D
C C
B B
MAA[13:0]6,12
MEMBAA06,12 MEMBAA16,12
-CS06,12
-CS16,12
DQS_[17:0]11,12
-SWEA6,12
-SCASA6,12
-SRASA6,12 CKE06,11,12
CKE16,11,12
DCLK5+6,12
DCLK5-6,12
DCLK0+6,12
DCLK0-6,12
DCLK7+6,12
DCLK7-6,12
DQS_[17:0]11,12
SMB_MEM_SDA11,18
SMBDT11,18 SMBCK11,18
SMB_MEM_SCL11,18
+1.25VREF_MEM
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13
MEMBAA0 MEMBAA1
DQS_9 DQS_10 DQS_11 DQS_12 DQS_13 DQS_14 DQS_15 DQS_16 DQS_17
-SWEA
-SCASA
-SRASA CKE0
CKE1
DCLK5+ DCLK5­DCLK0+ DCLK0­DCLK7+ DCLK7-
DQS_0 DQS_1 DQS_2 DQS_3 DQS_4 DQS_5 DQS_6 DQS_7 DQS_8
SMBDT SMBCK
+2.5VDIMM
R38 0 /NI R143 4.7K
FETEN
FETEN11
130
125 122 141
118 115 167
113 157
158 163
107 119 129 149 159 169 177 140
154
111
137 138
181 182 183
184
101 102 173 103
48 43 41
37 32
29 27
59 52
71
97
63 65
21
16 17
76 75
5 14 25 36 56 67 78 86 47
91 92
1 82
9 10
15223054627796
VDDQ
VDDQ
VDDQ
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13
BA0 BA1 BA2
CS0 CS1 NC/CS2 NC/CS3
DQM0 DQM1 DQM2 DQM3 DQM4 DQM5 DQM6 DQM7 DQM8
WE CAS RAS
CKE0 CKE1
CK0/DNU CK0/DNU CK1 CK1 CK2/DNU CK2/DNU
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8
SDA SCL
SA0 SA1 SA2
VREF VDDID VDDSPD
NC NC/RESET NC NC NC NC/FETEN
3111826344250586674818993
VDDQ
GND
VDDQ
GND
VDDQ
VDDQ
GND
GND
104
VDDQ
GND
112
VDDQ
GND
128
VDDQ
GND
136
VDDQ
GND
143
VDDQ
GND
156
164
172
180738467085108
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
120
148
168
DIMM1
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
D0 D1 D2 D3 D4 D5 D6 D7 D8
D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63
CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7
GND
GND
GND
GND
GND
DDRAM184 NYLON LOTES B
139
145
152
160
176
WP
GND
GND
GND
GND
100
116
124
132
MD_0
2
MD_1
4
MD_2
6
MD_3
8
MD_4
94
MD_5
95
MD_6
98
MD_7
99
MD_8
12
MD_9
13
MD_10
19
MD_11
20
MD_12
105
MD_13
106
MD_14
109
MD_15
110
MD_16
23
MD_17
24
MD_18
28
MD_19
31
MD_20
114
MD_21
117
MD_22
121
MD_23
123
MD_24
33
MD_25
35
MD_26
39
MD_27
40
MD_28
126
MD_29
127
MD_30
131
MD_31
133
MD_32
53
MD_33
55
MD_34
57
MD_35
60
MD_36
146
MD_37
147
MD_38
150
MD_39
151
MD_40
61
MD_41
64
MD_42
68
MD_43
69
MD_44
153
MD_45
155
MD_46
161
MD_47
162
MD_48
72
MD_49
73
MD_50
79
MD_51
80
MD_52
165
MD_53
166
MD_54
170
MD_55
171
MD_56
83
MD_57
84
MD_58
87
MD_59
88
MD_60
174
MD_61
175
MD_62
178
MD_63
179
MECC_0
44
MECC_1
45
MECC_2
49
MECC_3
51
MECC_4
134
MECC_5
135
MECC_6
142
MECC_7
144 90
MD_[63:0] 11,12
+1.25VREF_MEM
MECC_[7:0] 11,12
+2.5VDIMM
Change to 1%
Change to 1%
+2.5VDIMM
R25 100 1%
R26 100 1%
C41
0.01UF 50V X7R
C43
0.1UF 25V Y5V
LAYOUT: Place 39pf EMI cap near output
C44 33P 50V NPO
+1.25VREF_MEM
LAYOUT: Locate caps close to DIMMs.
C45
C42
1000P 50V X7R /NI
0.1UF 25V Y5V /NI
A A
Title
DDR DIMM1
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
CRU51-M7
1
10 39Wednesday, April 12, 2006
1.3
of
Page 11
5
4
+2.5VDIMM
3
2
1
DIMM2
120
148
168
DIMM2
VDD
VDD
VDD
VDD
2
D0
4
D1
6
D2
8
D3
94
D4
95
D5
98
D6
99
D7
12
D8
13
D9
19
D10
20
D11
105
D12
106
D13
109
D14
110
D15
23
D16
24
D17
28
D18
31
D19
114
D20
117
D21
121
D22
123
D23
33
D24
35
D25
39
D26
40
D27
126
D28
127
D29
131
D30
133
D31
53
D32
55
D33
57
D34
60
D35
146
D36
147
D37
150
D38
151
D39
61
D40
64
D41
68
D42
69
D43
153
D44
155
D45
161
D46
162
D47
72
D48
73
D49
79
D50
80
D51
165
D52
166
D53
170
D54
171
D55
83
D56
84
D57
87
D58
88
D59
174
D60
175
D61
178
D62
179
D63
44
CB0
45
CB1
49
CB2
51
CB3
134
CB4
135
CB5
142
CB6
144
CB7
90
WP
GND
GND
GND
DDRAM184 NYLON LOTES B
152
160
176
MD_0 MD_1 MD_2 MD_3 MD_4 MD_5 MD_6 MD_7 MD_8 MD_9 MD_10 MD_11 MD_12 MD_13 MD_14 MD_15 MD_16 MD_17 MD_18 MD_19 MD_20 MD_21 MD_22 MD_23 MD_24 MD_25 MD_26 MD_27 MD_28 MD_29 MD_30 MD_31 MD_32 MD_33 MD_34 MD_35 MD_36 MD_37 MD_38 MD_39 MD_40 MD_41 MD_42 MD_43 MD_44 MD_45 MD_46 MD_47 MD_48 MD_49 MD_50 MD_51 MD_52 MD_53 MD_54 MD_55 MD_56 MD_57 MD_58 MD_59 MD_60 MD_61 MD_62 MD_63
MECC_0 MECC_1 MECC_2 MECC_3 MECC_4 MECC_5 MECC_6 MECC_7
WWP
R142
4.7K
MD_[63:0] 10,12
MECC_[7:0] 10,12
+2.5VDIMM
130
125 122 141
118 115 167
113 157
158 163
107 119 129 149 159 169 177 140
154
111
137 138
181 182 183
184
101 102 173 103
48 43 41
37 32
29 27
59 52
71
97
63 65
21
16 17
76 75
5 14 25 36 56 67 78 86 47
91 92
1 82
9 10
15223054627796
VDDQ
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13
BA0 BA1 BA2
CS0 CS1 NC/CS2 NC/CS3
DQM0 DQM1 DQM2 DQM3 DQM4 DQM5 DQM6 DQM7 DQM8
WE CAS RAS
CKE0 CKE1
CK0/DNU CK0/DNU CK1 CK1 CK2/DNU CK2/DNU
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8
SDA SCL
SA0 SA1 SA2
VREF VDDID VDDSPD
NC NC/RESET NC NC NC NC/FETEN
D D
MAB[13:0]6,12
MEMBAB06,12 MEMBAB16,12
-CS26,12
-CS36,12
DQS_[17:0]10,12
C C
-SWEB6,12
-SCASB6,12
-SRASB6,12 CKE06,10,12
CKE16,10,12
DCLK4+6,12
DCLK4-6,12
DCLK1+6,12
DCLK1-6,12
DCLK6+6,12
DCLK6-6,12
DQS_[17:0]10,12
B B
SMBDT10,18 SMBCK10,18
+2.5VDIMM
+1.25VREF_MEM
+2.5VDIMM
FETEN10
MEMBAB0 MEMBAB1
FETEN
DQS_9 DQS_10 DQS_11 DQS_12 DQS_13 DQS_14 DQS_15 DQS_16 DQS_17
-SWEB
-SCASB
-SRASB CKE0
CKE1
SMBDT SMBCK
MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13
DQS_0 DQS_1 DQS_2 DQS_3 DQS_4 DQS_5 DQS_6 DQS_7 DQS_8
104
112
128
136
143
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
GND
GND
GND
3111826344250586674818993
156
VDDQ
GND
164
VDDQ
GND
172
VDDQ
VDDQ
GND
GND
180738467085108
VDD
VDD
VDD
VDD
VDD
VDDQ
GND
GND
GND
GND
GND
GND
GND
100
116
124
132
139
145
A A
Title
DDR DIMM2
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
CRU51-M7
1
11 39Wednesday, April 12, 2006
1.3
of
Page 12
5
4
3
2
1
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 7 8 5 6 3 4 1 2 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
R71 47
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
R85 47
+1.25VTT
RN5 47 8P4R
RN6 47 8P4R
RN14 47 8P4R
RN17 47 8P4R
RN18 47 8P4R
RN20 47 8P4R
RN30 47 8P4R
RN29 47 8P4R
RN42 47 8P4R
47 8P4R
RN57 47 8P4R
RN52 47 8P4R
RN62 47 8P4R
RN65 47 8P4R
RN70 47 8P4R
RN68 47 8P4R
RN41 47 8P4R
RN40 47 8P4R
RN7 47 8P4R
RN50 47 8P4R
RN21 47 8P4R
RN60 47 8P4R
4
DDR Termination
MD[63:0]6
DQS[17:0]6
MD_[63:0]10,11
DQS_[17:0]10,11
MAA[13:0]6,10
MAB[13:0]6,11
MEMBAA16,10 MEMBAB16,11 MEMBAB06,11 MEMBAA06,10
-CS16,10
-CS36,11
-SRASA6,10
-SRASB6,11
-SWEA6,10
-SWEB6,11
-CS06,10
-SCASA6,10
-SCASB6,11
-CS26,11 CKE16,10,11 CKE06,10,11
+1.25VTT
C82 1UF 16V 0805 Y5V
0.1UF 25V Y5VC175
0.1UF 25V Y5VC257
DCLK7-6,10 DCLK6-6,11 DCLK5-6,10 DCLK4-6,11 DCLK1-6,11 DCLK0-6,10
R82 120 R77 120 R47 120 R46 120 R60 120 R61 120
DCLK7+ 6,10 DCLK6+ 6,11 DCLK5+ 6,10 DCLK4+ 6,11 DCLK1+ 6,11 DCLK0+ 6,10
+1.25VTT
+2.5VDIMM
MAB2 MAA2 MAB1 MAA1 MAB5 MAA5 MAB6 MAA6 MAB11 MAA11 MAA9 MAB9 MAA0 MAA10 MAB0 MAB10 MAB4 MAA4 MAB3 MAA3 MAB7 MAA7 MAB8
MAA8 MEMBAA1 MEMBAB1 MEMBAB0 MEMBAA0
-CS1
-CS3 MAB13 MAA13
-SRASA
-SRASB
-SWEA
-SWEB
-CS0
-SCASA
-SCASB
-CS2
CKE1 CKE0 MAB12 MAA12DQS_6
0.1UF 25V Y5VC234
CT17 1000UF 6.3V 8X12
0.1UF 25V Y5VC235
0.1UF 25V Y5VC214
1000UF 6.3V 8X12
3
MECC_5 MAA1 MECC_0 MECC_1 MAB7 MAA7 MAB8 MAA8 MD_24 MD_28 MAB6 MAA6 MD_12 MD_13 DQS_1 DQS_10 MD_31 MAA2 MECC_4 MAB1 MD_25 MD_29 DQS_3 DQS_12 MD_19 MD_23 MAB5 MAA5
DQS_5 DQS_14 MD_42 MD_43
MAA0 MAA10 MAB0 MAB10 MEMBAA0 MD_35 MD_40 MD_44
-SRASA
-SRASB
-SWEA MD_45
+1.25VTT
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
+1.25VTT
LAYOUT: Add 100pF and 1000pF VTT fill near Clawhammer and near DIMMs (Both Sides)
RN34 47 8P4R
RN23 47 8P4R
RN26 47 8P4R
RN10 47 8P4R
RN32 47 8P4R
RN28 47 8P4R
RN24 47 8P4R
RN53 47 8P4R
RN35 47 8P4R
RN46 47 8P4R
RN47 47 8P4R
0.1UF 25V Y5VC125
0.1UF 25V Y5VC133
0.1UF 25V Y5VC197
0.1UF 25V Y5VC100
2
0.1UF 25V Y5VC158
0.1UF 25V Y5VC94RN44
0.1UF 25V Y5VC231
0.1UF 25V Y5VC61
0.1UF 25V Y5VC205
0.1UF 25V Y5VC253
LAYOUT: Place alternating caps to GND and +2.5VDIMM in a single line along VTT island. LAYOUT: Place a cap every 1 inch on VTT trace between Clawhammer and DDR.
+2.5VDIMM
0.1UF 25V Y5VC246
0.1UF 25V Y5VC74
0.1UF 25V Y5VC33
LAYOUT: Place on backside, evenly spaced around VTT fill.
+2.5VDIMM
+1.25VTT
Title
DDR TERMINATION
Size Document Number Rev
Custom
Date: Sheet
0.1UF 25V Y5VC213
0.1UF 25V Y5VC85
0.1UF 25V Y5VC297
0.1UF 25V Y5VC269
0.1UF 25V Y5VC165
0.1UF 25V Y5VC277
0.1UF 25V Y5VC149
0.1UF 25V Y5VC143
0.1UF 25V Y5VC116
0.1UF 25V Y5VC108
+2.5VDIMM
0.1UF 25V Y5VC238
+1.25VTT+1.25VTT
+1.25VTT
CRU51-M7
1
12 39Wednesday, April 12, 2006
of
1.3
MECC_2 MECC_6 MECC_3 MECC_7 MECC_4 MECC_5 MECC_0 MECC_1
MD_0 MD_4 MD_5 MD_1 DQS_0 DQS_9 MD_2 MD_6 MD_11 MD_10 MD_15 MD_14 CKE1 MD_20 MD_16 MD_17 CKE0 MAB12 MAA12 MAB11 MD_21 MAA11 MAA9 MAB9 MD_30 MAA3 MD_27 MAB2 MAB4 MAA4 MAB3 MD_26 MD_33 MD_37 DQS_4 DQS_13 MD_34 MD_38 MEMBAB0 MD_39 MD_46 MD_47 MD_48 MD_49
-SCASB
-CS1
-CS2
-CS3 DQS_15
MD_54 MD_50 MD_55 MD_51 MD_60 MD_56 MD_62 MD_58 MD_63 MD_59 MD_61 MD_57 DQS_16 DQS_7 MECC_7 MEMBAB1 MD_32 MD_36 MECC_2 MECC_6 MECC_3 MEMBAA1 MD_7 MD_3 MD_8 MD_9
-SWEB
-CS0 MD_41
-SCASA DQS_8 DQS_2 DQS_11 MD_18 MD_22 MD_52 MD_53 MAB13 MAA13 DQS_17
MECC_[7:0] 10,11
RN36 10 8P4R
RN33 10 8P4R
MD0
1 2
MD4
3 4
MD5
5 6
MD1
7 8
MD2
1 2
MD6
3 4
MD7
5 6
MD3
7 8
MD14
D D
C C
B B
A A
MECC[7:0]6
1 2
MD15
3 4
MD10
5 6
MD11
7 8
MD20
1 2
MD16
3 4
MD17
5 6
MD21
7 8
MD18
1 2
MD22
3 4
MD19
5 6
MD23
7 8
MD24
1 2
MD28
3 4
MD25
5 6
MD29
7 8
MD26
1 2
MD30
3 4
MD27
5 6
MD31
7 8
MD32
1 2
MD36
3 4
MD33
5 6
MD37
7 8
MD34
1 2
MD38
3 4
MD39
5 6
MD35
7 8
MD40
1 2
MD44
3 4
MD45
5 6
MD41
7 8
MD48
1 2
MD49
3 4
MD52
5 6
MD53
7 8
MD54
1 2
MD50
3 4
MD55
5 6
MD51
7 8
MD60
1 2
MD56
3 4
MD61
5 6
MD57
7 8
MD62
1 2
MD58
3 4
MD63
5 6
MD59
7 8
MD8
1 2
MD9
3 4
MD12
5 6
MD13
7 8
MD42
1 2
MD43
3 4
MD46
5 6
MD47
7 8
DQS0
R39 0 R54 0
DQS1 DQS2
R58 0 R65 0
DQS3
R101 0
DQS4 DQS5
R106 0 R109 0
DQS6 DQS7
R130 0
DQS8
R70 0 R41 0
DQS9
R56 0
DQS10
R59 0
DQS11 DQS12
R66 0 R102 0
DQS13 DQS14
R107 0
DQS15
R108 0 R127 0
DQS16 DQS17 DQS_17
R74 0
5
RN8 10 8P4R
RN13 10 8P4R
RN19 10 8P4R
RN22 10 8P4R
RN25 10 8P4R
RN27 10 8P4R
RN31 10 8P4R
RN39 10 8P4R
RN43 10 8P4R
RN45 10 8P4R
RN51 10 8P4R
RN55 10 8P4R
RN59 10 8P4R
RN64 10 8P4R
RN16 10 8P4R
RN48 10 8P4R
MECC2 MECC6 MECC3 MECC7 MECC4 MECC5 MECC0 MECC1
MD_0 MD_4 MD_5 MD_1 MD_2 MD_6 MD_7 MD_3 MD_14 MD_15 MD_10 MD_11 MD_20 MD_16 MD_17 MD_21 MD_18 MD_22 MD_19 MD_23 MD_24 MD_28 MD_25 MD_29 MD_26 MD_30 MD_27 MD_31 MD_32 MD_36 MD_33 MD_37 MD_34 MD_38 MD_39 MD_35 MD_40 MD_44 MD_45 MD_41 MD_48 MD_49 MD_52 MD_53 MD_54 MD_50 MD_55 MD_51 MD_60 MD_56 MD_61 MD_57 MD_62 MD_58 MD_63 MD_59 MD_8 MD_9 MD_12 MD_13 MD_42 MD_43 MD_46 MD_47
DQS_0 DQS_1 DQS_2 DQS_3 DQS_4 DQS_5 DQS_6 DQS_7 DQS_8 DQS_9 DQS_10 DQS_11 DQS_12 DQS_13 DQS_14 DQS_15 DQS_16
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
Page 13
5
D D
4
3
2
1
U8A
Y23
HT_CPU_RXD+0
W24
HT_CPU_RXD+1
V24
HT_CPU_RXD+2
U22
HT_CPU_RXD+3
R24
HT_CPU_RXD+4
P24
HT_CPU_RXD+5
P22
HT_CPU_RXD+6
N22
HT_CPU_RXD+7
Y21
HT_CPU_RXD+8
V21
HT_CPU_RXD+9
W21
HT_CPU_RXD+10
T21
HT_CPU_RXD+11
R18
HT_CPU_RXD+12
P16
HT_CPU_RXD+13
N20
HT_CPU_RXD+14
M17
HT_CPU_RXD+15
Y22
HT_CPU_RXD-0
W23
HT_CPU_RXD-1
V23
HT_CPU_RXD-2
U21
HT_CPU_RXD-3
R23
HT_CPU_RXD-4
P23
HT_CPU_RXD-5
P21
HT_CPU_RXD-6
N21
HT_CPU_RXD-7
Y20
HT_CPU_RXD-8
W20
HT_CPU_RXD-9
W22
HT_CPU_RXD-10
U20
HT_CPU_RXD-11
R19
HT_CPU_RXD-12
P17
HT_CPU_RXD-13
N19
HT_CPU_RXD-14
N18
HT_CPU_RXD-15
T23
HT_CPU_RX_CLK+0
T22
HT_CPU_RX_CLK-0
R21
HT_CPU_RX_CLK+1
R20
HT_CPU_RX_CLK-1
M23
HT_CPU_RXCTL+
M22
HT_CPU_RXCTL-
W19
HT_CPU_CAL_1P2V
Y19
HT_CPU_CAL_GND
N16
+1.2V_PLLHTCPU
T13
+1.2V_PLLHTMCP
C51G_PBGA_468
C51 1 OF 6 CPU
HT_CPU_TXD+0 HT_CPU_TXD+1 HT_CPU_TXD+2 HT_CPU_TXD+3 HT_CPU_TXD+4 HT_CPU_TXD+5 HT_CPU_TXD+6 HT_CPU_TXD+7 HT_CPU_TXD+8
HT_CPU_TXD+9 HT_CPU_TXD+10 HT_CPU_TXD+11 HT_CPU_TXD+12 HT_CPU_TXD+13 HT_CPU_TXD+14 HT_CPU_TXD+15
HT_CPU_TXD-0 HT_CPU_TXD-1 HT_CPU_TXD-2 HT_CPU_TXD-3 HT_CPU_TXD-4 HT_CPU_TXD-5 HT_CPU_TXD-6 HT_CPU_TXD-7 HT_CPU_TXD-8
HT_CPU_TXD-9 HT_CPU_TXD-10 HT_CPU_TXD-11 HT_CPU_TXD-12 HT_CPU_TXD-13 HT_CPU_TXD-14 HT_CPU_TXD-15
HT_CPU_TX_CLK+0 HT_CPU_TX_CLK-0 HT_CPU_TX_CLK+1 HT_CPU_TX_CLK-1
HT_CPU_TXCTL+
HT_CPU_TXCTL-
CLKOUT0_200MHZ+
CLKOUT0_200MHZ-
CLKOUT1_200MHZ+
CLKOUT1_200MHZ-
HT_CPU_REQ*
HT_CPU_STOP* HT_CPU_RESET* HT_CPU_PWRGD
+2.5V_PLLHTCPU
BFB4 BEAD 60 0805 1A
HTCPU_DWN[15..0] HTCPU_DWN0 HTCPU_DWN1 HTCPU_DWN2 HTCPU_DWN3 HTCPU_DWN4 HTCPU_DWN5 HTCPU_DWN6 HTCPU_DWN7 HTCPU_DWN8 HTCPU_DWN9 HTCPU_DWN10 HTCPU_DWN11 HTCPU_DWN12 HTCPU_DWN13 HTCPU_DWN14 HTCPU_DWN15 HTCPU_DWN-[15..0] HTCPU_DWN-0 HTCPU_DWN-1 HTCPU_DWN-2 HTCPU_DWN-3 HTCPU_DWN-4 HTCPU_DWN-5 HTCPU_DWN-6 HTCPU_DWN-7 HTCPU_DWN-8 HTCPU_DWN-9 HTCPU_DWN-10 HTCPU_DWN-11 HTCPU_DWN-12 HTCPU_DWN-13 HTCPU_DWN-14 HTCPU_DWN-15
HTCPU_DWNCLK0 HTCPU_DWNCLK-0 HTCPU_DWNCLK1 HTCPU_DWNCLK-1
HTCPU_DWNCNTL HTCPU_DWNCNTL-
HTCPUCAL_1P2V HTCPUCAL_GND
1P2VPLL_FILT
BC18
BC17
10UF 10V 0805 Y5V
1UF 10V Y5V
HTCPU_DWN[15..0]5
HTCPU_DWN-[15..0]5
C C
HTCPU_DWNCLK05 HTCPU_DWNCLK-05 HTCPU_DWNCLK15 HTCPU_DWNCLK-15
HTCPU_DWNCNTL5 HTCPU_DWNCNTL-5
+1.2V_HT
1P2VPLL_PWR14,15
B B
BR1 150 1% R112 150 1%
PLACE ON CHIP BACK SIDE
C23 D23 E22 F23 H22 J21 K21 K23 D21 F19 F21 G20 J19 L17 L20 L18
C24 D24 E23 F24 H23 J22 K22 K24 D22 E20 E21 G19 J18 K17 K19 L19
G23 G24 G22 G21
L23 L24
B24 B23 A22 B21
F18 G18 D20 E19
L16
HTCPU_UP[15..0] HTCPU_UP0 HTCPU_UP1 HTCPU_UP2 HTCPU_UP3 HTCPU_UP4 HTCPU_UP5 HTCPU_UP6 HTCPU_UP7 HTCPU_UP8 HTCPU_UP9 HTCPU_UP10 HTCPU_UP11 HTCPU_UP12 HTCPU_UP13 HTCPU_UP14 HTCPU_UP15 HTCPU_UP-[15..0] HTCPU_UP-0 HTCPU_UP-1 HTCPU_UP-2 HTCPU_UP-3 HTCPU_UP-4 HTCPU_UP-5 HTCPU_UP-6 HTCPU_UP-7 HTCPU_UP-8 HTCPU_UP-9 HTCPU_UP-10 HTCPU_UP-11 HTCPU_UP-12 HTCPU_UP-13 HTCPU_UP-14 HTCPU_UP-15
HTCPU_UPCLK0 HTCPU_UPCLK-0 HTCPU_UPCLK1 HTCPU_UPCLK-1
HTCPU_UPCNTL HTCPU_UPCNTL-
CPU_CLK CPU_CLK-
HTCPU_REQ­HTCPU_STOP­HTCPU_RST­HTCPU_PWRGD
2P5V_PLLHTCPU
BC10
1UF 16V 0805 Y5V /NI
HTCPU_UP[15..0] 5
HTCPU_UP-[15..0] 5
HTCPU_UPCLK0 5 HTCPU_UPCLK-0 5 HTCPU_UPCLK1 5 HTCPU_UPCLK-1 5
HTCPU_UPCNTL 5 HTCPU_UPCNTL- 5
CPU_CLK 7 CPU_CLK- 7
R133 10K 1% /NI
HTCPU_STOP- 7 HTCPU_RST- 7 HTCPU_PWRGD 7
BFB1 BEAD 60 0805 1A
BC11
1UF 10V Y5V
+3.3V
2P5V_PWR 14,15
HTMCP_UP[7..0]16
HTMCP_UP-[7..0]16
HTMCP_UPCLK016 HTMCP_UPCLK-016
HTMCP_UPCNTL16 HTMCP_UPCNTL-16
HTMCP_REQ-16 HTMCP_STOP-16 HTMCP_RST-16 HTMCP_PWRGD16
MCPOUT_25MHZ16 MCPOUT_200MHZ16 MCPOUT_200MHZ-16
HTMCP_UP[7..0] HTMCP_UP0 HTMCP_UP1 HTMCP_UP2 HTMCP_UP3 HTMCP_UP4 HTMCP_UP5 HTMCP_UP6 HTMCP_UP7
HTMCP_UP-[7..0] HTMCP_UP-0 HTMCP_UP-1 HTMCP_UP-2 HTMCP_UP-3 HTMCP_UP-4 HTMCP_UP-5 HTMCP_UP-6 HTMCP_UP-7
HTMCP_UPCLK0 HTMCP_UPCLK-0
HTMCP_UPCNTL HTMCP_UPCNTL-
HTMCP_REQ­HTMCP_STOP­HTMCP_RST­HTMCP_PWRGD
MCPOUT_25MHZ MCPOUT_200MHZ MCPOUT_200MHZ-
U8B
AD6
HT_MCP_RXD+0
AC7
HT_MCP_RXD+1
AA8
HT_MCP_RXD+2
AA9
HT_MCP_RXD+3
AD10
HT_MCP_RXD+4
AD11
HT_MCP_RXD+5
AC12
HT_MCP_RXD+6
AC13
HT_MCP_RXD+7
AA6
HT_MCP_RXD+8
W7
HT_MCP_RXD+9
Y8
HT_MCP_RXD+10
V9
HT_MCP_RXD+11
Y10
HT_MCP_RXD+12
AA11
HT_MCP_RXD+13
V11
HT_MCP_RXD+14
W12
HT_MCP_RXD+15
AC6
HT_MCP_RXD-0
AB7
HT_MCP_RXD-1
AB8
HT_MCP_RXD-2
AB9
HT_MCP_RXD-3
AC10
HT_MCP_RXD-4
AC11
HT_MCP_RXD-5
AB12
HT_MCP_RXD-6
AB13
HT_MCP_RXD-7
Y6
HT_MCP_RXD-8
Y7
HT_MCP_RXD-9
AA7
HT_MCP_RXD-10
W9
HT_MCP_RXD-11
W10
HT_MCP_RXD-12
Y12
HT_MCP_RXD-13
W11
HT_MCP_RXD-14
V13
HT_MCP_RXD-15
AD9
HT_MCP_RX_CLK+0
AC9
HT_MCP_RX_CLK-0
U10
HT_MCP_RX_CLK+1
T10
HT_MCP_RX_CLK-1
AD14
HT_MCP_RXCTL+
AC14
HT_MCP_RXCTL-
AB5
HT_MCP_REQ*
AA5
HT_MCP_STOP*
AC5
HT_MCP_RESET*
AD5
HT_MCP_PWRGD
AC4
CLKIN_25MHZ
Y5
CLKIN_200MHZ+
W5
CLKIN_200MHZ-
C51G_PBGA_468
C51
HT_MCP_TXD+0
2 OF 6
HT_MCP_TXD+1 HT_MCP_TXD+2
HT_MCP
HT_MCP_TXD+3 HT_MCP_TXD+4 HT_MCP_TXD+5 HT_MCP_TXD+6 HT_MCP_TXD+7 HT_MCP_TXD+8
HT_MCP_TXD+9 HT_MCP_TXD+10 HT_MCP_TXD+11 HT_MCP_TXD+12 HT_MCP_TXD+13 HT_MCP_TXD+14 HT_MCP_TXD+15
HT_MCP_TXD-0 HT_MCP_TXD-1 HT_MCP_TXD-2 HT_MCP_TXD-3 HT_MCP_TXD-4 HT_MCP_TXD-5 HT_MCP_TXD-6 HT_MCP_TXD-7 HT_MCP_TXD-8
HT_MCP_TXD-9 HT_MCP_TXD-10 HT_MCP_TXD-11 HT_MCP_TXD-12 HT_MCP_TXD-13 HT_MCP_TXD-14 HT_MCP_TXD-15
HT_MCP_TX_CLK+0
HT_MCP_TX_CLK-0
HT_MCP_TX_CLK+1
HT_MCP_TX_CLK-1
HT_MCP_TXCTL+
HT_MCP_TXCTL­CLKOUT_CTERM
SCLKIN_MCLKOUT_200MHZ+
SCLKIN_MCLKOUT_200MHZ-
HT_MCP_CAL_1P2V
HT_MCP_CAL_GND
HTMCP_DWN[7..0] HTMCP_DWN0
AC24
HTMCP_DWN1
AD23
HTMCP_DWN2
AC22
HTMCP_DWN3
AC20
HTMCP_DWN4
AB18
HTMCP_DWN5
AA17
HTMCP_DWN6
AB16
HTMCP_DWN7
AC16 AB21 AB20 AB19 W18 W15 AA15 Y14 W13
HTMCP_DWN-[7..0] HTMCP_DWN-0
AC23
HTMCP_DWN-1
AD22
HTMCP_DWN-2
AC21
HTMCP_DWN-3
AD20
HTMCP_DWN-4
AC18
HTMCP_DWN-5
AB17
HTMCP_DWN-6
AB15
HTMCP_DWN-7
AD16 AB22 AA20 AA19 V17 V15 Y15 W14 Y13
HTMCP_DWNCLK0
AC19
HTMCP_DWNCLK-0
AD19 Y17 W17
HTMCP_DWNCNTL
AC15
HTMCP_DWNCNTL-
AD15
CLKOUTCTERM
B22 A20 B20
HTMCPCAL_1P2V
AB23
HTMCPCAL_GND
AB24
HTMCP_DWN[7..0] 16
HTMCP_DWN-[7..0] 16
HTMCP_DWNCLK0 16 HTMCP_DWNCLK-0 16
HTMCP_DWNCNTL 16 HTMCP_DWNCNTL- 16
R123 2.37K 1%
R113 150 1% R114 150 1%
FOR VER 1.0
+1.2V
A A
Title
C51 (1&2) OF 6
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
CRU51-M7
1
13 39Wednesday, April 12, 2006
1.3
of
Page 14
5
4
3
2
1
PLACE ON CLOSE CHIP < 600 mil
DAC_RED26 DAC_GREEN26 DAC_BLUE26
DAC_HSYNC26 DAC_VSYNC26
+3.3V
2P5V_PWR13,15
1P2VPLL_PWR13,15
J8
J6 K9 L6 L7
M9
N8 N6 R6 P3 R8 U6 T8 U7 V4 Y3
J7
J5
J9 L5 L8
M8
N7 N5 R5 P4 R7 U5 T9 U8 V3
AA3
D1
G6
H6 E2
J4 K3 E3 D3 E4
AC3 AB3
T11
BC27 1UF 10V Y5V
U8C
PE0_RX+0 PE0_RX+1 PE0_RX+2 PE0_RX+3 PE0_RX+4 PE0_RX+5 PE0_RX+6 PE0_RX+7 PE0_RX+8 PE0_RX+9 PE0_RX+10 PE0_RX+11 PE0_RX+12 PE0_RX+13 PE0_RX+14 PE0_RX+15
PE0_RX-0 PE0_RX-1 PE0_RX-2 PE0_RX-3 PE0_RX-4 PE0_RX-5 PE0_RX-6 PE0_RX-7 PE0_RX-8 PE0_RX-9 PE0_RX-10 PE0_RX-11 PE0_RX-12 PE0_RX-13 PE0_RX-14 PE0_RX-15
PE0_PRSNT*
PE1_RX+ PE1_RX­PE1_PRSNT* PE2_RX+ PE2_RX­PE2_PRSNT* PE1_CLKREQ* PE2_CLKREQ*
PE_REFCLK+ PE_REFCLK-
+12V_PLLPE
C51G_PBGA_468
C51 3 OF 6 PE
PE_CTERM_GND
PE0_TX+0 PE0_TX+1 PE0_TX+2 PE0_TX+3 PE0_TX+4 PE0_TX+5 PE0_TX+6 PE0_TX+7 PE0_TX+8
PE0_TX+9 PE0_TX+10 PE0_TX+11 PE0_TX+12 PE0_TX+13 PE0_TX+14 PE0_TX+15
PE0_TX-0 PE0_TX-1 PE0_TX-2 PE0_TX-3 PE0_TX-4 PE0_TX-5 PE0_TX-6 PE0_TX-7 PE0_TX-8
PE0_TX-9 PE0_TX-10 PE0_TX-11 PE0_TX-12 PE0_TX-13 PE0_TX-14 PE0_TX-15
PE0_REFCLK+
PE0_REFCLK-
PE1_TX+
PE1_TX-
PE1_REFCLK+
PE1_REFCLK-
PE2_TX+
PE2_TX-
PE2_REFCLK+
PE2_REFCLK-
PE_TSTCLK+
PE_TSTCLK-
PE_RST*
BFB5 0 0805
PE0_IN0 PE0_IN1 PE0_IN2 PE0_IN3 PE0_IN4 PE0_IN5 PE0_IN6 PE0_IN7 PE0_IN8 PE0_IN9 PE0_IN10 PE0_IN11 PE0_IN12 PE0_IN13 PE0_IN14 PE0_IN15
PE0_PRSNT-
PE1_IN PE1_IN­PE1_PRSNT-
PE2_PRSNT-
1P2V_PLLPE
PE0_IN022 PE0_IN122 PE0_IN222 PE0_IN322 PE0_IN422 PE0_IN522
D D
C C
1P2VPLL_PWR13,15
PE0_IN622 PE0_IN722 PE0_IN822 PE0_IN922 PE0_IN1022 PE0_IN1122 PE0_IN1222 PE0_IN1322 PE0_IN1422 PE0_IN1522
PE0_IN-022 PE0_IN-122 PE0_IN-222 PE0_IN-322 PE0_IN-422 PE0_IN-522 PE0_IN-622 PE0_IN-722 PE0_IN-822 PE0_IN-922 PE0_IN-1022 PE0_IN-1122 PE0_IN-1222 PE0_IN-1322 PE0_IN-1422 PE0_IN-1522
PE0_PRSNT-22
PE1_IN22 PE1_IN-22 PE1_PRSNT-22
PE2_PRSNT-22
PE0_OUT[15..0] PE0_OUT0
L1
PE0_OUT1
L3
PE0_OUT2
L4
PE0_OUT3
M4
PE0_OUT4
P1
PE0_OUT5
R1
PE0_OUT6
R3
PE0_OUT7
R4
PE0_OUT8
U4
PE0_OUT9
V1
PE0_OUT10
W1
PE0_OUT11
W3
PE0_OUT12
AA1
PE0_OUT13
AB1
PE0_OUT14
AC1
PE0_OUT15
AD2
PE0_OUT-[15..0] PE0_OUT-0
L2
PE0_OUT-1
M2
PE0_OUT-2
M3
PE0_OUT-3
N3
PE0_OUT-4
P2
PE0_OUT-5
R2
PE0_OUT-6
T2
PE0_OUT-7
T3
PE0_OUT-8
U3
PE0_OUT-9
V2
PE0_OUT-10
W2
PE0_OUT-11
Y2
PE0_OUT-12
AA2
PE0_OUT-13
AB2
PE0_OUT-14
AC2
PE0_OUT-15
AD3
PE0_REFCLK
K1
PE0_REFCLK-
K2
PE1_OUT
G4
PE1_OUT-
G5
PE1_REFCLK
G2
PE1_REFCLK-
G3 H4 J3 H2 H3
TP_PECLK_TEST1
F1
TP_PECLK_TEST-1
F2
PE_RESET-
G1
PE_COMP
D2
R161 2.37K 1%
500mils close to c51 5:5
PE0_OUT[15..0] 22
PE0_OUT-[15..0] 22
PE0_REFCLK 22 PE0_REFCLK- 22
PE1_OUT 22 PE1_OUT- 22 PE1_REFCLK 22 PE1_REFCLK- 22
R179 100 /NI
PE_RESET- 22
RN72 150 8P4R
R151 124 1% C276
0.01UF 50V X7R
FB15 BEAD 60 0805 1A
BFB2 BEAD 60 0805 1A
DAC_RED26 DAC_GREEN26 DAC_BLUE26
78 56 34 12
DAC_HSYNC DAC_VSYNC
DACRSET DACVREF
3P3V_DAC
1UF 16V 0805 Y5V /NIC274 1UF 10V Y5VC275
2P5V_PLLGPU
1UF 16V 0805 Y5V /NIBC14 1UF 10V Y5VBC15
1P2VPLL_PWR
BC30 1UF 10V Y5V
A5 B6 A6
B7 C7
D8 D9 C8
A9
H13
C9 B9
F12 E11 E17 F17 G17
R9 P9
H16
BC28 1UF 10V Y5V /NI
BC78
C495
10P 50V NPO /NI
10P 50V NPO /NI
U8D
DAC_RED DAC_GREEN DAC_BLUE
DAC_HSYNC DAC_VSYNC
DAC_RSET DAC_VREF DAC_IDUMP
+3.3V_DAC
+2.5V_PLLGPU
XTAL_IN XTAL_OUT
NC1-DDC_CLK NC2-DDC_DATA NC3-HPDET NC4-EE_CLK NC5-EE_DATA
+1.2V_PLLGPU +1.2V_PLLCORE +1.2V_PLLIFP
C51G_PBGA_468
C496
10P 50V NPO /NI
C51 4 OF 6 VGA
IFPA_TXC+
IFPA_TXC­IFPA_TXD+0 IFPA_TXD+1 IFPA_TXD+2 IFPA_TXD+3
IFPA_TXD-0 IFPA_TXD-1 IFPA_TXD-2 IFPA_TXD-3
IFPB_TXC+
IFPB_TXC­IFPB_TXD+4 IFPB_TXD+5 IFPB_TXD+6 IFPB_TXD+7
IFPB_TXD-4 IFPB_TXD-5 IFPB_TXD-6 IFPB_TXD-7
IFPAB_PROBE
IFPAB_RSET
+2.5V_PLLIFP
+2.5V_PLLCORE
PKG_TEST
TEST_MODE_EN
JTAG_TCK
JTAG_TDI JTAG_TDO JTAG_TMS
JTAG_TRST*
DAC_VSYNC
R315 1K 1%
C14 B13 A15 D15 A14 F14 B15 C15 B14 E14 A10 B10 B11 E13 D13 B12 A11 F13 C13 C12 A16 F15
E16 H12
D17 C17
C18 B19 C19 B18 A19
DACRSET
Q21 2N7002 SOT23 /NI
IFPAB_PROBE
2P5V_PLLCORE
BC23
1UF 16V 0805 Y5V /NI
BC24
1UF 10V Y5V
TEST_MODE_EN JTAG_TCK
JTAG_TDI JTAG_TMS
JTAG_TRST-
JTAG_TCK JTAG_TMS JTAG_TRST­JTAG_TDI
R149 301 1% /NI
DS
0.1UF 25V Y5V /NIC267
BFB3 BEAD 60 0805 1A
R136 1K 1%
RN61
1 2 3 4 5 6 7 8
10K 8P4R /NI
G
RGB/TV 16,20
2P5V_PWR 13,15
2P5V_PWR 13,15
PLACE ON BACK SIDE
B B
A A
Title
C51 (3&4) OF 6
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
CRU51-M7
1
14 39Wednesday, April 12, 2006
1.3
of
Page 15
5
4
3
2
1
AA21 AA13
AB10
M19
U14 H14 C11 AB4 AA4
E12 Y18
E18 U18 E15 Y11 U19 N17 F16
T17 D11 T12
D19 H19
P19 T19
C1
J15
J17 L13
B1
J16
L21
L14
F3
L9 P8 N9 K4 N4 T4
W4
Y4 U9 H9
U8F
GND
C51
GND GND
6 OF 6
GND GND
GND
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
PE_GND PE_GND PE_GND PE_GND PE_GND PE_GND PE_GND PE_GND PE_GND PE_GND PE_GND
C51G_PBGA_468
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
PE_GND PE_GND PE_GND PE_GND PE_GND PE_GND PE_GND PE_GND PE_GND PE_GND PE_GND
V19 T14 C20 R17 AB14 U12 G13 Y16 H21 C22 AB6 F22 L22 R22 V22 AA22 A23 AA23 AA24 L11 M11 N11 P11 M12 N12 P12 M13 N13 P13 M14 N14 P14 L12
K6 M6 P6 T6 W6 W8 H8 K8 V6 F4 V8
AB11 AA18
W16
M16 M21
E10 F10 F11 G11 H11
T15 U13 U11
U16 U15
K16 R16
T16 U17 C21 H17
D18 C10
B5 C6 D7 E8 E9
J11 J12 J13 J14
Y9
B4 C5 D6 E7
J20
U8E
+1.2V_CORE +1.2V_CORE +1.2V_CORE +1.2V_CORE +1.2V_CORE +1.2V_CORE +1.2V_CORE +1.2V_CORE +1.2V_CORE +1.2V_CORE +1.2V_CORE +1.2V_CORE +1.2V_CORE +1.2V_CORE
+1.2V_HTMCP +1.2V_HTMCP +1.2V_HTMCP +1.2V_HTMCP +1.2V_HTMCP +1.2V_HTMCP +1.2V_HTMCP +1.2V_HTMCP +1.2V_HTMCP
+1.2V_PED +1.2V_PED +1.2V_PED +1.2V_PED
+1.2V_HT +1.2V_HT +1.2V_HT +1.2V_HT +1.2V_HT +1.2V_HT +1.2V_HT +1.2V_HT +1.2V_HT
+3.3V +3.3V
C51G_PBGA_468
C51
5 OF 6 PWR
+1.2V_PEA +1.2V_PEA +1.2V_PEA +1.2V_PEA +1.2V_PEA +1.2V_PEA +1.2V_PEA +1.2V_PEA
+1.2V_PLL +1.2V_PLL +1.2V_PLL +1.2V_PLL +1.2V_PLL +1.2V_PLL +1.2V_PLL +1.2V_PLL +1.2V_PLL +1.2V_PLL +1.2V_PLL +1.2V_PLL
+2.5V_CORE +2.5V_CORE
+2.5V_IFPA +2.5V_IFPA
D D
C C
+1.2V
+1.2V_HT
+3.3V
C51 2.5V
B B
100UF 16V 5X11 2mm /NI
1UF 16V 0805 Y5V /NI
2.5V @ 500MA AMPS MAX
+5V
CT14
C374
OIA
Q20
AZ1117H-ADJ SOT-223
BFB7 0 0805
BFB8 0 0805
A3 B3 C4 D5 E6 F7 F8 F9
BFB6 BEAD 60 0805 1A
A2 B2 C2 C3 D4 E5 F6 G7 G8 G9 H10 J10
2P5V_PWR
C16 B16
G15 H15
R122
R1
49.9 1%
R116
R2
54.9 1%
1P2VPEA_PWR
1P2VPLL_PWR 13,14
2P5V_PWR 13,14
+2.5VDDA
R145 0 0805
CT18 100UF 16V 5X11 2mm
+1.2V
+1.2V
2P5V_PWR 13,14
C278 1UF 16V 0805 Y5V /NI
C51 DECOUPLING
2P5V_PWR13,14
1P2VPLL_PWR13,14
1P2VPEA_PWR
+1.2V_HT
+3.3V
+1.2V
1UF 10V Y5V /NIC262 1UF 10V Y5VC266
1UF 16V 0805 Y5V /NIBC35 1UF 16V 0805 Y5V /NIBC31 1UF 10V Y5VBC20
1UF 10V Y5VC314 1UF 10V Y5VBC29
1UF 16V 0805 Y5V /NIBC43 1UF 10V Y5V /NIBC45 1UF 10V Y5V /NIBC38
1UF 10V Y5VBC40
1UF 10V Y5VBC19
0.1UF 25V Y5VC245
0.1UF 25V Y5VBC16
0.1UF 25V Y5V /NIC244
1UF 16V 0805 Y5V /NIBC32
0.1UF 25V Y5VBC34 1UF 10V Y5VC305
0.1UF 25V Y5V /NIC304
0.1UF 25V Y5VBC12
PLACE ON BACK SIDE CENTER OF CHIPSET
+1.2V
10UF 10V 0805 Y5VBC21 10UF 10V 0805 Y5VBC26
0.1UF 25V Y5VBC25
Vout=Vref (1.25V) X ( 1+R2/R1 ) =2.5V
A A
Title
C51 (5&6) OF 6
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
CRU51-M7
1
15 39Wednesday, April 12, 2006
1.3
of
Page 16
5
D D
4
3
2
1
PCI_RESET0­PCI_RESET1­PCI_RESET2 PCI_RESET3­LPC_RESET-
RN89
1 2 3 4 5 6 7 8
R260 33 1%
PCI_AD[31..0] PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 PCI_C/BE-[3..0] PCI_C/BE-0 PCI_C/BE-1 PCI_C/BE-2 PCI_C/BE-3
PCI_FRAME­PCI_IRDY­PCI_TRDY­PCI_STOP­PCI_DEVSEL­PCI_PAR PCI_PERR­PCI_SERR­PCI_PME­PCI_CLKRUN-
PCI_RESET3­PCI_RESET1­PCI_RESET0­LPC_RESET-
33 8P4R
LPC_RESET-
PCI_AD[31..0]20
HTMCP_DWN[7..0]13
HTMCP_DWN-[7..0]13
C C
B B
+3.3V
HTMCP_DWNCLK013
HTMCP_DWNCLK-013
HTMCP_DWNCNTL13
HTMCP_DWNCNTL-13
HTMCP_REQ-13
HTMCP_STOP-13
HT_VLD35 CPU_VLD31
+2.5VDIMM
HTVDD_EN38 CPUVDD_EN31
FB21 BEAD 60 0805 1A
C377
0.1UF 25V Y5V /NI
+1.2V_HT VCORE
HTMCP_DWN[7..0] HTMCP_DWN0 HTMCP_DWN1 HTMCP_DWN2 HTMCP_DWN3 HTMCP_DWN4 HTMCP_DWN5 HTMCP_DWN6 HTMCP_DWN7 HTMCP_DWN-[7..0] HTMCP_DWN-0 HTMCP_DWN-1 HTMCP_DWN-2 HTMCP_DWN-3 HTMCP_DWN-4 HTMCP_DWN-5 HTMCP_DWN-6 HTMCP_DWN-7
HTMCP_DWNCLK0 HTMCP_DWNCLK-0
HTMCP_DWNCNTL HTMCP_DWNCNTL-
HTMCP_REQ­HTMCP_STOP-
R200 150 1% R199 49.9 1%
HT_VLD CPU_VLD
HTVDD_EN CPUVDD_EN
+1.5V
+3.3V_PLL_CPU_HT
C384
1UF 16V 0805 Y5V /NI
0.1UF 25V Y5V
R154 0 /NI R10 2K /NI
C390
C395
0.01UF 50V X7R /NI
HTVDD_EN CPUVDD_EN
U12A
K1
HT_MCP_RXD+0
L1
HT_MCP_RXD+1
M1
HT_MCP_RXD+2
N1
HT_MCP_RXD+3
R1
HT_MCP_RXD+4
T1
HT_MCP_RXD+5
U1
HT_MCP_RXD+6
V1
HT_MCP_RXD+7
K2
HT_MCP_RXD-0
L2
HT_MCP_RXD-1
M2
HT_MCP_RXD-2
N2
HT_MCP_RXD-3
R2
HT_MCP_RXD-4
T2
HT_MCP_RXD-5
U2
HT_MCP_RXD-6
V2
HT_MCP_RXD-7
P1
HT_MCP_RX_CLK+
P2
HT_MCP_RX_CLK-
W1
HT_MCP_RXCTL+
W2
HT_MCP_RXCTL-
AD1
HT_MCP_REQ*
AA5
HT_MCP_STOP*
AB1
HT_MCP_COMP_GND1
AB2
HT_MCP_COMP_GND2
F22
HT_VLD
N26
CPU_VLD
M24
MEM_VLD
F23
HTVDD_EN
N25
CPUVDD_EN
M6
+1.5V_PLL_CPU_HT
M5
+3.3V_PLL_CPU_HT
HT_MCP_TXD+0
MCP51
HT_MCP_TXD+1 HT_MCP_TXD+2
1 OF 7
HT_MCP_TXD+3 HT_MCP_TXD+4
HT
HT_MCP_TXD+5 HT_MCP_TXD+6 HT_MCP_TXD+7
HT_MCP_TXD-0 HT_MCP_TXD-1 HT_MCP_TXD-2 HT_MCP_TXD-3 HT_MCP_TXD-4 HT_MCP_TXD-5 HT_MCP_TXD-6 HT_MCP_TXD-7
HT_MCP_TX_CLK+
HT_MCP_TX_CLK-
HT_MCP_TXCTL+
HT_MCP_TXCTL-
CLKOUT_200MHZ+
CLKOUT_200MHZ-
CLKOUT_25MHZ
HT_MCP_PWRGD
HT_MCP_RST*
THERMTRIP*/GPIO
CLK200MHZ_TERM_GND
JTAG_TRST*
MCP51G_PBGA_508
JTAG_TCK
JTAG_TDI JTAG_TDO JTAG_TMS
AA1 Y1 AA3 W5 U5 T5 R5 P5
AA2 Y2 AA4 W6 U6 T6 R6 P6
V5 V6
N5 N6
AC1 AC2
25MHZ_R
Y5 AD2 AE1
J6
TERM_GND
K6 H22
H21 H23 D26 F25
HTMCP_RST­HTMCP_PWRGD HTMCP_STOP­HTMCP_REQ-
HTMCP_UP[7..0] HTMCP_UP0 HTMCP_UP1 HTMCP_UP2 HTMCP_UP3 HTMCP_UP4 HTMCP_UP5 HTMCP_UP6 HTMCP_UP7 HTMCP_UP-[7..0] HTMCP_UP-0 HTMCP_UP-1 HTMCP_UP-2 HTMCP_UP-3 HTMCP_UP-4 HTMCP_UP-5 HTMCP_UP-6 HTMCP_UP-7
HTMCP_UPCLK0 HTMCP_UPCLK-0
HTMCP_UPCNTL HTMCP_UPCNTL-
MCPOUT_200MHZ MCPOUT_200MHZ-
R201 22
HTMCP_PWRGD HTMCP_RST-
R191 562 1%
MCP51_TCK MCP51_TDI
MCP51_TMS MCP51_TRST-
MCP51_TDI MCP51_TMS MCP51_TCK MCP51_TRST-
HTMCP_UP[7..0] 13
HTMCP_UP-[7..0] 13
HTMCP_UPCLK0 13 HTMCP_UPCLK-0 13
HTMCP_UPCNTL 13 HTMCP_UPCNTL- 13
MCPOUT_200MHZ 13 MCPOUT_200MHZ- 13
MCPOUT_25MHZ 13 HTMCP_PWRGD 13 HTMCP_RST- 13
CPU_THERMTRIP- 7
RN98
10K 8P4R
1 2 3 4 5 6 7 8
RN76
680 8P4R
1 2 3 4 5 6 7 8
+3.3V
+3.3V
PCI_C/BE-[3..0]20
PCI_FRAME-20 PCI_IRDY-20 PCI_TRDY-20 PCI_STOP-20 PCI_DEVSEL-20 PCI_PAR20 PCI_PERR-20 PCI_SERR-20 PCI_PME-20 PCI_CLKRUN-20
PCIRST_IDE-23 PCIRST_SLOT2-20 PCIRST_SLOT1-20 LPCRST_FLASH-34
LPCRST_SIO-33
U12B
AF19
PCI_AD0
AB21
PCI_AD1
AC19
PCI_AD2
AA20
PCI_AD3
AA19
PCI_AD4
AF20
PCI_AD5
AE19
PCI_AD6
AE20
PCI_AD7
AB20
PCI_AD8
AB19
PCI_AD9
AA18
PCI_AD10
AB18
PCI_AD11
AE18
PCI_AD12
AF18
PCI_AD13
AC17
PCI_AD14
AA17
PCI_AD15
AB15
PCI_AD16
AF15
PCI_AD17
AE15
PCI_AD18
AF14
PCI_AD19
AE14
PCI_AD20
AA14
PCI_AD21
AB14
PCI_AD22
AC13
PCI_AD23
AB13
PCI_AD24
AE13
PCI_AD25
AA12
PCI_AD26
AF13
PCI_AD27
AB12
PCI_AD28
AF12
PCI_AD29
AE12
PCI_AD30
AF11
PCI_AD31
AD19
PCI_CBE*0
AB17
PCI_CBE*1
AA15
PCI_CBE*2
AA13
PCI_CBE*3
AC15
PCI_FRAME*
AD15
PCI_IRDY*
AB16
PCI_TRDY*
AE16
PCI_STOP*
AA16
PCI_DEVSEL*
AE17
PCI_PAR
AF16
PCI_PERR*/GPIO
AF17
PCI_SERR*
AD11
PCI_PME*/GPIO
AF25
PCI_CLKRUN*/GPIO
AE25
PCI_RESET*0
AD24
PCI_RESET*1
AE26
PCI_RESET*2
W22
PCI_RESET*3
L26
LPC_RESET*4
MCP51G_PBGA_508
MCP51
2 OF 7 PCI
LPC_DRQ1*/LPC_CS*
LPC_PWRDWN*/GPIO
PCI_REQ*0 PCI_REQ*1
PCI_REQ*2 PCI_REQ*3/GPIO PCI_REQ*4/GPIO
PCI_GNT*0
PCI_GNT*1
PCI_GNT*2
PCI_GNT*3/GPIO PCI_GNT*4/GPIO
PCI_TNTW*
PCI_TNTX*
PCI_TNTY*
PCI_TNTZ*
PCI_CLK0 PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4
PCI_CLKIN
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
LPC_FRAME*
LPC_DRQ0*
LPC_SERIRQ
LPC_CLK0 LPC_CLK1
AA22 AE22 AF21 AF22 AE23
AE21 AC21 AA21 AB24 AB22
AE11 AB11 AC11 AA11
AE24 AF24 AD23 AF23 AB23 AC23
K24 H26 H25 K22
G25 K21 K23 L22
H24 F26 G26
PCI_REQ-0 PCI_REQ-1 PCI_REQ-2 PCI_REQ-3 PCI_REQ-4
PCI_GNT-0 PCI_GNT-1 PCI_GNT-2 PCI_GNT-3 PCI_GNT-4
PCI_INTW­PCI_INTX­PCI_INTY­PCI_INTZ-
PCI_CLK0 PCI_CLK1
PCI_CLK4 PCI_CLKIN PCI_CLK0 PCI_CLK1 PCI_CLK4
PCI_GNT-3 PCI_GNT-4
LPC_AD[3..0] LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
LPC_FRAME­LPC_DRQ0­LPC_DRQ1­LPC_SERIRQ
LPC_CLK0 LPC_CLK1
10P 50V NPOC473 10P 50V NPOC474
R230 22 R229 22
R228 22
10P 50V NPOC448 10P 50V NPOC442 10P 50V NPOC438
R245 8.2K
R257 22R238 33 1% R256 22
PCI_REQ-0 20 PCI_REQ-1 20 PCI_REQ-2 20 PCI_REQ-3 20 PCI_REQ-4 20
PCI_GNT-0 20 PCI_GNT-1 20 PCI_GNT-2 20 PCI_GNT-3 14,20 PCI_GNT-4 20
PCI_INTW- 20 PCI_INTX- 20 PCI_INTY- 20 PCI_INTZ- 20
PCI_CLKSLOT1 20 PCI_CLKSLOT2 20
RGB/TV 14,20 GPIO_LOAD 20
LPC_AD[3..0] 33,34
LPC_FRAME- 33,34 LPC_DRQ0- 33
+3.3V
LPC_SERIRQ 33
LPCCLK_SIO 33 LPCCLK_FLASH 34
A A
Title
MCP51 (1&2) OF 7
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
CRU51-M7
1
16 39Wednesday, April 12, 2006
1.3
of
Page 17
5
4
3
2
1
D D
C C
B B
JSATA1
H1 1
SATA_A0_TX_P_C
2
SATA_A0_TX_N_C
3 4
SATA_A0_RX_N_C
5
SATA_A0_RX_P_C
6 7 H2
SATA CONNECTOR JSATA2
H1 1
SATA_A1_TX_P_C
2
SATA_A1_TX_N_C
3 4
SATA_A1_RX_N_C
5
SATA_A1_RX_P_C
6 7 H2
SATA CONNECTOR
+1.5V
+3.3V
0.01UF 50V X7RC441
0.01UF 50V X7RC453
0.01UF 50V X7RC437
0.01UF 50V X7RC423
0.01UF 50V X7RC411
0.01UF 50V X7RC421
0.01UF 50V X7RC410
0.01UF 50V X7RC408
SATA_HDLED-21
BR6 100 /NI
FB24 BEAD 60 0805 1A
+3.3V_PLL_SP_SS18
FB25
0
C375
0.1UF 25V Y5V
SATA_HDLED­TP_SATA_TSTCLK_P TP_SATA_TSTCLK_N
BR5 2.49K 1%
+1.5V_PLL_SP_VDD
C457
1UF 16V 0805 Y5V /NI
+1.5V
+3.3V_PLL_SP_SS
C463
C464
10UF 10V 0805 Y5V
0.1UF 25V Y5V
SATA_A0_TX_P SATA_A0_TX_N
SATA_A0_RX_N IDE_PDD3 SATA_A0_RX_P
SATA_A1_TX_P SATA_A1_TX_N
SATA_A1_RX_N SATA_A1_RX_P
SATA_TERMP
SATA_TERMN
C456
0.1UF 25V Y5V
C462
0.01UF 50V X7R /NI
U12C
B20
SATA_A0_TX+
A20
SATA_A0_TX-
A19
SATA_A0_RX-
B19
SATA_A0_RX+
B18
SATA_A1_TX+
A18
SATA_A1_TX-
A17
SATA_A1_RX-
B17
SATA_A1_RX+
B15
SATA_B0_TX+
A15
SATA_B0_TX-
A16
SATA_B0_RX-
B16
SATA_B0_RX+
B13
SATA_B1_TX+
A13
SATA_B1_TX-
A14
SATA_B1_RX-
B14
SATA_B1_RX+
C20
SATA_LED*/GPIO
D14
SATA_TSTCLK+
C14
SATA_TSTCLK-
F13
SATA_TEST
F14
SATA_TERM+
E14
SATA_TERM-
F18
+1.5V_PLL_SP_VDD
C455
0.01UF 50V X7R /NI
F19
+1.5V_PLL_SP_SS
D20
+3.3V_PLL_SP_SS
MCP51G_PBGA_508
IDE_DATA_P0
MCP51
IDE_DATA_P1 IDE_DATA_P2
3 OF 7
IDE_DATA_P3 IDE_DATA_P4
IDE
IDE_DATA_P5 IDE_DATA_P6 IDE_DATA_P7
SATA
IDE_DATA_P8
IDE_DATA_P9 IDE_DATA_P10 IDE_DATA_P11 IDE_DATA_P12 IDE_DATA_P13 IDE_DATA_P14 IDE_DATA_P15
IDE_ADD_P0 IDE_ADD_P1 IDE_ADD_P2
IDE_CS1_P* IDE_CS3_P*
IDE_DACK_P*
IDE_IOW_P* IDE_INTR_P
IDE_DREQ_P
IDE_IOR_P*
IDE_IORDY_P
CBLE_DET_P
IDE_DATA_S0
IDE_DATA_S1
IDE_DATA_S2
IDE_DATA_S3
IDE_DATA_S4
IDE_DATA_S5
IDE_DATA_S6
IDE_DATA_S7
IDE_DATA_S8
IDE_DATA_S9 IDE_DATA_S10 IDE_DATA_S11 IDE_DATA_S12 IDE_DATA_S13 IDE_DATA_S14 IDE_DATA_S15
IDE_ADD_S0 IDE_ADD_S1 IDE_ADD_S2
IDE_CS1_S* IDE_CS3_S*
IDE_DACK_S*
IDE_IOW_S* IDE_INTR_S
IDE_DREQ_S
IDE_IOR_S* IDE_RDY_S
CABLE_DET_S/GPIO
IDE_COMP_3P3
IDE_COMP_GND
IDE_PDD[15..0] IDE_PDD0
F8
IDE_PDD1
D8
IDE_PDD2
A9 E9
IDE_PDD4
A10
IDE_PDD5
E10
IDE_PDD6
C10
IDE_PDD7
E11
IDE_PDD8
F11
IDE_PDD9
D10
IDE_PDD10
F10
IDE_PDD11
B10
IDE_PDD12
F9
IDE_PDD13
B9
IDE_PDD14
E8
IDE_PDD15
A8
IDE_ADDR_P0
A6
IDE_ADDR_P1
D6
IDE_ADDR_P2
B6
IDE_CS1_P-
A5
IDE_CS3_P-
B5
IDE_DACK_P-
B7
IDE_IOW_P-
F7
IDE_INTR_P
E6
IDE_DREQ_P
B8
IDE_IOR_P-
E7
IDE_IORDY_P
A7
CBLE_DET_P
C6
IDE_SDD[15..0] IDE_SDD0
E4
IDE_SDD1
D1
IDE_SDD2
D4
IDE_SDD3
C2
IDE_SDD4
B2
IDE_SDD5
C3
IDE_SDD6
A3
IDE_SDD7
A4
IDE_SDD8
B4
IDE_SDD9
B3
IDE_SDD10
A2
IDE_SDD11
B1
IDE_SDD12
C1
IDE_SDD13
D2
IDE_SDD14
E3
IDE_SDD15
E5
IDE_ADDR_S0
G4
IDE_ADDR_S1
G6
IDE_ADDR_S2
G2
IDE_CS1_S-
G1
IDE_CS3_S-
G3
IDE_DACK_S-
F5
IDE_IOW_S-
E1
IDE_INTR_S
F6
IDE_DREQ_S
E2
IDE_IOR_S-
F2
IDE_IORDY_S
F1
CBLE_DET_S
G5
IDE_COMP_3P3V
B11
IDE_COMP_GND
A11
IDE_PDD[15..0] 23
IDE_ADDR_P0 23 IDE_ADDR_P1 23 IDE_ADDR_P2 23
IDE_CS1_P- 23 IDE_CS3_P- 23 IDE_DACK_P- 23 IDE_IOW_P- 23 IDE_INTR_P 23 IDE_DREQ_P 23 IDE_IOR_P- 23 IDE_IORDY_P 23 CBLE_DET_P 23 IDE_SDD[15..0] 23
IDE_ADDR_S0 23 IDE_ADDR_S1 23 IDE_ADDR_S2 23
IDE_CS1_S- 23 IDE_CS3_S- 23 IDE_DACK_S- 23 IDE_IOW_S- 23 IDE_INTR_S 23 IDE_DREQ_S 23 IDE_IOR_S- 23 IDE_IORDY_S 23 CBLE_DET_S 23
R205 120 R213 120
+3.3V
A A
Title
MCP51 (3) OF 7
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
CRU51-M7
1
17 39Wednesday, April 12, 2006
1.3
of
Page 18
5
+3.3V_DUAL
4
3
2
1
R253 10K 1% /NI
AC_RST-
R254 10K 1%
D D
SPDIFO29,30
RN102
SPDIF
+3.3V
+3.3V_DUAL
C C
B B
1 2
TP_CPUVID5
3 4
AC_SDATA_IN2
5 6
AC_SDATA_IN1
7 8
10K 8P4R RN103
LLB-
1 2
LID-
3 4 5 6 7 8
10K 8P4R
+3.3V_VBAT25,33,37 +3.3V_DUAL
R246 51K
+3.3V
CLEAR CMOS CONTROL
NORMAL
1-2
R308
0 /NI
1
2
HEADER 1X3
+3.3V_PLL_SP_SS17
3
FB26 BEAD 60 0805 1A
C376
0.1UF 25V Y5V /NI
AC_RST* 1 = *RGMII 0 = MII
SPDIF0 (SIO CLK) 1 = 24MHZ 0 = *14.318MHZ * = DEFAULT
AUD_14MHZ_IN29
AC_BITCLK29 AC_SDOUT29 AC_SDIN_029
AC_RST-29 AC_SYNC29
DDC_CLK26 DDC_DATA26
RGMII_RESET-36
+1.5V
+3.3V_PLL_USB_CORE
C459
C460
1UF 16V 0805 Y5V /NI
0.1UF 25V Y5V
AUD_14MHZ_IN AC_BITCLK AC_SDOUT AC_SDIN_0 AC_SDATA_IN1 AC_SDATA_IN2
AC_RST­AC_SYNC SPDIF
DDC_CLK DDC_DATA
RGMII_RESET-
FLASH_RECOVERY-
TP_CPUVID5 LID-
0.1UF 25V Y5VC55
LLB-
1UF 10V Y5VC80JCMOS1
RTC_RST-
+3.3V_PLL_SP_SS
C380
C461
0.01UF 50V X7R /NI
0.01UF 50V X7R /NI
U12D
R22
AC97_CLK
U26
AC_BITCLK
T25
AC_SDATA_OUT0/GPIO
R26
AC_SDATA_IN0/GPIO
T24
AC_SDATA_IN1/GPIO
U21
AC_SDATA_IN2/GPIO
U25
AC_RESET*
R21
AC_SYNC/GPIO
T26
SPDIF0/GPIO
AE10
DDC_CLK0/GPIO
AF10
DDC_DATA0/GPIO
AA10
DDC_CLK1/GPIO
AB10
DDC_DATA1/GPIO
AF9
HPLUG_DET0/GPIO
C24
LCD_BKL_CTL/GPIO
D24
LCD_BKL_PWR/GPIO
C25
LCD_BKL_ON/GPIO
J4
GPIO_1/SLAVE_READY
J3
GPIO_2/CPU_SLP*
J5
GPIO_3/CPU_CLKRUN*
AE2
GPIO_4/AGPSTP*/SUS_STAT*
K5
GPIO_5/SYS_SHUTDOWN*
J2
GPIO_6/NFERR*/SYS_PERR*
J1
GPIO_7/FERR*/SYS_SERR*
AC9
GPIO_8/CR_VID0
AB9
GPIO_9/CR_VID1
AA9
GPIO_10/CR_VID2
P24
GPIO_11/CPU_VID0
P25
GPIO_12/CPU_VID1
P22
GPIO_13/CPU_VID2
P26
GPIO_14/CPU_VID3
R25
GPIO_15/CPU_VID4
P23
GPIO_16/CPU_VID5
B25
LID*/GPIO
B24
SLP_DEEP*
E22
V3P3_DEEP
G22
LLB*
A25
RTC_RST*
B22
+1.5V_PLL_LEG
A22
+3.3V_PLL_LEG
Y21
+1.5V_PLL_USB
AD26
+3.3V_PLL_USB
MCP51G_PBGA_508
BC70
0.1UF 25V Y5V
MCP51
4 OF 7 USB AC97 GPIO
USB+0
USB-0
USB+1
USB-1
USB+2
USB-2
USB+3
USB-3
USB+4
USB-4
USB+5
USB-5
USB+6
USB-6
USB+7
USB-7
USB_OC0*/GPIO USB_OC1*/GPIO USB_OC2*/GPIO USB_OC3*/GPIO
USB_RBIAS_GND
A20GATE/GPIO
INTRUDER*
EXT_SMI*/GPIO
RI*/GPIO
SPKR
PWRBTN*
SIO_PME*/GPIO
KBRDRSTIN*/GPIO
PE_WAKE*
SMB_CLK0/GPIO
SMB_DATA0/GPIO
SMB_CLK1/GPIO
SMB_DATA1/GPIO
SMB_ALERT*/GPIO
+3.3V_VBAT
BUF_SIO_CLK
SUS_CLK/GPIO
THERM*/GPIO
RSTBTN*
SLP_S5* SLP_S3*
PWRGD_SB
PWRGD
FANRPM/GPIO FANCTL0/GPIO FANCTL1/GPIO
TEST_MODE_EN
+3.3V
AC26 AC25 AB26 AB25 AA26 AA25 Y26 Y25 W26 W25 V24 V23 V26 V25 T22 T23
Y24 Y23 U22 V22 AD25
J22 A24 M26 M25 E26 D23 M23 J21 AC3 H1 H2 M21 L25 M22 A23 J26 N21 K25 F21
C26 F24 B26 N22 L21 J25 K26 D25
USB_0 USB_0­USB_1 USB_1­USB_2 USB_2­USB_3 USB_3­USB_4 USB_4­USB_5 USB_5­USB_6 USB_6­USB_7 USB_7-
USB_BKPNL_3_2_OC­USB_BKPNL_5_4_OC­USB_FNTPNL_7_6_OC­USB_FNTPNL_1_0_OC-
R242 732 1%
USB_GND A20GATE
INTRUDER­EXTSMI­SER_RI­SPEAKER PWBTOUT­IO_PME­SIO_KBRST­PE_WAKE­SMB_MEM_SCL SMB_MEM_SDA SMB_SCL SMB_SDA SMB_ALERT­+3.3V_VBAT BUF_SIO_CLK_R SUS_CLK_R CHIP_THERM­FP_RESET-
SLP_S5­SLP_S3­PWRGD_SB MCP51_PWRGD CPUFAN_TACH
CPUFAN_CNTL
SYSFAN_CNTL SB_TEST
RN92
1 2 3 4 5 6 7 8
10K 8P4R /NI
USB_0 27 USB_0- 27 USB_1 27 USB_1- 27 USB_2 27 USB_2- 27 USB_3 27 USB_3- 27 USB_4 27 USB_4- 27 USB_5 27 USB_5- 27 USB_6 27 USB_6- 27 USB_7 27 USB_7- 27
USB_BKPNL_3_2_OC- 27 USB_BKPNL_5_4_OC- 27 USB_FNTPNL_7_6_OC- 27 USB_FNTPNL_1_0_OC- 27
A20GATE 33 EXTSMI- 21,33
SER_RI- 28FLASH_RECOVERY-34 SPEAKER 21 PWBTOUT- 33 IO_PME- 33 SIO_KBRST- 33
CHIP_THERM- 7,33 FP_RESET- 21,37
SLP_S5- 21,32 SLP_S3- 24,33 PWRGD_SB 35 MCP51_PWRGD 35
R248 1K 1%
+3.3V_DUAL
R193 10K 1%
+3.3V
+2.5VDIMM
R144
R194
2.7K
2.7K
R247 22 R255 22
C469 10P 50V NPO /NI
R249 10K 1% /NI R244 10K 1%
1 2 3 4 5 6 7 8
C468 10P 50V NPO /NI
+3.3V
RN105
2.7K 8P4R
+3.3V_DUAL+1.5V
+3.3V_DUAL
PE_WAKE- 22 SMB_MEM_SCL 10,11 SMB_MEM_SDA 10,11 SMB_SCL 7,20,22,37 SMB_SDA 7,20,22,37
+3.3V_VBAT 25,33,37 BUF_SIO_CLK 33 SUSCLK 33
C467
0.1UF 25V Y5V
SUSCLK 1 = SLAVE 0 = *NORMAL
* = DEFAULT
CLEAR CMOS2-3
R6
CMOS CLEAR JUMPER
USB_1­USB_1 USB_0­USB_0 USB_3­USB_3 USB_2­USB_2 USB_5­USB_5 USB_4­USB_4 USB_6­USB_6 USB_7­USB_7
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
RN94 15K 8P4R
RN96 15K 8P4R
RN97 15K 8P4R
RN95 15K 8P4R
R250
R243 1M
+3.3V_VBAT25,33,37
INTRUDER-
12
JCI1 HEADER 1X2
SPEAKER
10K 1% /NI
R261 10K 1%
4.7K
CHIP_THERM-
A A
Title
MCP51 (4) OF 7
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
CRU51-M7
1
18 39Wednesday, April 12, 2006
1.3
of
Page 19
5
4
3
2
1
D D
+3.3V_DUAL
C C
B B
Q34
AZ1117H-ADJ SOT-223
RGMII_TXD036 RGMII_TXD136 RGMII_TXD236 RGMII_TXD336 RGMII_TXCLK36 RGMII_TXCTL36
R203 1K 1% R204 1K 1%
0.1UF 25V Y5VC400
+3.3V_DUAL
FB22 BEAD 60 0805 1A
C335
0.1UF 25V Y5V /NI
+3.3V_DUAL
+
CT35 100UF 16V 5X11 2mm
I O A
+1.5V_DUAL
R1
R2
A A
Vout=Vref (1.25V) X ( 1+R2/R1 ) =1.25V
RN77 0 8P4R
7 8 5 6 3 4
1 2
BR3 0 BR4 0
RGMII_RXD036 RGMII_RXD136 RGMII_RXD236 RGMII_RXD336 RGMII_RXCLK36 RGMII_RXCTL36
RGMII_MDC36
RGMII_MDIO36
MII_RXER36
+3.3V_DUAL
BUF_25M36
+1.5V_DUAL
C381
C382
1UF 16V 0805 Y5V /NI
0.1UF 25V Y5V
RGMII_RXD0 RGMII_RXD1 RGMII_RXD2 RGMII_RXD3 RGMII_RXCLK RGMII_RXCTL
RGMII_VREF RGMII_MDC
RGMII_MDIO
MII_COL36 MII_CRS36
R202 10K 1% R192 22
BUF_25MHZ_R
+3.3V_PLL_MAC_DUAL XTALOUT_RTC
C383
0.01UF 50V X7R /NI
C394
0.1UF 25V Y5V
+1.2V_DUAL @ 145MA AMPS MAX
R189 100 1%
+
CT38
100UF 16V 5X11 2mm R190 20 1%
5
C393
0.01UF 50V X7R /NI
R1 NI 1K 1%
U12E
AE7
RGMII_TD0/MII_TD0
AF6
RGMII_TD1/MII_TD1
AB6
RGMII_TD2/MII_TD2
AA6
RGMII_TD3/MII_TD3
AA7
RGMII_TXC/MII_TXCLK
AB7
RGMII_TX_CTL/MII_TXEN
AF7
RGMII_RD0/MII_RXD0
AF8
RGMII_RD0/MII_RXD1
AD7
RGMII_RD0/MII_RXD2
AB8
RGMII_RD0/MII_RXD3
AC7
RGMII_RXC/MII_RXCLK
AE8
RGMII_RX_CTL/MII_RXDV
AF4
MII_VREF
AF5
MII_MDC
AE6
MII_MDIO
AD3
MII_RXER/GPIO
AC4
MII_COL
AF2
MII_CRS
AE5
MII_PWRDWN/GPIO
AA8
MII_INTR/GPIO
AC5
BUF_25MHZ
AE4
+1.2V_PLL_MAC_DUAL
AB5
+3.3V_PLL_MAC_DUAL
MCP51G_PBGA_508
R2 0
40.2 1% 82 1%1K 1%
+1.2V +1.25V +1.3V +1.35V
MCP51
5 OF 7 LAN
CLOCK
XTALOUT_RTC
4
XTALIN
XTALOUT
XTALIN_RTC
+1.2V
+1.5V_DUAL
E19
NC
D12
NC
E12
NC
E25
NC
AE9
NC
E21 D22
C22 B23
XTALIN XTALOUT
XTALIN_RTC
U12F
U17
+1.2V
U16
+1.2V
U15
+1.2V
U12
+1.2V
U11
+1.2V
U10
+1.2V
T17
+1.2V
T10
+1.2V
R17
+1.2V
R10
+1.2V
M17
+1.2V
M10
+1.2V
L17
+1.2V
L10
+1.2V
K17
+1.2V
K16
+1.2V
K15
+1.2V
K12
+1.2V
K11
+1.2V
K10
+1.2V
U3
+1.2V_HT
R3
+1.2V_HT
N3
+1.2V_HT
L3
+1.2V_HT
W3
+1.2V_HT
AE3
+1.2_DUAL
AF3
+1.2_DUAL
MCP51G_PBGA_508
C332
0.1UF 25V Y5V
X2
25MHZ 20PF 30PPM
C465
15P 50V NPO
X3
32.768KHZ 12.5PF 20PPM
C470
15P 50V NPO
MCP51
+3.3V
6 OF 7
+3.3V +3.3V
PWR
+3.3V +3.3V +3.3V +3.3V +3.3V
+3.3V_DUAL +3.3V_DUAL +3.3V_DUAL +3.3V_DUAL
+3.3V_USB_DUAL +3.3V_USB_DUAL
+1.5V_SP_A +1.5V_SP_A +1.5V_SP_A +1.5V_SP_A
+1.5V_SP_D +1.5V_SP_D
C466
15P 50V NPO
C472
15P 50V NPO
Y22
+5V
F12
+5V
AD21 AD17 AD13 AD9 AD5 C12 C8 C4
Y6 T21 P21 G21
W21 V21
F17 E17 F16 E16
E15 F15
3
U12G
AF26
GND
AF1
GND
AD22
GND
AD20
GND
AD18
GND
AD16
GND
AD14
GND
AD12
GND
AD10
GND
AD8
GND
AD6
GND
AD4
GND
AC24
GND
AB3
GND
AA24
GND
Y3
GND
W24
GND
V3
GND
U24
GND
U14
GND
U13
GND
T16
GND
T15
GND
T14
GND
T13
GND
T12
GND
T11
GND
T3
GND
R24
GND
R16
GND
R15
GND
R14
GND
R13
GND
R12
GND
R11
GND
P17
GND
P16
GND
P15
GND
P14
GND
P13
GND
P12
GND
P11
GND
P10
GND
P3
GND
N24
GND
N17
GND
F20
SATA_GND
E18
SATA_GND
D18
SATA_GND
D16
SATA_GND
E20
SATA_GND
C18
SATA_GND
C16
SATA_GND
B21
SATA_GND
A21
SATA_GND
MCP51G_PBGA_508
+5V
+3.3V
+3.3V_DUAL
C389
BC71
1UF 16V 0805 Y5V /NI
0.1UF 25V Y5V
MCP51
7 OF 7 GND
SATA_GND SATA_GND SATA_GND SATA_GND SATA_GND SATA_GND SATA_GND SATA_GND
+1.5V
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
+1.5V_SP_A
BC67
0.1UF 25V Y5V /NI
N16 N15 N14 N13 N12 N11 N10 M16 M15 M14 M13 M12 M11 M3 L24 L16 L15 L14 L13 L12 L11 K14 K13 K3 J24 H3 G24 F3 E24 D3 C23 C11 C9 C7 C5 A26 A1 H5 H6 U4 R4 N4 L4 W4 L5 L6
C21 C19 C17 C15 C13 E13 B12 A12
TOP SIDE CAP BACK SIDE CAP
+3.3V
+1.5V_DUAL
+5V
BFB9 BEAD 60 0805 1A
BC66
0.1UF 25V Y5V
0.1UF 25V Y5VC454
0.1UF 25V Y5VBC77
0.1UF 25V Y5VBC62
0.1UF 25V Y5VBC52
TOP SIDE CAP
0.1UF 25V Y5V /NIC392
0.1UF 25V Y5V /NIC391
TOP SIDE CAP
0.1UF 25V Y5VBC59
0.1UF 25V Y5V /NIBC58
+3.3V
+
CT37 100UF 16V 5X11 2mm
Q35
AZ1117H-ADJ SOT-223
BC76 1UF 16V 0805 Y5V /NI
2
+1.5V
R195
R1
+1.5V
1K 1%
R197 200 1%
R2
I O A
Vout=Vref (1.25V) X ( 1+R2/R1 ) =1.5V
1A
+
CT41 100UF 16V 5X11 2mm
Title
Size Document Number Rev
Custom
Date: Sheet
+1.5V
+1.2V
1.5V_SP_A 440mA
1.5V_SP_D 164mA
1.5V_PLL_SP_DVDD 20mA
1.5V_PLL_SP_AVDD 160mA
1.5V_PLL_CPU_HT 71mA
1.5V_PLL_SP_SS 10mA
1.5V_PLL_LEG 4mA
1.5V_PLL_USB_CORE 16mA
1UF 16V 0805 Y5V /NIBC73
0.1UF 25V Y5VBC65
BACK SIDE CAP
0.1UF 25V Y5V /NIBC490.1UF 25V Y5V /NIBC51
0.1UF 25V Y5V /NIBC53
0.1UF 25V Y5VBC72
0.1UF 25V Y5V /NIBC57
0.1UF 25V Y5VBC55
0.1UF 25V Y5VBC50
0.1UF 25V Y5V /NIBC63
0.1UF 25V Y5VBC74
0.1UF 25V Y5V /NIBC54
0.1UF 25V Y5VBC64
0.1UF 25V Y5VBC61
0.1UF 25V Y5V /NIBC75
0.1UF 25V Y5V /NIBC60
0.1UF 25V Y5V /NIBC56
MCP51 (5&6&7) OF 7
CRU51-M7
19 39Wednesday, April 12, 2006
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1.3
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5
4
3
2
1
+5V -12V+3.3V +3.3V+5V+12V +5V+12V +3.3V-12V+3.3V +5V
D D
C C
B B
A A
PCI_INTZ-16 PCI_INTX-16
PCI_CLKSLOT116
PCI_IRDY-16
PCI_DEVSEL-16
PCI_PERR-16 PCI_SERR-16
5
PCI_REQ-1 PCI_AD31
PCI_AD29 PCI_AD27
PCI_AD25 PCI_C/BE-3
PCI_AD23 PCI_AD21
PCI_AD19 PCI_AD17
PCI_C/BE-2
PCI_LOCK-
PCI_C/BE-1 PCI_AD14
PCI_AD12 PCI_AD10
PCI_AD8 PCI_AD7
PCI_AD5 PCI_AD3
PCI_AD1 PCI_ACK64-
PCI_SERR-16 PCI_PERR-16
PCI_STOP-16 PCI_DEVSEL-16 PCI_TRDY-16 PCI_FRAME-16 PCI_IRDY-16
PCI_REQ-016 PCI_REQ-116 PCI_REQ-216 PCI_INTY-16 PCI_REQ-416 PCI_INTW-16 PCI_CLKRUN-16 PCI_PME-16 PCI_INTX-16 PCI_REQ-316 PCI_INTZ-16 PCI_GNT-416 PCI_GNT-016 PCI_GNT-116 PCI_GNT-216 PCI_GNT-314,16
PCI1 PCI SLOT 120PIN U
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
5V
B6
5V
B7
INTB_L
B8
INTD_L
B9
PRSNT1_L
B10
RSRVD
B11
PRSNT2_L
B12
GND
B13
GND
B14
RSRVD
B15
GND
B16
CLK
B17
GND
B18
REQ_L
B19
+Vio
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
3.3V
B26
C/BE3_L
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
3.3V
B32
AD17
B33
C/BE2_L
B34
GND
B35
IRDY_L
B36
3.3V
B37
DEVSEL_L
B38
GND
B39
LOCK_L
B40
PERR_L
B41
3.3V
B42
SERR_L
B43
3.3V
B44
C/BE1_L
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
M66EN
B50
5V KEY
B51
5V KEY
B52
AD8
B53
AD7
B54
3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+Vio
B60
ACK64_L
B61
5V
B62
5V
PCI_SERR­PCI_PERR­PCI_LOCK­PCI_STOP­PCI_DEVSEL­PCI_TRDY­PCI_FRAME­PCI_IRDY­PCI_ACK64­PCI_REQ64A­PCI_REQ64B-
PCI_REQ-0 PCI_REQ-1 PCI_REQ-2 PCI_INTY­PCI_REQ-4 PCI_INTW­PCI_CLKRUN­PCI_PME­PCI_INTX­PCI_REQ-3 PCI_INTZ-
FRAME_L
R224
TRST_L
+12V
TMS
TDI
INTA_L INTC_L
RSRVD
+Vio
RSRVD
GND GND
RSRVD
RST_L
+Vio
GNT_L
GND
RSRVD
AD30
3.3V AD28 AD26
GND
AD24
IDSEL
3.3V AD22 AD20
GND AD18 AD16
3.3V
GND
TRDY_L
GND
STOP_L
3.3V
SDONE
SBO_L
GND
PAR
AD15
3.3V AD13 AD11
GND
AD9 5V KEY 5V KEY
C/BE0_L
3.3V AD6 AD4
GND
AD2 AD0
+Vio
REQ64_L
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
5V
5V
5V 5V
8.2K /NI
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
+3.3V
RN85
8.2K 8P4R
RN84
8.2K 8P4R
RN86
8.2K 8P4R
RN81
8.2K 8P4R
RN82
8.2K 8P4R
RN83
8.2K 8P4R
RN80
8.2K 8P4R /NI
+3.3V_DUAL
+3.3V
+3.3V_DUAL +3.3V_DUAL
PCI_GNT-1 PCI_PME-
PCI_AD30 PCI_AD28
PCI_AD26 PCI_AD24
PCI_AD22 PCI_AD22
PCI_AD20 PCI_AD18
PCI_AD16
PCI_AD15 PCI_AD13
PCI_AD11 PCI_AD9
PCI_C/BE-0 PCI_AD6
PCI_AD4 PCI_AD2
PCI_AD0 PCI_REQ64A-
PCI_INTY- 16 PCI_INTW- 16
PCIRST_SLOT1- 16
PCI_PME- 16
C429
0.1UF 25V Y5V /NI
PCI_FRAME- 16 PCI_TRDY- 16 PCI_STOP- 16 SMB_SCL 7,18,22,37
SMB_SDA 7,18,22,37 PCI_PAR 16
PCI_AD[31..0] 16 PCI_C/BE-[3..0] 16
+3.3V
C431 1000P 50V X7R
PCI_INTX-16
PCI_INTZ-16
PCI_CLKSLOT216
PCI_IRDY-16
PCI_DEVSEL-16
PCI_PERR-16 PCI_SERR-16
PCI_REQ-2 PCI_AD31
PCI_AD29 PCI_AD27
PCI_AD25 PCI_C/BE-3
PCI_AD23 PCI_AD21
PCI_AD19 PCI_AD17
PCI_C/BE-2
PCI_LOCK-
PCI_C/BE-1 PCI_AD14
PCI_AD12 PCI_AD10
PCI_AD8 PCI_AD7
PCI_AD5 PCI_AD3
PCI_AD1 PCI_ACK64-
PCI2 PCI SLOT 120PIN U
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
5V
B6
5V
B7
INTB_L
B8
INTD_L
B9
PRSNT1_L
B10
RSRVD
B11
PRSNT2_L
B12
GND
B13
GND
B14
RSRVD
B15
GND
B16
CLK
B17
GND
B18
REQ_L
B19
+Vio
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
3.3V
B26
C/BE3_L
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
3.3V
B32
AD17
B33
C/BE2_L
B34
GND
B35
IRDY_L
B36
3.3V
B37
DEVSEL_L
B38
GND
B39
LOCK_L
B40
PERR_L
B41
3.3V
B42
SERR_L
B43
3.3V
B44
C/BE1_L
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
M66EN
B50
5V KEY
B51
5V KEY
B52
AD8
B53
AD7
B54
3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+Vio
B60
ACK64_L
B61
5V
B62
5V
TRST_L
+12V
TMS
INTA_L INTC_L
RSRVD
+Vio
RSRVD
GND GND
RSRVD
RST_L
+Vio
GNT_L
GND
RSRVD
AD30
3.3V AD28 AD26 GND AD24
IDSEL
3.3V AD22 AD20 GND AD18 AD16
3.3V
FRAME_L
GND
TRDY_L
GND
STOP_L
3.3V
SDONE
SBO_L
GND
PAR
AD15
3.3V AD13 AD11 GND
AD9 5V KEY 5V KEY
C/BE0_L
3.3V AD6 AD4
GND
AD2 AD0 +Vio
REQ64_L
A1 A2 A3 A4
TDI
A5
5V
A6 A7 A8
5V
A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61
5V
A62
5V
PCI_GNT-2 PCI_PME-
PCI_AD30 PCI_AD28
PCI_AD26 PCI_AD24
PCI_AD24 PCI_AD22
PCI_AD20 PCI_AD18
PCI_AD16
PCI_AD15 PCI_AD13
PCI_AD11 PCI_AD9
PCI_C/BE-0 PCI_AD6
PCI_AD4 PCI_AD2
PCI_AD0 PCI_REQ64B-
PCI SLOT 1 PCI SLOT 2
PCICLK PCI_CLKSLOT2 INTR IDSEL
GNT/REQ PCI_GNT*1/REQ*1 PCI_GNT*2/REQ*2
4
PCI_CLKSLOT1 PCI_INTY* PCI_INTW* PCI_AD22 PCI_AD24
3
2
PCI_INTW- 16 PCI_INTY- 16
PCIRST_SLOT2- 16
PCI_PME- 16
PCI_FRAME- 16 PCI_TRDY- 16 PCI_STOP- 16 SMB_SCL 7,18,22,37
SMB_SDA 7,18,22,37 PCI_PAR 16
+3.3V
+5V
+12V
Title
Size Document Number Rev
Custom
Date: Sheet
1UF 16V 0805 Y5V /NIC403 1UF 16V 0805 Y5VC446 1UF 16V 0805 Y5V /NIC443
0.1UF 25V Y5V /NIC445
0.1UF 25V Y5VC425 1000P 50V X7RC444
CT42 100UF 16V 5X11 2mm /NI
1UF 16V 0805 Y5V /NIC427 1UF 16V 0805 Y5V /NIC449 1UF 16V 0805 Y5V /NIC450
0.1UF 25V Y5VC451
0.1UF 25V Y5VC426
0.1UF 25V Y5V /NIC452
CT39 100UF 16V 5X11 2mm /NI
PCI SLOT 1&2
CRU51-M7
20 39Wednesday, April 12, 2006
1
1.3
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Page 21
5
D D
4
3
2
1
FPQ3
2N3904 SOT23
SPEAKER
SPEAKER18
+3.3V
C C
IDEACTPJ23
IDEACTSJ23
SATA_HDLED-17
FPR3 10K 1%
1 2 3 4 5 6 7 8
FPD3 1N4148 SMD
AK
FPD2 1N4148 SMD
AK
FPD1 1N4148 SMD
AK
SPK1
FPRN1
10K 8P4R
123456
FPRN4 100 8P4R
FPC9 470P 50V X7R /NI
ECB
78
+5V
EMI
FPC6 470P 50V X7R /NI
+5V
SPK_VCC CRNT_LMT_HDDLED1 HDD_LED-
CRNT_LMT_HDDLED2
SPK_DAT
FPR12 100 /NI
JPANEL1 HEADER 2X12 N_P18_20 /NI
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 19 21 22 23 24
FPR9 33 1%
FPR10 56
FP_8_10 FP_12
Stuff
RST_BT_24
FPR4 for MiniPC design
+3.3V TO +3.3V_DUAL FOR VER:0.94
FP_RESET-18,37
B B
+3.3V_DUAL
IRTX33 IRRX33
FPR4 10K 1%
FPC2 1UF 16V 0805 Y5V /NI
FPR11 33 1%
FPC4 470P 50V X7R /NI
+5V_STBY
FPC1
0.1UF 25V Y5V
EMI
FPC5 470P 50V X7R /NI
FPC8 470P 50V X7R /NI
+3.3V_DUAL
FPR1 22K
FPC3 470P 50V X7R /NI
SLEEPBTNJ 18,33
NO S3 : ADD R1 R2
S3 : REMOVE R1 R2
EMIEMI
FPC7 470P 50V X7R /NI
PWRBTN- 33
PWRSW_ 24
FPRN3
1 2 3 4 5 6 7 8
270 8P4R
FP_8_10
+5V
FPR7
R1
330 /NI
FPR8 0 /NI
R2
FP_12
FPQ4
Q1
2N3904 SOT23
RN1
ECB
FPRN2
1 2 3 4 5 6 7 8
2.2K 8P4R
C
2N3906 SOT23
SEL_LED_PWR
BASE_PNP_TR
FPR6 2.2K
FPQ1
+5V_STBY
E B
NO S3 : ADD RN1 Q1
S3 : ADD ALL(WITHOUT R3)
ACPI_LED 33
+5V_STBY
R3
ECB
FPQ5 2N3904 SOT23
ECB
FPQ2 2N3904 SOT23
ECB
FPQ6 2N3904 SOT23
FPR2 10K 1% /NI FPR5 10K 1%
SLP_S5- 18,32
+2.5VDIMM
A A
Title
FRONT PANEL HEADER
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
CRU51-M7
1
21 39Wednesday, April 12, 2006
1.3
of
Page 22
5
+3.3V
SMB_SCL7,18,20,37 SMB_SDA7,18,20,37
PE_TRST_0
D D
C C
B B
PE_WAKE-18
0.1UF 25V Y5V
C341
PE0_OUT0
PE0_PRSNT-14
PE0_OUT1 PE0_OUT-1
PE0_OUT2 PE0_OUT-2
PE0_OUT3 PE0_OUT-3
PE0_OUT4 PE0_OUT-4
PE0_OUT-5
PE0_OUT6 PE0_OUT-6
PE0_OUT7 PE0_OUT-7
PE0_OUT8 PE0_OUT-8
PE0_OUT9 PE0_OUT-9
PE0_OUT10 PE0_OUT-10
PE0_OUT11 PE0_OUT-11
PE0_OUT12 PE0_OUT-12
PE0_OUT13
PE0_OUT14 PE0_OUT-14
PE0_OUT15 PE0_OUT-15
PE0_OUT[15..0]14 PE0_OUT-[15..0]14
C340
C342 C343
C344 C345
C346 C347
C348 C349
C350 C351
C352 C353
C354 C355
C356 C357
C358 C359
C360 C361
C362 C363
C364 C365
C366 C367
C368 C369
C370 C371
PE0TX_0+ PE0TX_0-PE0_OUT-0
0.1UF 25V Y5V
0.1UF 25V Y5V
PE0TX_1+ PE0TX_1-
0.1UF 25V Y5V
0.1UF 25V Y5V
PE0TX_2+ PE0TX_2-
0.1UF 25V Y5V
0.1UF 25V Y5V
PE0TX_3+ PE0TX_3-
0.1UF 25V Y5V
0.1UF 25V Y5V
PE0TX_4+ PE0TX_4-
0.1UF 25V Y5V
0.1UF 25V Y5V
PE0TX_5+PE0_OUT5 PE0TX_5-
0.1UF 25V Y5V
0.1UF 25V Y5V
PE0TX_6+ PE0TX_6-
0.1UF 25V Y5V
0.1UF 25V Y5V
PE0TX_7+ PE0TX_7-
0.1UF 25V Y5V
0.1UF 25V Y5V
PE0TX_8+ PE0TX_8-
0.1UF 25V Y5V
0.1UF 25V Y5V
PE0TX_9+ PE0TX_9-
0.1UF 25V Y5V
0.1UF 25V Y5V
PE0TX_10+ PE0TX_10-
0.1UF 25V Y5V
0.1UF 25V Y5V
PE0TX_11+ PE0TX_11-
0.1UF 25V Y5V
0.1UF 25V Y5V
PE0TX_12+ PE0TX_12-
0.1UF 25V Y5V
0.1UF 25V Y5V
PE0TX_13+ PE0TX_13-PE0_OUT-13
0.1UF 25V Y5V
0.1UF 25V Y5V
PE0TX_14+ PE0TX_14-
0.1UF 25V Y5V
0.1UF 25V Y5V
PE0TX_15+ PE0TX_15-
0.1UF 25V Y5V
PCI-EX1
+12V_P +12V_P
B1 B2 B3 B4 B5 B6 B7 B8
B9 B10 B11
B12 B13 B14 B15 B16 B17 B18
B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32
B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49
B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78 B79 B80 B81 B82
PCI_Express_x16
+12V +12V RSVD1 GND SMCLK SMDAT GND +3.3 JTAG1
3.3VAUX WAKE#
Mechanical Key
RSVD2 GND PETP0 PETN0 GND PRSNT2#1 GND
End of the x1 Connector
PETP1 PETN1 GND GND PETP2 PETN2 GND GND PETP3 PETN3 GND RSVD3 PRSNT2#2 GND
End of the x4 Connector
PETP4 PETN4 GND GND PETP5 PETN5 GND GND PETP6 PETN6 GND GND PETP7 PETN7 GND PRSNT2#3 GND
End of the x8 Connector
PETP8 PETN8 GND GND PETP9 PETN9 GND GND PETP10 PETN10 GND GND PETP11 PETN11 GND GND PETP12 PETN12 GND GND PETP13 PETN13 GND GND PETP14 PETN14 GND GND PETP15 PETN15 GND PRSNT2#4 RSVD4
End of the x16 Connector
PRSNT1#
JTAG2 JTAG3 JTAG4 JTAG5
PERST#
REFCLK+
REFCLK-
PERP0 PERN0
RSVD5 PERP1
PERN1
PERP2 PERN2
PERP3 PERN3
RSVD6 RSVD7 PERP4
PERN4
PERP5 PERN5
PERP6 PERN6
PERP7 PERN7
RSVD8 PERP8
PERN8
PERP9 PERN9
PERP10 PERN10
PERP11 PERN11
PERP12 PERN12
PERP13 PERN13
PERP14 PERP14
PERP15 PERN15
+12V +12V GND
+3.3V +3.3V
GND
GND
GND
GND
GND GND
GND GND
GND
GND
GND GND
GND GND
GND GND
GND
GND
GND GND
GND GND
GND GND
GND GND
GND GND
GND GND
GND GND
GND
4
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11
A12 A13 A14 A15 A16 A17 A18
A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32
A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49
A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82
RN75
PE_TCK
1 2
PE_TDI
3 4 5 6
PE_TMS
7 8
10K 8P4R
PE_RESET- 14
C336 22P 50V NPO /NI
PE0_REFCLK 14 PE0_REFCLK- 14
PE0_IN0 14 PE0_IN-0 14
PE0_IN1 14 PE0_IN-1 14
PE0_IN2 14 PE0_IN-2 14
PE0_IN3 14 PE0_IN-3 14
PE0_IN4 14 PE0_IN-4 14
PE0_IN5 14 PE0_IN-5 14
PE0_IN6 14 PE0_IN-6 14
PE0_IN7 14 PE0_IN-7 14
PE0_IN8 14 PE0_IN-8 14
PE0_IN9 14 PE0_IN-9 14
PE0_IN10 14 PE0_IN-10 14
PE0_IN11 14 PE0_IN-11 14
PE0_IN12 14 PE0_IN-12 14
PE0_IN13 14 PE0_IN-13 14
PE0_IN14 14 PE0_IN-14 14
PE0_IN15 14 PE0_IN-15 14
+3.3V
+3.3V
PE1_PRSNT-14
SMB_SCL7,18,20,37 SMB_SDA7,18,20,37
PE_WAKE-18
PE1_OUT14 PE1_OUT-14
1 2 3 4 5 6 7 8
RN74
10K 8P4R
3
+3.3V_DUAL+3.3V_DUAL
PE_TRST_1
0.1UF 25V Y5V
C326
PE1TX_1+ PE1TX_1-
C327
0.1UF 25V Y5V
+12V Change to +12V_P
PE_TRST_0 PE_TRST_1 PE0_PRSNT­PE1_PRSNT-
CT31 100UF 16V 5X11 2mm
+12V_P
0.1UF 25V Y5VC497
FOR EMI
+3.3V+3.3V
PCI-EX1_1
+12V_P +12V_P
B1 B2 B3 B4 B5 B6 B7 B8
B9 B10 B11
B12 B13 B14 B15 B16 B17 B18
PCI_Express_x1
+12V1 +12V2 RSVD1 GND SMCLK SMDAT GND +3.3V1 JTAG1
3.3VAUX WAKE#
Mechanical Key
RSVD2 GND PETP0 PETN0 GND PRSNT2# GND
End of the x1 Connector
PRSNT1#
+12V3 +12V4
GND JTAG2 JTAG3 JTAG4 JTAG5
+3.3V2 +3.3V3
PERST#
GND
REFCLK+
REFCLK-
GND
PERP0
PERN0
GND
3GPIOX1
+3.3V
1UF 16V 0805 Y5V /NIC398 1UF 16V 0805 Y5V /NIC330 1UF 16V 0805 Y5V /NIC331
0.1UF 25V Y5V /NIC372
0.1UF 25V Y5V /NIC328
0.1UF 25V Y5V /NIC373
+3.3V_DUAL
+5V
2
+3.3V
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11
A12 A13 A14 A15 A16 A17 A18
PE_TCK1 PE_TDI1
PE_TMS1
PE_RESET- 14
PE1_REFCLK 14 PE1_REFCLK- 14
PE1_IN 14 PE1_IN- 14
CT40 1000UF 6.3V 8X12 /NI
1UF 16V 0805 Y5VC399 1UF 16V 0805 Y5V /NIC329 1UF 16V 0805 Y5V /NIC306
0.1UF 25V Y5V /NIC325
0.1UF 25V Y5V /NIC324
0.1UF 25V Y5V /NIC307
0.1UF 25V Y5V /NIC338
0.1UF 25V Y5V /NIC339
0.1UF 25V Y5V /NIC337
RN73
1 2 3 4 5 6 7 8
10K 8P4R
1
PE2_PRSNT- 14
+3.3V
3GPIOX16
A A
Title
PCIEXPRESS
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
CRU51-M7
1
22 39Wednesday, April 12, 2006
1.3
of
Page 23
5
4
3
2
1
IDE_PDD[15..0]17
PCIRST_IDE-16
D D
+3.3V
IDE_DREQ_P17
IDE_IOW_P-17
IDE_IOR_P-17 IDE_IORDY_P17
IDE_DACK_P-17
IDE_INTR_P17
IDE_ADDR_P117
IDE_ADDR_P017
IDE_CS1_P-17
IDEACTPJ21
+3.3V
IDE_CS3_P-17
IDE_ADDR_P217
C C
B B
IDE_SDD[15..0]17
PCIRST_IDE-16
+3.3V
IDE_DREQ_S17
IDE_IOW_S-17
IDE_IOR_S-17 IDE_IORDY_S17
IDE_DACK_S-17
IDE_INTR_S17
IDE_ADDR_S117
IDE_ADDR_S017
IDE_CS1_S-17
IDEACTSJ21
+3.3V
R152 10K 1%
IDE_PDD7 IDE_PDD6 IDE_PDD5 IDE_PDD4 IDE_PDD3 IDE_PDD2 IDE_PDD1 IDE_PDD0
R93 4.7K
R94 8.2K /NI
R132 10K 1%
IDE_SDD7 IDE_SDD6 IDE_SDD5 IDE_SDD4 IDE_SDD3 IDE_SDD2 IDE_SDD1 IDE_SDD0
R90 4.7K
R87 8.2K /NI
R92
5.6K
R89
5.6K
IDE1 BOX 2X20 N20 B
1
RESET
3
DD7
5
DD6
7
DD5
9
DD4
11
DD3
13
DD2
15
DD1
17
DD0
19
GND
21
DMARQ
23
DIOW
25
DIOR
27
IORDY
29
DMACK
31
INTRQ
33
DA1
35
DA0
37
CS0
39
DASP
R95
PRIMARY IDE
10K 1%
IDE2
1
RESET
3
DD7
5
DD6
7
DD5
9
DD4
11
DD3
13
DD2
15
DD1
17
DD0
19
GND
21
DMARQ
23
DIOW
25
DIOR
27
IORDY
29
DMACK
31
INTRQ
33
DA1
35
DA0
37
CS0
39
DASP
BOX 2X20 N20 Y
R88
SECONDARY IDE
10K 1%
GND
DD8
DD9 DD10 DD11 DD12 DD13 DD14 DD15
GND GND GND
CSEL
GND
PDIAG
DA2
CS1
GND
GND
DD8
DD9 DD10 DD11 DD12 DD13 DD14 DD15
GND GND GND
CSEL
GND
PDIAG
DA2
CS1
GND
2
IDE_PDD8
4
IDE_PDD9
6
IDE_PDD10
8
IDE_PDD11
10
IDE_PDD12
12
IDE_PDD13
14
IDE_PDD14
16
IDE_PDD15
18 20
NC
22 24 26 28 30 32
NC
34 36 38 40
2
IDE_SDD8
4
IDE_SDD9
6
IDE_SDD10
8
IDE_SDD11
10
IDE_SDD12
12
IDE_SDD13
14
IDE_SDD14
16
IDE_SDD15
18 20
NC
22 24 26 28 30 32
NC
34 36 38 40
R96 15K
R91 15K
CBLE_DET_P 17
CBLE_DET_S 17
IDE_CS3_S-17
IDE_ADDR_S217
A A
Title
IDE CONNECTORS
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
CRU51-M7
1
23 39Wednesday, April 12, 2006
1.3
of
Page 24
5
MH1
PAD200-8 /NI
1 2 3 4
1 2 3 4
D D
1 2 3 4
C C
(NPTH)
9
(NPTH)
9
(NPTH)
9
PWRSW_21
5 6 7 8
MH7
PAD200-8 /NI
5 6 7 8
MH5 PAD200-8 /NI
5 6 7 8
MH4
PAD200-8 /NI
1 2 3 4
1 2 3 4
1 2 3 4
(NPTH)
9
(NPTH)
9
(NPTH)
5 6 7 8
MH2 PAD200-8 /NI
5 6 7 8
AUD_GND29,30
MH8 PAD200-8 /NI
5 6 7 8
9
L1 L2
3
4 2
Impedance Testing Coupon
+5V
NC1
NC2
+5V
PWRSW1
1
JP1
1 2
HEADER 1X2 D 150 /NI
JP2
1 2
HEADER 1X2 D 150 /NI
U4
NC3 NC4
NC5 NC6
MATXCUT /NI
CP1 CP2 CP3 CP4 CP5 CP6 CP7 CP8 CP9 CP10
4
FAN_CTL133
22UF 25V 5X11 2mm /NI
CT26
POWER CONN DECOUPING
0.1UF 25V Y5VC112
0.1UF 25V Y5V /NIC104
+5V
R162
+12V_P
4.7K /NI
411
R168 15K /NI
3
+
2
-
U11A LM324 SO14
+3.3V+5V
+12V
1
0.1UF 25V Y5VC87
R7 1K 1% /NI
R8 470 /NI
B
3
EC
Q4 2SB1202 TO252 /NI
JCFAN1 R5 33K /NI
WAFER 1X3
R176 22K /NI
PS_ON-33
SLP_S3-18,33
R68 4.7K /NI
POWER CONNECTOR
3 2 1
R67
4.7K /NI
+5V
+12V
R3 0 0805
+
CT2 100UF 16V 5X11 2mm /NI
2
+5V_STBY
JATXPWR1
13
3.3V
R63 10K 1%
Q18 2N3904 SOT23 /NI
R12 10K 1%
LINEAR FAN CHANGE TO 10K
-5V
C151 470P 50V X7R
C119
C169
0.1UF 25V Y5V /NI
0.1UF 25V Y5V /NI
3.3V
14
-12V
3.3V
15
GND
GND
16
PSON
17 18 19 20 21 22 23 24
5V
GND
GND
GND
5V
GND
GND
NC
POK
5V
5VSB
5V
12V 12V
5V
DET
GND
POWER CONN ATX 24P
NO LINEAR FAN CHANGE TO 22K
R13 1K 1%
FAN1 33
CPU
1
+3.3V +5V+5V +5V_STBY +12V-12V
1 2 3 4 5 6 7 8 9 10 11 12
C110
C99
0.1UF 25V Y5V
0.1UF 25V Y5V
+5V_STBY
R57 10K 1%
C124 470P 50V X7R
PWRGD_PS 32,35
TP6151L-4 /NI
R306 330 /NI
R307 330 /NI
+5V
RST_BT_21
B B
LED_5VSB
+5V_STBY
A A
LED_DIMM
+2.6V_SUS
R302 330 /NI
D16 RED CHIP LED 0805 /NI
5
FOR VER:1.1
RSTSW2
3
4 2
L1 L2
TP6151L /NI
+2.5VDIMM
R303 330 /NI
D17 RED CHIP LED 0805 /NI
1
+5V
R300 330 /NI
R304 470 /NI
D18 RED CHIP LED 0805 /NI
LED_D2
R301 330 /NI
D19 RED CHIP LED 0805 /NI
LED_D1
R305 470 /NI
LEDD0 33 LEDD1 33
4
FAN_CTL233
FAN_CTL333
+5V
+5V
R279
4.7K /NI R281 51 1% /NI
R287
4.7K /NI R289 51 1% /NI
G
G
R277 4.7K /NI R278 1K 1% /NI
DS
Q46 2N7002 SOT23 /NI
R285 4.7K /NI R286 1K 1% /NI
DS
Q48 2N7002 SOT23 /NI
Q45 2N2907 SOT23 /NI
JSFAN1
3 2 1
WAFER 1X3
Q47 2N2907 SOT23 /NI
JNBFAN1
3 2 1
WAFER 1X3 /NI
JSFAN2
3 2 1
WAFER 1X3 /NI
3
+12V
+12V +5V
R280
R178 10K 1%
0 0805
R177 1K 1%
+
CT30 100UF 16V 5X11 2mm /NI
+5V
+12V
R282
R288
10K 1% /NI
0 0805 /NI
R283 1K 1% /NI
+
CT45 100UF 16V 5X11 2mm /NI
SYSTEM1
FAN2 33
NB FAN
FAN3 33
SYSTEM2
2
KA
A
K
KA
K
D23 BAV99 SOT23
CRU51-M7
1
24 39Wednesday, April 12, 2006
of
KA
A
K
A
D21
D22 BAV99 SOT23
+5V
BAV99 SOT23 /NI
Title
ATX POWER & FAN CONTROL
Size Document Number Rev
Custom
Date: Sheet
1.3
Page 25
5
D D
4
3
2
+5V
1
FLOPPY CONNECTOR
FDD1
1 3 4
7 8 9
11 13 14
17 18 19 20 21 23 25 27 29 31 33
BOX 2X17 N5 W
MTH'S
G1G2G3G4G5
2 6 10
12 1615
22 24 26 28 30 32 34
VBATREF
D14
A
K
BAT54C SOT23
KA
C308
C309
0.1UF 25V Y5V
C310
1UF 16V 0805 Y5V
10UF 10V 0805 Y5V
+3.3V_VBAT 18,33,37
KDAT33
KCLK33 MDAT33
MCLK33
KEYBOARD & MOUSE
FB7 0 0805 /NI
USB_PWR
BEAD 60 0805 1AFB2
1 2
RN4
3 4
2.2K 8P4R
5 6 7 8
KDAT
KCLK MDAT
MCLK FB_MCLK
FB3
BEAD 60 0805 1A
FB4
BEAD 60 0805 1A
FB5
BEAD 60 0805 1A
FB6
BEAD 60 0805 1A
FB_KDAT
FB_KCLK FB_MDAT
C18 47P 50V NPO
Data Switch solution
C9
0.1UF 25V Y5V
C16 47P 50V NPO
KB_FB_VCC5
C13
C10
47P 50V NPO
47P 50V NPO
JKBMS1 MINI DIN CONN PC99
1 2 3 4 5 6 7 8
9 10 11 12
+3.3V_STBY
R159 1K 1%
BAT1 BATTERY HOLDER-1
C C
B B
R251 150
C485
0.1UF 25V Y5V /NI
RN87 150 8P4R
1 2
3 4
5 6
7 8
FRWC- 33
FINDEX- 33 FMOA- 33 FDSB- 33 FDSA- 33 FMOB- 33 FDIR- 33 FSTEP- 33 FWD- 33 FWEN- 33 FTRAK0- 33 FWP- 33 FRDATA- 33 FHEAD- 33 FDSKCHG- 33
A A
Title
FLOOY ,KEYBOARD & MOUSE ,CMOS CLEAR
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
CRU51-M7
1
25 39Wednesday, April 12, 2006
1.3
of
Page 26
A
B
C
D
E
DAC_HSYNC14 DAC_VSYNC14
4 4
U5B
DAC_HSYNC14 DAC_VSYNC14
VGA_R
DDC_DATA18
3 3
DAC_RED14 DAC_GREEN14 DAC_BLUE14
DDC_CLK18
FB28 BEAD 60 0805 1A
2 1
FB29 BEAD 60 0805 1A
2 1
FB30 BEAD 60 0805 1A
2 1
VGA_G
VGA_B
R73 150 1%
SN74ACT08
4 5
R69 150 1%
VGA_R VGA_G VGA_B
147
R64 150 1%
R86 0 /NI R84 0 /NI
U5A SN74ACT08
1 2
6
KA
D7
D11
A
A
K
BAT54S SOT23 /NI
BAT54S SOT23 /NI
+3.3V
+5V
147
KA
FOR EMI
3
R83 22
R98 33 1%
R72 33 1%
KA
D6
A
K
BAT54S SOT23 /NI
+3.3V
0.1UF 25V Y5VC498
R97 22
D8
A
K
BAT54S SOT23 /NI
+5V +5V
R80
2.2K
KA
D12
K
A
BAT54S SOT23 /NI
R99
2.2K
KA
K
+5V
KA
D9
D10
A
K
A
BAT54S SOT23 /NI
BAT54S SOT23 /NI
+5V
+5V
PS1
POLY FUSE 1.1A
R100 0 0805 /NI
INDUCTOR 68NH 300MA 0805FB11
INDUCTOR 68NH 300MA 0805FB10
INDUCTOR 68NH 300MA 0805FB9
KA
C184
C166
10P 50V NPO
K
10P 50V NPO
C152 FB1
0 0805
10P 50V NPO
C183
C186
100P 50V NPO
47P 50V NPO
C188
47P 50V NPO
C173
C192
33P 50V NPO
100P 50V NPO
C171 33P 50V NPO
BEAD 60 0805 1AFB12
C167
C191
33P 50V NPO
470P 50V X7R /NI
+5V
MONRED_A
MONGREEN_A MONSDA_A
MONBLUE_A MONHSYNC_A DDCPOWER_A
MONVSYNC_A
MONSCL_A
C98
0.1UF 25V Y5V
C198
0.1UF 25V Y5V
JVGA1 VGA CONN PC99 SHORT
6 1
11
7 2
12
8 3
13
9
4 14 10
5 15
G1
G2
VGA CONNECTOR
SVIDEO FILTERS OPTIONS
L1
C1C1
L1
0.1UF 25V Y5VC501
22PF
8.2PF 82PF0.56UH
330PF1.8UH 270PF
82PF
2 2
1 1
Title
VGA CONNECTOR
Size Document Number Rev
Custom
A
B
C
D
Date: Sheet
CRU51-M7
E
26 39Wednesday, April 12, 2006
1.3
of
Page 27
5
D D
UST4­UST4+ UST5­UST5+
FB13 0 0805
USB
C215
C219
10P 50V NPO /NI
10P 50V NPO /NI
R103
0 0805 /NI
470P 50V X7R /NIC19
C212
C209
10P 50V NPO /NI
10P 50V NPO /NI
PS2 POLY FUSE 1.1A
R104 5.1K
4
1
JUSBV1 HEADER 1X3
2
3
JUSB1
G3 G1
1 2 3 4
G4 G2
USB CONN
+5V
+5V_STBY
USB_BKPNL_5_4_OC- 18
R105 10K 1%
5 6 7 8
UST3-USB_PWR UST3+
UST2­UST2+
3
USB LAN
C259
C264
10P 50V NPO /NI
10P 50V NPO /NI
C268
C272
10P 50V NPO /NI
10P 50V NPO /NI
USB_PWR
R110 5.1K
USB_PWR
C207 470P 50V X7R /NI
CT12 22UF 25V 5X11 2mm
JUSBLAN1A
B1
VCC0
B2
DATA0-
B3
DATA0+
B4
GND0
A1
VCC1
A2
DATA1-
A3
DATA1+
A4
GND1
RJ45USBA CONN
USB_BKPNL_3_2_OC- 18
R111 10K 1%
GND2 GND3 GND4 GND5
2
G3 G4 G5 G6
1
H1
C C
B B
USB_5-18
USB_518
USB_4-18
USB_418
USB_418
USB_4-18 USB_518 USB_5-18
UST7­UST7+ UST6+
C478 10P 50V NPO /NI
1
1
2
2
3
3
4 5
45
SMD CHOKE 0.5A/90U
RN49
1 2 3 4 5 6 7 8
0 8P4R /NI
R263 0 0805 /NI
USBPWR
470P 50V X7R /NIC482
JUSB2
1 3 4 5 6 7 8
C477
HEADER 2X5 N9 W
10P 50V NPO /NI
2
PS4 POLY FUSE 1.1A
2
10
8
8
7
7
6
6
1
JUSBV2
HEADER 1X3
3
R233 5.1K
UST5-
UST5+ UST4-
UST4+
UST4+ UST4­UST5+ UST5-
+5V
+5V_STBY
USB_3-18
USB_318
USB_218
USB_2-18
USB_2-18 USB_218 USB_318
USB_3-18
USB_FNTPNL_7_6_OC- 18
R239 10K 1%
C481 10P 50V NPO /NI
UST6-
C480 10P 50V NPO /NI
H2
1
1
2
2
3
3
4 5
45
SMD CHOKE 0.5A/90U
RN67
1 2 3 4 5 6 7 8
0 8P4R /NI
UST0­UST0+
C434
C436
10P 50V NPO /NI
10P 50V NPO /NI
8
7 6
USBPWR
8
7 6
470P 50V X7R /NIC447
1 3 4 5 6 7 8
UST3-
UST3+ UST2+
UST2-
UST2­UST2+ UST3+ UST3-
R234 5.1K
JUSB3
2
10
HEADER 2X5 N9 W
USB_018
USB_0-18
USB_118
USB_1-18
USB_1-18 USB_118
USB_0-18
USB_018
USB_FNTPNL_1_0_OC- 18
R240 10K 1%
CT44 22UF 25V 5X11 2mm
H3
1
1
2
2
3
3
4 5
45
SMD CHOKE 0.5A/90U /NI
RN90
1 2 3 4 5 6 7 8
0 8P4R
UST1­UST1+
C432
C433
10P 50V NPO /NI
10P 50V NPO /NI
UST0+
8
8
UST0-
7
7
UST1+
6
6
UST1-
UST1­UST1+ UST0­UST0+
USB_718
USB_7-18
USB_618
USB_6-18
USB_6-18 USB_618
USB_7-18
USB_718
H4
1
1
2
2
3
3
4 5
45
SMD CHOKE 0.5A/90U /NI
RN101
1 2 3 4 5 6 7 8
0 8P4R
8
8
7
7
6
6
UST7+
UST7­UST6+
UST6-
UST6­UST6+ UST7­UST7+
A A
Title
USB INTERFACE
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
CRU51-M7
1
27 39Wednesday, April 12, 2006
1.3
of
Page 28
5
D D
C C
+3.3V_STBY
D3 1N4148 SMD
RN2
10K 8P4R
1 2
3 4
5 6
7 8
SER_RI-18
D2
CT3
ECB
Q2 2N3904 SOT23
1N4148 SMD /NI
22UF 25V 5X11 2mm /NI
COM1
+5V +12V
U1
20
VCC
19
DCD1#33 DSR1#33
SINA33
RTS1#33
SOUTA33 CTS1#33 DTR1#33
RI1#33
B B
ROUT1
18
ROUT2
17
ROUT3
16
DIN1
15
DIN2
14
ROUT4
13
DIN3
12
ROUT5
ST75185CTR TSSOP
RIN1 RIN2
RIN3 DOUT1 DOUT2
RIN4 DOUT3
RIN5
1
V+
2 3 4 5 6 7 8 9 1011
V-GND
-12V
4
-XRI1
WAKE ON LAN
RIN1 RIN2 RIN3 DOUT1 DOUT2 RIN4 DOUT3
-XRI1
C49 100P 50V NPO C59 100P 50V NPO C62 100P 50V NPO C65 100P 50V NPO C67 100P 50V NPO C73 100P 50V NPO C71 100P 50V NPO C76 100P 50V NPO
JCOM1 D CONN 9PIN PC99
1 6 2 7
G2 3 8
G1 4 9 5
COM PORT
3
LPT
PARALLEL - CONNECTOR
RN91 33 8P4R
P_PRD3 PRD3
PD333 PD233 PD133 PD033
PD733 PD633 PD533 PD433
STB#33
ALF#33
INIT#33
SLCTIN#33
+5V +12V -12V
C35
0.1UF 25V Y5V /NI
NEAR COM1 & COM2
1 2
P_PRD2 PRD2
3 4 5 6
P_PRD0 PRD0
7 8
P_PRD7 PRD7
1 2 3 4
P_PRD5 PRD5
5 6
P_PRD4
7 8
P_-STB
1 2
P_-AFD AFD
3 4
P_-INIT -INIT
5 6 7 8
C34
0.1UF 25V Y5V /NI
RN99 33 8P4R
RN88 33 8P4R
C72
0.1UF 25V Y5V /NI
PRD1P_PRD1
PRD6P_PRD6 PRD4
-STB
-SLINP_-SLIN
+5V
EEROR#33
ACK#33
BUSY33
SLCT33
1N4148 SMD
PE33
100P 50V NPO 100P 50V NPO 100P 50V NPO
2
2.2K
D15
C102
C106
C109
100P 50V NPO
RN79
R214
2.2K 8P4R
246
135
100P 50V NPO
100P 50V NPO
100P 50V NPO
100P 50V NPO
100P 50V NPO
RN93
2.2K 8P4R
2.2K 8P4R
246
8
8
135
7
7
C113
C115
100P 50V NPO
100P 50V NPO
PRD4
PRD5
PRD6
PRD3
C127
C134
C123
C120
C117
100P 50V NPO
100P 50V NPO
100P 50V NPO
100P 50V NPO
RN100
2.2K 8P4R
246
246
8
135
135
7
PRD1
-SLIN
-INIT
PRD2
-STB
C150
C88
C95
C90
C130
100P 50V NPO
100P 50V NPO
RN78
AFD
C138
PRD0
C93
8
7
-STB AFD PRD0 P_-ERR PRD1
-INIT PRD2
-SLIN PRD3
PRD4 PRD5 PRD6 PRD7 P_-ACK P_BUSY P_PE P_SLCT
P_-ERR
1
Ver091 Update
JPRNT1
G1
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9 22 10 23 11 24 12 25 13
G2 G3
D CON 25PIN HIGH RISE PC99
A A
R309 0
FOR EMI
5
4
3
2
Title
LPT & COM1 & COM2(COLAY)
Size Document Number Rev
Custom
Date: Sheet
CRU51-M7
1
28 39Wednesday, April 12, 2006
of
1.3
Page 29
5
4
3
2
1
+5V
0.1UF 25V Y5VC499
FOR EMI
D D
AC271UF 10V Y5V AC261UF 10V Y5V
STR MIC--->FRONT PANEL
AC23 1UF 10V Y5V
VOBR
C C
VCC5_AUD
AC24
0.1UF 25V Y5V
AUD_GND24,30
AUD_GND24,30
B B
SPDIFO18,30
A A
5
AR21 0
AR20 0 /NI
+3.3V
AR19 10
AUD_14MHZ_IN18
37
LINE1-VREFO-R
38
AVDD2
39
SURR-L
40
JDREF/NC/JD3
41
SURR-R
42
AVSS2
43
CEN
44
LFE
45
SurrBack-L/GPIO0
46
SurrBack-R/XTLSEL
47
SPDIFI/EAPD
48
SPDIFO
1UF 10V Y5V
4
+
+
AC29 100UF 16V 6.3X5 2.5mm
AC30 100UF 16V 5X11 2mm
31
32
33
34
35
36
FRONT-L
FRONT-R
Sense B/FMIC1
DCVOL/VREFO2
LINE2-VREFO/JD4
MIC1-VREFO-R/FMIC2
DVDD1
GPIO0/XTLI
GPIO1/XTLO
DVSS1
SDATA-OUT
BIT-CLK
1234567891011
AC25
1UF 10V Y5V
AC17 1UF 10V Y5V
27
28
29
30
VREF
MIC1-VREFO-L
MIC2-VREFO/AFILT2
LINE1-VREFO-L/AFILT1
DVSS2
SDATA-IN
DVDD2
SYNC
AC18
AR14 22
AR17 22
+
+
AC16 0.1UF 25V Y5V
VCC5_AUD
AC15 1UF 16V 0805 Y5V
AC14 1UF 16V 0805 Y5V
25
26
AVSS1
AVDD1
LINE1-R
LINE1-L
MIC1-R MIC1-L
CD-R
CD-GND
CD-L
MIC2-R/JD1
MIC2-L/JD2
LINE2-R/AUX-R
LINE2-L/AUX-L Sense A/Phone
RESET#
PCBEEP
12
2 1
AC_RST­AC_SYNC AC_SDIN_0
AC20 10P 50V NPO
+3.3V
AR25 BEAD 60 0805 1A
PORT_D_R 30 PORT_D_L 30
STR_MIC_L 30 STR_MIC_R 30
AUD_GND 24,30
VOCR
AC19 1UF 10V Y5V
AC21
1000P 50V X7R
AU1
24 23 22 21 20 19 18 17 16 15 14 13
CODEC ALC655
AC_BITCLK
AR18 10K 1% /NI
AC_SDOUT
3
AUD_GND 24,30
AC22 1000P 50V X7R
AC7 1UF 10V Y5V AC8 1UF 10V Y5V AC9 1UF 10V Y5V AC10 1UF 10V Y5V
MIC-IN
AC12 1UF 10V Y5V AC13 1UF 10V Y5V
AC_RST- 18
AC_SYNC 18
AC_SDIN_0 18 AC_BITCLK 18
AC_SDOUT 18
LINE IN
CD_R
AC11 1UF 10V Y5V
CD_G CD_L
Verfout bias for stereo microphone.
VCC5_AUD
AR16
4.7K
AR15
4.7K
AUD_GND 24,30
Verfout bias for backpanel microphone.
PORT_B_L30 PORT_B_R30
PORT_C_R 30 PORT_C_L 30 PORT_B_R 30 PORT_B_L 30
2
CD in connectorFRONT OUT
CD_L CD_G
CD_R
AD3
A K
1N4148 SMD
AD4
A K
1N4148 SMD
VOBR
AR11 47K
AR23
AR24
AR94.7K
AD2 1N4148 SMD
AR84.7K
AD1 1N4148 SMD
AR13
5.6K
Reserve to fine tune accuracy of Jack Sensing
Title
Size Document Number Rev
Custom
Date: Sheet
JCDIN1
1 2 3 4
WAFER 1X4 BLACK
AR12
AR10
47K
47K
AUD_GND 24,30
4.7K
4.7K
STR_MIC_L 30
STR_MIC_R 30
AK AK
AUD_GND 24,30
AUDIO CODEC
L GND GND
R
VOBR
CRU51-M7
29 39Wednesday, April 12, 2006
1
1.3
of
Page 30
5
4
3
2
1
LINE-IN
JAUDIO1D
D D
AUDIO JACK 3L
32 33 34 35 1
CONN_GND
LINE_IN_L
LINE_IN_R
LINE_INL
LINE_INR
LINE-OUT
JAUDIO1C
AUDIO JACK 3L
CONN_GND
MIC-IN
JAUDIO1B
AUDIO JACK 3L
C C
CONN_GND
LINE_OUT_L LINE_OUTL
22 23 24
LINE_OUT_R LINE_OUTR
25 1
2 3 4 5 1
AC5
100P 50V NPO /NI
100P 50V NPO /NI
AL3 BEAD 60 0805 1A
AL4 BEAD 60 0805 1A
AC6 100P 50V NPO /NI
AL6 BEAD 60 0805 1A
AL5 BEAD 60 0805 1A
AC4
100P 50V NPO /NI
AC2
2 1
2 1
AR4
2 1
2 1
AR7
22K AC3 100P 50V NPO /NI
AL2 BEAD 60 0805 1A
2 1
AL1 BEAD 60 0805 1A
2 1
AR2
22K AC1 100P 50V NPO /NI
PORT_B_L
PORT_B_R
AR5 22K
22K
AR6 22K
AR1 22K
AUD_GND 24,29
AUD_GND24,29
AUD_GND 24,29
PORT_B_L 29
PORT_B_R 29
AUD_GND 24,29
PORT_C_L 29
PORT_C_R 29
PORT_D_L 29
PORT_D_R 29
R313 0
FOR EMI
H1
G2
JAUDIO1A
G2
G3
G4 G5
AUDIO JACK 3L
G4
G1
G1
G3
IO_GND
2 1
VCC5_AUD
STR_MIC_L29
STR_MIC_R29
AUDIO ANALOG POWER
AU2
0.1UF 25V Y5V
2 1
AL7
AC28
78L05 TO-92
IGO
+
1 2
-
ACT1 100UF 16V 5X11 2mm
JSPDIF_OUT1
1
2
3
WAFER 1X3 BLACK
VCC5_AUD
12
AC31
0.1UF 25V Y5V
SPDIFO 18,29
AUD_GND 24,29
+12V
B B
A A
+5V
12
AC32
BEAD 60 0805 1A
1UF 16V 0805 Y5V
STR_MIC_L STR_MIC_R LINE_OUTR
LINE_OUTL LINE_OUT_L LINE_INR LINE_IN_R LINE_INL
JFAUDIO1
1 2 3 4 5 6 7 9 10
11 13
HEADER 2X7 N8
AUD_GND 24,29
LINE_OUT_R
12
LINE_IN_L
14
AR3 0 0805
IO_GND
AR22 0 0805
2 1
AUD_GND 24,29
AUD_GND 24,29
Title
AUDIO PORT
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
CRU51-M7
1
30 39Wednesday, April 12, 2006
1.3
of
Page 31
5
D D
+12V
VID_OUT437 VID_OUT337 VID_OUT237 VID_OUT137 VID_OUT037
CPU_VLD16
CPUVDD_EN16
C C
VCORE
PR20 51 1%
CPU_CORE_FB7
CPU_CORE_FB-7
PR21 51 1%
Over Voltage Controller : Vout=VCOREFB+ X ( 1+PR19 / RB )
B B
PR2
5.6K /NI
1K 1% /NI
PC11
+3.3V
PR5 10K 1%
Change Value
PR10
5.6K
Change Value
PR19 100 1%
1000P 50V X7R /NIPC12
+5V
PC17
0.01UF 50V X7R
4
+3.3V
PR1 1K 1% /NI
7 8
0.1UF 25V Y5VPC1
0.1UF 25V Y5VPC2PR3
PC6 4700P 50V X7R
470P 50V X7RPC8
Change Value
PR16 1K 1%
OVL
OVL37
PR12 150K /NI PR8 10K 1% /NI
OFFSET
-10mV
PR4 200K
PR22 10K 1%
0.01UF 50V X7R /NI
PR27 10K 1% PC14
0.1UF 25V Y5V
SS12/5817 SMA /NI
PRN1 1K 8P4R /NI
1 2
3 4
5 6
38 39 40
35 37
10
12
11
36
PC4
0.01UF 50V X7R
13
14
PC13
15 16
PR13 30K 1% PR14 30K 1% PR25 30K 1%
PD1
PU1 ISL6566CR
VID4 VID3 VID2
1
VID1
2
VID0
3
DACSEL/VID5 PGOOD ENLL
8
COMP
9
FB
VDIFF
VSEN
RGND
6
OFST
FS
5
REF
4
VRM10 OCSET
ICOMP
ISUM IREF
+5V
PR11
4.7 0805 1UF 16V 0805 Y5VPC7
7
PVCC1 BOOT1
VCC
UGATE1
PHASE1
ISEN1
LGATE1
PVCC2 BOOT2
UGATE2
PHASE2
ISEN2
LGATE2
PVCC3 BOOT3
UGATE3
PHASE3
ISEN3
LGATE3
GND
41
BOTTOM PAD CONNECT TO GND THROUGH 10vias
33
PR9 2.7 0805
30
31
29
PR7 1.8K
32 34
24
PR18 2.7 0805
26
27
28
PR15 1.8K
25 23
18
PR23 2.7 0805
21
20
22
PR24 1.8K
19 17
+12V
+12V
+12V
PR6
4.7 0805
PR17
4.7 0805
PR26
4.7 0805
3
2
ISL6566CR FOR K8 939 POWER CKT
+12V
PL4 INDUCTOR 1.0UH
+
PCT9
PC25
100UF 16V 5X11 2mm /NI
1UF 16V 0805 Y5V
PL1 INDUCTOR 1.1UH 30A D
PL2
INDUCTOR 1.1UH 30A D
PL3
INDUCTOR 1.1UH 30A D
PCT1
+
1500UF 16V 10X20X5 LR O
PCT3
PCT8
+
+
1500UF 16V 10X20X5 LR O
1500UF 16V 10X20X5 LR O
PCT6
+
3300UF 6.3V 10X25X5 LR O
FOR T
VCORE
PCT7
+
3300UF 6.3V 10X25X5 LR O
PC20 1UF 16V 0805 Y5V
PCT5
PCT2
+
+
3300UF 6.3V 10X25X5 LR O
3300UF 6.3V 10X25X5 LR O
+12V_P
POWER CONN ATX12V 2X2
1UF 16V 0805 Y5VPC3
PC5
0.1UF 25V Y5V PR28 2.7 0805
PQ3 FDD8880 TO252
PR30 0 0805
PQ2 FDD8880 TO252
PR29 0 0805
R55 10K 1%
1UF 16V 0805 Y5VPC9
PC10
0.1UF 25V Y5V PR32 2.7 0805
PQ4 FDD8880 TO252
PR33 0 08051000P 50V X7R /NI
PQ5 FDD8880 TO252
PR34 0 0805
R62 10K 1%
1UF 16V 0805 Y5VPC16
PC15
0.1UF 25V Y5V PR36 2.7 0805
PQ7 FDD8880 TO252
PR37 0 0805
PQ8 FDD8880 TO252
PR38 0 0805
R81 10K 1%
VIN
DS
G
DS
G
G
PQ1
FDD8880 TO252
VIN
DS
G
DS
G
G
PQ6
VIN
FDD8880 TO252
DS
G
DS
G
G
PQ9
FDD8880 TO252
+12V_P
PC23 1UF 16V 0805 Y5V
DS
PR31
2.7 0805
PC18 1000P 50V X7R
PC22 1UF 16V 0805 Y5V
DS
PR35
2.7 0805
PC21 1000P 50V X7R
PC19 1UF 16V 0805 Y5V
DS
PR39
2.7 0805
PC24 1000P 50V X7R
VIN
VCORE
0.8V~1.55V/80A
PCT4
+
3300UF 6.3V 10X25X5 LR O
系列
JATXPWR2
1
1
4
2 3
23
5 6
H1 H2
1
4
A A
5
over voltage , control from ATXP01
RB
OV_VCORE037 OV_VCORE137 OV_VCORE237
PR40 4.02K 1% /NI PR41 2.37K 1% /NI PR42 1.58K 1% /NI
OVL OVL OVL
4
Title
VCORE POWER SUPPLY
Size Document Number Rev
Custom
3
2
Date: Sheet
CRU51-M7
1
31 39Wednesday, April 12, 2006
1.3
of
Page 32
5
4
3
2
1
MEM_VDD MEM_STR
NO S3 : REMOVE
+5V_STBY
D D
PWRGD_PS24,35
R43 4.7K
+5V_STBY
R37 1K 1% /NI
Q13 2N3904 SOT23
C47 3900P 50V X7R /NI
R34 10K 1%
+12V
DUALS_FET_GATE
Q16 2N3904 SOT23
R35 4.7K
+3.3V
G
Q14 FDD8880 TO252
D S
+3.3V_STBY
+12V +5V_STBY
+3.3V_DUAL
+3.3V_DUAL
Q12 SS12/5817 SMA
CT46 100UF 16V 5X11 2mm
+3.3V
CT6 100UF 16V 5X11 2mm /NI
R4
R9
1K 1%
1K 1%
R1
R2
GND
DS
Q8 PHB66N03 TO263
R22
15K
R1 1K 1%
R20 16K 1%
Q3
+5V_STBY
C C
+1.25VTT
9
R316 1K 1% /NI
C504
+
CT10
1UF 16V 0805 Y5V
1000UF 6.3V 8X12
B B
R1
+5V_STBY
CT48 22UF 25V 5X11 2mm
USE RT9173-->R1 1K /NI USE RT9199-->R1 ADD 1K
+1.25VTT
U3
4
VOUT
5
NC
7
NC2
6
VCTNL
RT9173C SOP8EXP
GND2
VIN
NC1
REFEN
GND1
+5V_STBY +2.5VDIMM
1 8 3 2
C505
C506
1UF 10V Y5V
1UF 10V Y5V /NI
R317
CT47
100K
100UF 16V 5X11 2mm
R318 100K
+1.25VTT
+5V_STBY
SLP_S5-18,21
CT5
+
100UF 16V 5X11 2mm CT24
+
100UF 16V 5X11 2mm
R16 10K 1% /NI
R17 4.7K
R14 1K 1%
R15 10K 1%
DS
C12 1UF 16V 0805 Y5V /NI
Q6
G
NDS351N SOT23
C502 10UF 10V 0805 Y5V /NI
Q5 2N3904 SOT23
LM431 SOT23
Vout=Vref (2.5V) X ( 1+R1/R2 ) =2.6136V
BAT54C SOT23
G
D4
R
A C
CT8
C56
+
1000UF 6.3V 8X12
1UF 10V Y5V
VDDIO_SENSE 7
+2.5VDIMM
CONNECT FEEDBACK NEAR LOAD
+2.6VDIMM_FB 37
CONNECT FEEDBACK NEAR LOAD
JDDR_OV>3V
1 2 3
HEADER 1X3 /NI
DEFOUT : PIN(2_3)
+2.5VDIMM
+
CT28 1000UF 6.3V 8X12
+
CT1 1000UF 6.3V 8X12
5
C20
0.1UF 25V Y5V /NI
Title
PLL DELAY / PWRGD / MEM VREG
Size Document Number Rev
Custom
4
3
2
Date: Sheet
CRU51-M7
1
32 39Wednesday, April 12, 2006
1.3
of
A A
Page 33
5
4
3
2
1
NO USE FUNCTION ADD R4 R5-->10K
R319 10K 1% /NI
VIN3
R269 4.7K
KBC'S ROM:1/BUILT IN,0/EXT.
D D
1 2 3
+5V
+3.3V
4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38
+3.3V
R259 10K 1%
+5V
GP35: To generate an event for the function THERMAL SHUTDOWN
C C
B B
A A
CHIP_THERM-7,18
To CK8-04
51K P/U is necessaried on IX version LPC I/O
LPCRST_SIO-16
LPC_DRQ0-16
R271 51K
+3.3V
LPCRST_SIO­LPC_DRQ0-
LPC_SERIRQ16 LPC_FRAME-16,34
BUF_SIO_CLK18
1 2 3 4 5 6
+3.3V
+3.3V
7 8
4.7K 8P4R
1 2 3 4 5 6 7 8
8.2K 8P4R
+5V_STBY
5
FAN124
FAN_CTL124
FAN224
FAN_CTL224 VIN5 34
FAN324
FAN_CTL324
VDIMM137 VDIMM037
LEDD124
LEDD024 VCORE137 VCORE037
LPC_PD#
LPC_SERIRQ LPC_FRAME-
24 MHz
SUSCLK LPC_PD# LPC_DRQ0­ACPI_LED
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 SIO_KBRST­A20GATE LPCCLK_SIO
BUF_SIO_CLK
LPC_AD016,34 LPC_AD116,34 LPC_AD216,34
LPC_AD316,34 SIO_KBRST-18 A20GATE18
LPCCLK_SIO16
RN108
RN104
+5V
DCD1#28
RI1#28
CTS1#28
DTR1#28
RTS1#28
DSR1#28
SOUTA28
SINA28
DTR2# RTS2# DSR2# VCC SOUT2 SIN2 FAN_TAC1 FAN_CTL1 FAN_TAC2/GP52 FAN_CTL2/GP51 FAN_TAC3/GP37 FAN_CTL3/GP36 WTI#/GP35 VID4/GP34 GNDD VID3/GP33 VID2/GP32 VID1/GP31 VID0/GP30 JSBB2/GP27 JSBB1/GP26 JSBCY/GP25 JSBCX/GP24 JSAB2/GP23 JSAB1/GP22 JSACY/GP21 JSACX/GP20 MIDI_OUT/GP17 MIDI_IN/GP16 CIRTX/GP15 [PU51K] SCRRST/GP14 SCRFET#/GP13 SCRIO/GP12 SCRCLK/GP11 VCC LPCPD# LRESET# LDRQ#
R272 8.2K
R275
R258
0 /NI
10K 1%
SUSCLK18
4
R270 4.7K
125
126
127
128
RI2#
CTS2#
DCD2#
LAD0
SERIRQ
LFRAME
39
40
R273 0 R262 0
R274 0 /NI
SUSCLK
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
PD2
PD3
PD4
PD5
PD6
PD7
RI1#
SIN1
LAD1
434241
SOUT1
LAD2
44
GNDD
CTS1#
RTS1#
DTR1#
DSR1#
DCD1#
LAD3
KRST#
GA20
PCICLK
CLKRUN#/GP50
CLKIN
GNDD
DENSEL#
MTRA#
MTRB#
DRVA#
DRVB#
WDATA#
45464748495051525354555657585960616263
103
104
105
106
107
108
109
PD0
PD1
INIT#
STB#
AFD#
ACK#
ERR#
SLIN#
[5VSB PWR WELL] CIRRX/GP55
[5VSB PWR WELL] SCRPRES#/GP10
[5VSB PWR WELL] MCLK [5VSB PWR WELL] MDAT [5VSB PWR WELL] KCLK
[5VSB PWR WELL] KDAT
[5VSB PWR WELL] SCLK/GP40 [5VSB PWR WELL] SDAT/GP41 [5VSB PWR WELL] RING#/GP53
[5VSB PWR WELL] PSON#/GP42
[5VSB PWR WELL] PANSWH#/GP43
[5VSB PWR WELL] PME#/GP54
[5VSB PWR WELL] PWRON#GP44
[5VSB PWR WELL] PSIN/GP45 [5VSB PWR WELL] IRRX/GP46
[VBAT/5VSB PWR WELL] ] COPEN#
DIR#
STEP#
HDSEL#
WGATE#
RDATA#
TRK0#
INDEX#
WPT#
64
3
BUSY
SLCT
VCC VIN0 VIN1 VIN2 VIN3 VIN4 VIN5 VIN6 VIN7
VREF TMPIN1 TMPIN2 TMPIN3
GNDA
GNDD
VBAT
VCCH
IRTX/GP47
DSKCHG#
IT8712FIX
PDR7 PDR6 PDR5 PDR4 PDR3 PDR2 PDR1 PDR0
U14
102 101
PE
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65
PD7 28 PD6 28 PD5 28 PD4 28 PD3 28 PD2 28 PD1 28 PD0 28 STB# 28 ALF# 28 EEROR# 28 INIT# 28 SLCTIN# 28 ACK# 28 BUSY 28 PE 28 SLCT 28
8716 : R1-->BEAD 60 0805 1A 8716 : C1-->1UF
8712 : R1-->0 0805 8716 : C1-->1UF /NI
1UF 10V Y5V /NIC507
R321 0 0805
VIN0 VIN1 VIN2 VIN3 VIN4 VIN5 VIN6 VIN7 VREF
SMB_ALLERT-
IO_PWIN IO_PME-
IO_POUT
R227 1M
FDSKCHG- 25 FWP- 25 FINDEX- 25 FTRAK0- 25 FRDATA- 25 FWEN- 25 FHEAD- 25 FSTEP- 25 FDIR- 25 FWD- 25 FDSB- 25 FDSA- 25 FMOB- 25 FMOA- 25 FRWC- 25
R1
VIN0 34 VIN1 34 VIN2 34 VIN3 34 VIN4 34
VIN6 34 VIN7 34
R226 4.7K
C471
0.1UF 25V Y5V
R322 0 CT49
C487
+
100UF 16V 5X11 2mm
0.1UF 25V Y5V
IRTX 21
+3.3V_VBAT 18,25,37
C1
+5V
SMB_ALLERT- 7 MCLK 25 MDAT 25 KCLK 25 KDAT 25 EXTSMI- 18,21 SLEEPBTNJ 18,21
IRRX 21
8716 : R2-->10 8712 : R2-->0R2
+5V_STBY
EXTSMI­SMB_ALLERT-
VIN7
VREF
C409 1UF 10V Y5V
+3.3V_DUAL
+5V_STBY
R210 4.7K R225 4.7K
2
R320 10K 1% /NI
R3 R4
R223 30K 1%
C418 3900P 50V X7R
R212
4.7K
R215 33 1%
R216 33 1%
C419 470P 50V X7R /NI
+3.3V_DUAL
+5V_STBY
+5V
C490
0.1UF 25V Y5V
From CPU
CPU_THERMDA 7 CPU_THERMDC 7,34
Routed by differential
FB23
BEAD 60 0805 1A
A
GNDA7,34
To POWER LED circuit
ACPI_LED 21
R211 10K 1%
GP54: To generate an event for the function SLEEP BUTTON, POWER ON BY KB/MOUSE,RING-IN
IO_PME- 18
To Power Supplier
PS_ON- 24
From Power Button
PWRBTN- 21
To SB
PWBTOUT- 18
From SB
SLP_S3- 18,24
Title
LPC SUPER I/O IT8712F
Size Document Number Rev
Custom
Date: Sheet
GNDA
GNDA 7,34
A
GP55: To provide BIOS Write Protection Function (Boot Block Lock).
FWH_TBL- 34
+3.3V_DUAL
CRU51-M7
1
33 39Wednesday, April 12, 2006
1.3
of
Page 34
5
4
3
2
1
Voltage Sensing
VCORE +1.2V
VIN033 VIN133 VIN233 VIN333 VIN433 VIN533 VIN633 VIN733
GNDA7,33
R217 10K 1%
C412
0.1UF 25V Y5V /NI
D D
ROM1
LPC_AD[3..0]16,33
LPC_FRAME-16,33
LPCCLK_FLASH16
LPCRST_FLASH-16
FWH_TBL-33
BIOS PROTECT FUNCTION
C C
+3.3V
RN109
1 2 3 4 5 6 7 8
4.7K 8P4R
FWH_WP­FWH_TBL­FLASH_INIT
ADD SOCKET TO (BOM) MOTHERBOARD
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
FWH_WP­FWH_TBL-
RECOVERY HEADER
JUMPER REMOVED
4MB FLASH
13
LAD0
14
LAD1
15
LAD2
17
LAD3
23 24
FRAME* INIT*
31
2
7 8
29
GND
28 16
RES1
LCLK
RES2 RES3
RESET*
RES4 VDD1
WP*
VDD2
TBL*
GPI0 GPI1
MODE
GPI2
CS*
GPI3
GND
GPI4
PLCC SOCKET 32PIN
NORMALJUMPER 1-2
RECOVERY
NC1 NC2 NC3 NC4
1 22 26 27
FLASH_INIT
18 19 20 21
25 32
6 5 4 3 30
12
ID0
11
ID1
10
ID2
9
ID3
+3.3V
+3.3V
C476
C475
0.1UF 25V Y5V /NI
0.1UF 25V Y5V /NI
+3.3V +5V
R218
R219
10K 1%
10K 1%
C413
C414
0.1UF 25V Y5V /NI
0.1UF 25V Y5V /NI
+12V
R208
R220
30K 1%
6.8K
R207 10K 1%
C416
C415
0.1UF 25V Y5V /NI
0.1UF 25V Y5V /NI
+2.5VDIMMA+1.2V_HT
R284
R206
10K 1%
10K 1%
R221 10K 1%
C491
C492
0.1UF 25V Y5V /NI
0.1UF 25V Y5V /NI
A
+5V_STBY
R209
6.8K /NI
R222 10K 1% /NI
AA
C417
0.1UF 25V Y5V /NI
R196
B B
A A
5
FLASH_RECOVERY-18
4
FLASH_RECOVERY-
1K 1%
R198 10K 1%
Title
FLASH ROM & H/W MON
Size Document Number Rev
Custom
3
2
Date: Sheet
CRU51-M7
1
34 39Wednesday, April 12, 2006
1.3
of
Page 35
5
D D
4
3
2
1
MCP51_PWRGD 18
C319
0.1UF 25V Y5V /NI
R231 5.1K
C C
PWRGD_PS24,32
PWRGD_PS
R232 10K 1%
+3.3V_DUAL
+5V_STBY
Q41 2N3904 SOT23
R266 10K 1%
+3.3V_DUAL
G
R268 10K 1%
HT_VLD
DS
Q42 2N7002 SOT23
HT_VLD 16
C489
0.1UF 25V Y5V /NI
POWER SEQUENCING
+5V_STBY
PWRGD_Q1
R264
30K 1%
+5V_STBY
R265
8.2K
Q40
2N3904 SOT23 C486 10UF 10V 0805 Y5V
G
R252 15K
PWRGD_SB
DS
Q39 2N7002 SOT23
PWRGD_SB 18
C479 1UF 10V Y5V
B B
+1.2V_HT
R267 6.34K 1%
A A
HT_BASE
C488
C483
0.1UF 25V Y5V
0.1UF 25V Y5V
C484
0.1UF 25V Y5V
Title
POWER SEQUENCING
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
CRU51-M7
1
35 39Wednesday, April 12, 2006
1.3
of
Page 36
5
4
3
2
1
+5V
RN54
RGMII_RXD019 RGMII_RXD119 RGMII_RXD219 RGMII_RXD319
D D
C C
R279 is reserved for 8201CL/CP LED Mode Change to compatible with BL
R280 is reserved for ensuring 8201BL/CL/CP
B B
latch to UTP Mode.
R281 is reserved for ensuring 8201CL/CP latch to normal operation mode.
RGMII_MDC19 RGMII_MDIO19 RGMII_TXD019 RGMII_TXD119 RGMII_TXD219 RGMII_TXD319 RGMII_TXCTL19
RGMII_TXCLK19
RGMII_RXCTL19
RGMII_RXCLK19
MII_RXER19 BUF_25M19
D20
1N4148 SMD
MII_COL19 MII_CRS19
1 2 3 4 5 6 7 8
RGMII_MDC RGMII_MDIO RGMII_TXD0 RGMII_TXD1 RGMII_TXD2 RGMII_TXD3 RGMII_TXCTL
R119 0
R120 22
MII_COL MII_CRS MII_RXER
LINK_LED LED1 LED2 SPEED_LED LED3
PWFBIN AVDD2
LINK_LED MII_COL
MII_RXER MII_CRS
SPEED_LED
AK
LED3 LED2 LED1
AVDD1
C270
0.1UF 25V Y5V
RESETT RGMII_MDIO
0 8P4R
RXD0 RXD1 RXD2 RXD3
RXD0 RXD1 RXD2 RXD3
U6
25
MDC
26
MDIO
6
TXD0
5
TXD1
4
TXD2
3
TXD3
2
TXEN
7
TXC
22
RXDV
21
RXD0
20
RXD1
19
RXD2
18
RXD3
16
1 23 24 46 47
9 10 12 13 15
8 14
11 17
R128 5.1K /NI R117 5.1K /NI R118 5.1K /NI
1 2 3 4 5 6 7 8
AVDD2
C279
0.1UF 25V Y5V /NI
R131 5.1K R115 1.5K 1%
0.1UF 25V Y5VC263
RTL8201
RXC COL CRS RXER/FXEN X1 X2
LED0/PHYAD0 LED1/PHYAD1 LED2/PHYAD2 LED3/PHYAD3 LED4/PHYAD4
PWFBIN DVDD33
DGND DGND
RTL8201CL TQFP48
PHY address set to 00001h
AVDD2
RN58
5.6K 8P4R
AVDD2
C285
0.1UF 25V Y5V /NI
AVDD2
PWFBOUT
AVDD33
DVDD33
AGND AGND
DGND
TPRX+
TPRX-
TPTX-
TPTX+
RTSET
ISOLATE
RPTR
SPEED
DUPLEX
ANE
LDPS
MII/SNIB/RTT3
RESETB
AVDD2
C280 1UF 16V 0805 Y5V
NC
PWFBOUT
32
AVDD1
36
AVDD2
48 29
35 45
27
RXIN+
31
RXIN-
30
TXD-
33
TXD+
34
R121 2K 1%
28
ISOLATE
43
RPTR
40
SPEED
39
DUPLEX
38
ANE
37
LDPS
41
MII_L
44
RESETT
42
C240
0.1UF 25V Y5V
RTL8201BL:R3-->6.04K 1% RTL8201CL:R3-->2K 1%
R3
R134 0 /NI
RN69
RPTR LDPS SPEED DUPLEX
ISOLATE MII_L ANE LINK_LED
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
5.6K 8P4R
RN71
5.6K 8P4R
RGMII_RESET- 18
AVDD2
AVDD2
RTL8201BL : R1(NC); C1(NC) RTL8201CL/CP : R1(0 ohm); C1(0.1uF)
PWFBOUT
TXD+ TXD­RXIN+ RXIN-
R125 R129 51 1% 51 1%
C250
0.1UF 25V Y5V
AVDD2
PWFBIN
+3.3V_STBY
0.1UF 25V Y5VC500
FOR EMI
R1
R124 0
0.1UF 25V Y5VC248
C1
R135 51 1% R140 51 1%
C261
0.1UF 25V Y5V
NEAR PHYNEAR CONNECTOR
FB16
BEAD 60 0805 1A
C289
0.1UF 25V Y5V
FB14
BEAD 60 0805 1A
C252
0.1UF 25V Y5V
10
R2
R126 0
AVDD1
PWFBOUT
C258
0.1UF 25V Y5V
FB18 BEAD 60 0805 1A
C281 1UF 16V 0805 Y5V /NI
JUSBLAN1B
1
TCT
GLED-
2
TX0+
GLED+
3
TX0-
YLED-
4
TX1+
YLED+
5
TX1-
6
TX2+
7 8 G8 9
C241
0.1UF 25V Y5V /NI
GND GND
TX2-
GND
TX3+ GND TX3­RCT
RJ45USBA CONN
PWFBOUT
0.1UF 25V Y5V C254
RTL8201BL : R2(NC) RTL8201CL/CP : R2(0 ohm)
CT22 22UF 25V 5X11 2mm
AVDD2
0.1UF 25V Y5VC503
FOR EMI
11 12 13 14
G1 G2 G7
+5V
LINK_LED
RN56
330 8P4R
1 2 3 4 5 6 7 8
AVDD2
SPEED_LED
A A
Title
LAN (RTL8100B)
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet
CRU51-M7
1
36 39Wednesday, April 12, 2006
1.3
of
Page 37
5
4
3
2
1
D D
+3.3V
C493
0.1UF 25V Y5V /NI
+3.3V_STBY
+3.3V
R290
RN110
1K 8P4R /NI
K8_VID07 K8_VID17 K8_VID27 K8_VID37 K8_VID47
C C
B B
RN3 1K 8P4R
1 2
3 4
5 6
7 8
VDIMM133 VDIMM033
R291 1K 1% /NI
1 2
3 4
5 6
7 8
OV_DIMM0 OV_DIMM1
OV_VCORE031 OV_VCORE131 +3.3V_VBAT 18,25,33 OV_VCORE231
SMB_SDA7,18,20,22 SMB_SCL7,18,20,22
+5V_STBY+5V_STBY
RN106
7 8 5 6 3 4 1 2
10K 8P4R
U15
1
3V_SB
2
GPIO3
3
GPIO4
4
PGIO5
5
VID_IN0
6
VID_IN1
7
VID_IN2
8
VID_IN3
9
VID_IN4
10
GPIO0
11
GPIO1
12
GPIO2
13
SDA
14
SCL
ATXP3 SSOP28 /NI
ECB
Q44 2N3904 SOT23
IT8203
TEST/ASEL
GPIO6 GPIO7 GPIO8
GPIO9 VID_OUT0 VID_OUT1 VID_OUT2 VID_OUT3 VID_OUT4
SLOTOCC#
RSTOUT#
R2 26.1K 1%
ECB
Q1 BT2222A SOT23
R23 3K 1%
VBAT
1K 1% /NI
28 27 26 25 24 23 22 21 20 19 18 17 16
GND
15
+2.6VDIMM_FB 32
R18
12.1K 1%
ECB
Q9 BT2222A SOT23
ECB
NEAR +2.6V
Q43 2N3904 SOT23
OVL 31
R19
1.5K 1%
K8_VID47
K8_VID37 K8_VID27 K8_VID17 K8_VID07
OV_HT0 38 OV_HT1 38 OV_CHIP0 38 OV_CHIP1 38
VID_OUT1 31 VID_OUT2 31 VID_OUT3 31 VID_OUT4 31
FP_RESET- 18,21
+2.6VDIMM_FB
Default
2.656V
2.72V
2.93V
VCORE_OVL
Default
1.550V
1.602V 1
ECB
Q10
+5V_STBY
RN107
7 8 5 6
VCORE033
A A
VCORE133
3 4 1 2
10K 8P4R
BT2222A SOT23
ECB
Q36 2N3904 SOT23
NEAR PWM
Q7 BT2222A SOT23
ECB
Q37 2N3904 SOT23
ECB
1.653V 01
1.705V
R11 1K 1%
RN1
1K 8P4R
1K -----> FOR IT8203 /NI 1K /NI -----> FOR ADD IT8203
+3.3V_VBAT 18,25,33VID_OUT0 31
R296 10M /NI
10M -----> FOR INTEL CHIP 0 /NI -----> FOR K8 CPU
R297 0 /NI
1UF 10V Y5V -----> FOR INTEL CHIP 0-----> FOR K8 CPU
VDIMM0
1
0
12.82V
0
VCORE0
1
12 34 56 78
VCORE1
VDIMM1
1
1
0
0
1
VID_OUT4 31
VID_OUT3 31 VID_OUT2 31 VID_OUT1 31 VID_OUT0 31
0
0
0
Dimm over volgate
Default
2.72V 1
2.82V 0
2.93V
OV_DIMM0 OV_DIMM1
DIMM0 GPIO 3
R292 22K /NI R294 12.1K 1% /NI
VCORE1
Default
1.550V
1.602V
1.653V
1.705V
VCORE0 GPIO0
1
0
1
0
R293 3K 1% /NI R295 1.5K 1% /NI
GPIO1
1
1
0
0
OVL 31 OVL 31
VCORE_OVL
DIMM1 GPIO 4
1
1 0 1
0
0
+2.6VDIMM_FB 32 +2.6VDIMM_FB 32
OV_VCORE0 OV_VCORE1
Title
OVER VOLTAGE
Size Document Number Rev
C
5
4
3
2
Date: Sheet
CRU51-M7
1
37 39Wednesday, April 12, 2006
1.3
of
Page 38
5
4
3
2
1
CK51 CORE
C318
1UF 16V 0805 Y5V
7
COMP
GND
Q26
2N3904 SOT23
+5V
L5 RH TYPE BEAD
5
BOOT
UGATE
VCC
PHASE
LGATEFB
GND
RT9214 SOP8
3
C_ENBL2
U10
+5V
R156
2.7 0805
VIN_5V
1 2 8
46
+3.3V_DUAL
R155
10K 1%
Q32
FDD8880 TO252
R175 2.7 0805 R166 10
R165 2.7 0805
FDD8880 TO252
Q23
2N3904 SOT23
R153 4.7K
Q29
D13
AK
SS12/5817 SMA
C317 1UF 10V Y5V
C299
0.1UF 25V Y5V INDUCTOR 1UH D
L4
R187
2.7 0805
C333 1000P 50V X7R
+3.3V
ADD AN ENABLE CKT - LOW IS OFF
3.3V MUST BE PWR ON BEFOR 5V OR SOFT START WILL NOT WORK.
+
CT34 1000UF 6.3V 8X12
+
+
CT33
CT29 1000UF 6.3V 8X12
1000UF 6.3V 8X12
+12V Change to +12V_P
HT
+1.2V
+1.2V @ 10A AMPS MAX
R180
R1
100 1%
R183 820 /NI R186 1.6K /NI
R181 200 1%
OV_CHIP1 37 OV_CHIP0 37
Vout=0.8(1+R1/R2)----for RT9202 R1 , R2
R2
+2.5VDDA
DS
Q30
2N7002 SOT23
REF_2.5V
+1.2V
+
CT27 100UF 16V 5X11 2mm
阻值不
+1.2V +1.25V +1.3V +1.35V
+12V_P
G
+12V_P
要選超過
R182
5.1K
Q31
2N3904 SOT23
R185 4.7K
K ohm
OV_CHIP0 OV_CHIP1CORE VOLTAGE
11 0
1 10 00
+5V
R184
5.1K
Q33
2N3904 SOT23
+3.3V
+1.2V_HT
BC13
0.1UF 25V Y5V
C334 1UF 16V 0805 Y5V
R188 47K
+5V_STBY
+3.3V_STBY
+
CT25 100UF 16V 5X11 2mm
Q22
I O A
AZ1117H-ADJ SOT-223
Vout=Vref (1.25V) X ( 1+R2/R1 ) =3.3V
HTVDD_EN 16
R148
R1
200 1%
+
R147 330
R2
CT21 100UF 16V 5X11 2mm
D D
RT9202NC/RT9214
R173 15K
R172
RT9202/RT9214NC
C C
B B
15K /NI
R171
20K /NI C323
4700P 50V X7R /NI
接在一起用相同的
VIA
C322 15P 50V NPO /NI
C321 R174 680
V1
10
R167 649 1%
A A
9
Vout=V1=1.22V
R298 412 1% /NI
OV_HT037
R299 130 1% /NI
OV_HT137
5
4
3
411
+
-
R310 0
0.1UF 25V Y5V
8
U11C LM324 SO14
G
DS
+1.2V_HT
+
CT15 1000UF 6.3V 8X12
+
CT13 100UF 16V 5X11 2mm
Q19 FDD8880 TO252
HT
+1.2V_HT @ 850MA AMPS MAX
2
Title
C51 CORE
Size Document Number Rev
Custom
Date: Sheet
CRU51-M7
1
38 39Wednesday, April 12, 2006
of
1.3
Page 39
5
D D
C C
4
JDDR_OV>3V(2_3) JUMPER 2P R /NI
JUSBV1(1_2) JUMPER 2P R
JUSBV2(1_2) JUMPER 2P R
JFAUDIO1(5_6) JUMPER 2P B
JFAUDIO1(9_10) JUMPER 2P B
JFAUDIO1(11_12) JUMPER 2P B
JFAUDIO1(13_14) JUMPER 2P B
JCMOS1(1_2) JUMPER 2P B
(BAT1)
電池
3V BATTERY SONY
(ROM1)
FLASH ROM
PLCC 4MF+L (CPU1)
3
New JPANEL1 JPANEL1 2*12
JPANEL1(2_4) HEADER 1X2
JPANEL1(1_3_5_7)
SPK
2
JPANEL1(14_16)
HEADER 1X2_3 JPANEL1(6_8_10_12) PLED
HLED
JPANEL1(13_15)
RST_3
JPANEL1(9_11)
含
IR
JPANEL1(19_24) IR
1
PCB
PCB
B B
A A
5
CRU51-M7 1.3 (PCB)
泡棉
POLON 245x220
4
K8RM
(U8)
北橋散熱片
NBHN
(U12)
南橋散熱片
SBNP SMALL
Title
BOM
Size Document Number Rev
B
3
2
Date: Sheet
CRU51-M7
1
of
39 39Monday, April 10, 2006
1.3
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