Ericsson PBM3960-1NS, PBM3960-1QNS, PBM3960-1QNT Datasheet

Description

PBM 3960/1 is a dual 7-bit+sign, Digital-to-Analog Converter (DAC) especially
developed to be used together with the PBL 3771/1, Precision Stepper Motor driver
in micro-stepping applications. The circuit has a set of input registers connected to an
8-bit data port for easy interfacing directly to a microprocessor. Two registers are
used to store the data for each seven-bit DAC, the eighth bit being a sign bit (sign/
magnitude coding). A second set of registers are used for automatic fast/slow current
decay control in conjunction with the PBL 3771/1, a feature that greatly improves
high-speed micro-stepping performance. The PBM 3960/1 is fabricated in a high­speed CMOS process.

Key Features

• Analog control voltages from 3 V
down to 0.0 V.

• High-speed microprocessor interface.

• Automatic fast/slow current decay
control.

• Full-scale error ±1 LSB.

• Interfaces directly with TTL levels and
CMOS devices.

• Fast conversion speed, 3 µs.

• Matches PBL 3771.

PBM 3960/1

Microstepping Controller/

Dual Digital-to-Analog Converter

February 1999

Figure 1. Block Diagram.

22-pin plastic DIP

28-pin plastic PLCC

V

DD

V

Ref

CS

A0

A1

WR

D7 - D0

RESET

V

ss

Sign

2

CD

2

DA

2

Sign

1

CD

1

DA

1

E

C

D

R

E

C

D

E

C

D

R

R

E

C

D

R

Digit
Comp

Digit
Comp

E

C

D

R

E

C

D

R

D / A

D / A

E1

E2

E3

E4

POR

E1

E4

PBM 3960/1

DA- Data 1

DA- Data 2

Level 1

Level 2

R

PBM3960/1

PBM

3960/1

PBM 3960/1

2

Maximum Ratings

Parameter Pin no. * Symbol Min Max Unit

Voltage

Supply 5 V

DD

6V

Logic inputs 6- 17 V

I

-0.3 VDD+ 0.3 V

Reference input 1 V

R

-0.3 VDD+ 0.3 V

Current

Logic inputs 6- 17 I

I

-0.4 +0.4 mA

Temperature

Storage temperature T

S

-55 +150 °C

Operating ambient temperature T

J

-20 +85 °C

* refers to DIP package

Recommended Operating Conditions

Figure 2. Timing.

Figure 3. Timing of Reset.

t

t

t

t

t

tt

CS

A0-A1

D0-D7

WR

DA

Sign, CD

cs

ch

as ah

ds

dh

WR

t

DAC

t

pwr

t

t

Reset

Sign, CD

res

pres

Parameter Symbol Min Typ Max Unit

Supply voltage V

DD

4.75 5.0 5.25 V

Reference voltage V

R

0 2.5 3.0 V

PBM 3960/1

3

Electrical Characteristics

Electrical characteristics over recommended operating conditions.

Ref.

Parameter Symbol fig Conditions Min Typ Max Unit

Logic Inputs

Reset logic HIGH input voltage V

IHR

3.5 V

Reset logic LOW input voltage V

ILR

0.1 V

Logic HIGH input voltage V

IH

2.0 V

Logic LOW input voltage V

IL

0.8 V

Reset input current I

IR

VSS < VIR < V

DD

-0.01 1 mA

Input current, other inputs I

I

VSS < VI < V

DD

-1 1 µA

Input capacitance 3pF

Internal Timing Characteristics

Address setup time t

as

2 Valid for A0, A1 60 ns

Data setup time t

ds

2 Valid for D0 - D7 60 ns

Chip select setup time t

cs

270ns

Address hold time t

ah

20ns

Data hold time t

dh

20ns

Chip select hold time t

ch

20ns

Write cycle length t

WR

250ns

Reset cycle lenght t

R

380ns

Reference Input

Input resistance R

Ref

69 kΩ

Logic Outputs

Logic HIGH output current I

OH

VO = 2.4 V -13 -5 mA

Logic LOW output current I

OL

VO = 0.4 V 1.7 5 mA

Write propagation delay t

p

WR

2 From positive edge of WR. 30 100 ns

outputs valid, C

load

= 120 pF

Reset propagation delay t

p

R

3 From positive edge of Reset to 60 150 ns

outputs valid, C

load

= 120 pF

DAC Outputs Reset open, V

Ref

= 2.5 V

Nominal output voltage V

DA

0V

Ref

- 1LSB V
Resolution 7 Bits
Offset error 7 0.2 0.5 LSB
Gain error 7 0.1 0.5 LSB
Endpoint nonlinearity 7 0.2 0.5 LSB
Differential nonlinearity 5, 6 0.2 0.5 LSB
Load error (V

DA

, unloaded - VDA, loaded) 0.1 0.5 LSB

R

load

= 2.5 kΩ, Code 127 to DAC

Power supply sensitivity Code 127 to DAC 0.1 0.3 LSB

4.75 V < V

DD

< 5.25 V

Conversion speed t

DAC

2 For a full-scale transition to ±0.5 LSB 3 8 µs

of final value, R

load

= 2.5 kohm, C

load

= 50 pF.