EPOX P55TV2 User Manual
Introduction 1-1
Chapter 1
Introduction
The P55TV2 mainboard is a high performance system hardware based on
Intel Pentium processor and is equipped with four PCI slots, four standard
ISA slots, Ultra I/O controller and dual port PCI-IDE connectors for the
future expansion. The hardware dimension is 220mm x 260mm with a fourlayer-design technology.
Specification
Intel 82430VX PCIset chipset.
Intel Pentium Processor, Pentium Processor with MMX technology,
AMD K5/K6 and Cyrix M1/M2 operating at 90 ~ 266 MHz with 321 ZIF
socket 7 provides scalability to accept faster processors in the future.
Supports up to 128 MegaBytes of DRAM (a minimum of 8 MB) on board
(72 Pins SIMM x 4, 168 Pins DIMM x 2). BIOS will autometically detect
and configure FP DRAM, EDO DRAM and SDRAM (Refer to Chapter 23, System Memory Configuration).
R
R
R
TM
Supports Onboard Pipelined Burst synchronous L2 Write Back Cache.
The cache memory combination can be 256KB/512KB (32KB*32 and
64KB*32 SRAM, respectively).
Supports four 16 bits ISA slots, four 32 bits PCI slots, and provides two
independent high performance PCI IDE interfaces capable of supporting
PIO Mode 3 and Mode 4 devices. The P55TV2 supports four PCI Bus
Masters and a jumperless PCI INT# control scheme which reduces configuration confusion when plugging in PCI I/O controller card(s).
Supports AT API (e.g., CD-ROM) devices on both IDE interfaces.
Supports 1 floppy port, 1 parallel port (EPP,ECP port), 2 serial ports
(16550 Fast UART compatible) and 2 USB ports.
Supports a PS/2 style mouse and standard AT style keyboard connectors.
Supports Award Plug & Play BIOS. The BIOS is stored in Flash EPROM
form. It provides better upgradability for the system.
Supports CPU Hardware sleep and SMM (System Management Mode).
The P55TV2 utilizes a Lithium battery which provides environmental
protection and longer battery life.
1-2 P55TV2
BIOS
P55TV2 Layout
<
JP3
JP2
W83977
1
CN1
PRINTER
USB Conn.
COM2
1
K/B
J1
CONN.
Power Conn.
COM1
JP5
13
26
2 1
JP6
Note : Means Pin 1
GND
8 7
HD-LED TB-LED G-LED RESETSLEEP SPEAKER KEYLOCK
1
14
+12V
GND
J3
Socket 7
PCI#4
PCI#3
Intel
82371SB
PCI#2
82437VX
J2
PCI#1
Intel
FDD CONN.
SIMM 3
SIMM 4
Secondary IDE
Primary IDE
BANK0 BANK1
64
K*32
64K*32
SIMM 1
SIMM 2
DIMM 2
82438VX
82438VX
DIMM 1
1 2
82438
7 8
JP1
Figure 1-1
Hardware Design 2-1
Chapter 2
Hardware design
2-1 Overview
The P55TV2 is designed with Intel 82430VX PCIset chipset which is developed by
INTEL Corporation to fully support Pentium Processor PCI/ISA system. The Intel
82430VX PCIset chipset provides increased integration and improved performance
designs. The chipset provides an integrated IDE controller with two high performance
IDE interfaces for up to four IDE devices (hard devices, CD-ROM device, etc). The
PnP Ultra I/O controller provides the standard PC I/O functions including: floppy
interface, two 16 Byte FIFO serial ports and one EPP/ECP capable parallel port. The
P55TV2 layout is shown in the previous page for user's reference. Care must be
taken when inserting memory modules, inserting CPU or even plugging PCI card into
the associated slots to avoid damaging any circuits or sockets on board. A cooling
fan is strongly recommended when installing P54C/P54CTB/P55C/K5/K6/6x86/6x86L
processor due to possible overheat.
The P55TV2 supports a minimum of 8MB of System Memory and a maximum of
128MB while L2 Cache can be 256KB/512KB synchronous SRAM Onboard to
increase system performance (Refer to Page 2-10 Cache Memory Configuration
for the details).
R
The P55TV2 supports standard Fast Page, EDO (Extended Data Out or Hyper Page
Mode) or synchronous DRAM. The P55TV2 provides four 72-pin SIMM and two
168-pins DIMM sites for memory expansion. Each socket supports 1M x 32(4MB), 2M
x 32(8MB), 4M x 32(16MB), and 8M x 32(32MB) single-sided or double-sided memory
modules. The memory timing requires 70 ns Fast page devices or 60 ns EDO DRAM.
Memory parity generation and checking are not supported. (DRAM Modules may be
parity[x 36] or non-parity[x 32].
The P55TV2 supports Onboard two PCI IDE connectors, and BIOS detects IDE
harddisk type automatically.
The P55TV2 supports Award Plug & Play BIOS for ISA and PCI cards. The BIOS is
located in Flash EPROM which is a technology to easily revise/upgrade BIOS
through software.
The P55TV2 has been designed with Baby AT form-factor. The mainboard layout is
shown in Figure 1-1.
2-2 P55TV2
2-2 Connectors and Jumpers
This section describes all of the connectors and jumpers built into the mainboard.
Please refer to Figure 1-1 (page 1-2) for the location of each connector and
jumper. The following figures shows connector and jumper setting. means
connecting to pins 1&2 and means connecting to pins 2&3.
means setting jumpers with two pins open, and means setting
jumpers with two pins close.
J2 KeyLock - Keyboard lock switch & Power LED connector.
1
1.Power LED(+)
2.N/C
3.GND
4.Keylock
5
5.GND
Speaker - connect to the system's speaker for beeping
7. Speaker
8. N/C
9. GND
10. VCC
Reset - Closed to restart system
Sleep/Resume switch : Closed to enter sleep mode
(A keystrobe or mouse movement will instantly "wake up".)
+
+
Turbo LED indicator - LED ON when higher speed is selected
+
1 3 J3 The Power Supply (+12V) of the CPU Cooling FAN
Power Saving LED indicator - LED ON when system is in any
saving mode
Harddisk LED indicator - LED ON when Onboard PCI IDE
Harddisks activites
1.GND
2.+12V
3.GND
1J1 PS/2 MOUSE CONNECTOR
1 . Data (Red Wire)
2 . Clock (Blue Wire)
3 . GND (Green)
4 . NC
5
5 . VCC (Yellow)
1J4 IrDA/ASK IR CONNECTOR
1 . VCC
2 . NC
3 . IRRX
4 . GND
5
5 . IRTX
1 2
CN1 USB CONNECTOR
Reserved for USB port Adapter
(refer to APPENDIX B:I/O Connectors)
Hardware Design 2-3
16 15
1 2
JP1 DIMM Working Voltage Selection
1-2, 3-4 : 5V
5-6, 7-8 : 3.3V (Default)
(Refer to 2-4 : Memory Configuration for the detail)
7 8
JP2 EPROM BIOS Selection
1
1-2 : 5V Flash ROM (Default)
3
JP3 BIOS Flash Mode Selection
1
2-3 : 12V Flash ROM
1-2 : Normal operation (Default)
3
2-3 : BootBlock Flash
2-4 P55TV2
JP5 : CPU Clock Rate Selection (Single Jumper)
CPU
Pentium Bus Freqency
Pentium MMX x Cyrix 6x86(L) / 6x86MX
1 14
13 26
AMD K5 / K6 Multiplier IBM 6x86(L) / 6x86MX
JP5
1-14 90MHz 60MHz x 1.5
2-15 100MHz 66MHz x 1.5
3-16 120MHz 60MHz x 2 6x86/L-PR150
4-17 133MHz 66MHz x 2 6x86/L/MX-PR166
5-18 150MHz 60MHz x 2.5 6x86MX-PR166
6-19 166MHz 66MHz x 2.5 6x86MX-PR200
7-20 188MHz 75MHz x 2.5 6x86MX-PR233
8-21 200MHz 66MHz x 3 6x86MX-PR233
9-22 225MHz 75MHz x 3 6x86MX-PR266
10-23 233MHz 66MHz x 3.5 6x86MX-PR266
11-24 266MHz 66MHz x 4
*
12-25 110MHz 55MHz x 2 6x86/L-PR133
13-26 150MHz 75MHz x 2 6x86/L/MX-PR200
*
*
*
*
These jumper settings are reserved for the future
*
CPU versions. when the future CPUversions are
ready and suitable for this mainboard, these jumper
settings will be correctly updated.
JP6 : CPU Vcore voltage selection : For Pentium MMX Processor, AMD K6
and Cyrix 6x86L/MX
1 2
1-2 : 2.8V for Pentium MMX Processor and Cyrix 6x86L
3-4 : 2.9V for AMD K6-PR2-166/200 and Cyrix 6x86MX
5-6 : 3.2V for AMD K6-PR2-233/266
7-8 : 3.5V for Pentium, AMD K5 and Cyrix 6x86
7 8
Hardware Design 2-5
2-3
Real Time Clock Battery Replacement
The battery can be replaced with an equivalent coin lithium battery
such as Sanyo / Panasonic CR2032. Please follow the following steps to
replace the battery.
1
2
3
4
1.Remove
2.Insert
+
+
+
+
1
2
3
+
+
+
2-6 P55TV2
2-4 System Memory Configuration
The P55TV2 supports different types of settings for the system memory. The
memory configuration does not need jumper or hardware setting. The following
tables provide all possible memory combinations.
DIMM1
DIMM2
SIMM1
SIMM2
SIMM3
SIMM4
SIMM3,4 SIMM1,2 DIMM2 DIMM1 STATUS
(BANK 0) (BANK 1) (BANK 0) (BANK1)
Installed
None
None
None
Installed
None
Installed
None
Installed
None
Installed
Installed
None
Installed
None
None
Installed
Installed
None
None
None
Installed
Installed
Installed
None
None
Installed
None
None
Installed
None
Installed
Installed
None
Installed
Installed
BANK 1
>
BANK 0
>
BANK 1 5V FP / EDO DRAM
>
BANK 0 5V FP / EDO DRAM
>
Synchronous DRAM
or FP / EDO DRAM
Synchronous DRAM
or FP / EDO DRAM
None
None
None
Installed
None
None
Installed
Installed
None
Installed
None
Installed
OK
OK
OK
OK
OK
OK
OK
OK
Not allowed
Not allowed
Not allowed
Not allowed
NOTE : 1.The P55TV2 supports both Fast Page DRAM and EDO DRAM SIMMs,but
they cannot be used in the same memory bank.
2.The KEY ZOOM of the DIMM socket is 3.3V/Unbuffered
DRAM chip
LEFT KEY ZONE CENTER KEY ZONE
(UNBUFFERED)
(3.3 V DRAM)
Hardware Design 2-7
The P55TV2 supports two 168-pin DIMM module sockets to extpand system
memory size.You can install (3.3V/Unbuffered) Fast Page, EDO or
Synchronous DRAM. Besides, to support 5V FP and EDO DRAM with DIMM
socket, the P55TV2 provides JP1 to allow user using 3.3V/Unbuffered DIMM
module with 5V FP and EDO DRAM chips. The setting of the JP1 as follow:
1 2
JP1 DIMM Working Voltage Selection
1-2, 3-4 : For 5V FP and EDO DRAM
5-6, 7-8 : For 3.3V FP, EDO and Synchronous DRAM
7 8
When you plug a DIMM module into a 168-pin dual readout socket, you must
make sure that the key zoom of the DIMM module is 3.3V/Unbuffered and
supports Intel Pentium Processor System.
R
Memory Configuration Table 1
4M x 2 (8 MB)
4M x 2 (8 MB)
4M x 2 (8 MB)
4M x 2 (8 MB)
4M x 2 (8 MB)
8M x 2 (16 MB)
8M x 2 (16 MB)
8M x 2 (16 MB)
8M x 2 (16 MB)
8M x 2 (16 MB)
16M x 2 (32 MB)
16M x 2 (32 MB)
16M x 2 (32 MB)
16M x 2 (32 MB)
16M x 2 (32 MB)
32M x 2 (64 MB)
32M x 2 (64 MB)
32M x 2 (64 MB)
32M x 2 (64 MB)
32M x 2 (64 MB)
SIMM1,2(Bank1)
Empty
4M x 2 (8 MB)
8M x 2 (16 MB)
16M x 2 (32 MB)
32M x 2 (64 MB)
Empty
4M x 2 (8 MB)
8M x 2 (16 MB)
16M x 2 (32 MB)
32M x 2 (64 MB)
Empty
4M x 2 (8 MB)
8M x 2 (16 MB)
16M x 2 (32 MB)
32M x 2 (64 MB)
Empty
4M x 2 (8 MB)
8M x 2 (16 MB)
16M x 2 (32 MB)
32M x 2 (64 MB)
DIMM2(Bank0)
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
DIMM1(Bank1)SIMM3,4(Bank0)
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
EmptyEmpty
TOTAL
8MB
16MB
24MB
40MB
72MB
16MB
24MB
32MB
48MB
80MB
32MB
40MB
48MB
64MB
96MB
64MB
72MB
80MB
96MB
128MB
2-8 P55TV2
Memory Configuration Table 2
SIMM3,4(Bank0)
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
SIMM1,2(Bank1)
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
DIMM2(Bank0)
8MB
8MB
8MB
8MB
8MB
16MB
16MB
16MB
16MB
16MB
32MB
32MB
32MB
32MB
32MB
64MB
64MB
64MB
64MB
64MB
DIMM1(Bank1)
Empty
8MB
16MB
32MB
64MB
Empty
8MB
16MB
32MB
64MB
Empty
8MB
16MB
32MB
64MB
Empty
8MB
16MB
32MB
64MBEmpty
TOTAL
8MB
16MB
24MB
40MB
72MB
16MB
24MB
32MB
48MB
80MB
32MB
40MB
48MB
64MB
96MB
64MB
72MB
80MB
96MB
128MB
Memory Configuration Table 3
SIMM3,4(Bank0) DIMM1(Bank1)
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
SIMM1,2(Bank1)
Empty Empty
4M x 2 (8 MB)
8M x 2 (16 MB)
16M x 2 (32 MB)
32M x 2 (64 MB)
Empty
4M x 2 (8 MB)
8M x 2 (16 MB)
16M x 2 (32 MB)
32M x 2 (64 MB)Empty
DIMM2(Bank0)
8MB
8MB
8MB
8MB
8MB
16MB
16MB
16MB
16MB
16MB
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
TOTAL
8MB
16MB
24MB
40MB
72MB
16MB
24MB
32MB
48MB
80MB
Table 3(CONT.)
Memory Configuration Table 3 (CONT.)
SIMM3,4(Bank0)
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
SIMM1,2(Bank1)
Empty
4M x 2 (8 MB)
8M x 2 (16 MB)
16M x 2 (32 MB)
32M x 2 (64 MB)
Empty
4M x 2 (8 MB)
8M x 2 (16 MB)
16M x 2 (32 MB)
32M x 2 (64 MB)
DIMM2(Bank0)
32MB
32MB
32MB
32MB
32MB
64MB
64MB
64MB
64MB
64MB
Memory Configuration Table 4
SIMM1,2(Bank1)SIMM3,4(Bank0) DIMM2(Bank0) DIMM1(Bank1)
Empty
4M x 2 (8 MB)
8M x 2 (16 MB)
16M x 2 (32 MB)
32M x 2 (64 MB)
Empty
4M x 2 (8 MB)
8M x 2 (16 MB)
16M x 2 (32 MB)
32M x 2 (64 MB)
Empty
4M x 2 (8 MB)
8M x 2 (16 MB)
16M x 2 (32 MB)
32M x 2 (64 MB)
Empty
4M x 2 (8 MB)
8M x 2 (16 MB)
16M x 2 (32 MB)
32M x 2 (64 MB)
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty 64MB 128MBEmpty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Hardware Design 2-9
DIMM1(Bank1)
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
Empty
8MB
8MB
8MB
8MB
8MB
16MB
16MB
16MB
16MB
16MB
32MB
32MB
32MB
32MB
32MB
64MB
64MB
64MB
64MB
TOTAL
32MB
40MB
48MB
64MB
96MB
64MB
72MB
80MB
96MB
128MB
TOTAL
8MB
16MB
24MB
40MB
72MB
16MB
24MB
32MB
48MB
80MB
32MB
40MB
48MB
64MB
96MB
64MB
72MB
80MB
96MB
2-10 P55TV2
Memory Configuration Table 5
SIMM1,2(Bank1)SIMM3,4(Bank0)
4M x 2 (8 MB) 8MB
4M x 2 (8 MB)
4M x 2 (8 MB)
16M x 2 (32 MB)
16M x 2 (32 MB)
16M x 2 (32 MB)
Note :
1, Assume all DRAM and SDRAM in Table 5 are single-side.
2, The P55TV2 Supports and extends many memory configurations on its 4 SIMM and
2 DIMM sites. The memory size of any configuration can be combined flexibly.
The above tables only list the basic memory configurations for your reference.
Many configurations are not listed, you may use other configurations not listed
on the above. BIOS will detect your memory configuration automatically.
3, The 70ns Fast Page Mode or 60ns EDO DRAM is necessary.
4,
Usually, the DIMM2 and SIMM3&4 occupy the same memory block, Bank 0. They
cannot be installed at the same time. Likewise, the DIMM1 and SIMM1&2 occupy
the same memory block, Bank1. They cannot be installed at the same time either.
However with a special design to expand memory, the P55TV2 allows you to
upgrade single-side DRAM at DIMM2 (Bank0) and DIMM1 (Bank1), if you use
single-side DRAM at the SIMM3&4 and SIMM1&2.
Regarding single-side or double-side DRAM/SDRAM, please contact your DRAM/
SDRAM suppliers for the details,
4M x 2 (8 MB)
4M x 2 (8 MB)
4M x 2 (8 MB)
16M x 2 (32 MB)
16M x 2 (32 MB)
16M x 2 (32 MB)
DIMM2(Bank0)
8MB
32MB
8MB
8MB
32MB
DIMM1(Bank1) TOTAL
8MB
32MB
32MB
8MB
32MB
32MB
32MB
56MB
72MB
80MB
104MB
128MB
2-5 Cache Memory Configuration
The second level (L2) cache is installed in the mainboard to increase the system
performance. The P55TV2 supports 512KB cache (piplined burst SRAM).
U22
16K*8
TAG SRAM
64K*32
DATA SRAM
U16
64K*32
U21
2-6 Integrated PCI Bridge
Hardware Design 2-11
The P55TV2 utilizes Intel's 430VX PCIset chipset to support Intel Pentium Proces-
R
sor PCI/ISA system. The Intel 82430VX PCIset chipset consists of one 82437VX
system controller (TVC), two 82438VX Data Path (TDP) devices, and one 82371SB
PCI ISA/IDE Accelerator (PIIX3) bridge chip. It provides an interface which translates CPU cycle into PCI bus cycle and PCI burst read/write capability. In addition, it
provides high performance PCI arbiter or supports four PCI Masters, Rotating
Priority Mechanism, and Hidden Arbitration Scheme Minimizes Arbitration Overhead. The 82371SB(PIIX3) supports PCI Specification Revision 2.1 Compliant and
contains a Universal Serial Bus interface with both host and hub control functions.
The P55TV2 reserves USB connector to provide two USB ports for serial transfer at
12 or 1.5 Mbit/sec. This will supports legacy keyboard and mouse software with
USB-Base Keyboard and mouse.
There are four interrupts in each PCI slot : INTA#, INTB#, INTC#, and INTD#, since
the P55TV2 adapts the PCI auto-configuration with the system BIOS Setup utility.
When the system is turned on after adding a PCI add-in card, the BIOS automatically
configure interrupts, DMA channels, I/O space, and other paramaters. You do not
have to configure jumpers or worry about potential resource conflicts. Because PCI
cards use the same interrupt resource as ISA cards, you must specify the interrupts
used by ISA add-in cards in the BIOS Setup utility.
If a "Legacy card" (such as paddle card and cable) is plugged into the ISA slot the
following modifications in the ROM SETUP UTILITY become necessary. First,
enter PCI CONFIGURATION SETUP utility from ROM SETUP UTILITY
main menu to set the "PCI IDE IRQ MAP TO : ISA".
Second, enter CHIPSET FEATURES SETUP UTILITY from ROM SETUP
UTILITY main menu and set the "Onboard Primary PCI IDE: Disabled and
Onboard Secondary PCI IDE: Disabled." When you plugg the PCI/ISA IDE card
into the system, You should Disabled Onboard Primary and Secondary PCI IDE
from CHIPSET FEATURES SETUP UTILITY too.
you can set the system interrupt request (IRQ) on some "Legacy cardswhich have
no paddle card and cable" (refer to user's manual of the card) to a proper system
IRQ level (In general, the card's Primary is assigned to INTA and Secondary is
assigned to INTB). If the card is plugged into slot 1(marked PCI#1), you cannot
use second slot (marked PCI#2) because the Secondary INT signal takes INTB
from the slot (Refer to Page 3-12 for circuit diagram). The user then enters PCI
CONFIGURATION SETUP utility from ROM SETUP UTILITY main menu
and sets the "PCI IDE IRQ MAP TO : PCI-Slot 1" (depend on the slot # where
the Legacy card is plugged).
.
Loading...