A Server System Infrastructure (SSI) Specification
For Entry Chassis Power Supplies
Version 1. 2
SSI
EPS2U Power Supply Design Guide, V1.2
Disclaimer:
THIS SPECIFICATION IS PROVIDED "AS IS" WITH NO WARRANTIES
WHATSOEVER, INCLUDING ANY WARRANTY OF MERCHANTABILITY,
NONINFRINGEMENT, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANY
WARRANTY OTHERWISE ARISING OUT OF ANY PROPOSAL, SPECIFICATION OR
SAMPLE. WITHOUT LIMITATION, THE PROMOTERS (Intel Corporation, NEC
Corporation, Dell Computer Corporation, Data General a division of EMC Corporation,
Compaq Computer Corporation, Silicon Graphics Inc., and International Business
Machines Corporation) DISCLAIM ALL LIABILITY FOR COST OF PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES, LOST PROFITS, LOSS OF USE, LOSS OF
DATA OR ANY INCIDENTAL, CONSEQUENTIAL, DIRECT, INDIRECT, OR SPECIAL
AMAGES, WHETHER UNDER CONTRACT, TORT, WARRANTY OR OTHERWISE,
ARISING IN ANY WAY OUT OF USE OR RELIANCE UPON THIS SPECIFICATION OR
ANY INFORMATION HEREIN.
The Promoters disclaim all liability, including liability for infringement of any proprietary
rights, relating to use of information in this specification. No license, express or implied,
by estoppel or otherwise, to any intellectual property rights is granted herein.
This specification and the information herein is the confidential and trade secret
information of the Promoters. Use, reproduction and disclosure of this specification and
the information herein is subject to the terms of the S.S.I. Specification Adopter's
Agreement.
Copyright Intel Corporation, Dell Computer Corporation, Compaq Computer Corporation, Silicon Graphics
Inc., International Business Machines Corporation, 2000.
5.4 AC Line Dropout.............................................................................................................................. 10
5.5 AC Line Fuse.................................................................................................................................. 10
5.6 AC Inrush........................................................................................................................................ 10
5.7 AC Line Transient Specification........................................................................................................ 11
5.8 AC Line Fast Transient Specification ................................................................................................ 11
6 DC Output Specification ................................................................................................................... 12
7.1 Current Limit ................................................................................................................................... 22
Table 2: AC Input Rating................................................................................................................................9
Table 3: AC Line Sag Transient Performance................................................................................................ 11
Table 4: AC Line Surge Transient Performance............................................................................................. 11
Table 5: P1 Baseboard Power Connector...................................................................................................... 12
Table 6: Processor Power Connector ............................................................................................................ 12
Table 7: Peripheral Power Connectors .......................................................................................................... 13
Table 8: P9 Floppy Power Connector ............................................................................................................ 13
Table 9: Server Signal Connector ................................................................................................................. 13
Table 10: 480 W Load Ratings...................................................................................................................... 15
Table 11: Voltage Regulation Limits.............................................................................................................. 16
Table 18: Over Current Protection .................................................................................................................22
Table 19: Over Current Protection .................................................................................................................23
Table 20: Over Voltage Limits .......................................................................................................................23
Table 21: PSON# Signal Characteristic.......................................................................................................... 24
Table 22: PWOK Signal Characteristics ........................................................................................................ 25
Table 23: FRU Device Information ................................................................................................................ 26
Table 24: FRU Device Product Information Area............................................................................................ 26
Table 25: FRU Device Product Information Area............................................................................................ 27
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EPS2U Power Supply Design Guide, V1.2
1 Purpose
This 2U Rack Power Supply Specification defines a common power supply used in entry -level servers. This
supply may range typically from 400 to 700 watts and is used in a non-redundant configuration. The scope of this
document defines the requirement s for one supply in this power range. The parameters of this supply are defined
in this specification for open industry use.
This specification defines a 480 W power supply with 6 outputs; 3.3 V, 5 V, 12V1, 12V2, -12 V, and 5 VSB.
Because of its connector leads, the power supply is not intended to be a hot swap type of power supply.
2 Conceptual Overview
In the Entry server market, the bulk power system must source power on several output rails.
These rails are typically as follows:
• +3.3 V
• +5 V
• +12 V
• –12 V
• 5 V standby
NOTE
Local DC-DC converters shall be utilized for processor power, and will ideally convert power from the +12 V
rail, however, they may also convert power from other rails.
The bulk power system may be a n+1 redundant power system or a non-redundant power system.
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EPS2U Power Supply Design Guide, V1.2
3 Definitions/Terms/Acronyms
Required The status given to items within this design guide, which are required to
meet SSI guidelines and a large majority of system applications.
Recommended The status given to items within this design guide which are not required to
meet SSI guidelines, however, are required by many system applications.
Optional The status given to items within this design guide, which are not required to
Autoranging A power supply that automatically senses and adjusts itself to the proper
CFM Cubic Feet per Minute (airflow).
Dropout A condition that allows the line voltage input to the power supply to drop to
Latch Off A power supply, after detecting a fault condition, shuts itself off. Even if the
Monotonically A waveform changes from one level to another in a steady fashion, without
Noise The periodic or random signals over frequency band of 0 Hz to 20 MHz.
Overcurrent A condition in which a supply attempts to provide more output current than
PFC Power Factor Corrected.
Ripple The periodic or random signals over a frequency band of 0 Hz to 20 MHz.
meet SSI guidelines, however, some system applications may optionally
use these features.
input voltage range (110 VAC or 220 VAC). No manual switches or
manual adjustments are needed.
below the minimum operating voltage.
fault condition disappears, the supply does not restart unless manual or
electronic intervention occurs. Manual intervention commonly includes
briefly removing and then reconnecting the supply, or it could be done
through a switch. Electronic intervention could be done by electronic
signals in the Server System.
intermediate retracement or oscillation.
the amount for which it is rated. This commonly occurs if there is a "short
circuit" condition in the load attached to the supply.
Rise Time Rise time is defined as the time it takes any output voltage to rise from
Sag The condition where the AC line voltage drops below the nominal voltage
Surge The condition where the AC line voltage rises above nominal voltage.
VSB or Standby Voltage An output voltage that is present whenever AC power is applied to the AC
MTBF Mean time between failure.
PWOK A typical logic level output signal provided by the supply that signals the
10% to 95% of its nominal voltage.
conditions.
inputs of the supply.
Server System that all DC output voltages are within their specified range.
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top access
EPS2U Power Supply Design Guide, V1.2
4 Mechanical Overview
STATUS
Required (Optional)
Note: Some features are noted as optional in the enclosure drawing figure below. These features may be use in
some chassis designs where only top access is allowed for the cage mounting.
The EPS2U is a power supply enclosure intended to handle a power range of 400W to 700W. A mechanical
drawing of the power supply cage is shown below in .
Optional mounting features for
mounting of the power supply.
Allow for 1.2mm
protrusion (x4)
Figure 1: Enclosure Drawing
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EPS2U Power Supply Design Guide, V1.2
4.1 Airflow Requirements
STATUS
Recommended
The power supply shall have a two-speed fan(s) and provide cooling to both the supply and the system. , During
low-speed fan operation, the power supply must not exceed a noise level of 43 dBa measured at one meter on all
faces. At low fan speed, the power supply shall provide a minimum of 12 CFM of airflow with 0.003 inH2O of
system backpressure. At high fan speed, the power supply shall provide a minimum of 20 CFM with 0.006 inH2O
of system backpressure.
4.2 Temperature Requirements
STATUS
Recommended
The power supply shall operate within all specified limits over the Top temperature range. The average air
temperature difference (∆Tps ) from the inlet to the outlet of the power supply shall not exceed the values shown
below in Table 1. All airflow shall pass through the power supply and not over the exterior surfaces of the power
supply.
Table 1: Thermal Requirements
ITEM DESCRIPTION MIN MAX UNITS
Top
∆Tps
T
non-op
The power supply must meet UL enclosure requirements for temperature rise limits. All sides of the power supply
with exception to the air exhaust side, must be classified as “Handle, knobs, grips, etc. held for short periods of
time only”.
Operating temperature range. 0 45
Temperature rise from inlet air to outlet air of power supply.
480 W output power, 20 CFM, Sea level, 25 °C inlet air
480 W output power, 12 CFM, Sea level, 25 °C inlet air
Non-operating temperature range. -40 70
21
35
°C
°C
°C
°C
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EPS2U Power Supply Design Guide, V1.2
5 AC Input Requirements
STATUS
Required
The power supply shall incorporate universal power input with active power factor correction, which shall reduce
line harmonics in accordance with the EN61000-3-2 and JEIDA MITI standards.
5.1 AC Inlet Connector
STATUS
Required
The AC input connector shall be an IEC 320 C-14 power inlet. This inlet is rated for 15 A/250 VAC.
5.2 AC Input Voltage Specification
STATUS
Required
The power supply must operate within all specified limits over the following input voltage range. Harmonic
distortion of up to 10% THD must not cause the power supply to go out of specified limits. The power supply shall
operate properly at 85 VAC input voltage to guarantee proper design margins.
Table 2: AC Input Rating
PARAMETER MIN RATED MAX Max Input
Current
Voltage (110) 90 V
Voltage (220) 180 V
Frequency 47 Hz 63 Hz
1 Maximum input current at low input voltage range shall be measured at 90VAC. A 480 W output load shall be applied.
2 Maximum input current at high input voltage range shall be measured at 180 VAC. A 480 W output load shall be applied.
3 This is not intended to be used for determining agency input current markings.
4 Maximum rated input current is measured at 100 VAC and 200 VAC.
100-127 V
rms
200-240 V
rms
140 V
rms
264 V
rms
8.4 A
rms
4.2 A
rms
1,3
7.6 A
rms
2,3
rms
Max Rated Input
Current
4
rms
4
3.8 A
rms
5.3 Efficiency
STATUS
Required
The power supply shall have a minimum efficiency of 65% at maximum load and over the specified AC voltage.
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EPS2U Power Supply Design Guide, V1.2
5.4 AC Line Dropout
STATUS
Required
An AC line dropout is defined to be when the AC input drops to 0 VAC at any phase of the AC line for any length
of time. During an AC dropout of one cycle or less the power supply must meet dynamic voltage regulation
requirements over the rated load. An AC line dropout of one cycle or less shall not cause any tripping of control
signals or protection circuits. If the AC dropout lasts longer than one cycle, the power supply should recover and
meet all turn on requirements. The power supply must meet the AC dropout requirement over rated AC voltages,
frequencies, and output loading conditions. Any dropout of the AC line shall not cause damage to the power
supply.
5.5 AC Line Fuse
STATUS
Required
The power supply shall incorporate one input fuse on the LINE side for input over-current protection to prevent
damage to the power supply and meet product safety requirements. Fuses should be slow blow type or
equivalent to prevent nuisance trips. AC inrush current shall not cause the AC line fuse to blow under any
conditions. All protection circuits in the power supply shall not cause the AC fuse to blow unless a component in
the power supply has failed. This includes DC output load short conditions.
5.6 AC Inrush
STATUS
Required
The power supply must meet inrush requirements for any rated AC voltage, during turn on at any phase of AC
voltage, during a single cycle AC dropout condition, during repetitive ON/OFF cycling of AC, and over the
specified temperature range (Top). The peak inrush current shall be less than the ratings of its critical components
(including input fuse, bulk rectifiers, and surge limiting device).
STATUS
Recommended
An additional inrush current limit is recommended for some system applications that require multiple systems on a
single AC circuit. AC line inrush current shall not exceed 40 A peak for one-quarter of the AC cycle, after which,
the input current should be no more than the specified maximum input current from Table 2.
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EPS2U Power Supply Design Guide, V1.2
5.7 AC Line Transient Specification
STATUS
Recommended
AC line transient conditions shall be defined as “sag” and “surge” conditions. Sag conditions (also referred to as
“brownout” conditions) will be defined as the AC line voltage dropping below nominal voltage. Surge conditions
will be defined as the AC line voltage rising above nominal voltage.
The power supply shall meet the requirements under the following AC line sag and surge conditions.
Table 3: AC Line Sag Transient Performance
AC Line Sag
Duration Sag Operating AC Voltage Line Frequency Performance Criteria
Continuous 10% Nominal AC Voltage ranges 50/60 Hz No loss of function or performance
0 to 1 AC
cycle
>1 AC cycle >10% Nominal AC Voltage ranges 50/60 Hz Loss of function acceptable, self
Duration Surge Operating AC Voltage Line Frequency Performance Criteria
Continuous 10% Nominal AC Voltages 50/60 Hz No loss of function or performance
0 to ½ AC
cycle
100% Nominal AC Voltage ranges 50/60 Hz No loss of function or performance
recoverable
Table 4: AC Line Surge Transient Performance
AC Line Surge
30% Mid-point of nominal AC
Voltages
50/60 Hz No loss of function or performance
5.8 AC Line Fast Transient Specification
STATUS
Recommended
The power supply shall meet the EN61000-4-5 directive and any additional requirements in IEC1000-4-5:1995
and the Level 3 requirements for surge-withstand capability, with the following conditions and exceptions:
• These input transients must not cause any out -of-regulation conditions, such as overshoot and
undershoot, nor must it cause any nuisance trips of any of the power supply protection circuits.
• The surge-withstand test must not produce damage to the power supply.
• The supply must meet surge-withstand test conditions under maximum and minimum DC-output load
conditions.
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EPS2U Power Supply Design Guide, V1.2
6 DC Output Specification
6.1 Output Connectors
The power supply shall have the following output connectors and wire harness configuration.
6.1.1 Required Baseboard power connector
Connector housing: 24-Pin Molex 39-01-2240 or equivalent
Contact: Molex 44476-1111 or equivalent
Table 5: P1 Baseboard Power Connector
Pin Signal 18 AWG Color Pin Signal 18 AWG Color
1 +3.3 VDC Orange 13 +3.3 VDC Orange
2 +3.3 VDC Orange 14 -12 VDC Blue
3 COM Black 15 COM Black
4 +5 VDC Red 16 PS_ON Green
5 COM Black 17 COM Black
6 +5 VDC Red 18 COM Black
7 COM Black 19 COM Black
8 PWR OK Gray 20 Reserved (-5 V in
9 5 VSB Purple 21 +5 VDC Red
10 +12 V2 Yellow/Blue Stripe 22 +5 VDC Red
11 +12 V2 Yellow/Blue Stripe 23 +5 VDC Red
12 +3.3 VDC Orange 24 COM Black
6.1.2 Required Processor Power Connector
Connector housing: 8-Pin Molex 39-01-2080 or equivalent
Contact: Molex 44476-1111 or equivalent
Table 6: Processor Power Connector
Pin Signal 18 AWG color Pin Signal 18 AWG Color
1 COM Black 5 +12 V1 Yellow/Black Stripe
2 COM Black 6 +12 V1 Yellow/Black Stripe
3 COM Black 7 +12 V1 Yellow/Black Stripe
4 COM Black 8 +12 V1 Yellow/Black Stripe
ATX)
N.C.
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EPS2U Power Supply Design Guide, V1.2
6.1.3 Required Peripheral Power Connectors
Connector housing: Amp 1-480424-0 or equivalent
Contact: Amp 61314-1 contact or equivalent
Table 7: Peripheral Power Connectors
Pin Signal 18 AWG Color
1 +12V2 Yellow
2 COM Black
3 COM Black
4 +5 VDC Red
6.1.4 Required Floppy Power Connector
Connector housing: Amp 171822-4 or equivalent
Table 8: P9 Floppy Power Connector
Pin Signal 22 AWG Color
1 +5 VDC Red
2 COM Black
3 COM Black
4 +12 V2 Yellow
6.1.5 Optional Server Signal Connector
Connector housing: 5-pin Molex 50-57-9405 or equivalent
Contacts: Molex 16-02-0088 or equivalent (gold plated)
Notes:
It is recommended to use gold plated signal contacts on both the power supply connector and the baseboard
header.
If the optional server signal connector is not used on the power supply the 3.3V RS and ReturnS lines shall be
crimped into the contacts in the baseboard power connector.
If the server signal connector is unplugged, the power supply shall not shutdown or go into an over voltage
The ground of the pins of the power supply wire harness provides the power return path. The wire harness
ground pins shall be connected to safety ground (power supply enclosure).
6.3 Remote Sense
STATUS
Optional
The power supply may have remote sense for the +3.3V (3.3VS) and return (ReturnS) if the Optional Server
Signal connector is implemented. The remote sense return (ReturnS) is used to regulate out ground drops for all
output voltages; +3.3V, +5 V, +12V1, +12V2, +12V3, -12 V, and 5 VSB. The 3.3V remote sense (3.3VS) is used
to regulate out drops in the system for the +3.3 V output. The remote sense input impedance to the power supply
must be greater than 200 W on 3.3 VS and ReturnS. This is the value of the resistor connecting the remote
sense to the output voltage internal to the power supply. Remote sense must be able to regulate out a minimum
of 200 mV drop on the +3.3 V output. The remote sense return (ReturnS) must be able to regulate out a minimum
of 200 mV drop in the power ground return. The current in any remote sense line shall be less than 5 mA to
prevent voltage sensing errors. The power supply must operate within specification over the full range of voltage
drops from the power supply’s output connector to the remote sense points.
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EPS2U Power Supply Design Guide, V1.2
6.4 Output Power/Currents
STATUS
Recommended
The following table defines the power and current ratings for a 480 W power supply. The combined output power
of all outputs shall not exceed the rated output power. Below are load ranges for each of the two power supply
power levels. The power supply must meet both static and dynamic voltage regulation requirements for the
minimum loading conditions.
Table 10: 480 W Load Ratings
Load Range 1
Voltage Minimum Continuous Maximum Continuous Peak
+3.3 V 0.5 A 24 A
+5 V 5.0 A 20 A
+12V1 (Processors ) 2.0 A 16 A 18 A
+12V2 (Baseboard) 2.0 A 12 A
+12V3 (Peripherals) 1.0 A 7 A 16 A
-12 V 0 A 0.5 A
+5 VSB 0.1 A 2.0 A
Voltage Minimum Continuous Maximum Continuous Peak
+3.3 V 0.5 A 9 A
+5 V 2.0 A 7 A
+12V1 (Processors ) 0.5 A 7 A 9 A
+12V2 (Baseboard) 0 A 2 A
+12V3 (Peripherals) 0.5 A 7 A 14 A
-12 V 0 A 0.5 A
+5 VSB 0.1 A 2.0 A
1 Maximum continuous total DC output power should not exceed 480 W.
2 Maximum continuous combined load on +3.3 VDC and +5 VDC outputs shall not exceed 115 W.
3 Maximum Peak total DC output power should not exceed 550 W.
4 Peak power and current loading shall be supported for a minimum of 1 second.
5 Maximum combined current for the 12 V outputs shall be 32 A.
6 Maximum 12V combined peak current shall be 44A.
6.4.1 Standby Outputs
STATUS
Load Range 2
Required
The 5 VSB output shall be present when an AC input greater than the power supply turn on voltage is applied.
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EPS2U Power Supply Design Guide, V1.2
6.5 Voltage Regulation
STATUS
Required
The power supply output voltages must stay within the following voltage limits when operating at steady state and
dynamic loading conditions. These limits include the peak -peak ripple/noise specified in Section 5.8. All outputs
are meas ured with reference to the return remote sense (ReturnS) signal. The 5 V, 12V1, 12V2, 12V3, –12 V and
5 VSB outputs are measured at the power supply connectors referenced to ReturnS. The +3.3 V is measured at
its remote sense signal (3.3VS) located at the signal connector.
Table 11: Voltage Regulation Limits
Parameter MIN NOM MAX Units Tolerance
+3.3 V +3.20 +3.30 +3.46 V
+5 V +4.80 +5.00 +5.25 V
+12V1 +11.52 +12.00 +12.60 V
+12V2 +11.52 +12.00 +12.60 V
+12V3 +11.52 +12.00 +12.60 V
-12 V -11.40 -12.20 -13.08 V
+5 VSB +4.85 +5.00 +5.25 V
+5/-3%
rms
+5/-4%
rms
+5/-4%
rms
+5/-4%
rms
+5/-4%
rms
+9/-5%
rms
+5/-3%
rms
STATUS
Optional
Some system applications may require tighter regulation limits on the +5 V output. The optional regulation limits
are shown below.
Table 12: Optional +5V Regulation Limits
Parameter MIN NOM MAX Units Tolerance
+5 V +5.85 +5.00 +5.25 V
+5/-3%
rms
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EPS2U Power Supply Design Guide, V1.2
6.6 Dynamic Loading
STATUS
Required
The output voltages shall remain within the limits specified in Table 11 for the step loading and within the limits
specified in Table 13 for the capacitive loading. The load transient repetition rate shall be tested between 50 Hz
and 5 kHz at duty cycles ranging from 10% -90%. The load transient repetition rate is only a test specification.
The ∆ step load may occur anywhere within the MIN load to the MAX load shown in Table 10.
Table 13: Transient Load Requirements
Output ∆ Step Load Size Load Slew
Rate
+3.3 V 30% of max load
+5 V 30% of max load
12V1+12V2+12V3 65% of max load
+5 VSB 25% of max load
0.5 A/µs 1,000 µF
0.5 A/µs 1,000 µF
0.5 A/µs 1,000 µF
0.5 A/µs 1 µF
Capacitive Load
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EPS2U Power Supply Design Guide, V1.2
6.7 Capacitive Loading
STATUS
Required
The power supply shall be stable and meet all requirements with the following capacitive loading ranges.
Note: Up to 10,000 µF of the +12V capacitive loading may be on the +12V1 output.
Table 14: Capacitve Loading Conditions
Output MIN MAX Units
+3.3 V 10 12,000
+5 V 10 12,000
µF
µF
+12 V 10 11,000
-12 V 1 350
+5 VSB 1 350
µF
µF
µF
6.8 Ripple / Noise
STATUS
Required
The maximum allowed ripple/noise out put of the power supply is defined in Table 15. This is measured over a
bandwidth of 0 Hz to 20 MHz at the power supply output connectors. A 10 µF tantalum capacitor in parallel with a
0.1 µF ceramic capacitor are placed at the point of measurement.
Table 15: Ripple and Noise
+3.3 V +5 V +12 V -12 V +5 VSB
50 mVp-p 50 mVp-p 120 mVp-p 120 mVp-p 50 mVp-p
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Vout
V2 V3
V4
EPS2U Power Supply Design Guide, V1.2
6.9 Timing Requirements
STATUS
Required
These are the timing requirements for the power supply operation. The output voltages must rise from 10% to
within regulation limits (T
rise at about the same time. All outputs must rise monotonically. The +5 V output needs to be greater than the
+3.3 V output during any point of the voltage rise. The +5V output must never be greater than the +3.3V output
by more than 2.25 V. Each output voltage shall reach regulation within 50 ms (T
on of the power supply. Each output voltage shall fall out of regulation within 400 ms (T
during turn off. Figure 3 and Figure 4 show the turn ON and turn OFF timing requirements. In Figure 4, the
timing is shown with both AC and PSON# controlling the ON/OFF of the power supply.
Item Description MIN MAX Units
T
Output voltage rise time from each main output. 5 70 ms
vout_rise
T
All main outputs must be within regulation of each
vout_on
T
All main outputs must leave regulation within this
vout_off
other within this time.
time.
) within 5 to 70 ms. The +3.3 V, +5 V and +12 V output voltages should start to
vout_rise
) of each other during turn
vout_on
) of each other
vout_off
Table 16: Output Voltage Timing
50 ms
400 ms
V1
10% Vout
T
vout_rise
T
vout_on
T
vout_off
Figure 3: Output Voltage Timing
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EPS2U Power Supply Design Guide, V1.2
Table 17: Turn On/Off Timing
Item Description MIN MAX UNITS
T
sb_on_delay
T
T
vout_holdup
Delay from AC being applied to 5 VSB being
within regulation.
ac_on_delay
Delay from AC being applied to all output v oltages
being within regulation.
Time all output voltages stay within regulation
after loss of AC.
1500 ms
2500 ms
18 ms
T
pwok_holdup
T
pson_on_delay
Delay from loss of AC to deassertion of PWOK. 17 ms
Delay from PSON# active to output voltages within
5 400 ms
regulation limits.
T
Delay from PSON# deactive to PWOK being
pson_pwok
50 ms
deasserted.
T
Delay from output voltages within regulation limits
pwok_on
200 1000 ms
to PWOK asserted at turn on.
T
Delay from PWOK deasserted to output voltages
pwok_off
1 ms
(3.3 V, 5 V, 12 V, -12 V) dropping out of regulation
limits.
T
Duration of PWOK being in the deasserted state
pwok_low
100 ms
during an off/on cycle using AC or the PSON#
signal.
T
Delay from 5 VSB being in regulation to O/Ps
sb_vout
50 1000 ms
being in regulation at AC turn on.
STATUS
Recommended
Item Description MIN MAX UNITS
T
T
T
Time all output voltages stay within regulation
vout_holdup
after loss of AC.
pwok_holdup
sb_holdup
Delay from loss of AC to deassertion of PWOK. 20 ms
Time 5VSB output voltage stays within regulation
after loss of AC.
21 ms
70 ms
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AC Input
Vout
T
EPS2U Power Supply Design Guide, V1.2
PWOK
5VSB
PSON#
T
sb_on_delay
T
AC_on_delay
T
pwok_on
T
sb_vout
AC turn on/off cycle
T
pwok_holdup
T
Tsb_holdup
vout_holdup
T
pwok_off
T
pwok_low
T
T
T
pson_on_delay
pwok_on
sb_on_delay
PSON turn on/off cycle
pwok_off
T
pson_pwok
Figure 4: Turn On/Off Timing (Single Power Supply)
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EPS2U Power Supply Design Guide, V1.2
7 Protection Circuits
STATUS
Required
Protection circuits inside the power supply shall cause only the power supply’s main outputs to shutdown. If the
power supply latches off due to a protection circuit tripping, an AC cycle OFF for 15 s and a PSON# cycle HIGH
for 1 s must be able to reset the power supply.
7.1 Current Limit
STATUS
Required
The power supply shall have current limit to prevent the +3.3 V, +5 V, and +12 V outputs from exceeding the
values shown in Table 18. If the current limits are exceeded, the power supply shall shutdown and latch off. The
latch will be cleared by toggling the PSON# signal or by an AC power interruption. The power supply shall not be
damaged from repeated power cycling in this condition. -12 V and 5 VSB shall be protected under over current or
shorted conditions so that no damage can occur to the power supply.
Table 18: Over Current Protection
Voltage Over Current Limit (Iout limit)
+3.3 V 110% minimum; 150% maximum
+5 V 110% minimum; 150% maximum
+12V 110% minimum; 150% maximum
7.2 240VA Protection
STATUS
Recommended
System designs may require user access to energized areas of the system. In these cases the power supply may
be required to meet regulatory 240VA limits for any power rail. Since the +12V rail combined power exceeds
240VA it must be divided into separate channels to meet this requirement. Each separate rail needs to be limited
to less than 20A for each +12V rail. The separate +12V rails do not necessarily need to be independently
regulated outputs. They can share a common power conversion stage. The +12V rail is divided into two rails for
the 450W power level and three rails for the 550W power level. +12V1 is dedicated for providing power to the
input of the processor voltage regulator(s). The +12V2 rail is used to power the rest of the main board +12V
power needs and peripherals devices. The +12V3 on the 550W power supply is used to power peripheral devices
only.
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EPS2U Power Supply Design Guide, V1.2
Table 19: Over Current Protection
Voltage Over Current Limit (Iout limit)
+3.3 V 110% minimum; 150% maximum
+5 V 110% minimum; 150% maximum
+12V1 18A minimum; 20A maximum
+12V2 12A minimum; 20A maximum
+12V3 16A minimum; 20A maximum
7.3 Over Voltage Protection
STATUS
Required
The power supply over voltage protection shall be locally sensed. The power supply shall shutdown and latch off
after an over voltage condition occurs. This latch shall be cleared by toggling the PSON# signal or by an AC
power interruption. Table 20 contains the over voltage limits. The values are measured at the output of the
power supply’s connectors. The voltage shall never exceed the maximum levels when measured at the power
pins of the power supply connector during any single point of fail. The vo ltage shall never trip any lower than the
minimum levels when measured at the power pins of the power supply connector.
Table 20: Over Voltage Limits
Output Voltage MIN (V) MAX (V)
+3.3 V 3.9 4.5
+5 V 5.7 6.5
+12V1,+12V2, +12V3 13.3 14.5
-12 V -13.3 -14.5
+5 VSB 5.7 6.5
7.4 Over Temperature Protection
STATUS
Recommended
The power supply will be protected against over temperature conditions caused by loss of fan cooling or
excessive ambient temperature. In an OTP condition the PSU will shutdown. When the power supply
temperature drops to within specified limits, the power supply shall restore power automatically. The OTP circuit
must have built in hysteresis such that the power supply will not oscillate on and off due to temperature recovering
condition. The OTP trip level shall have a minimum of 4 °C of ambient temperature hysteresis.
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SSI
EPS2U Power Supply Design Guide, V1.2
8 Control and Indicator Functions
The following sections define the input and output signals from the power supply.
Signals that can be defined as low true use the following convention:
signal# = low true
8.1 PSON#
STATUS
Required
The PSON# signal is required to remotely turn on/off the power supply. PSON# is an active low signal that turns
on the +3.3 V, +5 V, +12 V, and -12 V power rails. When this signal is not pulled low by the system, or left open,
the outputs (except the +5 VSB and Vbias) turn off. This signal is pulled to a standby voltage by a pull-up resistor
internal to the power supply. Refer to Figure 4 for timing diagram.
Table 21: PSON# Signal Characteristic
Signal Type
PSON# = Low
PSON# = Open or High
Accepts an open collector/drain input from the system.
Pull-up to VSB located in power supply.
ON
OFF
MIN MAX
Logic level low (power supply ON)
Logic level high (power supply OFF)
Source current, Vpson = low
Power up delay: T
PWOK delay: T
pson_on_delay
pson_pwok
0 V 1.0 V
2.0 V 5.25 V
4 mA
5 ms 400 ms
50 ms
Disabled
Hysteresis ≥ 0.3V and/or other de-bounce method
≤ 1.0 V
PS is
enabled
≥ 2.0 V
PS is
disabled
Enabled
0V
1.0V
2.0V
5.25V
Figure 5: PSON# Signal Characteristics
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SSI
EPS2U Power Supply Design Guide, V1.2
8.2 PWOK (Power OK)
STATUS
Required
PWOK is a power OK signal and will be pulled HIGH by the power supply to indicate that all the outputs are within
the regulation limits of the power supply. When any output voltage falls below regulation limits or when AC power
has been removed for a time sufficiently long so that power supply operation is no longer guaranteed, PWOK will
be deasserted to a LOW state. See Figure 4 for a representation of the timing characteristics of PWOK. The
start of the PWOK delay time shall be inhibited as long as any power supply output is in current limit.
Table 22: PWOK Signal Characteristics
Signal Type
PWOK = High
PWOK = Low
MIN MAX
Logic level low voltage, Isink = 4 mA
Logic level high voltage, Isource=200 µA
Sink current, PWOK = low
Source current, PWOK = high
PWOK delay: T
PWOK rise and fall time
Power down delay: T
pwok_on
pwok_off
Open collector/drain output from power supply. Pull-up
to VSB located in power supply.
Power OK
Power Not OK
0 V 0.4 V
2.4 V 5.25 V
4 mA
2 mA
200 ms 1000 ms
1 ms 200 ms
100 µs
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SSI
EPS2U Power Supply Design Guide, V1.2
8.3 Field Replacement Unit (FRU) Signals
STATUS
Optional
Two pins will be allocated for the FRU information on the power supply connector. One pin is the Serial Clock
(SCL). The second pin is used for Serial Data (SDA). Both pins are bi-directional and are used to form a serial
bus. The FRU circuits inside the power supply must be powered off of 5 VSB output and grounded to ReturnS
(remote sense return). The Write Control (or Write protect) pin should be tied to ReturnS inside the power supply
so that information can be written to the EEPROM.
8.3.1 FRU Data
FRU data shall be stored starting in address location 8000h through 80FFh. The FRU data format shall be
compliant with the IPMI specifications. The current version of these specifications are available at:
http:\\developer.intel.com/design/servers/ipmi/spec.htm.
8.3.2 FRU Data Format
The information to be contained in the FRU device is shown in the following table.
Table 23: FRU Device Information
Area Type Description
Common Header As defined by the FRU document
Internal Use Area Not required, do not reserve
Chassis Info Area Not applicable, do not reserve
Board Info Area Not applicable, do not reserve
8.3.2.1 Product Info Area
As defined by the IPMI FRU document. Product information shall be defined as follows:
Table 24: FRU Device Product Information Area
Field Name Field Description
Manufacturer Name {Formal name of manufacturer}
Product Name {Manufacturer’s model number}
Product part/model number Customer part number
Product Version Customer current revision
Product Serial Number {Defined at time of manufacture}
Asset Tag {Not used, code is zero length byte}
FRU File ID {Not required}
PAD Bytes {Added as necessary to allow for 8-byte offset to next area}
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EPS2U Power Supply Design Guide, V1.2
8.3.2.2 MultiRecord Area
As defined by the IPMI FRU document. The following record types shall be used on this power supply:
• Power Supply Information (Record Type 0x00)
• DC Output (Record Type 0x01)
• No other record types are required for the power supply.
MultiRecord information shall be defined as follows:
Table 25: FRU Device Product Information Area
Field Name (PS Info) Field Information Definition
Overall Capacity (watts) 480
Peak VA 550
Inrush current (A) 50
Inrush interval (ms) 5
Low end input voltage range 1 90
High end input voltage range 1 140
Low end input voltage range 2 180
High end input voltage range 2 264
A/C dropout tol. (ms) 20
Binary flags Set for: Hot Swap support, Autoswitch, and PFC
Peak Wattage
Combined wattage Set for 5 V & 3.3V combined wattage of 115 W
Predictive fail tach support Not supported, 00h value
Field Name (Output) Field Description:
Output Information Set for: Standby on +5 VSB, No Standby on all others.
All other output fields Format per IPMI specification, using parameters in the EPS12V
Set for: 10 s, 550 W
Five outputs are to be defined from #1 to #5, as follows: +3.3 V, +5
V, +12 V, -12V, and +5 VSB.
specification.
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SSI
EPS2U Power Supply Design Guide, V1.2
9 MTBF
STATUS
Recommended
The power supply shall have a minimum MTBF at continuous operation of 1) 50,000 hours at 100% load and
45 °C, as calculated by Bellcore RPP, or 2) 100,000 hours demonstrated at 100% load and 50 °C.
10 Agency Requirements
STATUS
Recommended
The power supply must comply with all regulatory requirements for its intended geographical market. Depending
on the chosen market, regulatory requirements may vary. Although a power supply can be designed for
worldwide compliance, there may be cost factors that drive different versions of supplies for different
geographically targeted markets.
This specification requires that the power supply meet all regulatory requirements for the intended market at the
time of manufacturing. Typically this includes:
• UL
• CSA
• A Nordic CENELEC
• TUV
• VDE
• CISPR Class B
• FCC Class B
The power supply, when installed in the system, shall meet immunity requirements specified in EN55024.
Specific tests are to be EN61000-4-2 ,-3, -4, -5, -6, -8, -11, EN61000-3-2, -3, and JEIDI MITI standard. The
power supply must maintain normal performance within specified limits. This testing must be completed by the
system EMI engineer. Conformance must be designated with the European Union CE Marking. Specific
immunity level requirements are left to customer requirements.
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