Endace Measurement Systems® Ltd
Building 7
17 Lambie Drive
PO Box 76802
Manukau City 1702
New Zealand
Phone: +64 9 262 7260
Fax: +64 9 262 7261
support@endace.com
www.endace.com
International Locations
New Zealand Americas Europe, Middle East & Africa
Endace Technology® Ltd
Level 9
85 Alexandra Street
PO Box 19246
Hamilton 2001
New Zealand
Phone: +64 7 839 0540
Fax: +64 7 839 0543
support@endace.com
www.endace.com
All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in
any form or by any means electronic, mechanical, photocopying, recording, or otherwise, without the prior
written permission of the publisher. Prepared in Hamilton, New Zealand.
Endace USA® Ltd
Suite 220
11495 Sunset Hill Road
Reston
Virginia 20190
United States of America
Phone: ++1 703 382 0155
Fax: ++1 703 382 0155
support@endace.com
www.endace.com
Endace Europe® Ltd
Sheraton House
Castle Park
Cambridge CB3 0AX
United Kingdom
Phone: ++44 1223 370 176
Fax: ++44 1223 370 040
• Command-line examples suitable for entering at command prompts are displayed in
mono-space courier font.
Results generated by example command-lines are also displayed in mono-space courier font.
• The software version references such as 2.3.x, 2.4.x, 2.5.x are specific to Endace
Measurement Systems and relate to Company software products only.
Protection Against Harmful Interference
When present on product this manual pertains to and indicated by product labelling, the statement "This device complies
with part 15 of the FCC rules" specifies the equipment has been tested and found to comply with the limits for a Class A
digital device, pursuant to Part 15 of the Federal Communications Commission [FCC] Rules.
These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a
commercial environment.
This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the
instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be
required to correct the interference at his own expense.
Extra Components and Materials
The product that this manual pertains to may include extra components and materials that are not essential to its basic
operation, but are necessary to ensure compliance to the product standards required by the United States Federal
Communications Commission, and the European EMC Directive. Modification or removal of these components and/or
materials, is liable to cause non compliance to these standards, and in doing so invalidate the user’s right to operate this
equipment in a Class A industrial environment.
The installation of the Endace DAG 4.3S card on a PC begins with
installing the operating system and the Endace software. This is followed
by fitting the card and connecting the ports.
Viewing this
document
In this chapter
This document, DAG 4.3S Card User Manual is available on the
installation CD.
This chapter covers the following sections of information.
• User Manual Purpose
• DAG 4.3S Card Product Description
• DAG 4.3S Card Architecture
• DAG Card Extended Functions
• EMI Suppression Ferrite Fitting
• DAG 4.3S Card System Requirements
1.1 User Manual Purpose
Description
Prerequisite
The purpose of this DAG 4.3S Card User Manual is to describe:
DAG 4.3S Card Product Description
DAG 4.3S Card Architecture
DAG Card Extended Functions
EMI Suppression Ferrite Fitting
DAG 4.3S Card System Requirements
This document presumes the DAG card is being installed in a PC already
configured with an operating system.
A copy of the Debian Linux 3.1 (Sarge) is available as a bootable ISO
image on one of the CD's shipped with the DAG card.
To install on the Linux/FreeBSD operating system, follow the instructions
in the document EDM04.05-01r1 Linux FreeBSD Installation Manual,
packaged in the CD shipped with the DAG card.
To install on a Windows operating system, follow the instructions in the
document EDM04.05-02r1 Windows Installation Manual, packaged in the
CD shipped with the DAG card.
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1.2 DAG 4.3S Card Product Description
EDM01.05-10r1 DAG 4.3S Card User Manual
Description
The DAG 4.3S card is designed only for PCI-X buses. It is capable of cell
and packet capture and generation on IP networks.
Figure
Figure 1-1 shows the DAG 4.3S series PCI-X card.
Figure 1-1. DAG 4.3S series PCI-X Card.
The DAG 4.3S card collects packet header and payload from ATM, POS,
and supports ATM, PPP HDLC, CISCO, HDLC over OC40c SONET or
SDH networks.
Full packet or cell capture at line rate allows recording of all header
information payload and with a high precision timestamp, subject to bus
and processor availability.
The DAG 4.3S is capable of transmitting packets at 100% line rate while
simultaneously receiving packets at 100% line rate.
1.3 DAG 4.3S Card Architecture
Description
Serial SONET optical network data received by optical interface flows
into a physical layer ASIC, then immediately into the Field-Programmable
Gate Array [FPGA].
The FPGA contains an Endace DAG Universal Clock Kit[DUCK]
timestamp engine, packet record processor, and PCI-X interface logic.
Because of component close association, packets or cells are time-stamped
accurately. Time stamped packet records are stored in an external FIFO
memory before transmission to the host.
Continued on next page
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1.3 DAG 4.3S Card Architecture, continued
EDM01.05-10r1 DAG 4.3S Card User Manual
Figure
Figure 1-2 shows the DAG 4.3S card major components and data flow.
Tx
Optics Module
Rx
LED’s
Sync
In/Out
Time Stamping
Clock
FIFO
Figure 1-2. DAG 4.3S Card Major Components and Data Flow.
1.4 DAG Card Extended Functions
Framer
DAG 4.3
FPGA
PCI-X 64-Bit 66-133MHz
Coprocessor
Connector
CPLD
Flash
ROM
Description
The DAG 4.3S functionality can be extended in many ways.
The co-processor allows for advanced features such as IP packet filtering
in hardware at line rate. Contact the Endace customer support team at
support@endace.com to enable effective use of extended functions.
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1.5 EMI Suppression Ferrite Fitting
EDM01.05-10r1 DAG 4.3S Card User Manual
Description
Figure
In order to ensure compliance to EN55022 and FCC 47 Part 15 Class A
Radiated emission limits, the supplied EMI Suppression Ferrite must be
fitted to any cable connected to the Time Synchronization Connector.
The Ferrite component supplied in the DAG 4.3S product packaging box
must be fitted within 1cm of the plug housing..
Figure 1-3 shows the DAG 4.3S card Ferrite component.
Figure 1-3. DAG 4.3S Card Ferrite Component.
1.6 DAG 4.3S Card System Requirements
Description
Operating
system
The DAG 4.3S card and associated data capture system minimum
operating requirements are:
• PC, at least Intel Xeon 1.8GHz or faster
• Intel E7500, ServerWorks Grand Champion LE/HE or newer chip set
256 MB RAM
• At least one free PCI-X 1.0 slot supporting 66-133MHz operation
• Software distribution free space of 30MB
• Endace Linux Install CD requires 6 GB
PCI buses are not compatible with the DAG 4.3S card. Only PCI-X buses
are supported.
For convenience, a Debian 3.1 [Sarge] Linux system is included on the
Endace Software Install CD. Endace currently supports Windows XP,
Windows Server 2000, Windows Server 2003, FreeBSD, RHEL 3.0, and
Debian Linux operating systems.
Continued on next page
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EDM01.05-10r1 DAG 4.3S Card User Manual
1.6 DAG 4.3S Card System Requirements, continued
Different
system
For advice on using a system substantially different from that specified
above, contact Endace support at support@endace.com
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EDM01.05-10r1 DAG 4.3S Card User Manual
2.0 INSTALLING DAG 4.3S CARD
Introduction
The DAG 4.3S card can be installed in any free PCI-X 1.0 slot. It will
operate in 66, 100, and 133MHz PCI-X mode, however it will not operate
correctly in 32 or 64-bit PCI slots.
Higher speed slots are recommended for best performance.
The DAG 4.3S card should be the only device on the PCI-X bus if
possible as the card makes heavy use of PCI-X bus data transfer resources.
Although by default, the driver supports up to four DAG cards in one
system, there should not be more than one card on a single PCI-X bus due
to bandwidth limitations.
In this section
This section covers the following topics of information.
• Installation of Operating System and Endace Software
• Insert DAG 4.3S Card into PC
• DAG 4.3S Card Port Connector
2.1 Installation of Operating System and Endace Software
Description
If the DAG device driver is not installed, before proceeding with the next
chapter, install the software on Linux/FreeBSD operating systems by
following the instructions in EDM04-01 Linux/FreeBSD Installation
Guide.
To install the software on a Windows operating system, follow the
instructions in EDM04-02 Windows Installation Guide.
Go to the next chapter of information when the DAG device driver is
installed.
2.2 Insert DAG 4.3S Card into PC
Description
Procedure
Step 1. Access bus Slot
Inserting the DAG 4.3S card into a PC involves accessing the bus slot,
fitting the card, and replacing bus slot screw.
Follow these steps to insert the DAG 4.3S card.
Power computer down.
Remove PCI-X bus slot cover.
Continued on next page
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2.2 Insert DAG 4.3S Card into PC, continued
Procedure (continued)
Step 2. Fit Card
Insert into PCI-X bus slot.
Step 3. Replace bus Slot Screw
Secure card with screw.
Step 4. Power up Computer
2.3 DAG 4.3S Card Port Connector
EDM01.05-10r1 DAG 4.3S Card User Manual
Description
There is one duplex LC-type optical port connector. The bottom
connector is for the received signal, one nearest PCI-X slot.
The top port is for transmission and remains unconnected if a splitter is
used for passive monitoring. If this port is unused, the transceiver optics
should be covered or plugged to prevent ingress of dust.
An 8-pin RJ45 socket is used for time synchronization. This socket
should never be connected to an Ethernet network or telephone line.
2.4 Pluggable Optical Transceivers
Description
Some newer versions of the DAG 4.3S cards are available with pluggable
optics. To provide compatibility with the broadest possible range of
optical parameters, Endace offers the industry standard Small Form-factor
Pluggable [SFP] optical transceiver on the DAG 4.3S card.
The SFP transceiver consists of two parts:
• Mechanical chassis attached to the circuit board
• Transceiver unit which may be inserted into the chassis
The correct transceiver is chosen to suit the optical parameters of the
target network installed in the chassis.
The transceiver may then be connected to the network via LC-style optical
connectors.
Further information about the Pluggable Optical Transceiver is available
at the Endace
http://www.endace.com/dagPluggable.htm web page.
Continued on next page
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EDM01.05-10r1 DAG 4.3S Card User Manual
2.4 Pluggable Optical Transceivers, continued
Description, continued
Figure
Figure 2-1 shows the pluggable optical transceiver.
Figure 2-1. Pluggable Optical Transceiver.
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3.0 SETTING DAG 4.3S CARD OPTICAL POWER
EDM01.05-10r1 DAG 4.3S Card User Manual
Description
Optical power
measure
Configuration
Part No. Fibre
Finisar
FTRJ1321S
Agilent
HFCT5942
In this chapter
The optical power range depends on the particular device fitted on the
DAG 4.3S card.
The DAG 4.3S card is shipped fitted with FTRJ 1321S 1300nm singlemode short range optics module by default.
Optical power is measured in dBm – decibels relative to 1 mW where 10
dB is equivalent to a factor of 10 in power.
The numbers are all negative, showing powers below 1 mW. The most
sensitive devices can work down to about –30 dBm, or 1 uW.
The following table describes the DAG 4.3S card optics power module
part, single-mode fibre [SMF], and configuration.
Data
Rate
SMF 2488 -18/0 -9.5/-3 1270/1600 1260/1360
SMF 2488 -19/-3 -10/-3 1260/1570 1260/1360
Min/Max
Pwr [dBm] in
Min/Max
Pwr [dBm] out
Min/Max
Wavelength in
Min/Max
Wavelength out
This chapter covers the following sections of information.
• DAG 4.3S Card Optical Power Input
• Splitter Losses
3.1 DAG 4.3S Card Optical Power Input
Description
The optical power input to the DAG 4.3S card must be within a receiver’s
dynamic range.
When optical power is slightly out of range an increased bit error rate is
experienced. If power is well out of range the system cannot lock onto the
SONET signal. In extreme cases of being out range excess power will
damage a receiver.
When power is above the upper limit the optical receiver saturates and
fails to function. When power is below the lower limit the bit error rate
increases until the device is unable to obtain lock and fails.
Continued on next page
9
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