EM Microelectronic V6309LSP3B, V6309MSP3B, V6309RSP3B, V6309SSP3B, V6309TSP3B Schematic [ru]
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V
V
R
EM MICROELECTRONIC -
3-Pin Microprocessor Reset Circuit
Description
The V6309 and V6319 are microprocessor supervisory
circuits used to monitor the power supplies in µP and digital
systems. They provide excellent circuit reliability and low
cost by eliminating external components and adjustments
when used with 5V powered or 3V powered circuits.
These circuits perform a single function: they assert a reset
signal whenever the V
preset threshold, keeping it asserted for at least 140ms after
VDD has risen above the reset threshold. The only difference
between the two devices is that the V6309 has an active-low
RESET output (which is guaranteed to be in the correct
state for V
down to 1V), while the V6319 has an active-
DD
high RESET output. The reset comparator is designed to
ignore fast transients on V
operation with a variety of supply voltages are available.
Low supply current makes the V6309/V6319 ideal for use in
portable equipment. The V6309/V6319 come in a 3-pin
SOT23 package.
Typical Operating Configuration
V
DD
supply voltage declines below a
DD
. Reset thresholds suitable for
DD
MARIN SA
6309
6319
Features
Precision monitoring of 3V, 3.3V and 5V power supply
voltages
Fully specified over the temperature range of
-40 to +125°C
140ms minimum power-on reset pulse width:
RESET output for V6309
RESET output for V6319
16 µA supply current
Guaranteed RESET/RESET valid to V
Power supply transient immunity
No external components needed
3-pin SOT23 package
Fully compatible with MAX809/MAX810
Applications
Computer
Controllers
Intelligent instruments
Critical µP and µC power monitoring
Portable/battery-powered equipment
Pin Assignment
SOT23-3L
V
DD
DD
= 1V
V
DD
V6309
V
SS
RES
V
DD
Micro-
processor
RES
V
SS
V
Fig. 1
Pin Description
Pin Name Function
1 VSS Ground
2 for V6309
RESET
2 for V6319
RESET
3 VDD Supply voltage (+5V, +3.3V or
SS
RESET
V
DD
rises for 240ms after V
reset threshold
RESET Output remains high while
V
DD
rises for 240ms after V
reset threshold
+3.0V)
3
V6309/19
21
RES / RES
Output remains low while
is below the reset threshold and
is below the reset threshold and
above the
DD
above the
DD
Table 1
Fig. 2
Copyright © 2005, EM Microelectronic-Marin SA
1
www.emmicroelectronic.com
V
V
R
6309
Absolute Maximum Ratings
Parameter Symbol Conditions
Terminal voltage to VSS V
Min. voltage at RESET or
RESET
Maximum voltage at RESET or
RESET
Input current at VDD I
Output current at RESET or
RESET
Rate of rise at VDD t
Stresses above these listed maximum ratings may cause
-0.3V to + 6.0V
DD
permanent damages to the device. Exposure beyond
specified operating conditions may affect device reliability or
V
-0.3V
min
cause malfunction.
V
VCC + 0.3V
max
20 mA
min
I
20 mA
max
100Vµs
R
Handling Procedures
This device has built-in protection against high static
voltages or electric fields; however, it is advised that normal
precautions be taken as for any other CMOS component.
Unless otherwise specified, proper operation can only occur
when all terminal voltages are kept within the voltage range.
6319
Continuous power dissipation at
T
= +70°C for SOT-23
A
320 mW
P
max
(>70°C derate by 4 mW/°C)
Operating temperature range TA -40 to +125°C
Storage temperature range TST -65°C to +150°C
Table 2
Electrical Characteristics
VDD = full range, TA = -40 to +125°C, unless otherwise specified, typical values at TA = +25°C, VDD = 5V for versions L and M,
V
= 3.3V for versions T and S, VDD = 3 V for R. (Production testing done at TA = +25°C and 85°C, over temperature limits
DD
guaranteed by design only)
Parameter Symbol Test Conditions Min. Typ. Max. Unit
VDD range VDD TA = 0 to +70°C 1.0 5.5 V
T
T
Supply current
versions L, M ICC VDD < 5.5V 26 60 µA
versions R, S, T VDD < 3.6V 16 50 µA
RESET threshold 1)
version L VTH TA = +25°C 4.56 4.63 4.70 V
T
version M TA = +25°C 4.31 4.38 4.45 V
T
version T TA = +25°C 3.04 3.08 3.11 V
T
version S TA = +25°C 2.89 2.93 2.96 V
T
version R TA = +25°C 2.59 2.63 2.66 V
T
Reset threshold temp. coefficient -200 ppm/°C
VDD to reset delay 1) V
Reset active timeout period TA = -40 to °125°C 140 330 590 ms
RESET output voltage low for V6309
V
OL
versions R, S, T VDD = VTH min., I
versions L, M VDD = VTH min., I
RESET output voltage high for V6309
versions R, S, T VOH VDD = VTH max., I
versions L, M VDD = VTH max., I
RESET output voltage low for V6319
versions R, S, T VOL VDD = VTH max., I
versions L, M VDD = VTH max., I
RESET output voltage high for V6319 VOH 1.8V < VDD < VTH min.,
1)
RESET output for V6309 , RESET output for V6319
= -40 to +105C 1.2 5.5 V
A
= -40 to +125°C 1.6 5.5 V
A
= -40 to +125°C 4.40 4.79 V
A
= -40 to +125°C 4.16 4.53 V
A
= -40 to +125°C 2.92 3.17 V
A
= -40 to +125°C 2.78 3.02 V
A
= -40 to +125°C 2.50 2.72 V
A
= VTH to (VTH – 100mV) 7 µs
DD
VDD > 1.0V, I
I
= 150µA
SOURCE
= 50µA 0.3 V
SINK
= 1.2mA 0.3 V
SINK
= 3.2mA 0.4 V
SINK
= 500µA 0.8 VDD V
SOURCE
= 800µA VDD-1.5V V
SOURCE
= 1.2mA 0.3 V
SINK
= 3.2mA 0.4 V
SINK
V
0.8 V
DD
Table 3
Copyright © 2005, EM Microelectronic-Marin SA
2
www.emmicroelectronic.com
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