EMLSI EM681FU16 Service Manual

merging Memory & Logic Solutions Inc.merging Memory & Logic Solutions Inc.

EM681FU16 Series

Low Power, 512Kx16 SRAM

Document Title

512K x16 bit Low Power and Low Voltage Full CMOS Static RAM

Revision History

Revision No. History Draft Date Remark

0.0 Initial Draft April 12 , 2002

0.1 2’nd Draft Changed Icc, Icc1 value &
55ns product tDW value

0.2 3’rd Draft Changed I

Changed VDR & IDR

measurement condition

0.3 4’th Draft Add Pb-free part number February 13 , 2004

test conditions,

SB1

November 11 , 2002

December 23 , 2002

Emerging Memory & Logic Solutions Inc.

IT Venture Tower Eastside 11F, 78, Karac-Dong, Songpa-Ku, Seoul, Rep.of Korea Zip Code : 138-160
Tel : [phone]~1766 Fax : [phone] / Homepage : www.emlsi.com

The attached datasheets are provided by EMLSI reserve the right to change the specifications and products. EMLSI will answer to your
questions about device. If you have any questions, please contact the EMLSI office.

1

merging Memory & Logic Solutions Inc.merging Memory & Logic Solutions Inc.

EM681FU16 Series

Low Power, 512Kx16 SRAM

FEATURES

• Process Technology : 0.18µm Full CMOS

• Organization : 512K x 16 bit

• Power Supply Voltage : 2.7V ~ 3.3V

• Low Data Retention Voltage : 1.5V (Min.)

• Three state output and TTL Compatible

• Package Type : 48-FPBGA 8.0x10.0

PRODUCT FAMILY

Product
Family

EM681FU16

1. The parameter is measured with 30pF test load.

Operating
Temperature

Industrial (-40 ~ 85oC)

Vcc Range Speed

2.7V~3.3V

PIN DESCRIPTION

GENERAL DESCRIPTION

The EM681FU16 families are fabricated by EMLSI’s
advanced full CMOS process technology. The families
support industrial temperature range and Chip Scale
Package for user flexibility of system design. The fami­lies also supports low data retention voltage for battery
back-up operation with low data retention current.

Power Dissipation

PKG Type

55

1)

/ 70ns

Standby
(I

, Typ.)

SB1

Operating
(I

.Max)

CC1

2 µA 2 mA 48-FPBGA

FUNCTIONAL BLOCK DIAGRAM

1 2 3 4 5 6

A

LB OE A

B

I/O

9

C

I/O10I/O

D

V

SS

E

V

CC

F I/O

15

G

I/O16DNU A

H

A

18

UB A

A

11

I/O

12A17

I/O13 DNU A

I/O

14A14

A

A

8

A

0

A

3

A

5

A

A

A

12

A

9

1

4

6

7

16

15

13

10

A2DNU

CS I/O

I/O2I/O

I/O4V

I/O5V

I/O6I/O

WE I/O

A

DNU

11

1

3

CC

SS

7

8

48-FPBGA : Top view (ball down)

Name Function Name Function

CS Chip select input Vcc Power Supply

I/O9 ~ I/O16

WE

OE
UB

LB

CS

A

0

A

1

A

2

A

3

A

4

A

5

A

6

A

7

A

8

A

9

A

10

I/O1 ~ I/O8

Control Logic

Cont

Cont

Data

Data

Row Select

Pre-charge Circuit

Memory Array

2048 x 4096

I/O Circuit

Column Select

A11A12A13A14A15A

V

CC

V

SS

A

A

16

17

18

OE Output Enable input Vss Ground

WE Write Enable input UB Upper Byte (I/O

A0~A18 Address Inputs LB Lower Byte (I/O

I/O1~I/O16 Data Inputs/outputs DNU Do Not Use

9~16

1~8

)

)

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merging Memory & Logic Solutions Inc.merging Memory & Logic Solutions Inc.

ABSOLUTE MAXIMUM RATINGS *

Parameter Symbol Minimum Unit

EM681FU16 Series

Low Power, 512Kx16 SRAM

Voltage on Any Pin Relative to Vss VIN, V
Voltage on Vcc supply relative to Vss V
Power Dissipation P
Operating Temperature T

* Stresses greater than those listed above “Absolute Maximum Ratings” may cause permanent damage to the device. Functional oper-

ation should be restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods
may affect reliability.

OUT

CC

D

A

-0.2 to 3.6V V

-0.2 to 4.0V V

1.0 W

-40 to 85

o

C

FUNCTIONAL DESCRIPTION

CS OE WE LB UB I/O

H X X X X High-Z High-Z Deselected Stand by
X X X H H High-Z High-Z Deselected Stand by

L H H L X High-Z High-Z Output Disabled Active
L H H X L High-Z High-Z Output Disabled Active
L L H L H Data Out High-Z Lower Byte Read Active

1-8

I/O

9-16

Mode Power

L L H H L High-Z Data Out Upper Byte Read Active
L L H L L Data Out Data Out Word Read Active
L X L L H Data In High-Z Lower Byte Write Active
L X L H L High-Z Data In Upper Byte Write Active
L X L L L Data in Data In Word Write Active

Note: X means don’t care. (Must be low or high state)

3

merging Memory & Logic Solutions Inc.merging Memory & Logic Solutions Inc.

EM681FU16 Series

Low Power, 512Kx16 SRAM

RECOMMENDED DC OPERATING CONDITIONS

1)

Parameter Symbol Min Typ Max Unit

Supply voltage
Ground

Input high voltage
Input low voltage

1. TA= -40 to 85oC, otherwise specified

2. Overshoot: VCC +2.0 V in case of pulse width < 20ns

3. Undershoot: -2.0 V in case of pulse width < 20ns

4. Overshoot and undershoot are sampled, not 100% tested.

CAPACITANCE

1)

(f =1MHz, TA=25oC)

Item Symbol Test Condition Min Max Unit

Input capacitance C
Input/Ouput capacitance C

V

CC

V

SS

V

IH

V

IL

IN

IO

2.7 3.0 3.3 V
0 0 0 V

2.2 -

3)

-0.2

VCC + 0.2

- 0.6 V

2)

V

VIN=0V - 8 pF
VIO=0V - 10 pF

1. Capacitance is sampled, not 100% tested

DC AND OPERATING CHARACTERISTICS

Parameter Symbol Test Conditions Min Typ Max Unit

I

Input leakage current

Output leakage current

Operating power supply

Average operating current

Output low voltage
Output high voltage
Standby Current (TTL)

Standby Current (CMOS)

LI

I

LO

I

CC

I

CC1

I

CC2

V

OL IOL

V

OH IOH

I

SB

I

SB1

VIN=VSS to V
CS=VIH or OE=V

VIO=VSS to V

CC

IH

CC

IIO=0mA, CS=VIL, VIN=VIH or V
Cycle time=1µs, 100% duty, IIO=0mA,

CS<0.2V, LB<0.2V or/and UB<0.2V,
VIN<0.2V or VIN>VCC-0.2V

Cycle time = Min, IIO=0mA, 100% duty,
CS=V

LB=VIL or/and UB=VIL, VIN=VIL or

IL,

V

IH

= 2.1mA

= -1.0mA 2.2 - - V
CS=VIH, LB=UB =VIH Other inputs=VIH or V
CS>VCC-0.2V(CS controlled) or

LB=UB ≥ VCC-0.2V, CS<0.2V(LB/UB Con-

trolled)

Other inputs=0~V

(Typ. condition : V

CC

CC

(Max. condition : VCC=3.3V @ 85oC)

or WE=VIL, LB=UB=V

IL

=3.0V @ 25oC)

-1 - 1 uA

,

IH

-1 - 1 uA

- - 2 mA

- - 2 mA

55ns - - 25
70ns - - 20

- - 0.4 V

IL

LL
LF

- - 0.3 mA

- 2 15 uA

mA

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