The information in this document has been carefully checked and is believed
to be entirely reliable. However, no responsibility is assumed for inaccuracies.
ELTEC reserves the right to make changes to any products to improve
reliability, function or design. ELTEC does not assume any liability arising out
of the application or use of any product or circuit described in this manual;
neither does it convey any license under its patent rights nor the rights of
others. ELTEC products are not authorized for use as components in life
support devices or systems intended for surgical implant into the body or
intended to support or sustain life. Buyer agrees to notify ELTEC of any such
intended end use whereupon ELTEC shall determine availability and suitability
of its product or products for the use intended.
ELTEC points out that there is no legal obligation to document internal
relationships between any functional modules, realized in either hardware or
software, of a delivered entity.
This document contains copyrighted information. All rights including those of
translation, reprint, broadcasting, photomechanical or similar reproduction and
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Other product and company names herein may be the trademarks of their
respective owners.
· Frame grabber for 4 simultaneous mono-chrome channels or one
RGB and one mono-chrome channel
· Digitizes up to four parallel, separate images from synchronized
cameras
· Restart cameras supported
· Real-time acquisition of images or image sequences directly into
main memory
· Image memory formats include RGB, monochrome with 32, 24, 16
or 8 bits/pixel
· PCI 2.2 compliant
Introduction
PC_EYE®2+
1—1
Page 8
Introduction User's Manual
A
A
A
A
Figure 1—1: Block Diagram PC_EYE 250
10 pin
Header
Introduction
Input
A
15 pin
HD
Input
B
15 pin
HD
MUX
4 x
4:1
Opto
Clock
Restoration
GPO (12..15)
GPO (0, 1, 3, 4)
Sync0
Sync-
detect
/D
I0/R(0..7)
Sync1
Sync-
detect
/D
I1/G(0..7)
Sync2
Sync-
detect
/D
I2/B(0..7)
Sync3
Sync-
detect
I3(0..7)
/D
Sync4
Sync-
detect
Ext-Trigg er(0..3)
Ext-Clock(0..1)
FPGA-2
DMA-
Controller
Frontend
ICD2061
FPGA-1
PCI-Core
EE-Prom
PCIBUS
1—2
PC_EYE®2+
Page 9
A
A
A
A
Figure 1—2: Block-Diagram PC_EYE 260
Introduction User's Manual
10 pin
Header
Hirose
X102
X103
X104
X105
Input
B
15 pin
HD
MUX
4 x
4:1
Opto
Clock
Restoration
GPO (12..15)
GPI (0..3)
GPO (0..11)
Sync0
Sync-
detect
/D
I0/R(0..7)
Sync1
Sync-
detect
/D
I1/G(0..7)
Sync2
Sync-
detect
/D
I2/B(0..7)
Sync3
Sync-
detect
I3(0..7)
/D
Sync4
Sync-
detect
Ext-Trigg er(0..3)
Ext-Clock(0..3)
FPGA-2
DMA-
Controller
Frontend
ICD2061
FPGA-1
PCI-Core
EE-Prom
PCIBUS
Introduction
PC_EYE®2+
1—3
Page 10
Introduction
Introduction
User's Manual
1.2 Technical Details
The PC_EYE®2+ is intended for applications where up to four parallel
channels are digitized, such as RGB data with additional alpha channel or
four monochrome synchronous cameras are used ("quadro", analogous to
stereo). It permits connection of RGB cameras.
In quadro mode, the four images are stored in separate memory regions as
separate monochrome images. Cameras must be synchronized for this
operating mode. An on-board sync generator with four separate 75-ohm
outputs makes this easy.
The pixel clock is divided down from a internal Oscillator (up to 180 MHz)
or it is taken directly from the pixel clock input for camera synchronous
digitization. The A/D conversion rates programmable up to 32 MHz.
The region of interest, i.e. the part of the video information that is acquired,
can be defined on a pixel basis for all 4 video inputs with the same values not always the full frame has to be acquired.
A Sequencer is included to met the different timings from restart cameras.
1—4
PC_EYE®2+
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Introduction User's Manual
1.2.1 Video Input
The eight video inputs are AC-coupled and terminated with 75 Ohm
resistors. Four independent Multiplexes distribute the signal to the four A/D
converters.
The Sync-input is Composite-Sync and taken from one of the multiplexed
Video-inputs or directly from Video7.
1.2.3 Clock Input
When cameras with clock-output are used, the pixel clock may taken from
the camera. The external clock is AC-coupled and restored to TTL-Level.
To compensate different delays between the Video- and the clock-input, the
phase of the clock can be shifted in steps of 90°.
Introduction
The clock input is single-ended TTL; it is terminated at the receiving end
(PC_EYE input), with 75 Ohm resistor. How to activate the input see
el_SetVideoFormat.
Caution: Use a separate shielded cable for clock to minimize crosstalk to video.
PC_EYE®2+
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Introduction
User's Manual
Introduction
1.2.4 Trigger Input
The trigger inputs are opto-decoupled for optimum noise immunity (250 V
isolation voltage). TRIGIN+ is connected to the anode of a LED, TRIGINto the cathode of the LED via an internal 220-Ohm resistor. Since the LED
needs about 10..20 mA for full drive, a 5 V voltage source or a TTL output
is able to drive sufficient current through the circuit. Higher-voltage sources
may be used with additional limiting resistors. This trigger input is levelsensitive: a high (current is on) will activate continuous snaps; current must
be off to block the acquisition. See also: el_SetVideoFormat
Caution: Do not exceed a maximum of 30 mA LED current!
Alternativly the Optocoupler can be bypassed. In this case the trigger
function is inverted.
Figure 1—3: Opto-coupled Trigger Input Schematic
Trigger +
Trigger -
1—6
220 Ohm
Optocoupler
PC_EYE®2+
Trigger int.
Page 13
User's Manual
Introduction
1.2.5 Sync / Camera Control Output
For sync and camera control are up to 16 General-Proposes-Outputs
available. The first 12 GPOs are more flexible then the other 4 outputs.
1.2.5.1 Sync / Camera Control Output 0..11
Each Output can be mapped to one of 8 available signals:
· Static output
· Sync-generator Horizontal-sync
· Sync-generator Vertical-sync
· Internal Trigger
· Sequencer bit 2
· Sequencer bit 3
· Sequencer bit 4
· Sequencer bit 5
The logical polarity (High-/ Low-active) is for every Output independently
programmable.
oduc
Intrtion
1.2.5.2 Sync / Camera Control Output 12..15
Each one of this 4 outputs can be set to static low or high.
1.2.6 Power Supply out
To supply the cameras with Power, they are up to 4 Outputs with 12 V.
Each Output is protected with a self healing (PTC) 1100 mA fuse.
PC_EYE®2+
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Introduction
Introduction
User's Manual
1.2.7 Data Transfer
Since the PC_EYE-2+ is a Busmaster card, the video data from a Frame or
a whole sequence is moved to memory per DMA-transfer. No need for the
CPU to support this process. The maximum transfer rate in a system is 105
Mbytes/s, but this is a best case. In a real application the transfer rate is
depend of the chipset, graphic card and other active Busmaster cards.
1—8
PC_EYE®2+
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Introduction User's Manual
1.2.8 Packing Modes
There are 8 different modes handle several combinations of cameras
1.2.8.1 Mode Mono
Four individual monochrome channels, each 8 bit per Pixel.
1.2.8.2 Mode RGB24
One 24 bit RGB channel, packed in 32 bit.
1.2.8.3 Mode RGB32_Z
One 24 bit RGB channel stored as 32 bit, the 8 unused high order bits are
zero.
1.2.8.4 Mode RGB32_3
One 24 bit RGB channel stored as 32 bit. In the 8 high order bits (Alpha
channel) is monochrome channel 3 stored.
Introduction
1.2.8.5 Mode RGB555
One 15 bit RGB channel stored as 16 bit, the MSB is zero.
One 8 bit monochrome channel.
1.2.8.6 Mode RGB565
One 16 bit RGB channel stored as 16 bit.
One 8 bit monochrome channel.
PC_EYE®2+
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Introduction
Introduction
1.2.8.7 Mode RGB555M
One monochrome channel, stored as 15 bit RGB. In a 16 bit word the MSB
is zero.
Two 8 bit monochrome channels.
1.2.8.8 Mode RGB565M
One monochrome channel, stored as 16 bit RGB.
Two 8 bit monochrome channels.
User's Manual
1—10
PC_EYE®2+
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Hardware Installation User's Manual
2 Hardware Installation
What you need for installation and use of the PC_EYE family member
boards:
· PC with free PCI slot and Pentium (I -III) CPU.
· The PC_EYE board.
· PC_EYE2+: video camera appropriate for the PC_EYE2+
(monochrome). Mainboard with good PCI throughput because of
high bandwide needs
· Windows 98, ME, NT or 2000 operating system.
· Operation system dependent hardware driver setup and system
independent development files setup, downloaded from the internet
or obtained on CD.
2.1 Installation Procedure:
· Switch off computer,
Hardware
Installation
· Prepare site to observe electrostatic discharge (ESD) precautions
before opening computer or removing PC_EYE from its case: Touch
computer steel case during insertion/removal of PC_EYE or take
other precautions to ensure the absence of high voltages due to
electric charges.
· Open computer case,
· Remove blind back panel,
· Insert PC_EYE board into free PCI slot; the PC_EYE board must fit
into the slot without use of excessive force, make sure it sits firmly
in the slot and the PCI connector’s conductors sit completely inside
the connector.
· Fix PC_EYE back panel with screw,
· Close case,
PC_EYE®2+
2—1
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Hardware Installation
· Attach video (camera) cables - for a quick start and a first test
camera input #0 should be used with the video camera in freerunning mode. The camera should be known to deliver video signals
(testing can be done by feeding the camera signal to an appropriate
video monitor). See also: Connectors
User's Manual
Installation
Hardware
2.2 Cable
PC_EYE 250
To connect a RGB-Camera, use a standard PC-Monitor cable HD15 to
BNC.
To connect four monochrome cameras with BNC-Output use the ELTEC
cable V-CABL-183A.
PC_EYE 260
To connect four monochrome cameras with Hirose-Output use a standard
Hirose-Cable.
2—2
PC_EYE®2+
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User's Manual
Hardware Installation
2.3 Trouble Shooting - if it does not
work
Check if the driver and the user mode software are installed properly. See
chapter 3.
Grabber is not found by software:
Make sure the grabber is correctly plugged into the PCI-connector. If
mechanical problems can be excluded refer to the driver installation guide
to see if the driver has been installed correctly. Mixing up the recommended
installation order of hard and software can be a possible reason for an
incorrectly installed driver.
Rolling, corrupted image:
If a live image is visible after starting CFG2P, but it is rolling, this may
indicate that the PCI bus speed is not fast enough. Changing the BIOS setup
may help. If not, the motherboard chip set might be to slow. This is
especially true if a stable image can be seen with smaller horizontal regionof-interest (ROI) settings. Try switching off live mode in CFG2P.If the
image is corrupted and there is no dependency from the horizontal
acquisition width, the graphics board may be responsible for long PCI
blocking times. Disabling video acceleration in the control panel may help;
additionally, switching to a lower pixel depth (8 bpp instead of 16 or 24)
can be helpful.
Getting support:
Under some circumstances (hopefully rare ones...) you may not succeed in
getting everything running. Then you can contact us - but we need the
system configuration as exactly as possible. For that purpose we have
prepared a support request form where you can fill in your configuration
and submit this form (by fax or E-mail) together with the support request using this form will help us to help you faster.
are
Hardw
Installation
PC_EYE®2+
2—3
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Hardware Installation User's Manual
2.4 Connectors
The 15-pin female D connector is used to input video signals and several
other I/Os.
Installation
2.4.1 Jumpers and Connectors Placement
Hardware
Figure 2—1: Jumpers and Connectors Placement PC_EYE 250
X100
J104..6
X101
X106
S500
LED
D601
X700
Figure 2—2: Jumpers and Connectors Placement PC_EYE 260
GPO3 Output Sync or Camera control 0 TTL
EXTTRIG+0 Differencial Trigger high TTL high
EXTTRIG0
14
GPO4 Output Sync or Camera control 1 TTL 2.7 V @ 75 Ohm
EXTTRIG-0 Input Differencial Trigger low TTL low
GPO8 Output Sync or Camera control 8 TTL 2.7 V @ 75 Ohm
15
PVcc_1 Output Fused supply for cameras 12 V, 1100 mA
Input
Trigger TTL high
Input
Differencial Trigger low TTL low
Input
Trigger TTL high
Input
Differencial Trigger low TTL low
Input
Trigger TTL high
2—6
PC_EYE®2+
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Hardware Installation User's Manual
All signals with 1.0 Vpp level are AC-coupled and terminated with 75 Ohm
to GND.
The connector case of all connector X100 and X101 is connected to shield
potential which is separated from signal ground. If only the video inputs are
required a standard VGA monitor cable with BNC connectors on the
monitor end may be used.
Power supply output: On pin 15 12V are delivered to supply the
video camera. The current that can be drawn from this pin is limited
with a PTC resistor (Imax ca. 1100 mA).
Hardware
Installation
PC_EYE®2+
2—7
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Hardware Installation
User's Manual
2.4.4 Connector Hirose X102
Table 2—3: Layout Hirose Connector X102
Installation
Hardware
Pin Signal Direction Description Level
1
GND - Signal Ground 0V
2
PVcc0 Output Fused Supply for Cameras 12 V, 1100 mA
LED 1: Board selected - when the Configuration-Program is started, the
LED make a flash
LED 2: Capture - Acquisition in progress
LED 3: FiFo overrun - The FiFo run full
LED 4: FiFo Write Enable - valid data is written into the FiFo
3
4
2—16
PC_EYE®2+
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User's Manual
Specifications
3 Specifications
3.1 Electrical Specifications
Table 3—1: Electrical Specifications
Composite Video Input
video input Voltage 0.5 0.7 0.7 Vpp
sync input Voltage 0.15 0.3 0.4 Vpp
Offset input Voltage -4 +4 V
Clock
AC 0.2 5 Vpp
Offset+AC -4 4 V
Trigger Input
differential input voltage 2.0 7 Vpp
common input voltage -25 +25 V
Sync / Camera Control Output
@ 75 Ohm
output high voltage 3.0 3.15 3.75 V
output low voltage 0 0.1 V
@ 10 kOhm
output high voltage 3.3 3.6 4.0 V
output low voltage 0.0 0.1 V
Power Supply out
Output voltage 12 V
Output current 1.1 A
Power Requirement
Power Supply +5V (PCI-connector) 450 550 mA
Power Supply +12V (PCI-connector) 180 200 mA
Power Supply +12V (Power-connector) 4.4 A
Description Min. Typ. Max. Unit
Specifications
PC_EYE®2+
3—1
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Specifications User's Manual
3.2 Environmental Conditions
Storage Temperature: -20° C - 70° C
Operating Temperature: 0° C - 45°C (2 m/s forced air cooling)
Maximum Operating Humidity: 85 % relative
Specifications
3—2
PC_EYE®2+
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Software Installation User's Manual
4 Software Installation
The software consists of a development files setup and a hardware driver
setup.
The software can be downloaded at http://www.eltec.com in the
"support" menue under "Driver and Updates" or can be obtained as a CD on
demand.
The software consists of a development files setup and a hardware driver
setup.
Depending on the type of the grabber and the operation system used,
the hardware driver has to be installed before or after the hardware. Refer to the driver installation guide to find out which component has to be
installed first.
If you face difficulties like that the grabber is not found by the software
make sure the driver is installed correctly.
Software
Installation
PC_EYE®2+
4—1
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Software Installation
User's Manual
4.1 Getting started
First the platform specific driver has to be installed . Please have a look to
the "drvinstall.pdf" help file. After that, by calling "app_setup.exe" the
PC_EYE 2+ Basic Tools and Configuration Program will be installed.
The Grabber Configuration Program is now ready to use.