ELAN EPH3600 User Manual

EPH3600

RISC II Series

Microcontroller

Product

Specification

DOC. VERSION 0.1

ELAN

MICROELECTRONICS CORP.

October 2007

Trademark Acknowledgments:

IBM is a registered trademark and PS/2 is a trademark of IBM.
Windows is a trademark of Microsoft Corporation.

ELAN and ELAN logo are trademarks of ELAN Microelectronics Corporation.

Copyright © 2007 by ELAN Microelectronics Corporation

All Rights Reserved

Printed in Taiwan

The contents of this specification are subject to change wi t h out f urt her notice. ELAN Microelectronics assumes
no responsibility concerning the accuracy, adequacy, or completeness of this specification. ELAN
Microelectronics makes no commitment to update, or to keep current the information and material contained in
this specification. Such information and material may change to conform to each confirmed order.

In no event shall ELAN Microelectronics be made responsible for any claims attributed to errors, omissions, or
other inaccuracies in the information or material contained in this specification. ELAN Microelectronics shall
not be liable for direct, indirect, special incidental, or consequential damages arising from the use of such
information or material.

The software (if any) described in this specification is furnished under a license or nondisclosure agreement, and
may be used or copied only in accordance with the terms of such agreement.

ELAN Microelectronics products are not intended for use in life support appliances, devices, or systems. Use of
ELAN Microelectronics product in such applications is not supported and is prohib ited.
NO PART OF THIS SPECIFICATION MAY BE REPRODUCED OR TRANSMITTED IN ANY FORM OR
BY ANY MEANS WITHOUT THE EXPRESSED WRITTEN PERMISSION OF ELAN MICROELECTRONICS.

ELAN MICROELECTRONICS CORPORATION

Headquarters:

No. 12, Innovation Road 1
Hsinchu Science Park
Hsinchu, TAIWAN 308
Tel: [phone]
Fax: [phone]

http://www.emc.com.tw

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Elan (HK) Microelectronics

Corporation, Ltd.

Flat A, 19F., World Tech Centre
95 How Ming Street, Kwun Tong
Kowloon, HONG KONG
Tel: [phone]
Fax: [phone]

[e-mail]

Shenzhen:
Elan Microelectronics

Shenzhen, Ltd.

3F, SSMEC Bldg., Gaoxin S. Ave. I
Shenzhen Hi-tech Industrial Park
(South Area), Shenzhen
CHINA 518057
Tel: [phone]
Fax: [phone]

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Elan Information

Technology Group (U.S.A.)

PO Box 601
Cupertino, CA 95015
U.S.A.
Tel: [phone]
Fax: [phone]

Shanghai:
Elan Microelectronics

Shanghai, Ltd.

#23, Zone 115, Lane 572, Bibo Rd.
Zhangjiang Hi-Tech Park
Shanghai, CHINA 201203
Tel: [phone]
Fax: [phone]

Contents

Contents

1 General Description.................................................................................................. 1

1.1 Applications........................................................................................................2

2 Features ..................................................................................................................... 2

2.1 MCU Features....................................................................................................2

2.2 Peripheral...........................................................................................................2

2.3 Internal Specification..........................................................................................3

2.4 Elan Software Support (Option) ......................................................................... 3

3 Block Diagram........................................................................................................... 4

4 Pin Assignment......................................................................................................... 5

5 Pin Description.......................................................................................................... 6

5.1 MCU System Pins (9 Pins)................................................................................. 6

5.2 I/O Ports (32 Pins).............................................................................................. 7

6 Code Options............................................................................................................. 8

7 Function Description ................................................................................................ 9

7.1 Reset Function................................................................................................... 9

7.1.1 Power-up and Reset Timing................................................................................9

7.1.2 Register Initial Values........................................................................................11

7.2 Oscillator System .............................................................................................13

7.2.1 32.768kHz Crystal or 32.8kHz RC....................................................................13

7.2.2 Phase Locked Loop (PLL).................................................................................13

7.3 MCU Operation Mode ...................................................................................... 15

7.4 Wake-up Function............................................................................................ 17

7.5 Interrupt............................................................................................................18

7.5.1 Input Port A Interrupt .........................................................................................18

7.5.2 Capture Input Interrupt......................................................................................19

7.5.3 Speech Timer Interrupt......................................................................................19

7.5.4 Timer 0, Timer 1, and Timer 2 Interrupts...........................................................19

7.5.5 Peripheral Interrupt............................................................................................20

7.6 Program ROM Map .......................................................................................... 20

7.7 Data ROM Map ................................................................................................ 21

7.8 RAM Map Register

(RAM Size: 128 Bytes + 32 Banks × 128 Bytes = 4224 Bytes)........................

7.8.1 Special and Control Register of RAM................................................................21

7.8.2 Other Un-banked Register of RAM:..................................................................25

7.8.3 Banked Register of RAM:(selected by BSR) ....................................................25

7.9 Special Register Description............................................................................ 25

7.9.1 Indirect Addressing Pointer 0............................................................................26

7.9.2 Indirect Addressing Pointer 1............................................................................27

21

Product Specification (V0.1) 10.11.2007 • iii

(This specification is subject to change without further notice)

Contents

8 Peripheral................................................................................................................. 32

8.1 Timer 0 (16-bit Timer with Capture and Event Counter Functions).................. 32

8.1.1 Timer 0 Mode: ...................................................................................................32

8.1.2 Capture Mode: CPIN (Port B.5) Pin ..................................................................33

8.1.3 Event Counter Mode: EVIN (Port B.5) Pin ........................................................33

8.2 Timer 1 (8 Bits)................................................................................................. 37

8.3 Timer 2 (8 Bits)................................................................................................. 40

8.4 IR Generator: IROT (Port B.2) Pin.................................................................... 43

8.5 EL Timer (6 Bits)............................................................................................... 44

8.5.1 EL Generator Timing.........................................................................................46

8.6 Watchdog Timer (WDT).................................................................................... 47

8.7 Universal Asynchronous Receiver Transmitter (UART).................................... 48

8.7.1 Data Format in UART........................................................................................49

8.7.2 UART Modes.....................................................................................................49

8.7.3 UART Transmit Data.........................................................................................50

8.7.4 UART Receive Data..........................................................................................50

8.7.5 UART Baud Rate Generator.............................................................................51

8.7.6 UART Applicable Registers...............................................................................51

8.7.7 Transmit Counter Timing...................................................................................54

8.7.8 UART Transmit Operation (8-Bit Data with Parity Bit).......................................54

8.7.9 Receive Counter T iming....................................................................................55

8.8 A/D Converter................................................................................................... 57

8.8.1 A/D Converter Applicable Registers..................................................................58

8.8.2 Timing Diagram of General A/D Converter Application.....................................61

8.8.3 Correlation between A/D Converter and MCU Mode........................................61

8.8.4 A/D Converter Flowchart...................................................................................63

8.9 Serial Peripheral Interface (SPI)....................................................................... 65

8.9.1 Master Mode .....................................................................................................66

8.9.2 Slave Mode .......................................................................................................67

8.9.3 SPI Pin Descriptions..........................................................................................67

8.9.4 SPI Applicable Registers...................................................................................67

8.9.5 SPI Timing Diagrams.........................................................................................70

8.10 Speech Synthesizer.......................................................................................... 72

8.10.1 Speech Function................................................................................................72

8.11 DAC Function................................................................................................... 74

8.11.1 DAC Function Block Diagram ...........................................................................74

8.11.2 DAC Function Registers....................................................................................75

iv • Product Specification (V0.1) 10.11.2007

(This specification is subject to change without further notice)

Contents

9 Electrical Characteristic ......................................................................................... 76

9.1 Absolute Maximum Ratings.............................................................................. 76

9.2 Recommended Operating Conditions.............................................................. 76

9.3 DC Electrical Characteristics............................................................................ 76

9.4 AC Electrical Characteristics............................................................................78

10 Application Circuit ................................................................................................. 79

11 Instruction Set......................................................................................................... 80

12 Pad Diagram ............................................................................................................83

Specification Revision History

Doc. Version Revision Description Date

0.1 Initial Preliminary Version 2007/10/12

Product Specification (V0.1) 10.11.2007 • v

(This specification is subject to change without further notice)

Contents

vi • Product Specification (V0.1) 10.11.2007

(This specification is subject to change without further notice)

1 General Description

The EPH3600 is an 8-bit RISC MCU embedded with following:

 10 bits SAR A/D converter with touch screen controller
 One 16-bit general timer with capture and event counter functions,
 Two 8-bit timers  IR generator
 EL timer  Watchdog timer
 SPI  UART
 One current D/A.

Moreover, the EPH3600 is equipped with a large size user RAM and program/data
memory. The MCU is most suitable for products involving handwriting recognition
application that requires high performance with low cost solution; such as SMS,
Stylus Remote Controller, mobile phones, handwriting input device, etc.

The MCU’s core is ELAN’s second generation RISC (RISC II) based IC. The core is
specifically designed to provide a low power consumption portable device. It
supports FAST, SLOW, and Idle mode, as well as Sleep mode for low power
consumption application.

EPH3600

RISC II Series Microcontroller

IMPORTANT NOTES

■ Do not use Register BSR (05h) Bit 7 ~ Bit 5

■ Do not use Register BSR1 (07h) Bit 7 ~ Bit 5

■ Do not use Special Register (04h)

■ Do not use Special Register (1Bh)

■ Do not use Special Register (1Ch)

■ Do not use Special Register (1Fh)

■ Do not use Special Register (32h)

■ Do not use Special Register (33h)

■ Do not use Special Register (37h)

■ Do not use Special Register (38h)

■ Do not use Special Register (39h)

■ Do not use Special Register (45h)

■ Do not use Special Register (46h)

■ Do not use Special Register (47h)

■ Do not use Special Register (4Fh)

■ Do not use Special Register (50h)

■ Do not use Special Register (51h)

■ Do not use Special Register (52h)

■ Do not use Special Register (53h)

■ Do not use JDNZ and JINZ at FSR1 (09h) special register

■ Do not use Register TABPTRH (0Dh) Bit 6

Product Specification (V0.1) 10.11.2007 • 1

(This specification is subject to change without further notice)

EPH3600

RISC II Series Microcontroller

1.1 Applications

 Handwriting Recognition
 Dictionary, Data Bank
 Stylus Remote Controlller

2 Features

2.1 MCU Features

 8-bit RISC MCU
 8×8 multiplier with controllable signed or unsigned operation
 Operating voltage and speed: 16MHz~11MHz @ 2.9V~3.6V, 10MHz @

2.2V~3.6V, 4MHz @ 1.6V~3.6V

 One Instruction cycle time = 2 × System clock time
 Program ROM addressing: 16K words maximum
 Data ROM addressing: 256K words maximum
 128 bytes un-banked RAM including special registers and common registers
 32×128 bytes banked RAM
 RAM stack has a maximum of 128 levels
 Table Look Up function is fast and highly efficient when implemented with Repeat

instruction

 Register-to-Register move instruction
 Compare and Branch in one instruction (2 cycles)
 Single Repeat function (256 repeat times maximum)
 Decimal Add & Sub instruction
 Full range Call and Jump capability (2 cycles)

2.2 Peripheral

 One input port (Port A) and 24 gene ral I/O pins (Port B, Port C, Port D)
 1-channel Speech Synthesizer
 16-bit timer (Timer 0) with capture and ev ent counter functions
 8-bit timer (Timer 1) with wake-up function
 8-bit timer (Timer 2)
 8-bit IR generator

2 • Product Specification (V0.1) 10.11.2007

(This specification is subject to change without further notice)

 6-bit EL Timer output
 A current D/A for speech application
 8-bit Watchdog Timer
 10 bits resolution SAR A/D converter with 6 channels general analog input and 2

channels for touch panel application

 SPI (Serial Peripheral Interface)
 UART (Universal Asynchronous Receiver and Transmitter)

2.3 Internal Specification

 Watchdog Timer with on-chip RC oscillator
 MCU mode: Sleep Mode, Idle Mode, Slow Mode, and Fast Mode
 Supports either RC oscillation or crystal oscillation system clock

EPH3600

RISC II Series Microcontroller

 PLL can be turned on at Fast Mode, and controlled by PEN bit when MCU is in

Slow Mode or Idle Mode

 MCU Wake-up function includes input wake up, Ti mer 1 wake up, touch panel

wake up, SPI wake up, and A/D wake up

 MCU interrupt function includes Input Port interrupt, Touch Panel interrupt,

Capture interrupt, Speech Timer interrupt, Timer Interrupt (Timers 0~2), A/D
interrupt, SPI interrupt, and UART interrupt

 MCU reset function includes power-on reset, RSTB pin reset, and Watchdog

timer reset

2.4 Elan Software Support (Option)

 Hand writing recognition core
 1-channel Speech
 ADPCM decoder
 ADPCM encoder

Product Specification (V0.1) 10.11.2007 • 3

(This specification is subject to change without further notice)

EPH3600

RISC II Series Microcontroller

3 Block Diagram

VREX

RSTB TEST VDD OSCI OSCO

8 x 8 Mul

PRODH PRODL

PRODL

Addressing Co n tro l U n it

Speech Synthesizer

D/A

SAR A/D

I/O Control

ALU

Shifter

UART

Timer 0 ~ Timer 2 /

EL / WDT Timer

Key IO

AVDD

IR Generator

SPI

Timing Generator

PLLC

RAM

ROM

88

8

Po rtD PortC PortB P ortA

Figure 1-1 EPH3600 Block Diagram

4 • Product Specification (V0.1) 10.11.2007

8

VSS

(This specification is subject to change without further notice)

4 Pin Assignment

No. Pin Name No. Pin Name No. Pin Name No. Pin Name

1 N.C. 26 Port C.6 (YN) 51 N.C. 76 N.C.
2 N.C. 27 Port C.5 (ADIN3/XP) 52 N.C. 77 N.C.
3 N.C. 28 Port C.4 (ADIN4/YP) 53 PD.6 (SPISDO) 78 N.C.
4 N.C. 29 N.C. 54 PD.7 (SPISDI) 79 N.C.
5 N.C. 30 N.C. 55 Port A.0 80 N.C.
6 N.C. 31 Port C.3 (ADIN5) 56 Port A.1 81 N.C.
7 N.C. 32 Port C.2 (ADIN6) 57 Port A.2 82 N.C.
8 N.C. 33 Port C.1 (ADIN7) 58 Port A.3 83 N.C.

9 N.C. 34 Port C.0 (ADIN8) 59 Port A.4 84 N.C.
10 N.C. 35 Port B.0 60 Port A.5 85 N.C.
11 N.C. 36 Port B . 1 ( DAO) 61 Port A.6 86 N.C.

12 N.C. 37 Port B.2 (IROT) 62 Port A.7 87 N.C.
13 N.C. 38 Port B.3 (EL CK) 63 N.C. 88 N.C.

14 N.C. 39 Port B.4 (CHOP) 64 N.C. 89 N.C.
15 N.C. 40 Port B.5 (EVIN/CPIN) 65 N.C. 90 N.C.
16 N.C. 41 Port B.6 (UTXD) 66 N.C. 91 N.C.
17 N.C. 42 Port B.7 (URXD) 67 N.C. 92 N.C.
18 TEST 43 VDD 68 N.C. 93 N.C.
19 PLLC 44 VSS 69 N.C. 94 N.C.
20 OSCI 45 Port D.0 70 N.C. 95 N.C.
21 OSCO 46 Port D.1 71 N.C. 96 N.C.
22 RSTB 47 Port D.2 72 N.C. 97 N.C.
23 VREX 48 Port D.3 73 N.C. 98 N.C.
24 AVDD 49 PD.4 (SPISS) 74 N.C. 99 N.C.
25 Port C.7 (XN) 50 PD.5 (SPISCK) 75 N.C. 100 N.C.

EPH3600

RISC II Series Microcontroller

100 99 98 ......

1
2
3

EPH3600

(top view)

Product Specification (V0.1) 10.11.2007 • 5

(This specification is subject to change without further notice)

EPH3600

RISC II Series Microcontroller

5 Pin Description

5.1 MCU System Pins (9 Pins)

Name

AVDD

VSS
VDD

VSS

RSTB I

TEST I Normally connected to VSS. Reserved for testing use.

OSCI/RC

OSCO

PLLC I

VREX I/O

I/O/P
Type

P

P

I

O

Description

Analog positive power supply. The range is 2.2V~3.6V. Connect to VSS
through capacitors (0.1µF).

Digital and Analog positive power supply. Range is 2.2V~3.6V. Connect
to VSS through capacitor (0.1µF).

System reset input with built-in pull-up resistor (100KΩ Typical).
Low: RESET asserted
High: RESET released

RC or Crystal selection by Code Option.
32768 Hz oscillator pins. Connect to VSS through capacitor (20pF)
RC oscillator connector pin. Connect to VDD through a resistor (2MΩ).

PLL capacitor connector pin. Connect to VSS through capacitor
(0.047µF).

External or internal reference voltage for A/D converter. Connect to VSS
through capacitor (0.1µF).

6 • Product Specification (V0.1) 10.11.2007

(This specification is subject to change without further notice)

5.2 I/O Ports (32 Pins)

EPH3600

RISC II Series Microcontroller

Name

Port A I

Port B

Port C

Port D

I/O/P
Type

I/O

I

O

I
O
O
O
O
O

I/O

O
O

I

I

I

I

I

I

I/O

I
O

I/O

I

I/O

Description

General Input port for special functions, i.e., Wake-up and
Interrupt
Bit 7: ON key input

Bits 6~0: Key matrix input pins
General Input/Output port

Bit 7: UART Rx pin
Bit 6: UART Tx pin
Bit 5: Event Counter/Capture input pin
Bit 4: EL CHOP output pin
Bit 3: EL CK output pin
Bit 2: IR output pin
Bit 1: Current D/A output pin
Bit 0: I/O pin

General Input/Output port
Bit 7: Touch screen X direction negative pin
Bit 6: Touch screen Y direction negative pin
Bit 5: Touch screen X direction positive pin & A/D input Channel 3
Bit 4: Touch screen Y direction positive pin & A/D input Channel 4
Bit 3: A/D input Channel 5
Bit 2: A/D input Channel 6
Bit 1: A/D input Channel 7
Bit 0: A/D input Channel 8

General Input/Output port
Bit 7: Serial data input pin
Bit 6: Serial data output pin
Bit 5: Serial clock Input/Output pin
Bit 4: /Slave Select pin

Bit 3~0: I/O pin

Product Specification (V0.1) 10.11.2007 • 7

(This specification is subject to change without further notice)

EPH3600

RISC II Series Microcontroller

6 Code Options

The Code Options are located at Address 0x000C~0x0013 of the Program ROM:

 Oscillator (OSCSEL) : “RC” oscillator
“Crystal” oscillator (Default)

 Initial mode after reset : “Slow” mode
“Fast” mode (Default)

 Port C.7 function selection bit : “XN for touch panel”
“General I/O function” (Default)

 Port C.6 function selection bit : “YN for touch panel”
“General I/O function” (Default)

 Port C.5 function selection bit : “XP for touch panel/ADIN3”
“General I/O function” (Default)

 Port C.4 function selection bit : “YP for touch panel/ADIN4”
“General I/O function” (Default)

 Port C.3 function selection bit : “ADIN5”
“General I/O function” (Default)

 Port C.2 function selection bit : “ADIN6”
“General I/O function” (Default)

 Port C.1 function selection bit : “ADIN7”
“General I/O function” (Default)

 Port C.0 function selection bit : “ADIN8”
“General I/O function” (Default)

 DAC function selection bits:

DAC Function Selection Port B.0 and Port B.1 Function

DAC is used Port B.1 is DAO for D/A, Port B.0 is General I/O
DAC usage is prohibited General I/O (Default)

 Select UART standard baud rate : “PLL frequency is 9.83MHz” (Default)
“PLL frequency is 14.745MHz”

 Port A pull-h and DAC control bit: “PAPUR register, DAC bit ineffective” (Default)
“PAPUR register, DAC bit effective”

 EL Output TIming : “Output is from carrier gating with 128Hz and CKP” (Default)
“CHOP output is directly from carrier”

8 • Product Specification (V0.1) 10.11.2007

(This specification is subject to change without further notice)

7 Function Description

7.1 Reset Function

A Reset can be caused by:

 Power-on voltage detector reset and power-on reset
 WDT timeout
 RSTB pin pull low

VDD

EPH3600

RISC II Series Microcontroller

P o w e r-o n R e se t

RSTB

+

0.1uF

WDT Reset

Figure 7-1 On-chip Reset Circuit

7.1.1 Power-up and Reset Timing

VDD

RSTB

Tpwr

OSC

Twup

CPU Work

/Chip R eset

Twup1

Figure 7-2 Power-up and Reset Timing

Symbol Characteristics Min. Typical Max. Unit

Tpwr Oscillator start up time 100 226 300 ms

Twup CPU warm up time 260 340 550 ms

Twup1 CPU reset time 18 22 44 ms

Product Specification (V0.1) 10.11.2007 • 9

(This specification is subject to change without further notice)

EPH3600

RISC II Series Microcontroller

 Status (R0Fh)

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

/TO /PD SGE SLE OV Z DC C

Bit 0 (C): Carry flag or inverse of Borrow flag (B)
When in SUB operation, borrow flag is indicated by the inverse of carry
bit (B = /C)

Bit 1 (DC): Auxiliary carry flag
Bit 2 (Z): Zero flag
Bit 3 (OV): Overflow flag. Use in signed operation when Bit 6 carry into or borrow

from a signed bit (Bit 7).
Bit 4 (SLE): Computation result is less than or equal to zero (Negative value) after

a signed arithmetic. It is only affected by a HEX arithmetic instruction.
Bit 5 (SGE): Computation result is greater than or equal to zero (Positive value) after

a signed arithmetic. It is only affected by a HEX arithmetic instruction.

NOTE

1. When OV=1 after a signed arithmetic, user can check the SGE and SLE bits to
determine whether an overflow (carry into a signed bit) or underflow (borrow from
a signed bit) occurs.

OV=1 and SGE=1 → overflow occurs

OV=1 and SLE=1 → underflow occurs

2. When overflow occurs, you should clear the MSB of the Accumulator in order to
get the correct value.

When underflow occurs, you should set the MSB of the Accumulator in order to

get the correct value.

Example 1: ADD a positive value to another positive value, and ACC signed bit will

be affected.

MOV ACC, #60h ; Signed number +60h
ADD ACC, #70h ; +60h ADD WITH +70h

After instruction: ACC = 0D0h
SGE=1, means the result is greater than or equal to 0 (positive value)
OV=1, means the result is carry into a signed bit (Bit 7), overflow occurs.

Correct the signed bit: ACC = 50h (Clear the signed bit)
The actual result = +80h (OV=1) + 50h = +0D0h

Example 2: SUB a positive value from a negative value, and ACC signed bit will be

affected.

MOV ACC, #50h ; Signed number +50h
SUB ACC, #90h ; +50h SUB from –70h (Signed

number of 90h)

10 • Product Specification (V0.1) 10.11.2007

(This specification is subject to change without further notice)

EPH3600

RISC II Series Microcontroller

After instruction: ACC = 40h

SLE=1, means the result is less than or equal to 0 (negative value)
OV=1, means the result is borrow from a signed bit (Bit 7), underflow

occurs.

Correct the signed bit: ACC = 0C0h (Set the signed bit)
The actual result = –80h (OV=1) + 0C0h (signed number of 0C0h) = 40h

Bit 6 (/PD): Reset to 0 when entering SLEEP mode. Set to 1 by “WDTC” instruction,

power-on reset, or during a Reset pin low condition.

Bit 7 (/TO): Reset to 0 during WDT time out reset. Set to 1 by “WDTC” instruction,

entering SLEEP MODE, power-on reset, or during a Reset pin low
condition.

When a reset occurs, the special function register will be reset to its initial value
except for the /TO and /PD bits of the STATUS register.

Bit 7 (/TO) Bit 6 (/PD) Event

0 0 WDT time out reset from SLEEP mode
0 1 WDT time out reset (not SLEE P mode)
1 0 Reserved
1 1 Power on or RSTB pin low condition

7.1.2 Register Initial Values

 Special Register:

Addr. Name Initial Value Addr. Name Initial Value

00h INDF0 −−−− −−−−
01h FSR0 0000 0000 11h PRODL uuuu uuuu
02h PCL 0000 0000 12h PRODH uuuu uuuu
03h PCM 0000 0000 13h ADOTL 0−0− −0uu
04h (Not Used) −−−− −−−− 14h ADOTH uuuu uuuu
05h BSR −−−0 0000 15h UARTTX ×××× ××××
06h STKPTR 0000 0000 16h UARTRX ×××× ××××
07h BSR1 −−−0 0000 17h Port A ×××× ××××
08h INDF1 −−−− −−−−

09h FSR1 1000 0000 19h Port C ×××× ××xx
0Ah ACC ×××× ×××× 1Ah Port D ×××× xxxx
0Bh TABPTRL 0000 0000 1Bh (Not Used) −−−− −−−−
0Ch TABPTRM 0000 0000 1Ch (Not Used) −−−− −−−−
0Dh TABPTRH 0−00 0000 1Dh R1D ×××x x×××
0Eh CPUCON 0−−0 000c
0Fh STATUS cu×× ××××

1

10h TRL2 uuuu uuuu

1

18h Port B ×××x x×××

2

1Eh R1E ×××x x×××4

3

1Fh (Not Used) −−−− −−−−

4

Product Specification (V0.1) 10.11.2007 • 11

(This specification is subject to change without further notice)

EPH3600

RISC II Series Microcontroller

 Control Register:

Addr. Name Initial Value Addr. Name Initial Value

20h PFS 0010 0000 3Bh PCCON 0000 0000
21h STBCON 0−−− −−−− 3Ch PLLF ×××× ××××
22h INTCON 0000 0000 3Dh T0CL 0000 0000
23h INTSTA 0000 0000 3Eh T0CH 0000 0000
24h TRL0L uuuu uuuu 3Fh SPICON 0000 0000
25h TRL0H uuuu uuuu 40h SPISTA −−00 0000
26h TRL1 uuuu uuuu 41h SPRL ×××× ××××
27h TR01CON 0000 0000 42h SPRM ×××× ××××
28h TR2CON 0000 0000 43h SPRH ×××× ××××

29h TRLIR uuuu uuuu 44h SFCR 0000 0000
2Ah ELCON 00uu uuuu 45h (Not Used) ×××× ××××
2Bh POST_ID −−11 −−00 46h (Not Used) ×××× ××××

2Ch ADCON 0101 0000 47h (Not Used) ×××× ××××
2Dh PAINTEN 0000 0000 48h SPHDR 0000 0000

2Eh PAINTSTA 0000 0000 49h SPHTCON 0000 0000
2Fh PAWAKE 0000 0000 4Ah SPHTRL 0000 0000
30h UARTCON 0000 0010 4Bh VOCON 0−−−000

31h UARTSTA 0000 0000 4Ch TR1C 1111 1111
32h (Not Used) −−−− −−−− 4Dh TR2C 1111 1111

33h (Not Used) −−−− −−−− 4Eh ADCF uuuu uuuu
34h DCRB 1111 1111 4Fh (Not Used) −−−− −−−−
35h DCRC 1111 1111 50h (Not Used) −−−− −−−−
36h DCRDE −−−− 0011 51h (Not Used) −−−− −−−−
37h (Not Used) −−−− −−−− 52h (Not Used) −−−− −−−−
38h (Not Used) −−−− −−−− 53h (Not Used) −−−− −−−−
39h (Not Used) −−−− −−−− 54h PAPUR 0000 0000
3Ah PBCON 0000 0000 55h PACON −−−− 0110

Legend: “×” = unknown “−” = unimplemented, read as “0”
“u” = unchanged “c” = value depending on the condition

1

Not a physical register.

2

Bit 0 (MS0) of RE (CPUCON) is reloaded from “INIM” bit of code option when the

MCU is reset.

3

If it is a power-on reset or RSTB pin is at low condition, the /TO bit and /PD bit of RF
(STATUS) are set to “1”. If it is a WDT time out reset, the /TO bit is cleared and /PD
bit is unchanged.

4

R1D, R1E are generated register RAM.

5

PAPUR can be used only by the code option setting.

5

12 • Product Specification (V0.1) 10.11.2007

(This specification is subject to change without further notice)

××=

××=

7.2 Oscillator System

EPH3600

RISC II Series Microcontroller

OSCI

OSCO

32.8kHz

RC/Crystal

Osc.

OSCSEL

of

Code Option

PLL

PEN

Fosc

A/D Clock

Factor

F

PLL

FSS

0

1

MS0

Fsystem

F

A/D

Figure 7-3 Oscillator System Function Block Diagram

7.2.1 32.768kHz Crystal or 32.8kHz RC

For the 32.8kHz RC oscillator, connect a 2MΩ pull-up resistor to OSCI pin and the
OSCO pin should be floating.

For the 32.768kHz Crystal oscillator, connect the crystal between OSCI and OSCO
pins. Then connect the OSCI and OSCO pins to ground through a 20pF capacitor.

VDD

OSCI

2Mohm

OSCO

OSCI

OSCO

32.768kHz Crystal
Oscillator

32.8kHz RC Oscillator

Figure 7-4 Crystal and RC Oscillator Circuit Diagram

7.2.2 Phase Locked Loop (PLL)

 PLLF (R3Ch): Store the actual PLL frequency value. It is used to check whether

the PLL frequency is stable or not.

2

 PFS (R20h): Target PLL frequency select register. System clock can be fine

tuned from 0.983MHz to 16MHz. The initial value of the PFS
register after a chip reset is set at “20h” (F

2

arg

FPLLFF

OSCactual

=2.097 MHz)

PLL

FPFSF

OSCett

Product Specification (V0.1) 10.11.2007 • 13

(This specification is subject to change without further notice)

EPH3600

RISC II Series Microcontroller

PFS Register Ftarget (MHz) PFS Register Ftarget (MHz)

0~14 N.A.1

15 0.983 122 7.995
31 2.032 137 8.978
46 3.015 150 9.83
61 3.998 153 10.027
76 4.981 255 16.712

1

PFS=0~14 is not available.

2

When UART is enabled, the system clock should be 9.83 MHz (PFS=150) or 14.745 MHz

(PFS=225).
The table is based on 32.768kHz oscillator frequency.
The Maximum range of PLL is 983 kHz ~ 16.712 MHz.

92 6.029

107 7.012

2

PLLC

0.047uF

PLL Osc illa t o r

Figure 7-5 PLL Oscillator Circuit Diagram

14 • Product Specification (V0.1) 10.11.2007

(This specification is subject to change without further notice)

7.3 MCU Operation Mode

RESET

operation

FA S T MODE is th e in itial m o d e
after Reset

SLOW MODE is th e in itia l mode
after Reset

Select by IM bit of Code Option register

Reset

Reset

Reset Release

Wakeup
& MS0=1

Reset Release

Reset

SLEEP
MODE

(CPU stops)

MODE

Reset

wakeup
& MS0=1

MS1= 0 &
“SLEP”

32K OSC.:oscillating
PLL:turned on

FAST

MS1=1 &
“SLEP”

IDL E

MODE

(CPU stops)

32K OSC.:stop
PLL: stopped

Wakeup
& MS0=0

MS0=1

MS0=0

MS1=1 &
“SLEP”

32K O S C.:Oscillating
PEN=0->PLL stopped
PEN=1->PLL turned on

EPH3600

RISC II Series Microcontroller

MS1=0 &
“SLEP”

Wakeup
& MS0=0

32K OSC.:oscil la ti n g
PEN=0->PL L : stopped
PEN=1->PL L turned on

SLOW
MODE

Figure 7-6 Operation Block Diagram

MCU Mode with Function Table:

Mode

Device

OSC (32.768kHz) × √ √ √
Fsystem × × From OSC From PLL
PLL × √ √ √
A/D conversion × √ 2 √ √
Timers 0~2, IR generator × √ √ √
INT × 1 × 1 √ √
SPI √ (slave) √ (slave) √ √
UART × × × √
Speech Synthesizer × × × √
Current D/A × × √ √

Legend: “ √ ” = function is available if enabled “ × ” = function is Not available

1

Interrupt flag will be recorded but not executed until the MCU wakes up.

2

It is recommended to operate the A/D converter in Idle mode to lower the noise couple from

the MCU clock.

SLEEP IDLE SLOW FAST

Product Specification (V0.1) 10.11.2007 • 15

(This specification is subject to change without further notice)

EPH3600

RISC II Series Microcontroller

 CPUCON (R0Eh):

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

PEN - - SMCAND SMIER GLINT MS1 MS0

Sleep Mode: When MS1 bit is set to ‘0’ and “SLEP” instruction is ex ecuted, the

Idle Mode: When MS1 bit is set to ‘1’ and “SLEP” instruction is executed, the

Slow Mode: When MS0 bit is set to ‘0’, the MCU will enter into Slow mode.
Fast Mode: When MS0 bit is set to ‘1’, the MCU will enter into Fast mode.
PLL enable: It is only effective when the MCU is in Idle mode or SLOW mode.

MCU Mode PEN Bit PLL On/Off

SLEEP × Off

IDLE/SLOW

FAST × On

MCU will enter into Sleep mode.

MCU will enter into Idle mode.

0 Off
1 On

F

PLL

Target+5%

Target

T arget-5 %

Ts

FAS T M O D E

Ts

MS0

System
clock

Target

32.768K

0m s

SLOW
MODE

0m s

0.244ms

Figure 7-7 MCU Operation Timing Diagram

NOTE

1. Switch from Slow mode to Fast mode at Time = 0ms

2. The System clock will switch to FPLL after 8 oscillation clocks, and the system
clock will then increase to about hundreds of kHz.

3. The PLL frequency will be stable (±5%) at Time = Ts (2ms ~ 5ms).

Time

Tim e

16 • Product Specification (V0.1) 10.11.2007

(This specification is subject to change without further notice)

7.4 Wake-up Function

EPH3600

RISC II Series Microcontroller

Mode

Device

I/O wake up √ √ × ×
Touch panel wake up √ √ × ×
Timer1 wake up × √ × ×
A/D wake up × √ × ×
SPI wake up √ (Slave) √ (Slave) × ×

Legend: √ = Function is available if en abled × = Function is NOT available

Sleep Idle Slow Fast

 Flowchart:

Change PLL F requency

BS CPUCO N, PEN Turn on the PLL

BC CPUCON, MS0 Change CPU to Slow mode

M O V A ,# 1 2 2
M O V P F S ,A

Chan ge PLL fre quency to
8MHz

SCALL DLY5m s

BS CPUCO N, M S0

BC CPUCON, PEN

G o to M a in R o u tin e

 Code Example:

Entry FAST mode

MOV A,#122 ;8MHz
MOV PFS,A
BS CPUCON,MS0

Entry SLOW mode

BC CPUCON,MS0

D e la y fo r 5 m s to w a it fo r
PLL to be stable

Change CPU to Fast m ode

T u rn o ff th e P L L

Entry IDLE mode
BS CPUCON,MS1
SLEP
NOP

Entry SLEEP mode
BC CPUCON,MS1
SLEP
NOP

Product Specification (V0.1) 10.11.2007 • 17

(This specification is subject to change without further notice)

EPH3600

RISC II Series Microcontroller

7.5 Interrupt

When an interrupt occurs, the GLINT bit of the CPUCON register is reset to 0, which
disables all interrupts, including Level 1 ~ Level 5. Setting this bit to 1 will enable all
un-mask interrupts.

Interrupt Level Interrupt Source Start Address Remarks

RESET 0x00000
Level 1 Input Port 0x00002 PAINT, PIRQB
Level 2 Capture 0x00004 CPIF
Level 3 Speech T imer 0x00006 SPHTI
Level 4 Timers 0~2 0x00008 TMR0I, TMR1I, TMR2I
Level 5 Peripheral 0x0000A UERRI, UTXI, URXI, ADIF, SRBFI

 Code Example:

; ***** Reset program
ResetSEG CSEG 0X00

LJMP MSTART ;(0X00) Initialize
LJMP INPTINT ;(0X02) Input Port and Touch Panel INT

LJMP CAPINT ;(0X04) Capture Input INT

LJMP SPHINT ;(0X06) Speech Timer INT

LJMP TIMERINT ;(0X08) Timer-0,1,2 INT
LJMP PERIPH ;(0X0A) Peripheral INT

PgmSEG CSEG 0X20

;--Push interrupt register
PUSH:
MOVPR
StatusBuf,Status
MOV
AccBuf,A
RET

;--POP interrupt register
POP:
MOV A,AccBuf

MOVRP
Status,StatusBuf
RETI

7.5.1 Input Port A Interrupt

1. Port A Interrupt (Falling edge trigger): Port A is used as external interrupt/wake-up
input.

2. Touch Panel Interrupt (Level trigger): When Port C.7 ~ Port C.4 (X+, X-, Y+ and Y-)
are connected to touch panel input pins and
touch panel is touched, PIRQB interrupt
occurs.

 Code Example:

;===Input Port And Touch Panel Interrupt

INPTINT:
S0CALL PUSH
JBC ADCON,PIRQB,toTPINT
TEST PAINTSTA
JBC STATUS,F_Z,toPAINT
SJMP POP

18 • Product Specification (V0.1) 10.11.2007

(This specification is subject to change without further notice)

;---Touch panel interrupt
toTPINT:

:
SJMP POP
;---Port A interrupt
toPAINT:
CLR PAINTSTA
:
SJMP POP

EPH3600

RISC II Series Microcontroller

7.5.2 Capture Input Interrupt

The Capture function is used to capture an input event at rising to falling edge, falling
to rising edge, rising to rising edge, or falling to falling edge. When every event input
edge is detected, a Capture interrupt occurs.

 Code Example:

; === Capture Input Interrupt

CAPINT:
S0CALL PUSH
JBS INTSTA,CPIF,toCAPINT
SJMP POP

;---Capture input interrupt
toCAPINT:
BS INTSTA,CPIF
:
SJMP POP

7.5.3 Speech Timer Interrupt

Speech Timer is an 11-bit timer for time counting. When the counting value of the
Speech Timer underflows, an interrupt occurs and the SPHTRL value will be reloaded
to counting value.

 Code Example:

; === Speech Timer Interrupt

SPHINT:
S0CALL PUSH
JBS PHTCON,SPHTI,toSPHINT
SJMP POP

; --- To speech timer interrupt
toSPHINT:
BC SPHTCON,SPHTI
:
SJMP POP

7.5.4 Timer 0, Timer 1, and Timer 2 Interrupts

1. Timer 0 Interrupt: Timer 0 is a 16-bit timer for general time counting. When the
counting value is larger than TRL0H : TRL0L value, a Timer 0
interrupt occurs.

2. Timer 1 Interrupt: Timer 1 is an 8 bit-timer for time counting and wake-up function.
When the counting value of Timer 1 underflows, an interrupt
occurs and the TRL1 value will be reloaded to counting value.

3. Timer 2 Interrupt: Timer 2 is an 8-bit timer for time counting. When the counting
value of Timer 2 underflows, an interrupt occurs and the TRL2
value will be reloaded to counting value.

 Code Example:

; === Timer-0,1,2 Interrupt

TIMERINT:
S0CALL PUSH
JBS INTSTA,TMR0I,toTM0INT
JBS INTSTA,TMR1I,toTM1INT
JBS INTSTA,TMR2I,toTM2INT
SJMP POP

; --- Timer 0 Interrupt
toTM0INT:
BC INTSTA,TMR0I
:
SJMP POP
; --- Timer 1 Interrupt
toTM1INT:
BC INTSTA,TMR1I
:
SJMP POP
; --- Timer 2 Interrupt
toTM2INT:
BC INTSTA,TMR2I
:
SJMP POP

Product Specification (V0.1) 10.11.2007 • 19

(This specification is subject to change without further notice)

EPH3600

RISC II Series Microcontroller

7.5.5 Peripheral Interrupt

1. A/D (Analog to Digital converter) Interrupt: A/D is used to convert analog input

2. UERRI Interrupt: UART receiving error interrupt

3. UTXI Interrupt: UART transfer buffer empty interrupt

4. URXI Interrupt: UART receiver buffer full interrupt

5. SRBFI Interrupt: SPI read buffer full interrupt

 Code Example:

; === Peripheral Interrupt

PERIPH:
S0CALL PUSH
JBS INTSTA,ADIF,toADINT
JBS INTSTA,UERRI,toUERRINT
JBS INTSTA,UTXI,toUTXINT
JBS INTSTA,URXI,toURXINT
JBS SPISTA,SRBFI,toSPINT
SJMP POP

7.6 Progra m ROM Map

signal to digital output bits. When the conversion is completed,
an A/D interrupt occurs.

;--A/D interrupt
toADINT:
BC INTSTA,ADIF
:
SJMP POP
;--UART Receiving Error Interrupt
toUERRINT:
BC INTSTA,UERRI
:
SJMP POP
;--UART Tx Buffer Full Interrupt
toUTXINT:
BC INTSTA,UTXI
:
SJMP POP
;--UART Rx Buffer Full Interrupt
toURXINT:
BC INTSTA,URXI
:
SJMP POP
;--SPI Interrupt
toSPINT:
BC SPISTA,SRBFI
:
SJMP POP

8K Words × 2 Segments = 16K Words

Address Segment

0000h

|
000Bh
000Ch

|

0013h
0014h

|
001Fh

0020h

|
3FFFh

20 • Product Specification (V0.1) 10.11.2007

Interrupt Vector

(12 words)

Code Option

(8 words)

Test Program

(12 words)
Segment 0

|

Segment 1

(This specification is subject to change without further notice)

EPH3600

RISC II Series Microcontroller

7.7 Data ROM Map

Maximum Size is 256K Words

Address

100000h

|

13FFFFh

Data ROM (4M bits)

7.8 RAM Map Register

(RAM Size: 128 Bytes + 32 Banks × 128 Bytes = 4224 Bytes)

7.8.1 Special and Control Register of RAM

Legend: R = Readable bit W = Writable bit – = unimplemented, read as “0”

Addr. Register Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

0 INDF0

1 FSR0

2 PCL

3 PCM

Indirect Addressing Pointer 0

File Select Register 0 for INDF0
R/W R/W R/W R/W R/W R/W R/W R/W
PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0
R/W R/W R/W R/W R/W R/W R/W R/W

PC15 PC14 PC13 PC12 PC11 PC10 PC9 PC8

R/W

R/W

4 (Not Used) −

5 BSR

6 STKPTR

7 BSR1

8 INDF1

9 FSR1

A ACC

B TABPTRL

C TABPTRM

D TABPTRH

E CPUCON

R/W

− Bank Select Register for INDF0 & General RAM
R/W

Stack Pointer

R/W

− Bank Select Register 1 for INDF1

R/W

Indirect Addressing Pointer 1

R R/W

1 File Select Register 1 for INDF1

R/W

Accumulator

R/W

Table Pointer Low

R/W

Table Pointer Middle

R/W − R/W R/W R/W R/W R/W R/W

Table Pointer High
R/W R/W R/W R/W R/W R/W
PEN − − SMCAND SMIER GLINT MS1 MS0

Product Specification (V0.1) 10.11.2007 • 21

(This specification is subject to change without further notice)

EPH3600

RISC II Series Microcontroller

(Continued)

Addr. Register Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

F STATUS

10 TRL2

11 PRODL

12 PRODH

13 ADOTL

14 ADOTH

15 UARTTX

16 UARTRX

17 Port A

18 Port B

19 Port C

1A Port D
1B (Not Used) −

1C (Not Used) −
1D R1D

1E R1E

1

1

1F (Not Used) −
20 PFS

21 STBCON

22 INTCON

23 INTSTA

24 TRL0L

25 TRL0H

R R R/W R/W R/W R/W R/W R/W

/TO /PD SGE SLE OV Z DC C

R/W

Timer 2 Reload Register

R/W

Multiplier Product Low

R/W

Multiplier Product High

R/W R/W R/W R R

WDTEN − ADWKEN − − FSS ADOT1 ADOT0

R R R R R R R R

ADOT9 ADOT8 ADOT7 ADOT6 ADOT5 ADOT4 ADOT3 ADOT2

W W W W W W W W

TB7 TB6 TB5 TB4 TB3 TB2 TB1 TB0

R R R R R R R R

RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0

R R R R R R R R

A.7 A.6 A.5 A.4 A.3 A.2 A.1 A.0

R/W R/W R/W R/W R/W R/W R/W R/W

B.7 B.6 B.5 B.4 B.3 B.2 B.1 B.0

R/W R/W R/W R/W R/W R/W R/W R/W

C.7 C.6 C.5 C.4 C.3 C.2 C.1 C.0

R/W R/W R/W R/W R/W R/W R/W R/W

D.7 D.6 D.5 D.4 D.3 D.2 D.1 D.0

R/W R/W R/W R/W R/W R/W R/W R/W

R1D.7 R1D.6 R1D.5 R1D.4 R1D.3 R1D.2 R1D.1 R1D.0

R/W R/W R/W R/W R/W R/W R/W R/W

R1E.7 R1E.6 R1E.5 R1E.4 R1E.3 R1E.2 R1E.1 R1E.0

R/W

Target PLL Frequency Selection Register

R/W

UINVEN −

R/W R/W R/W R/W R/W R/W R/W R/W

CPIE ADIE URXIE UTXIE UERRIE TMR2IE TMR1IE TMR0IE

R/W R/W R/W R/W R/W R/W R/W R/W

CPIF ADIF URXI UTXI UERRI TMR2I TMR1I TMR0I

R/W

Timer 0 Reload Low Byte Register

R/W

Timer 0 Reload High Byte Register

22 • Product Specification (V0.1) 10.11.2007

(This specification is subject to change without further notice)