The E.F. Johnson Company designs and manufactures two-way radio equipment to serve a wide variety of communications
needs. Johnson produces equipment for the mobile telephone and land mobile radio services which include business, industrial, government, public safety, and personal users.
LAND MOBILE PRODUCT WARRANTY
The manufacturer’s warranty statement for this product is available from your product supplier or from the E.F. Johnson Company, 299 Johnson Avenue, Box 1249, Waseca, MN 56093-0514. Phone (507) 835-6222.
WARNING
This device complies with Part 15 of the FCC rules. Operation is subject to the condition that this device does not cause harmful interference. In addition, changes or modification to this equipment not expressly approved by E. F. Johnson could void
the user’s authority to operate this equipment (FCC rules, 47CFR Part 15.19).
DO NOT allow the antenna to touch or come in very close proximity with the eyes, face, or any exposed body parts while the
radio is transmitting.
To comply with FCC RF exposure limits, DO NOT operate the transmitter of a stationary radio (base station or marine radio)
when a person is within four (4) meters of the antenna.
DO NOT operate the radio in explosive or flammable atmospheres. The transmitted radio energy could trigger blasting caps or
cause an explosion.
DO NOT operate the radio without the proper antenna installed.
DO NOT allow children to operate transmitter equipped radio equipment.
NOTE: The above warning list is not intended to include all hazards that may be encountered when using this radio.
SAFETY INFORMATION
The FCC has adopted a safety standard for human exposure to RF energy. Proper operation of this radio under normal
conditions results in user exposure to RF energy below the Occupational Safety and Health Act and Federal Communi cat ion
Commission limits.
The information in this document is subject to change without notice.
E.F. Johnson Company will not be liable for any misunderstanding due to misinformation or errors found in this
document.
L TR, LTR-Net, Multi-Net, Viking Head/EFJohnson Logo, Call Guard and SUMMIT are registered trademarks of E.F . Johnson
Company All other company and/or product names used in this manual are trademarks and/or registered trademarks of their
respective manufacturer.
October 1995
1-3
Part No. 001-2008-202
FCC EXPOSURE LIMITS
This fixed station radio transceiver was tested by the manufacturer with an appropriate antenna in order to verify compliance
with Maximum Permissible Exposure (MPE) limits set under Section 2.1091 of the FCC Rules and Regulations. The guidelines used in the evaluation are derived from T able 1 (B) titled “Limits For General Population/Uncontrolled Exposure” which
is from FCC report OET bulletin #65.
Table 1 (B)
FCC Limits for Maximum Permissible Exposure (MPE)
(B) Limits For General Population/Uncontrolled Exposure
Frequency Range (MHz)
0.3 - 1.346141.63(100)*
1.34 - 30 824/f 2.19/f (180/f
30 - 30027.50.0730.2
300 - 1500----f/1500
1500 - 100,000----1.0
f = Frequency in MHz *Plane-wave equivalent power density.
Table 2 lists the antennas recommended for use in the VHF frequency range. Each model of this radio was tested with the
appropriate antenna listed. The antenna shall be mounted to a tower and be a minimum of 10 meters above the ground at the
lowest point on the antenna. The radio manufacturer has determined that the user and service personnel should remain four (4)
meters in distance away from the antenna when transmitting. By maintaining this distance, these individuals are not exposed to
radio frequency energy or magnetic fields in excess of the guidelines set forth in Table 1 (B).
NOTE: Other antennas or installation configurations that have not been tested may not comply with FCC RF exposure limits
and therefore are not recommended.
This service manual provides installation, operation, programming, service, and alignment information for the VIKING
VX LTR Repeater, Part No.
242-20X1-213.
1.2 REPEATER DESCRIPTION
The VIKING VX repeater is designed for operation in a Johnson LTR system. It operates on the VHF
channels from 132-178 MHz. Channel spacing is
12.5/25 kHz and RF power output is adjustable from
25 to 125 watts.
This repeater is modular in design for ease of service. There are separate assemblies for the logic
cards, receiver
, exciter, power amp lifier and power
supply sections.
This repeater is progr ammed wit h a l apt op or per sonal computer using the 2000 Series Programmer
software, Part No. 023-9998-390.
1.4 MODEL NUMBER BREAKDOWN
The following breakdown shows the part num-
ber scheme used for the Viking VX.
3242- 2 0 X 1 -
1
2
1 = 132-150 MHz
3 = 150-174 MHz
VHF
25-110W
12.5/25 kHz
LTR
Figure 1-2 PART NUMBER BREAKDOWN
1.5 ACCESSORIES
The accessories available for the Viking VX LTR
repeater are listed in Table 1-1. A brief description of
some of these accessories follows.
2-Wire Telephone Interconnect Card (TIC) - This
card provides an interface between the Repeater and a
phone line to permit telephone calls to be placed to
and from mobile transceivers.
The VIKING VX repeater i nte rf ace s wit h a MPC
(Main Processor Card) and MAC (Main Audio Card)
to provide LTR operation. All signal ports used to
interface to the Repeater are on J2 located at the back
of the cabinet.
1.3 REPEATER IDENTIFICATION
The repeater identi ficati on number is pri nted on a
label that is affixed to the inside of the repeater cabinet. The following infor mation is contained in that
number:
Repeater
ID
20X4X
Revision
Letter
Manufacture
Date
WeekYearA= Waseca
WarrantyPlant
Number
12345A324A
Figure 1-1 REPEATER IDENTIFICATION
LTR System ID Validator - If an invalid ID is
detected on the repeater data bus, the audio of the
mobile receiving the ca ll is disabled.
2000 Series Service Kit - This kit contains an alarm
wire harness, extender power cable, programming kit,
extender card, ex tender harne ss, and a TIC bi as cab le.
These items are used when tuning the repeater and
while troubleshooting.
Battery Backup and Cable Option - This option can
be factory or field installed (refer to installation
instructions 004-2000-830). It includes the battery
backup module that resides in the power supply and
the necessary interconnect cabling to connect the
repeater to the batterie s (see Section 2.5).
RJ-11 to 6-BNC Adapter - This adapter box provides connections for the high speed data bus at the
rear of the repeater and the data bus from the logic
drawers in existing repeater syste m s.
1-1
August 2000
Part No. 001-2001-200
INTRODUCTION AND OPERATION
Table 1-1 REPEATER ACCESSORIES
AccessoryPart No.
2-Wire Telephone Interconnect Card 023-2000-370
LTR System ID Validator023-4408-500
2000 Series Service Kit
Battery Backup option and cable023-2000-835
RJ-11 to 6-BNC Adapter
3’ RG-58 coax w/male BNC for HSDB023-4406-5 05
6’ RG-58 coax w/male BNC for HSDB597-3001-2 14
Custom Frequency Prog rammin g & Set up 023-2000-100
PC programmer PGMR 2000 software023-9998-390
Service Microphonee589-0015-011
50 ohm Termination HSDB023-4406-504
Programming cable kit
Extender Card023-2000-230
Extender cable kit, 7 ft.250-2000-010
Required when using Viking Networking products, one
per station.
3 Included in 2000 Series Service Kit (PN250-2000-230).
1
2
3
250-2000-230
023-2000-194
023-2000-195
1.7 FACTORY CUSTOMER SERVICE
The Custom er Service Department of the E.F.
Johnson Company provides customer assistance on
technical problems and the availability of local and
factory repair facilities. Customer Service hours are
7:30 a.m. - 4:30 p.m. Central Time, Monday - Friday. There is also a 24-hour emergency technical support telephone number. From within the continental
United States , the Customer Service Department can
be reached toll-free at:
1-800-328-3911
When your call is answered at the E.F. Johnson
Company, you will hear a brief messa ge informing
you of numbers that can be entered to reach various
departments. This number may be entered during or
after the message using a tone-type telephone. If you
have a pulse-type telephone, wait until the message is
finished and an operator will come on the li ne t o assist
you. When you enter a first number of "1" or "2",
another num ber is requested to further categorize the
type of information. You may also enter the 4-digit
extension number of the per son th at you want to reach.
PC Programmer PGMR Software - 3.5" programming disk used to program the repeater.
Programming Cable Ki t - This kit connects the MPC
and a computer during programming and for monitoring repeater activity at the site.
Extender Card - Used to exte nd the cards plugged into
the backplane beyond the card rack enclosure when
tuning the repeater and while troubleshooting.
Extender Cable Kit - These are seven foot extension
cables for the RF T ransceiver power and data, when the
transceiver is removed from the cabinet.
1.6 PRODUCT WARRANTY
The warranty statement is available from your
product supplier or from the Warranty Department,
E.F. Johnson Company, 299 Johnson Avenue, Box
1249, Waseca, MN 56093- 0514. This information
may also be requested by phone from the Warranty
Department. The Warranty Department may also be
contacted for Warranty Service Reports, claim forms,
or any questions with warranties or warranty service
by dialing (507) 835-6970.
If you are calling from outside the continental
United States, the Customer Service telephone numbers are as follows:
Customer Service Department - (507) 835-6911
Customer Service FAX Machine - (507) 835-6969
You may also contact the Customer Service
Department by mail. Please include all information
that may be helpful in solving your problem. The
mailing address is as follows:
E.F. Johnson Company
Customer Service Department
299 Johnson Avenue
P.O. Box 1249
Waseca, MN 56093-0514
1.8 FACTORY RETURNS
Repair service is normal ly availab le through local
authorized E.F. Johnson Land Mobile Radio Service
Centers. If local service is not avail able, the equipment
1-2
INTRODUCTION AND OPERATION
can be returned to the factory for repair. However, it is
recommended that you contact the Field Service
Department before retu rning equip ment. A servic e
representative may be able to suggest a solution to the
problem so that return of the equipment would not be
necessary.
Be sure to fill out a Factor y Repair Req uest For m
#271 for each unit to be repaired, whether it is in or
out of warr anty. These forms are available free of
charge by calling the r epa ir lab ( see Sect ion 1.7) or by
requesting them when you send a unit in for repair.
Clearly describe the difficulty experienced in the
space provided and also note any prior physical damage to the equipment. Then include a form in the shipping container with each u nit . Your phone number and
contact name are very important because there are
times when the technicians have specific questions
that need to b e answered in order to completely identify and repair a problem.
When returning equipment for repair, it is also a
good idea to use a PO number or some other re fe rence
number on your paperwork in case you need to call
the repair lab about your unit. These numbers are referenced on the repair order and it makes it easier and
faster to locate your unit.
Return Authorization (RA) numbers are not necessary unless you have been given one by the Field
Service Department. They require RA numbers for
exchange units or if they want to be aware of a specific problem. If you have been given an RA number,
reference this number on the Factory Repair Request
Form sent with the unit. The repair lab will then contact the Field Service Department when the unit
arrives.
You may also send your order by mail or FAX.
The mailing address is as follows and the FAX number is shown in Section 1.7.
E.F. Johnson Company
Service Parts Department
299 Johnson Avenue
P.O. Box 1249
Waseca, MN 56093-0514
1.10 SOFTW ARE UPDATES/REVISIONS
All inquiries concerning updated software, its
installation and revisions should be directed to the
Customer Service Department (see Section 1.7).
1.1 1 REPEATER OPERATION
1.11.1 MAIN PROCESSOR CARD (MPC)
Refer to Figure 1-3.
Programming Jack
J1 provides input connection from the computer
and the "flash memory" in the MPC. The programming information in an IBM
PC programs the MPC
directly from the serial card through an interconnect
cable to the COM1 or COM2 port.
Reset
S1 provides a manual res et of the Mai n Pro cessor
Card (MPC). A manual reset causes a complete
power-up restart.
Display and LEDs
1.9 REPLACEMENT P ARTS
E.F. Johnson replacement parts can be ordered
directly from the Service Parts Department. To order
parts by phone, dial the toll-free number and then
enter "1" as described in Section 1.7. When ordering,
please supply the part number and quantity of each
part ordered. E.F. Johnson dealers also need to give
their account number.
If there is uncertainty about the part number,
include the designator (C112, for example) and the
model number of the equipment the part is from (refer
to Section 1.4).
Each combination of DS1 display read-out and
CR4/CR5 indication refers to an active alarm. See
Ta ble 1-2 for alarms and definitions. LED indications: CR1 is blinking; MPC is operational, CR2 on;
380-470 MHz, off is 475-520 MHz and CR5 on; indicates an LTR Repeater.
RF Thermal Sense Alarm Condition Exists
NOTE: Safety measures are disabled
Ok
August 2000
1-3
Part No. 001-2001-200
INTRODUCTION AND OPERATION
Alarms
When the Repeater is in Test mode the safety
measures are disabled. Therefore, if the Repeater is
keyed for an extended period and the power amplifier
temperature increa se, thermal shutdown will not occur .
There are pop-up windows that appear in the Test
mode screens to alert the user that there is an alarm
and action should be taken. Refer to Figure 1-3 for an
example of this type of alarm.
S1
RF INTERFACE
BOARD
PROG
JACK
RESET
DS1
GND
GRN
CR1
YEL
CR2
YEL
CR5
RED
CR4
RED
CR3
J1
J103
J100
A D
LEVEL
LOCAL
ON/OFF/VOL
R236
MIC
J102
SPKR
J101
J104
EXT SPKR
+15V
+15V ACC
-5V
+5V
CWID
HANG
SWITCH
MOBILE
XMIT
J500
TP
J501
GND
J502
+15V
S508
IACMACMPC
PA
EXCITER/RECEIVER
Figure 1-3 REPEATER CARDS
August 2000
Part No. 001-2001-200
1-4
INTRODUCTION AND OPERATION
Table 1-2 ACTIVE REPEATER ALARMS
Alarm No.DS1CR3CR4Definition
Test Mode
IAC input 1 Active
IAC input 2 Active
IAC input 3 Active
IAC input 4 Active
MAC Processor Alarm
HSDB Processor/Cable Alarm
IRDB Cable Alarm
Switch (RNT)/CIM Channel Problem Alarm
TIC Processor Alarm
MMC Processor Alarm
VNC Alarm
AC Power Failure
Battery Power Failure
Power supply thermal sense
Fan 1 current out of specification
Fan 2 current out of specification
IAC mismatch
RF shutdown
RF Half Power Mode
Thermal sense in RF portion
RF Finals 1-2 power out fai lure
RF Finals 3-4 power out fai lure
RF VSWR Failure
Normal Synthesizer Tx Lock failure
Normal Synthesizer Rx Lock failure
HS Synthesi zer Tx Lock failure
HS Synthesizer Rx Lock failure
RF Quarter Power Alarm
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
On
Off
Off
Off
Off
Off
Off
On
On
On
On
On
On
On
On
On
On
On
1-5
August 2000
Part No. 001-2001-200
INTRODUCTION AND OPERATION
1.11.2 MAIN AUDIO CARD (MAC)
Refer to Figure 1-3.
External Speaker Jack
J104 provides repeater audio output to an exter nal
speaker. The local volume control adjusts the volume
level of this speaker.
Speaker/Microphone Jacks
J102 provides audio input from a microphone.
J101 provides the receive audio to the microphone.
Local On/Off/Volume Control
R236 provides control o f the rec eive a udio ou tput
to J101 and J104. Turning this control clockwise past
the detent applies voltage to the local audio amplifier.
A D Level Test Point
J100 provides audio/data level output for test
level checks.
Power Supply On/Off Switch
S508 turns the power supply DC voltages on and
off from the IAC in the front of the repeater.
Power Indicator
CR501 indicates the +5V supply is at normal
level and applied to the IAC. CR524 indicates -5V
supply is at normal level and applied to the IAC.
CR523 indicates the +15V accessory supply is at normal level. CR525 indicates that the +15V supply is at
normal level and applied to the IAC.
CWID Indicator
Indicates that the CW Identification is being
transmitted on the lowest-frequency repeater. The
CWID is a continuous-wave (CW) transmission of the
station call letters in Morse Code to satisfy the station
identification re quirement. The CWID is programmed
into the repeater memory. This indicator also is used
when an alarm is transmitted with Mor se code.
Hang Indicator
Ground
J103 is connected to ground for test equipment
when monitoring test point J100.
1.11.3 INTERFACE ALARM CARD (IAC)
Refer to Figure 1-3.
Voltage Test Output
J502 provides a +15V test point on the IAC.
Ground
J501 is connected to ground for test equipment
when monitoring voltage test point J502.
A D Level Test Point
J500 provides a test point to monitor audio and
data levels, AC fail and the rmal sensor.
Indicates that the hang word is being transmitted
by the repeater. This word is transmitted on calls in
which the channel is held for the duration of the call
and not just for the duration of the transmission. The
hang word tells the mobiles to stay on the same channel and not re-access the system when responding to a
call.
Switch Call Indicator
Not used in th e LTR repeater.
Mobile Call Indicator
Mobile-to-repeater transmission in progress is
indicated by the Mobile Call Indicator.
Xmit Indicator
This indicates that the repeater transm itter is
keyed by the logic.
August 2000
Part No. 001-2001-200
1-6
INTRODUCTION AND OPERATION
1.11.4 POWER SUPPLY
The power supply is sealed and the line and supply fuses are inside. If a supply fuse opens, the power
supply must be removed and opened for repair (see
Section 2.4 and 8.5). Refer to the power supply service manual 004-2000-810.
Standby Battery Jack
This provides a connection point for a +24V DC
standby battery. Current is drawn from the battery
only when the power supply output voltage is lower
than the battery voltage. A trickle charge switch on
the supply ensures that the battery is fully charged.
Disable this switch when a separate battery charger is
used (see Section 2.5).
1.12 REPEATER INFORMATION
1.12.1 INTRODUCTION
NOTE: The VIKING VX does not require a separate
LTR logic drawer.
The repeater model used in an LTR system is
determined by freque ncy range. 800 MHz s ystems use
the VIKING VX (2008-232/-234) or LTR 8000s, UHF
use 20x4-232/-234 or 1010s, and VHF use 2011/2031213 or 110 0s. Repeat ers ope rate on a singl e fre quen cy
(one repeater is required for each channel). The MPC
in each repeater performs all control and signaling
functions on that channel. Information is exchanged
between repeaters via a high-speed data bus (modular
cable). No system controller is required.
it is always monitoring its Home repea ter to determine which channel is free and if it is being called by
another mobile.
The Home repeater is always used to make a call
unless it is busy . When the Home repeater is busy, any
other repeater in the site may then be used. Up to 250
ID codes are assigned to each repeater. An ID code
and Home repeater number are the "address" of the
mobiles in the system. Therefore, up to 1250 separate
addresses can be assigned in a 5-repeater system and
up to 5000 can be assigned in a 20-repeater system.
An ID code may be assigned to an individual mobile
or a group of mobiles as required.
1.12.3 INTER-REPEATER DATA COMMUNICA-
TION
Data communication between VIKING VX and
LTR repeaters at a site is via a high-speed data bus.
This bus cable is installe d in a daisy-chain manner
between repeaters. If both VIKING VX and LTR
repeaters are located a t a site, 20 rep eaters can be
interconnected. Refer to Section 2.8 for information
on connecting the data bus.
1.12.4 MOBILE TRANSCEIVERS
The mobile and handheld transceivers used in an
LTR system must be compatible with the type of signaling in use and also the frequency range.
1.13 REPEATER DATA BUS SIGNALING
1.13.1 GENERAL
Optional ac cessories, such as the Telephone Interconnect Card (TIC) can be inst alled in the repeater and
the ID V alidator drawer can be installed in the repeater
rack. Refer to Johnson LTR ID Validator Manual, Part
No. 001-4408-501 and Johnson Telephone Interconnect Card Manual, Part No. 004-2000-3 70 for det ail ed
information.
1.12.2 HOME REPEATERS
All mobiles have one of the site repeaters
assigned as its "Home" repeater. This is the repeater
from which it receives mo st of its contr ol information. When a mobile is not placing or receiving a call,
A single-line serial data bus interconnects the
logic units of all the LTR repeaters at the site. The
first repeater powered on generates the synchronization pulse that is used by all other repeaters to determine their time sl ot o n the data bus. If al l r epe aters are
powered on at the same time, the lowest numbered
repeater generates the synchronization pulse. There
are 21 slots with 1-20 used for repeater reporting and
21 used by the ID Validator (see Section 1.13.3). The
time slot used by a repeater is determined by the number assigned to that repeater by the programming in
the MPC. Repeater 1 uses time slot 1, repeater 5 uses
time slot 5 , and so on. The data rate on the repeater
data bus is 18,750 bits per second.
August 2000
1-7
Part No. 001-2001-200
INTRODUCTION AND OPERATION
In its time slot, each repeater places information
on the data bus indica ting its sta tus. If a repea ter i s not
busy, only start bits appear in its slot. If a repeater is
busy, it places in its slot the Home rep eater and ID
code of the mobile receiving the cal l on that repeater.
If a repeater number is unassigned, nothing appears in
that time slot.
1.13.2 MOBILE DATA MESSAGE ORDER
Each repeater monitors all the time sl ots on the
repeater data bus. If it detects its numb er in another
time slot, it begins transmitting an additional data message to its mobiles. This message tells mobiles programmed to detect that ID code to go to that repeater
to receive a call. This additional message continues
for as long as the mobile is transmitting on the other
repeater.
The sequence of data messages transmitted on a
home repeater is as follows: Every third messag e is to
the mobile currently receiving a call on that repeater.
Then alternating b etween these mess ages are messag es
to its mobiles that have been trunked to other repeaters. For example, assume that fivedifferent mobiles on
a five-repeater system are making calls. If all have
Repeater 1 as their home channel (not very likely in
actual practice), the data message order on Repeater 1
is as follows: 1 2 3 1 4 5 1 2 3 and so on.
1.13.3 ID VALIDATOR OPERATION
If the ID Validator is used, it is programmed wit h
the status of up to all 5000 home repeater/ID code
combinations possible with a 20-channel system.
Each combination is programmed as either valid or
invalid. Information in the twenty time slots on the
repeater data bus is monitored. If an invalid home
repeater/I D code combination is dete cted, the ID Validator places in time slot 21 the number of the repeater
being used by the invali d mobile and al so the ID code.
When a repeater detects its number in slot 21, it transmits the tur n-off code (31) to the mobile receiving the
call. That mobile then squelches and resumes monitoring its home channel. This effectively disables the
invalid mobile becau se it cannot ta lk to anyone. Wh en
the turn-off code is sent, the repeater places "21" in the
repeater po sition of its time slot to i ndicate to the ID
validator that turn-off has occurred.
August 2000
Part No. 001-2001-200
1-8
SPECIFICATIONS
INTRODUCTION AND OPERATION
GENERAL (Per TIA 603)
1
Frequency Ranges132-178 MHz Transmit/Receive (132-150 MHz and 150-178 MHz)
Dimensions9.125" H x 17" W x 20.9" D
AC Voltage/Frequency100-240V AC/50-60 Hz
AC Current0.38A (Standby), 1.4A (25W), 5A (110W)
AC Input Power45W (Standby), 170W (25W), 560W (110W)
DC Current at 26.5V DC (Low Power) 6.3A (25W), 16.5A (110W)
Number of Channels1 (Synthesized, programmable)
Channel Spacing12.5 /15 /25 /30 kHz selectable
Channel Resolution5 / 6.25 kHz
Temperature Range-30°C to +60°C (-22°F to +140°F)
Duty CycleContinuous
FCC Type AcceptanceATH2422001
FCC ComplianceParts 15, 90
RECEIVER (Per TIA 603)
12 dB SINAD0.35 µV
20 dB Quieting0.50 µV
Signal Displacement Bandwidth±1 kHz (12.5/15 kHz), ±2.0 kHz (25/30 kHz)
Adjacent Channel Rejection-85 dB (12.5/15 kHz), -90 dB (25/30 kHz)
Intermodulation Rejection-85 dB
Spurious & Image Rejection-100 dB
Audio Squelch Sensitivity12 dB SINAD
Audio Response+1/-3 dB TIA
Audio DistortionLess than 3% at 0.5W/16 ohms
Local Audio Power0.5W/16 ohms
Audio Sensitivity±0.75 kHz (12.5/15 kHz), ±1.5 kHz (25/30 kHz)
Hum & Noise Ratio-50 dB
Frequency Spread2 MHz
Frequency Stability ±2.5 PPM -30°C to +60°C (-22°F to +140°F)
Modulation Acceptance Bandwidth±3.5 kHz (12.5/15 kHz), ±7.0 kHz (25/30 kHz)
TRANSMITTER (Per TIA 603)
RF Power Out132-178 MHz 110W (Default setting), 25-110W (Variable Set Point)
Spurious Emissions-90 dBc
Harmonic Emissions-90 dBc
Audio Deviation±1.6 kHz (12.5/15 kHz), ±3.5 kHz (25/30 kHz)
LTR Data Deviation±0.8 kHz (12.5/15 kHz), ±1 kHz (25/30 kHz)
CWID Deviation±1 kHz (12.5/15 kHz), ±2 kHz (25/30 kHz)
Repeat Deviation±0.8 kHz (12.5/15 kHz), ±1.5 kHz (25/30 kHz)
Audio Response+1/-3 dB TIA
Audio DistortionLess than 2%
Hum & Noise (TIA)-50 dB (12.5/15 kHz), -55 dB (25/30 kHz)
Frequency Spread6 MHz
Frequency Stability ±2.5 PPM -30°C to +60°C (-22°F to +140°F)
Emission Designators11K0F3E, 16K0F3E
These general specifications are intended for reference and are subject to change without notice.
Contact the Systems Applications consultants for guaranteed or additional specifications.
August 2000
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Part No. 001-2001-200
INTRODUCTION AND OPERATION
1-10
August 2000
Part No. 001-2001-200
SECTION 2 INST ALLATION
INSTALLATION
2.1 INTRODUCTION
Information in this section tells how to set up the
repeater for operat ion in an LTR system. It is assumed
that the repeater has been previously aligned at the
factory or as described in the alignment procedure in
Section 7.
Even though each repeater is thoroughly aligned
and tested at the factory, it is good practice to check
performance before it is placed in service. This
ensures that no damage occurred during shipment and
that the repeater is otherwise operating properly. Performance testing is described in Sections 7.1, 7.2, 7.3
and 7.4.
2.1.1 SITE PREPARATION AND ANTENNA IN-
STALLATION
Site preparation and antenna installation are not
within the scope of this manual. Basic installation
requirements are discussed in the "Dealer Guide To
Site Preparation", Part No. 004-8000-100. Factory
installation is also available. Contact your Johnson
representative for more information.
2.2 ENVIRONMENT
The following conditions should be considered
when selecting a site for the Repeater.
Operating Temperature.
-30°C to +60°C (-22°F to +140°F).
NOTE: If the Repeater is installed in an area that
exceeds these environmental conditions, the site
should be equipped with air filters to remove dust and
dirt that could cause the equipment to overheat.
When the repeaters are installed in an environment that contains small airborne particles, e.g. grain
dust or salt fog, the repeater cabinets need to be
sealed. A h eat exchanger, i.e. air conditioner, is then
required to cool the cabinets. The air conditioners
must be suited for the environment. Each repeater
(110W) requires >2400 BTU/hr dissipation to maintain exterior cabinet temperature.
2.3 VENTILATION
The RF modules and the power supply are
equipped with fans, controlled by thermostats, that
force air through the equipment for cooling. The air
flow is from the front to the back of the equipment.
This permits the Repeaters to be stacked or rack
mounted (see Figure 2-4). There are a few considerations when installing Repeaters to provide adequate
air circulation.
1. The Repeaters should b e mounte d with a minimum
of 6 inches clearance between the front or back of
the cabinet for air flow. The power supply requires
a minimum of 18 inches at the back of th e Repeater
for removal.
Humidity.
Less than 95% non-condensing rela ti ve humidity
at 50°C.
Air Quality.
For equipment operating in a controlled environ-
ment with the Repeaters rack mounted, the airborne
particles must not exceed 30 µg/m
3
.
For equipment operating in an uncontrolled envi-
ronment with the Repeaters rack mounted, the airborne particles must not exceed 100 µg/m
3
.
NOTE: Repeaters should not touch. Leave a minimum of one empty screw hole (approximately 1/2")
between repeaters vertically especially for bottom
ventilation slots in high power repeaters.
2. Cabinet enclosures must provide air vents for ade-
quate air circulation.
3. Temperature and humidity must be considered
when several Repeaters are installed at a si te . Thi s
might require air conditioning the site.
August 2000
2-1
Part No. 001-2001-200
INSTALLATION
2.4 AC POWER
The AC power source to the Johnson VIKING
VX Repeater can be 120V AC or 240V AC. Nothing
need be done to the power supply for 240V AC operation. However, a 240V AC outlet requires that the
120V AC power plug be replaced. A locking AC
power cord is provided for the supply.
The 120V AC cord is a standa rd 3-wi re gro unde d
cord used with a standard AC wall outlet. The outlet
must be capable of supplying a minimum of 560W.
With the nominal 120V AC input, the source must
supply 5A for each 110W repeater and should be protected by a c i rcuit breaker. It is recommended that all
of the repeaters in a rack should not be on the same
breaker in order to provi de one operational repeat er in
the event a breaker trips. An AC surge protector is
recommended for all equipment.
CHARGER
ACTIVE
SWITCH
CHARGER
ON
BATTERY
FAULT
EARTH
GROUND
LINE
REVERSE
BATTERY
NEUTRAL
B-B+ TEMP
Figure 2-1 BATTERY BACKUP CONNECTOR
The temperature sensor is required to adjust the
charging voltage over temperature.
Each Repeater requires an outlet, so for a 5-channel system, a minimum of 5 outlets is required. An
additional three outlets should be added for test equipment. The outlets must be within 3 feet of each
Repeater cabinet. Future system expansion should be
considered when electrical work is being planned for
the initial system.
The VIKING VX Repeater power supply can be
equipped with an optional 24V DC back-up in the
event of AC p ower failure . Since the transmitter will
remain on full power, if desired, the DC power source
must have a current capabil ity of abo ut 20 A per 1 1 0W
repeater or 100A for 5 - 110W repeaters. The multicoupler requires another 0.5A for a total system
requirement at 24V DC of 100.5A for 110W repeaters.
2.5 BATTERY BACKUP
If the power supply is equipped with battery
backup, screw lugs are provided on the front of the
power supply for battery co nnections ( see Figure 2-1).
A switch is provi ded fo r charging the battery or can be
off if a separate battery charger is used. A battery
temperature sensor connection is also provided. The
temperature sensor cabl e is shown in Fi gure 2-2. LED
indicators are provided to show Reverse Battery connection, Charger On/Off and Battery Fault.
TEMP
NEGATIVE
BATTERY
TERMINAL
WHT
BLK
GND
Figure 2-2 TEMPERATURE SENSOR CABLE
2.6 800W POWER SUPPLY
The power supply has four voltage output levels
(see Table 2-1). Each voltage is set to ±1% at +25°C
(+77°F). The output of this supply is capable or running any 2000 series repeater.
Each output is overload protected such that the
power supply current limits and automatically resets
when the overload is removed (see Table 2-1).
Each output is over voltage protected such that
the power supply shuts down when an over voltage
condition exists, usually when a component in the
supply has failed (see Table 2-2). The power supply
must be manually res et by toggling the Ena ble Li ne or
removing A C power for more than 10 seconds.
August 2000
Part No. 001-2001-200
2-2
INSTALLATION
BACKPLANE
4
1
52
36
J2
A
2
4
1
3
5
B
6
7
8
9
10
7
11
8
12
9
C
J2
A
B
C
1
2
3
4
5
6
7
8
9
10
11
12
POWER HA R NESS
+26.5V
GROUND
+15V
AC FAIL IN
POWER SWITCH
THERMAL SENSOR
N/C
+15V
N/C
N/C
+5V
-5V
TO
RFIB
2
1
4
5
REPEATER
3
BACKPLANE
9
6
8
7
TO
Figure 2-3 POWER CABLE CONNECTOR AND SCHEMATIC
Table 2-1 OUTPUT VOLTAGES
VoltageCurrentWattage
+26.5V22A583W
+15V5A75W
+5.2V5A26W
-5V1A5W
Table 2-2 OVER VOLTAGE
VoltageRange
+26.5V+32V to +33V
+15V+16V to +18V
+5.2V+6V to +7V
-5V-6V to -7V
2.6.1 AC INPUT REQUIREMENTS
AC Input Voltage:100-240V AC
Line Frequency:50-60 Hz
AC In-rush:60A maximum
Overall Efficiency:>70% at 100V AC
>80% at 240V AC
Lightning protection:6kV for < 1ms
Power Factor:>0.97 at full load
Brown Out Voltage:80V AC
Temperature-30°C - +60°C (full power)
Power factor correction per IEC555. The Power
supply has the following safety agency approvals
pending: UL1950, CSA22.2-950, TUV EN60950
(IEC950)
When the AC input voltage is below 90V AC, the
maximum output power is decreased t o keep the input
current constant. If a battery back-up is installed, the
batteries take over when the AC input voltage falls
below 80V AC (dependant on power output).
The AC input connector is an IEC connector
equipped with a locking mechanism.
2-3
August 2000
Part No. 001-2001-200
INSTALLATION
The operating temperature range is -30°C to
+60°C (-22°F to +140°F), i.e. the same as the repeater.
The fan is thermostatically controlled by the internal
temperature. When the internal heatsink temperature
reaches +45°C (113°F) the fan turns on. When the
heatsink temperature drops below +35°C (95°F) the
fan turns off. If the internal heatsink temperature
reaches +90°C (+194°F) the power supply turns off
until the heatsink temperature drops below +85°C
(+185°F). The over-temperature shutdown and restart
are automatic.
2.7 GROUNDING
CAUTION
PROPER SITE GROUNDING AND LIGHTNING
PROTECTION ARE VERY IMPORTANT TO PREVENT PERMANENT DAMAGE TO THE REPEATER.
As in any fixed radio installation, measures
should be taken to reduce the possibility of lightning
damage to the Viking VX equipment. Proper grounding eliminates shock hazard, protects against electromagnetic interference (EMI) and lightning.
Ground each piece of equipment separately. Do
not ground one piece of equipment by connecting it to
another grounded piece of equipment. A good DC
ground must be found or created at the site. Rooftop
site grounds can be researched through the building
management or architects. Tower site grounds must
be made with grounding rods. The many techniques
for providing adequate grounds for towers and poles
and for installi ng bui ldin g g round b us li nes a re be yond
the scope of this manual. Refer to National Electrical
Code article 250 "Grounding Techniques," article 800
"Communications Systems" and follow local codes.
The ground bus should be routed to the floor area
within 5 feet of the system with a runner of 6 AW G or
larger solid copper wire or 8 AWG stranded copper
wire.
same wire sizes as specified for coaxial cables for any
ground connections required by the secondary
protectors.
RF
An RF protector keeps any lightning strike to the
antenna feed line or tower from damaging the Repeaters. Instal l this protection in-line with the combiner
and antenna feed line.
RF protectors are selected by calculating the
maximum instantaneous voltage at the output of the
combiner. Do this by using the following equation.
V
= 1.414 (X) (√P(50))
P
where:
V
= Voltage at the output of the combiner.
P
P = repeater output in watts
X=forVSWR=
1.051.10 : 1
1.091.20 : 1
1.131.30 : 1
1.171.40 : 1
1.201.50 : 1
1.301.86 : 1
Example: Repeater power output of 60W with a
VSWR of 1.3 : 1 (for this VSWR, X = 1.13):
V
= 1.414 (1.13) (√60(50))
P
VP = 1.59782 (√60(50))
VP = 1.59782 (54.772256)
V
= 87.52V
P
Telephone Line
There are four types of pr ote ct ion suppressors for
telephone lines; Gas Tube, Silicon Avalanche Diode,
Metal Oxide Varistor and Hybrid.
The outer conductor of each transmission line at
the point where it enters the building should be
grounded using 6 AWG or larger solid copper wire or
8 AWG stranded wire.
Secondary protection (other than grounding) provides the equipment protection against line transients
that result from lightning. There are two types of secondary protection, RF and Telephone Line. Use the
August 2000
Part No. 001-2001-200
The hybrid protector is ideal for E.F. Johnson
equipment, and is strongly recommended. A hybrid
suppressor combines several forms of protection not
available in just one type of device. For example, a
high-speed diode r eacts fir st, cl amping a volta ge str ike
within 10 ns, a heavy duty heat coil reacts next to
reduce the remainder of the current surge, and a highpowered three-element gas tube fires, grounding Tip
and Ring.
2-4
2.7.1 PROTECTION GUIDELINES
Follow these guidelines for grounding and lightning protection. Each Repeater instal l ati on si te is dif ferent; all of these may not apply.
1. Ensure that ground connections make good metal-
to-metal contact (grounding rod, grounding tray,
metal conduit) using #6 ga uge solid wi re or braid ed
wire straps.
2. With surge protectors, ensure that ground wires go
directly to ground, and not through other
equipment.
3. Run the ground wire for RF coax prote ctors directly
to ground.
4. With coax protectors, ensure maximum instanta-
neous voltage does not exceed the rated voltage.
INSTALLATION
5. Do not run ground wire s parallel t o any other wir ing
(e.g. a ground wire parallel to a telephone line),
except other ground wires.
6. Double check all equipment for good ground and
that all connections are clean and secure.
2.8 UNPACKING AND INSPECTION
E.F. Johnson ships the Repeater securely crated
for transportation. When the Repeater arrives, ensure
the crates remain upright, especially if storing the
crates tem porarily.
When unpacking the Repeater, check for any visible damage or problems caused by shipping. If there
is obvious damage from shipping mishaps, file claims
with the carrier. If there appears to be any damage
caused before shipping , file a claim with E.F. Johnson.
Contact Customer Service for assistance (see Section
1.7).
If everything appears undamaged, remove the
Repeater equipment from the crate, using normal precautions for unpacking.
TX COMBINER
DUPLEXER
RX MULTICOUPLER
POWER STRIP
Figure 2-4 RACK MOUNTED REPEATERS
2-5
Part No. 001-2001-200
August 2000
INSTALLATION
T/R ANTENNA
RECEIVER 1
RECEIVER 2
RECEIVER 3
RECEIVER 4
RECEIVER 5
RECEIVER
MULTICOUPLER
PREAMPLIFIER
Figure 2-5 5-CHANNEL COMBINING SYSTEM
NOTE: Do not discard the packing materials. If you
must return an item; use the same packing materials
and methods (including static protective bags for circuit cards) to repack the equipment. You are responsible for proper repacking. E.F. Johnson cannot be
responsible for damage to equipment caused by
negligence.
NOTE: Repeaters should not touch, leave a minimum
of one empty screw hole (appr oxi m at el y 1/2 ") bet w een
repeaters vertically especially for bottom ventilation
slots in high power repeaters.
TRANSMITTER 1
DUPLEXER
TRANSMITTER 2
BANDPASS
FILTER
TRANSMITTER
COMBINER
TRANSMITTER 3
TRANSMITTER 4
TRANSMITTER 5
sion) that connects to a HSDB that is also servicing
LTR 1010 repeaters, other VIKING VX repeaters that
use VIKING VNC cards, or an ID Validator must also
use the adapter module. The BNC Adapter Module is
installed on the back of the VIKING VX repeater cabinet (see Figure 2-13).
Systems constructed onl y wit h LTR VIKING VX
repeaters that have Version 202 or later HSDB software and do not use VNC cards can be connected
directly to the HSDB from the RJ-11 jack on the back
of the repeater.
NOTE: Each repeater should be grounded separately
by connecting a ground bus from the g r o und lu g o n the
back side of the RF module to the ground bar on the
rack (see Figure 2-8).
2.9 REPEATER DATA BUS INSTALLATION
VIKING VX repeaters with Hig h Speed Dat a Bus
(HSDB) sof tware Version 201 or earlier (reference
U14 label) installed on the MPC board must use the
optional RJ-1 1 to BNC Adapter Module (see Table 1-1
and Figure 2-9) to connect the HSDB. Any VIKING
VX repeater (regardless of the HSDB software ver-
August 2000
Part No. 001-2001-200
2.9.1 MPC DA TA BUS SWITCH SETTINGS
Switch settings on the MPC for the two types of
installations require S2 and S3 sections to be switched
as indicated in Figures 2-10 through 2-13.
2.9.2 MPC DATA BUS JUMPER SETTINGS
Refer to Figure 2-6 for crystal selection and
HSDB Code selections jumper placement. The
jumper on J5, pins 2-3 select s 12 MHz crystal for LTR.
The jumper on J4, pi ns 3-4 conne cts EP ROM U14, pin
27 (A14) to +5V for LTR single-ended 5V data bus.
2-6
Figure 2-6 RJ-11 TO BNC MPC JUMPERS
231J5
J4
123
46
5
HSDB CODE SELECTION
CRYST AL SELECTION
23
1
J5
J4
1
2
3
4
6
5
HSDB CODE SELECTION
CRYSTAL SELECTION
INSTALLATION
GROUND
RX
TX
Jumper J4 must be placed with the following
guidelines (see Figure 2-6):
J4, pins 3-4 for operation with the RJ-11 to BNC
adapter module and mixed systems (20x1 and 1100)
with any version of HSDB software.
J4, pins 3-4 for operation with the RJ-11 to BNC
adapter module with 2008 only systems with any
version of HSDB software.
J4, pins 5-6 for operatio n wit h the RJ-11 to RJ-11
cable with 2008 only systems wit h Version 202 or later
HSDB software.
Figure 2-8 ANTENNA CONNECTIONS
BLU
BLK
GRN
YEL
ORN
RED
PIN 5
HSDB-
PIN 1
TLA-
PIN 3
IRDB-
PIN 6
HSDB+
PIN 2
TLA+
PIN 4
IRDB+
Figure 2-7 RJ-11 TO RJ-11 MPC JUMPERS
2.10 CONNECTING RECEIVE AND TRANSMIT
tions are shown in Figure 2-8. Although each transmitter and receiver could be connected to a separate
antenna, this is usually not done because of the large
number of antennas required by a multiple repeater
installation. Therefore, an antenna combining system
is usually used. An example of a combining system
for a five-channel system is shown in Figure 2-5. The
amount of power loss introduced by a combiner
depends on the type of combiner used. If it has a loss
of 3 dB, power output to the antenna is reduced by
half.
Figure 2-13 MIXED VIKING VX AND CR1100 REPEATER INSTALLATION
August 2000
Part No. 001-2001-200
EXCITER
6
8
7
ON
2-10
SECTION 3 SOFTWARE
SOFTWARE
3.1 INTRODUCTION
The Johnson 2000 Repeater Program on 3.5 inch
disk, Part No. 023-9998-390, uses an IBM
personal
computer to program the EE PROM Memory in the
Main Processor Card (MPC). To lessen the chance of
programming errors and simplify operation, the program uses yes/no questions or toggles through the
available responses.
The computer is connected directly from the
serial card to the MPC. The interconnect cables used
are shown in Figure 4-29. The DB-9 t o 8-pin modular
adapter is connected to the serial port of the computer
and an interconnect cable connects the adapter to the
MPC.
NOTE: These connections are for the IBM computer
and may differ from an IBM compatible. In whic h
case, consult the manuals for your computer for serial
card outputs and connections.
3.1.1 HOW TO USE THIS MANUAL
This manual introduces the program and illustrates how to use the features. This m anual is organized to easily fi nd programming information wi th the
Table of Contents, Index and Parameter Tables for the
responses required for programming.
Graphic reproductions of the screens are shown
for reference. Adjacent to the screens are tables to
provide the paramete rs, availa ble respon ses and a bri ef
description of the parameter. It is not the intent of th is
manual to teach computer operation, but to allow the
user to become familiar with the available screens and
the responses without having to be at the computer.
3.1.2 GETTING STARTED
Follow the computer ins tructions for loading the
disk. The MS-DOS Revision 2.0 or later operating
system is needed to run the programs. The computer
needs to have RS-232C capability, for example, the
Serial Card in slot "COM1" or "COM2".
3.1.3 COMPUTER DESCRIPTION
The programming software is designed to run on
an IBM PC or compatible computer that me et the following minimum requirements.
1. One 3.5" high density disk drive.
2. 640K of memory
3. MS-DOS version 2.0 or higher
4. One serial port
5. Monochrome or color monitor and video card
Although the program uses color to highlight certain areas on the screen, a monochrome (black and
white) monitor or LCD laptop also provide satisfactory operation. Most video formats such as EGA and
VGA are supported. A serial port is required to connect the Repeater to the computer. This port is standard with most computers.
The cables from the Repeater to the computer are
not included. With most computers, the adapter-tocomputer cable is a standard DB-25 M-F cable, PN
023-5800-017, (the male connector plugs into the
adapter). If your computer requires a male connector,
a male-to-male cable is also available, PN 023-5800-
016. The cable from the adapter to the Repeater has a
modular-type 8-pin connector (see Figure 4-29).
NOTE: Before starting you should a lready k now how to
start MS-DOS
, format and make backup copies of
disks, copy and delete files, and run programs. If you
are unfamiliar with any of these actions, refer to the
MS-DOS manual for your computer for more information (see Section 5-1).
3.1.4 EEPROM DATA STORAGE
The data pr ogrammed into the MPC is stored by
an EEPROM Memory. Since this type of device is
nonvolatile, data is stored indefinitely without the
need for a constant power supply. A repeater can be
August 2000
3-1
Part No. 001-2001-200
SOFTWARE
removed from the site or even stored indefinitel y without affecting prog ramming. Since EEPROM Memory
is also reprogrammable, a new device is not nee ded if
programming is changed.
3.1.5 COMMAND LINE OPTIONS
HELP
To show all options available from the command
line type: /h or /?. Either ’/’ or ’-’ can be used. For
example: 2004pgmr /h
The options can be entered in any order.
For example: 2004pgmr /d /b /c
COM PORT
The Johnson programming software defaults to
serial port COM1. However, if this port is already in
use, the software ca n be re configured to use ser ia l p ort
COM2. To do this, use one of the following methods:
1. When running the compiled (.EXE) version, type /
c2 on the command line after the program name.
For example: 2004pgmr /c2 or -c2
2. Select COM port from Utilities heading.
BAUD RATE
The software defaults to 9600 ba ud, however this
rate can be changed. To do this from the command
line, type /bxxxx (xxxx = baud rate).
For example: 2004pgmr /b or -b
NOTE: When the baud rate is changed on the command line, the baud rate jumpers on J3 in the MPC
must also be changed to the same baud rate (see Section 6.10.8).
DEMO MODE
3.1.6 COLOR OR MONOCHROME OPERA TION
The program ming software utilizes color for a
color monitor and video card. However, with LCDtype displays, this may make some in format ion hard to
read because the cont rast is p oor. To improve contr ast,
a monochrome mode can be selected in the display
mode from Utilities heading.
3.2 REPEATER PROGR AM SOFTWARE
3.2.1 INSTALLING THE SOFTWARE
When you receive the programming software,
make a backup copy and store the master in a safe
place. Copy the distribution disks using DOS DISKCOPY command. For example, type:
DISKCOPY A: A: (single floppy drive)
or
DISKCOPY A: B: or C: (multi-drive systems).
If you have a hard disk drive, you may want to
create one or more separate directories for transceiver
programming and then transfer the program disk files
to those directories. To create a new directory, use the
MKDIR command. For example, to create directory
RADIOPRG, type:
MKDIR \RADIOPRG.
Then to make the new directory the current directory,
use the CHDIR command. For example, to change to
the \RADIOPRG directory, type
To view the screens for Read Setup Parms and
Write Setup Parms from the Transfer menu when a
repeater is not conne ct ed to t he comput er thi s opti on is
used. Normally these screens are not available without a repeater connected. To do this from the command line, type: /d or -d.
For example: 2004pgmr /d
August 2000
Part No. 001-2001-200
CHDIR \RADIOPRG.
To copy all files from a floppy disk in drive A: to this
directory, type:
COPY A:*.*
3-2
SOFTWARE
If you have a single floppy drive an d no hard di sk
drive, you need to create programming disks. The reason for this is that there is not adequate space on the
backup disk(s) for storing radio files. If your computer has dual floppy disk drives, the backup disk can
be placed in one drive and then the radio files stored
on a disk in the second drive.
T o make a pro gramming di sk, format a blank disk
using FORMAT B: or FORMAT B: /S (use "/S" if it
must be a bootable disk). Then copy the required program file or files to the pro gra mmi ng di sk. To do this,
type COPY A:(filename .ext) B:(filename.ext). For
example, to copy the file 2004pgm2.exe from drive A
to drive B, type
COPY A:2004pgm2.exe B:2004pgm2.exe
This procedure works for either single or dual drive
computers. Refer to your computer reference manual
for more information on these DOS commands.
The programming software is shipped in a compressed format. The name of the compressed file is
2000pgm2.exe and it extr acts the fo llowing fi les so the
program can be used on a PC.
The 2004PGM2.EXE file is self ex tr act i ng which
means that the files extract automatically when executed. To extract these files so the program can be
used, first make the current directory the destination
directory for these files. For example, to make it t he
\RADIOPRG directory on drive C: (if not the current
directory), type C: (Retur n) and then CD \RADIOPRG
as just described. To make it the disk in drive B:, simply type B:. Then insert the program disk in drive A:
and type A:2004PGM2 (or B: 2004PRM2 if drive B:
is being used). The program files are automatically
extracted into the current directory or disk.
3.2.2 MINIMUM FREE MEMORY REQUIRED
Approximately 560K of free conventional memory is required to run this pr ogram (us e the CHKSK or
MEM command to display the amount of free memory). If you have at least 640K of memory and not
enough is available, there may be other programs that
are also being loaded into conventional memory. Contact Customer Service for information on how these
programs can be moved or disabled to make more
space available.
3.3 REPEATER PROGR AMMER
When the program is loaded into the computer
and executed, the menu shows the files available from
the directory. The program is used to create, edit,
transfer and receive the repeater and channel parameters descri bed in Sectio n 5.
IMPORTANT
The commands and displays referred to in this
manual are for the IBM PC and may differ from IBM
compatible. Refer to the computer’s operating system
manual for command explanations.
3.3.1 PROGRAM FILES
The files in the software directory are needed to
run the program.
3.4 ALIGNMENT SOFTWARE
File Edit Transfer Hardware Test Utilities
PA
Receiver
Exciter
Full Rptr/Station
RNT Interface
Telephone Interface
VNC Interface
Figure 3-1 REPEATER TEST MENU
The software for the VIKING VX repeater programs the MPC to open and close the audio/data gates
necessary for the ali gnment selecte d from the Test-Full
3-3
August 2000
Part No. 001-2001-200
SOFTWARE
Repeater menu. Under the menu heading Test are the
alignment procedures for the PA (see Section 7.3),
Receiver (see Section 7.1), Exciter (see Section 7.2)
and overall Full Repeater (see Section 7.4) including
the MAC card (see Figure 3-1).
Refer to Section 7 for Alignment Procedures as
shown in the program, alignment points diagrams and
test setup d iagrams.
HELP - F1
FILE
Load
Save
Save As
Print Config
DOS Shell
About...
Quit ALT X
3.5 HELP F1
Help screens are available for most parameters
and options in this progr am. Whenever a pa rameter or
options clarification is needed, press F1 and if a help
screen is available it will pop-up on the screen. Press
Escape <E SC> to exit th e pop-up scre en.
Setup Parameters F4
Select Repeater
EDIT
TRANSFER
HARDWARE
TEST
UTILITIES
Figure 3-2 PROGRAMMING FLOWCHART
Alarm Configuration
Repeater Type
Delete Repeater
Read Setup Parms F5
Write Setup Parms F6
RF Data
Revisions
PA
Receiver
Exciter
Full Rptr/Station
COM Port
Display Mode
Alarm Display
User Level
August 2000
Part No. 001-2001-200
3-4
SECTION 4 PULL DOWN MENUS
PULL DOWN MENUS
4.1 MENU DISPLAYS
The menus available are listed at the top of the
screen (see Figure 3-2). Move the cursor with the
arrow keys to highli ght the men u name. Pres s Enter to
view the menu and the arrow keys to scroll through
the menu. Call up the highlighted selection by pressing Enter.
4.2 FILE MENU
This menu manipulates new or existing files into
directories and saves files to be called up at another
time.
Figure 4-1 FILE MENU
4.2.1 LOAD
Load reads information from a stored file. The
program requests the filename to be loaded into the
buffer. The filename from a disk can be entered in the
highlighted area. Then move the cursor d own with the
arrow key and highlight "Ok" and press Enter. To
select an existing file, use the arrow keys to move
down the menu list and press Enter when the highlighted file name is the file to load.
4.2.2 SAVE
This saves the edited ve rsion of an existing file
loaded in the buffer under the same filename in the
directory a nd deletes the old file. It loads a new file
created in the Edit menu into the directory.
4.2.3 SAVE AS
This saves the edited ve rsion of an existing file
loaded in the buffer under a new filename o r gives a
new file created in the Edit menu a filename.
Dir c:\example\file\load
File *.qx
file1.qx
OkCancel
Load File
..\
tmp\
Figure 4-2 LOAD FILE
4-1
Dir c:\example\file\load
File *.qx
test.qx
OkCancel
Save File
..\
tmp\
Figure 4-3 SAVE FILE
Part No. 001-2001-200
August 2000
PULL DOWN MENUS
4.2.4 NEW
This menu selection erases all Site and Repeater
information in the programmer and loads factory
defaults. If the current data has been changed, selecting File -> New provides the opportunity to save the
data before loading the defaults.
4.2.5 PRINT REPEATER CONFIGURATION
Select the destination for the configurations.
Printer - Prints to printer connected to P C.
File - Writes printable test to selected filename.
Select which repeater data will be printed.
All Repeaters - Prints the data for all valid
repeaters.
Single Repeater - Prints the data for th e entered
repeater number.
NOTE: A list of valid repeaters can be seen under the
Edit-Select Repeater menu selection.
4.2.6 DOS SHELL
DOS shell temporarily suspends the program and
returns to DOS. Directories and other DOS commands can be performed. To return to the program
from DOS, type EXIT and press Enter.
4.2.7 QUIT (ALT X)
Quit exits t he repeater program and returns to
DOS. Save all files before exiting the repeater pro gram.
EDIT
Setup Parameters F4
Select Repeater
Alarm Configuration
Repeater Type
Delete Repeater
Repeater Number
Receive Frequency
Transmit Frequency
Frequency Step
TELCO Network Type
Area
Sync Repeater
Stand Alone
CWID Time
CWID Message
Local Mic ID
Test Mode ID
RF Power Level
Power Source
Paging
Data Modem
Default
Repeater Number
Input Alarms
Output Alarms
Cross Reference
Repeater Type
Channel Bandwidth
Frequency Range
Input Type Selection
Output Type Selection
Alarm Cross Reference Selection
Multi-Net
LTR
Universal Station UHF
VHF Universal Station
12.5 kHz
25 kHz
132-150 MHz
150-178 MHz
370-480 MHz
480-512 MHz
Figure 4-4 EDIT PROGRAMMING FLOWCHART
4-2
August 2000
Part No. 001-2001-200
PULL DOWN MENUS
4.3 EDIT
Figure 4-5 EDIT MENU
This menu is used to create new files and set or
change the repeater operating parameters. The filename for the repeaters in th is file is shown in the
lower left corner of the screen.
4.3.1 SETUP PARAMETERS
First see Section 4.3.4 to select repeater type to
setup LTR Parameters. This menu programs the
repeater parameters and options of each repeater at a
site. Table 5-1 lists the parameters that are set by this
screen (see Figure 5-1) and giv es a brief desc ription of
each.
NOTE: The parameters are shown in the lower left of
the pop-up screen for reference.
Repeater Number
Each repeater is programmed with a repeater
number from 1-20. Make sure t hat t his nu mber agrees
with the Home repeater number programmed in the
mobiles assigned to this repeater.
Receive/Transmit Frequency
Each Repeater is programmed with a Transmit
and Receive frequency that it is operating on.
Frequency Step
Using the space bar, select either:
5000 Hz or 6250 Hz for allowable frequency spacing.
To eliminate the chance of incorrect synthesizer
settings arising from ambiguous frequ enc ies , make
sure this setting is correct.
Telco Network Type
None is used for LTR system repeaters.
Area
This is the same as the area bit used when programming the mobiles. This bit is usually "0".
Sync Repeater
None is used for LTR system repeaters.
Stand Alone
Select if the repeater is not connected to additional repeaters via the high speed data bus.
ID Validator (No t applicable at this time .)
CWID Time
The time interval between transmission of the
repeater’s CWID message.
CWID Message
FCC regula tions require that the stat ion call letters be transmitted periodically on the lowest- frequency repeater in the system and disabled on all the
others. Morse code is used to encode these letters/
numbers for continuous-wave (CW) transmission (15
characters /numbers UPPER CASE).
Local MIC ID
The local microphone connected to the MAC
jack is assigned a Group ID for transmitting when the
local microphone PTT is active. This allows the
Repeater to operate as a base station.
Test Mode ID
This Group ID is transmitted when the Repeater
is in T es t Mode. Mobi les with th e same Group ID can
communicate with the Repeater in Test Mode.
4-3
August 2000
Part No. 001-2001-200
PULL DOWN MENUS
Repeater List
default
Rptr 1
-------
-------
------Rptr 30
RF Power Level
This is the d efault power level. Enter the power
level for transmit power.
NOTE: This is not the actual power out level. Other
factors must be considered for true power out.
Power Source
This indicates the primary power source for the
Repeater (AC/DC). If AC is selected and Battery
Backup is installed, the transmitter goes to half rated
power (max.) when AC fails. If DC is selected and
AC fails, power output is unchanged.
Select Which Alarms To Edit
Input Alarms
Output Alarms
Cross Reference
Figure 4-7 ALARM CONFIGURATION
Input Alarms
There are four input alarms that can be activated
by external devices (see Section 6.12). These inputs
can be disabled, energized or de-energized. Alarms 3
and 4 can also be analog input.
Data Modem
This is selected if the Data Modem option is
installed. This option is not compatible with Paging,
TIC, or VNC.
4.3.2 SELECT REPEATER
Select the repeater number to be programmed or
edited from the pop-up menu (see Figure 4-6). Move
the cursor with the arrow keys to highlight the
repeater number and press Enter.
Figure 4-6 REPEA TER LIST
If the input is disabled , the input ala rm line is
inactive. When energized and current flow is
detected, the alarm is activated. When de-energized
and no current flow is detected, the alarm is activated. Analog inputs prov ide a det ect i on of an analog
input out of limit condition. Select the Low and High
Limit pair to trip an Analog Input Alarm. The High
Limit must be greater in value than the Low Limit
(0.0V-5.0V in 0.1V steps).
Input Alarm Configuration
Input Type SelectionDescription
Alarm 1 Input Type: Energized
Alarm 2 Input Type: De-Energized
Alarm 3 Input Type: Analog
Alarm 4 Input Type: Analog
Low Limit Vol tage (Input3): 1.6 Volts
High Limit Voltage (Input3): 2.5 Volts
Low Limit Voltage (Input4 ): 0 Volts
High Limit Voltage (Input4): 1.5 Volts
Spacebar
Door 1 open
Door 2 open
Fuel Tank 1/2
Fuel Tank 1/4
Figure 4-8 INPUT ALARMS
4.3.3 ALARM CONFIGURATI ON
This programs the input alarm (see Figure 4-8)
and output alarm (see Figure 4-9) configurations and
provides a cross reference screen.
Use the arrow keys to move down the list. Use
the Space bar to toggle through the parameters: Disabled, Active Low, Active High, for each alarm.
August 2000
Part No. 001-2001-200
Output T ype Selection
Select the operation of the Output Alarm. The
available types are:
Active Open - An active alarm opens (no contact)
the output lines.
Active Closed - An active alarm closes (contact)
the output lines.
4-4
PULL DOWN MENUS
Output Alarm Configuration
Output Type SelectionTx ID
Alarm 1 Output Type: Active Open
Alarm 2 Output Type: Active Open
Alarm 3 Output Type: Active Open
Alarm Tx Rate:0
Press F2 to Accept
Spacebar
Description
DOOR OPEN
FUEL 1/2
FUEL 1/4
RF HALF POWERAlarm 4 Output Type: Active Closed
120
120
15
0
Figure 4-9 OUTPUT ALARMS
Alarm Description
This is a tex t string (up to 15 characte rs) to
describe the alarm. This test string is sent via Morse
code if the alarm input is programmed with a Tx ID
and an output is selected in the cross reference menu
(see Figure 4-10).
Transmit ID
Each of the 8-alarm outputs can be assigned a
Group ID from 1-225. The default setting is 0 (zero)
for disabled. This Group ID and th e Repe ater number
identify an alarm that is active. This ID can be programmed into a transceiver so that when the alarm is
active, the alarm description is received in Morse
code.
Alarm Cross Reference Selection
Select which Output Alarm is activated by each Input Alarm.
0. None
1. 1
2. 1
3. 2
4. 3
5. None
6. None
7. None
8. None24. None 32. None 40. None
9. None
10. None
11. None
12. None
13. None
14. None
15. None
16. None
17. None
18. None
19. None
20. None
21. None
22. None
23. None
Press F2 to Accept
25. None
26. None
27. None
28. None
29. None
30. None
31. None
33. 4
34. None
35. None
36. None
37. None
38. None
39. None
41. None
42. None
43. None
44. None
45. None
46. None
47. None
Figure 4-10 ALARM CROSS REFERENC E
4.3.4 REPEATER TYPE
This screen (see Figure 4-11) selects the repeater
type (LTR signaling protocol and features):
Repeater TypeVHF
Channel Bandwidth 12.5/25 kHz
Frequency Range132-150/150-178 MHz
Alarm Transmit Rate
This sets the time interval for transmitting the
alarm message in Morse code. If more than on e alarm
is active, this is the inter-alarm time.
Cross Reference
The cross reference screen selects the output
alarm that is activated by each input alarm. There are
up to 48 alarms (0-47), 8 external input alarms and 40
internal alarms (s ee Table 1-2). There are eight output
alarms. An alarm condition on any input can cause an
output alarm. This screen configures which input
alarm activates an out put alarm.
NOTE: More than one alarm condition can have the
same output alarm (see Figure 4-10).
Figure 4-11 REPEATER TYPE
4.3.5 DELETE REPEATER
Select Rptr To Delete
Rptr 1
Figure 4-12 DELETE REPEATER
4-5
August 2000
Part No. 001-2001-200
PULL DOWN MENUS
Program Rptr 1
OkCancel
4.3.6 TELEPHONE PA RAMETERS
Refer to the Telephone Interface Card manual,
Part No. 004-2000-370, for information on the Telephone Access Parameters, Telephone Interface and
TIC Calibration Data.
4.4 TRANSFER
File Edit Transfer Hardware Test Utilities
Read Setup Parms F5
Write Setup Parms F6
Read TIC Calibration Data
Write TIC Calibration Data
Edit Option Keys
Figure 4-13 TRANSFER MENU
4.4.1 WRITE SETUP PARAMETERS
Programming Setup Par am eters
Count = 1
Figure 4-15 PROGRAM WRITE SETUP
4.4.2 READ SETUP P ARAMETERS
This command reads the contents of the
EEPROM mem ory of a repeater and loads it into a
buffer. The contents of the buffer is then displayed to
show the programming of the repeater.
Read Setup Parms?
OkCancel
This command sends the contents of a file to the
repeater and programs the EEPROM memory in the
Main Processor Card (MPC ).
Figure 4-14 WRITE SETUP PARAMETERS
HSDB Monitor
HARDWARE
RX/TX Data
RF Data
Revisions
Mode Select
TTY Terminal
Figure 4-16 READ SETUP PARAMETERS
Reading Setup Parameters
Attempting access to Repeater
Figure 4-17 READING SETUP
Repeater (1-20)
Home
UID
GoTo
GID
Data Received From Radio
Data Transmitted to Radio
RF Line Monitor
Normal
Test
UID
Home
GID
Pri
Stat
Time
August 2000
Part No. 001-2001-200
Figure 4-18 HARDWARE PROGRAMMING FLOWCHART
4-6
PULL DOWN MENUS
4.5 HARDWARE
Figure 4-19 HARDWARE MENU
4.5.1 HSDB MONITOR
High Speed Data Bus (HSDB) connects all
repeaters at a site and cont inu ally sen ds update s on the
status of each repeater. This information screen provides a list of all repeaters at the site (1 to 20). If a
repeater is not sending data, IDLE is next to the
repeater number. The data sent by the repeater is used
to determine the Home, GID and UID of destination
(mobile) users to receive the call placed by the
originator.
The Home column refers to the Home repeater
number of the originator, therefore the Repeater number and the Home number may not be the same number. The UID is the Unique ID used to identify the
originator of special calls. The GID column refers to
the Group ID of the talk group of the originator
(236=UID Call, 237 Telco call). The GoTo column
shows the repeater channel all destination users switch
to so they receive the call.
RptrHomeUIDGoToGID
Figure 4-20 HSDB MONITOR
The repeater receives the destinati on’s: Unique
ID, Home Repeater Number, Group ID, Priority, Status and Time Stamp. The information sent to the destination in the update message from the repeater
includes: Unique ID of originator, Home Repeater
Number, Group ID, GoTo Channel Number, Free
Channel Nu mber and Priority of the cu rrent repeate r.
The time st amp is included becaus e messages are sent
continually and this provides a reference for when a
data exchange took place.
UID Home GID Pri Stat Time
Figure 4-21 MOBILE TRAFFIC MONITOR
4.5.3 RF DATA
The A/D Monitor Screen shows the state of the
lines (see Figure 4-22). These lines are monitored by
the A to D converter in the IAC. The normal values
for each line are defined as follows.
Synthesizer Lock LinesYes or No
Forward Power (LP)25-110 Watts
Reflected Power0-6 Watts
Final Out (ratio)approx equal
Chassis Temp27°C-55°C
Wideband Audio Outputapprox 200
LO Injectionapprox 200
RSSI20-150
Fan Current100-200, 0
FanOn or Off
Power Supply Temp22°C-45°C
Battery Voltage21V-28V
4.5.2 RECEIVE/TRANSMIT DATA
This is an information screen used at the repeater
site while t he computer (laptop) is connected to the
MPC in the rep eater being monitored. This information is contained in the receive data stream exchanged
between the repeater and the destination user (mobile)
and the data content of the repeater transmit data
stream. The message contains data received from the
destination and data se nt to the mo bile by the r epeater.
Values with no label are the actual A to D read-
ing. To calculate the voltage on the line, divide the
value by 51. Example: Value ÷ 51 = Volts. Any variation from the above values may indicate a problem in
that area. Values on this screen are relative measurements only.
August 2000
4-7
Part No. 001-2001-200
PULL DOWN MENUS
RF Line Monitor
Synthesizer Lock Lines
Exciter Synthesizer: Yes
Receive Synthesizer: Yes
Transmit Parameters
Forward Power: 0 Watts
Reflected Power: 0 Watts
Final Output 1/2: 0/ 0 ratio
Final Output 3/4: 0/ 0 ratio
Receive Parameters
RSSI: 0
System Parameters
Fan 1 Current: 0
Fan 2 Current: 0
Fan On: Off
Chassis Temp: 0 C
Battery Voltage: 0 Volts
Wideband Audio Output: 0
LO Injection: 0
Power Supply Temp: 0 C
(Not Calibrated)
Exciter High Stability: No
Receive High Stability: No
Figure 4-22 RF LINE MONITOR
Repeater Version Display
Repeater Number: 1
HSDB: 2.1d MAC: 1.09 TIC: 0.00
MPC or TPI: 10.12 05/23/95 11
Serial Number: 1234567891234567
Figure 4-23 REVISION/VERSION
4.5.4 REVISION/VERSION
The Revision/Version is displayed for the
repeater modules in this screen. The format is R.V
(revision.version) for all modules. The MPC information also includes the release date of the software and
the serial number of the repeater. The HSDB version
in Figure 4-23
and Figure 4-24 is the version for J4, pins 3/4 connected in
the MPC.
is for J4, pins 5/6 connected in the MPC
4.5.5 MODE SELECT
The Mode Select screen plac es the repea ter eith er
in the Norma l mode or the Test mode. In th e Normal
mode the repeater operates as a normal repeater.
In the Test mode the repeater transmits a test
word. This test word is the Test Mode ID setup in the
Setup Parameters (see Section 4.3.1
).
C A U T I O N
Repeater Version Display
Repeater Number: 1
HSDB: 50.02 MAC: 1.09 TIC: 0.00
MPC or TPI: 10.12 05/23/95 11
Serial Number: 1234567891234567
Figure 4-24 REVISION/VERSION
While in the test mode the repeater is "busy", therefore
it is important to place the repeater in Normal mode
when the test mode is no longer required.
August 2000
Part No. 001-2001-200
4-8
TEST
PA
Receiver
Exciter
Full Rptr/Station
RNT Interface
Telephone Interface
All Test
Repeater Setup
Transmitter Tests
Receiver Tests
Transmit Audio/Data
Voter Audio Adjust
Audio/Data Adjust
Repeater Operat ion
Select Line Type
Adjust Links
PULL DOWN MENUS
Frequency Adjust
Power Output Adjust
All Receive Tests
TCXO Frequency Adjust
Audio Distortion
Hum & Noise Measurement
SINAD Measurement
Squelch Adjust
Data Level Adjust
Local Speaker/Mic
Desense Check
Miscellaneous Tests
All Transmit Tests
Audio Deviati o n Lim i t
Repeat Audio Level
Data Level Adjust
Audio/Data Deviation
CWID Level Check
Local Speaker/Mi c
Tx Hum & Noise Ratio
Transmit Audio Distortion
LTR Mod em
All Audio/Data Tests
Voice Audio From Repeater
Voice Audio To Repeater
FSK Data To Rptr (Separate Path)
FSK Data To Rptr (Over Voice Path)
FSK Data From RNT (Separate Path)
FSK Data From Rptr (Over Voice Path)
RS-232 Setup
All Operational Tests
New HSDB Test
Old HSDB Test
Handshake Test
Alarm Test
Spurious Check
Data Over Voice (2-Wire)
Separate Data (4-Wire)
RS-2332
Figure 4-25 TEST PROGRAMMING FLOWCHART
4.6 TEST
Figure 4-26 TEST MENU
4.6.1 POWER AMPLIFIER
This menu selection walks through the alignment
of the Power Amplifier and RF Interface Board on the
computer screen. Refer to Section 7.3 for the PA and
RFIB alignment in this manual and Figures 7- 3 and 7-8
for alignment points diagrams.
4.6.2 RECEIVER
This menu selection walks through the alignment
of the receiver on the computer screen. Refer to Section 7.1 for the Receiver alignment i n this manua l and
Figure 7-1 for an alignment points diagram and Figure
7-6 for a test setup of the Receiver.
4.6.3 EXCITER
This menu selection walks through the alignment
of the Exciter on the computer screen. Refer to Section 7.2 for the Exciter alignme nt and Fi gure 7-2 for an
alignment points diagram and Figure 7-7 for a test
setup of the Exciter.
4-9
August 2000
Part No. 001-2001-200
PULL DOWN MENUS
4.6.4 FULL REPEATER
This menu selection walks through the alignment
of the entire repeater. The Receiver and Exciter portions are performance tests and adjustments. The
Audio and Data portions are level adjustments for the
Main Audio Card (MAC). Refer to Figure 7-12 for an
alignment points diagram for the MAC.
4.7 UTILITIES
Figure 4-27 UTILITIES MENU
4.7.1 COM PORT
This is the COM port used to send and receive
data from the Repeater MPC. An interface cable connects the Repeater to the computer (see Figure 4-29).
This screen also selects the data baud rate.
4.7.2 DISPLAY MODE
This screen allows the color mode to be selected
for color monitors. When using a la ptop, monochrome
is recommended for better resolution.
Figure 4-30 COLOR MODE SELECTION
4.7.3 USER LEVEL
There are two levels to choose from, Novice and
Advanced. The Novice uses prompts in the EditParamete rs screens wh en Escape or F2 keys are
pressed that ask "are you sure" before the task is executed. The Advanced selection performs the task
without asking the question.
Figure 4-28 COM PORT SELECTION
TO MPC
TO LAPTOP
Figure 4-29 LAPTOP INTERCONNECT CA-
BLE
August 2000
Part No. 001-2001-200
4-10
REPEATER PROGRAMMING
SECTION 5 REPEATER PROGRAMMING
5.1 CREATING A NEW FILE
An example will be used to show the program-
ming for a new file created for Site 1.
NOTE: At any point in the programming sequence, if
F1 is selected, a help screen appears to explain the
menu selection highlighted at that point.
5.1.1 SELECT REPEATER TO EDIT
A repeater is selected to program. When no file
exists with programmed repeaters, the default is
selected and edited.
1. Highlight EDIT, press Enter.
2. Highlight SELECT REPEATER, press Enter.
3. Default is the only repeater in this list, press Enter.
4. Highlight EDIT, press Enter.
13.Type in a valid DOS filename. For this example
site1.dat i s used.
14.The file consists of default and repeater one under
the filename of site1.dat.
5.2 ADDING A REPEATER TO A FILE
The example used fo r Si t e 1 will again be used t o
add repeaters to the filename site1.dat.
1. Highlight EDIT, press Enter.
2. Highlight SELECT REPEATER, press Enter.
3. The repeater list shown for this file includ es defaul t
and repeater one. These contain the same parameters with the exception that when selected for edit
the programmed repeater can be over written and the
data lost.
4. Highlight DEFAULT, press Enter.
5. Highlight SETUP PARAMETERS, press Enter.
6. The Setup Parameters sc reen ap pears (see Fi gure 5 -
1). Fill in the parameters for this repeater. A brief
description of the parameters is in Table 5-1. Full
descriptions are in Section 4.3.1.
7. Select parameters, press F2 to accept.
8. Highlight EDIT, press Enter.
9. Highlight ALARM CONFIGURATION and press
Enter, if alarms are to be configured.
10.Program the Alarms to be configured (see Section
4.3.3), press F2 to accept.
11.Highlight FILES, press Enter.
12.Highlight SAVE, press Enter.
5. Highlight EDIT, press Enter.
6. Highlight SETUP PARAMETERS, press Enter.
7. Change the Repeater number and other parameters
as required for this repea ter, press F2.
8. Highlight EDIT, press Enter.
9. Highlight ALARM CONFIGURATION and press
Enter, if alarms are to be configured.
10.Program the Alarms to be configured (see Section
4.3.3), press F2 to accept.
11.Highlight FILES, press Enter.
12.Highlight SAVE, press Enter.
13.Repeater 2 is added to the Repeater List in file
site1.dat.
5-1
August 2000
Part No. 001-2001-200
REPEATER PROGRAMMING
Table 5-1 REPEATER SETUP PARAMETERS
ParameterResponseDescription
Repeater Number1-20Each repeater is assigned a Home Repeater number from 1-20.
Channel FrequencyRx:
Tx:
Frequency Step5 kHz or 6.25 kHzAllowable frequency spacing.
Telco Network TypeNone
FSK
RS232
FSK Blank & Burst
TIC
VNC
Area0, 1Same as value of the Area bit in the mobiles.
Sync RepeaterNoNot used.
Stand AloneYes, NoSelect if the repeater is not connected to additional repeaters
ID ValidatorYes, NoNot used.
CWID Time0 = disabled
1-60 min
CWID Message15 characters/numbers
UPPER CASE
Local MIC ID0 = disabled (default)
1-250, 253
Test Mode ID0 = disabled
1-250, 254 (default)
RF Power Level25-110Power level in watts for transmit power.
Power SourceAC or DCThe type of primary power source for the Repeater.
Data ModemYes, NoSelect if the Data Modem option is installed.
Each repeater is programmed with the transmit and receive frequency that it is operating on.
None=LTR dispatch only.
Data signaling type for a Switch, FSK, RS232 or FSK B&B.
TIC is for Telephone Interface Card w/o a Switch.
VNC=network telephone interconnect w/o a Switch.
(via HSDB).
Time between CWID transmissions.
Station call letters.
Group ID transmitted when the local microphone PTT is active.
Group ID transmitted when the Repeater is in the Test Mode.
Sync Repeater: No
Stand Alone: Yes
ID Validator: N/A
Local MIC ID: 0
Test Mode ID: 254
Paging: No
Repeater Home (1-20)
August 2000
Part No. 001-2001-200
LTR Repeater Setup Parameters Edit
Telco Network Type: None
Area:
CWID Time:
CWID Message:
RF Power Level:
Power Source:
Data Modem:
Press F2 to Accept
Figure 5-1 SETUP P ARAMETERS
5-2
0
0
REDHAWK
110
AC
No
SECTION 6 CIRCUIT DESCRIPTION
CIRCUIT DESCRIPTION
6.1 RECEIVER
6.1.1 INTRODUCTION
The receiver is a double conversion type with
intermediate frequencies of 52.95 MHz and 450 kHz.
The first injection frequency is phase locked to a temperature compensated crystal oscillator (TCXO) with
a frequency stability of ±2.5 PPM from -30° to +60°C
(-22° to +140°F). Two 3-pole bandpass filters in the
front-end reje ct signal s outs ide the r eceive ba nd. Two
4-pole crystal filters and two 4-pole ceramic filter
establish receiver selectivity (see block diagram
Figure 6-1).
6.1.2 REGULATED VOLTAGE SUPPLIES
The +15V DC power source is supplied by the
repeater power supply. The +15V supply enters the
receiver on J201, pin 1. U302 provides the +12V DC
receive voltage to the RF and IF amplifiers. U303
supplies +12V DC to the first and second injection
amplifiers. U304 supplies +12V DC to the remaining
RF circuits. U301 suppli es +6V DC to th e remaining
circuits.
6.1.4 12.5 KHZ IF
First Mixer and Crystal Filter
First mixer U101 mixes the receive frequency
with the first injection frequency to produce the 52.95
MHz first IF. Since high-side injection is used, the
injection frequency is 52.95 MHz above the receive
frequency. Jumper J203 selects between a 12.5 kHz
IF and a 25 kHz IF. Install jumper plug P203 on J203,
pins 2-3 to select the 12.5 kHz IF. The output of U101
is matched to Z211 at 52.95 MHz by L211, C236 and
C237.
Z211A and Z211B form a two-section, four-pole
filter with a center frequency of 52.95 MHz and a
-3 dB bandwidth of 8 kHz. This filter attenuates adjacent channels and other signals close to the receive
frequency. The filter sections are a matched pair and
the dot on the case indicates which leads connect
together. Matching with Q202 is provided by C241,
L213 and C240.
6.1.3 HELICAL FILTERS, RF AMPLIFIER
The receive signal enters the receiver on coaxial
connector A201. A helical filter consisting of L101,
L102 and L103 is a three -pole bandpass filter tu ned to
pass only a narrow band of frequencies within the
132-178 MHz band. This filter also attenuates the
image and other unwanted frequenci es .
Impedance matching between the helical filter
and RF amplifier U103A is provided by C102.
U103A amplifies the receive signal to recover filter
losses and increases receiver sensitivity. Biasing for
U103A is provided by R105/R106/R107/R108 and
C105, C106, C107 and C108 provide RF bypass.
Additional filtering of the receive signal is provided
by 3-pole helical fil ter L108- L110. C103/C104 match
the output from U103A to 3-pole helical filter L108L110.
IF Amplifier, Crystal Filter
Q202 amplifies the 52.95 MHz IF signal to
recover filter and mixer losses and improve receiver
sensitivity. Biasing for Q202 is provided by R236/
R233/R234/R235 and C242/C243/C246 provide RF
bypass. The output of Q202 is matched to crystal filter Z212 at 52.95 MHz by C245, C247 and L214.
Z212A and Z212B form a two-section, four-pole
filter with a center frequency of 52.95 MHz and a
-3 dB bandwidth of 8 kHz. This filter establishes the
selectivity of the receiver by further filtering the 52.95
MHz IF. The filter sections are a matche d pair and th e
dot on the case indica tes which leads conne ct together .
Matching with U203 is provided by C250, C251,
C252, L216 and R237.
August 2000
6-1
Part No. 001-2001-200
CIRCUIT DESCRIPTION
BANDPASS FILTER
L102/L103/L104
RF IN
A201
RF AMP
U103A
BANDPASS FILTER
L108/L109/L110
MIXER
U101
52.95 MHz 4-POLE
CRYSTAL FILTER
Z211A/B
IF AMP
Q202
52.95 MHz 4-POLE
CRYSTAL FILTER
Z212A/B
17.5 MHz TCXO
Y401
MULTIPLIER
VOLTAGE MULTIPLIER
Q403, Q404
Q405, CR402
VCO
A006
Q204
BUFFER/AMP
Q131
Q132
RF DATA
RF CLOCK
SYN CS RX
SYN LK RX
SYNTHESIZER
REF IN
U401
V
R
F IN
BUFFER
Q401
Q402
CHARGE PUMP
Q406, Q407
Q408, Q409
BUFFER
Q410
Q411
Figure 6-1 12.5 kHz IF RECEIVER BLOCK DIAGRAM
Second Mixer/Detector
As shown in Figure 6-2, U203 contains second
oscillator, second mixer, limiter, detector and RSSI
circuitry. The 52.95 MHz IF signal is mixed with a
52.5 MHz signal produced by TCXO Y401 and tripler
Q204. The 17.5 MHz (±2.5 PPM) output of Y401 is
fed through C275 to tripler Q204. The tripler passes
the third harmonic at 52.5 MHz to the oscillator input
of U203.
OSC B 1
OSC E
MIXER OUT
IF IN
DECOUPLING 1
DECOUPLING 2
QUAD COIL
MIXER
OSC
2
3
WITH HYSTER ESIS
Vcc
4
5
6
7
8
LIMITER
AMP
SQUELCH TRIGGER
AMP
FILTER
DEMODULATOR
16 MIXER IN
GROUND
15
MUTE14
RSSI
13
SQUELCH IN
12
FILTER OUT
11
FILTER IN
10
AF
AMP
AUDIO9
Figure 6-2 U201/U203 BLOCK DIAGRAM
IF DETECTOR/AMP
VCO
U203
Z213/Z214
FIRSTSECOND
INJ AMPINJ AMP
Q133
Q134
U204A
AUDIO
U204B
BANDPASS
INJECTION FILTER
L140/L141
RSSI
RX WBAND
AMP
U102
INJECTION
TEST VOLTAGE
Biasing of Q204 is provided by R258, R259 and
R260. RF choke L222 blocks the flow of RF through
R261. An AC voltage divider formed by C280/C281
matches Q204 to the highpass filter. The third harmonic of the TCXO frequency is then used to drive
the OSC B input at 52.5 MHz. L223, C282 and L224
form a high pass filter to attenuate frequencies below
52.95 MHz. C283 and C284 match the output of the
filter to U2 03.
The 450 kHz second IF is then fed to ceramic filter Z213/Z214, then into the IF amplifier. The center
frequency of Z213/Z214 is 450 kHz with a bandwidth
of 9 kHz used to attenuate wideband noise. The limiter amplifies the 450 kHz signal 92 dB which
removes any amplitude fluctuations.
From the limiter the signal is fed to the quadrature detector. An external phase-shift network connected to U203, pin 8, shifts the phase of one of the
detector inputs 90° at 450 kHz (the other inputs are
unshifted in phase). When modulation occurs, the frequency of the IF signal changes at an audio rate as
does the phase of the shifted signal. The detector,
which has no output with a 90° phase shift, converts
the phase shift into an audio signal. Z215 is adjusted
to provide maximum undistorted output from the
detector. The audio signal is then fed out on U203,
pin 9.
August 2000
Part No. 001-2001-200
6-2
CIRCUIT DESCRIPTION
RF AMP
U103A
BUFFER
Q401
Q402
CHARGE PUMP
Q406, Q407
Q408, Q409
BUFFER
Q410
Q411
BANDPASS FILTER
17.5 MHz TCXO
Y401
VOLTAGE MULTIPLIER
Q403, Q404
Q405, CR402
A006
L108/L109/L110
MULTIPLIER
Q204
VCO
BUFFER/AMP
Q131
Q132
RF IN
A201
RF DATA
RF CLOCK
SYN CS RX
SYN LK RX
BANDPASS FILTER
L102/L103/L104
SYNTHESIZER
REF IN
U401
V
R
F IN
Figure 6-3 25 kHz IF RECEIVER BLOCK DIAGRAM
Wideband Audio Amplifier
U204B amplifies the detected audio and data signal. R244/R245/R246 set the gain of the amplifier
and R247/R248/R249/R250/RT204 provide a DC reference level. C261 bypasses the 450 kHz IF signal
and C262 bypasses other frequencies. The output signal is adjusted by R253 and fed to J205, pin 3. Install
jumper plug P205 on J205, pins 2-3 to select the
12.5 kHz audio to be routed to J201, pin 9.
RSSI Amplifier
AMPLIFIER
Q203
VCO
MIXER
52.95 MHz 4-POLE
U101
CRYSTAL FILTER
FIRSTSECOND
INJ AMPINJ AMP
Q133
Z201A/Z201B
IF DETECTOR/AMP
U201
Z203/Z204
Q134
IF AMP
Q201
INJECTION FILTER
U202A
AUDIO
U202B
BANDPASS
L140/L141
52.95 MHz 4-POLE
CRYSTAL FILTER
Z202A/Z202B
RSSI
RX WBAND
U102
AMP
IF and a 25 kHz IF. Install jumper plug P203 on J203,
pins 1-2 to select the 25 kHz IF. The output of U101
is matched to the crystal filter at 52.95 MHz by L201,
C201 and C202.
Z201A/B fo rm a two-section, four-pole filter
with a center frequency of 52.95 MHz and a -3 dB
bandwidth of 15 kHz. This filter attenuates adjacent
channels and other signals close to the receive frequency. The filter is a matched pair and the dot on the
case indicates which leads connec t together. Matching with Q201 is provided by C205, L203 and C206.
INJECTION
TEST VOLTAGE
U203, pin 13 is an output from an internal RSSI
(receive signal strength indicator) circuit which provides a current proportional to the strength of the
450 kHz IF signal. The RSSI output is buffered
through U204A and the level is adjusted by R221.
The DC output signal is then fed to J204, pin 3.
Install jumper plug P204 on J204, pins 2-3 to select
the 12.5 kHz RSSI to be routed to J201, pin 7.
6.1.5 25 KHZ IF
First mixer U101 mixes the receive frequency
with the first injection frequency to produce the 52.95
MHz first IF. Since high-side injection is used, the
injection frequency is 52.95 MHz above the receive
frequency. Jumper J203 selects between a 12.5 kHz
IF Amplifier, Crystal Filter
Q201 amplifies the 52.95 MHz IF signal to
recover filter and mixer losses and improve receiver
sensitivity. Biasing for Q201 is provided by R204/
R201/R202/R203 and C207/C209/C211 provide RF
bypass. The output of Q201 is matched to crystal filter Z202A at 52.95 MHz by C210, C212 and L204.
Z202A/B fo rm a two-section, four-pole filter
with a center frequency of 52.95 MHz and a -3 dB
bandwidth of 15 kHz. This filter establishes the selectivity of the receiver by further filtering the
52.95 MHz IF. The filter sections are a matched pair
and the dot on the case indicates which leads connect
together. Matching with U201 is provided by C215,
C216, C217, L206 and R205.
August 2000
6-3
Part No. 001-2001-200
CIRCUIT DESCRIPTION
Second Mixer/Detector
As shown in Figure 6-2, U201 contains second
oscillator, second mixer, limiter, detector and RSSI
circuitry. The 52.95 MHz IF signal is mixed with a
52.5 MHz signal produced by TCXO Y401, tripler
Q204 and amplifier Q203. The 17.5 MHz (±2.5 PPM)
output of Y401 is fed through C275 to tripler Q204.
The tripler passes the third harmonic at 52.5 MHz to
amplifier Q203. Amplifier Q203 amplifies the 52.5
MHz signal for the oscillator input of U201.
Biasing of Q204 is provided by R258, R259 and
R260. RF choke L222 blocks the flow of RF through
R261. An AC voltage divider formed by C280/C281
matches Q204 to the highpass filter. L223, C282 and
L224 form a high pass filter to attenuate frequencies
below 52.95 MHz. C283 and C284 match the output
of the filter t o U203. The thi rd ha rmonic o f the TCXO
frequency is light ly coupled to amplif ier Q203 th rough
C270, R262 and C265. Biasing of Q203 is provided
by R254, R255, R256 and R257. The amplified 52.5
MHz output is passed to U201 OSC B input through
C271.
The 450 kHz second IF is then fed to ceramic filter Z203/Z204, then into the IF amplifier. The center
frequency of Z203/Z204 is 450 kHz with a bandwidth
of 15 kHz used to attenuate wideband noise. The limiter amplifies the 450 kHz signal 92 dB which
removes any amplitude fluctuations.
RSSI Amplifier
U201, pin 13 is an output from an internal RSSI
(receive signal strength indicator) circuit which provides a current proportional to the strength of the 450
kHz IF signal. The RSSI output is buffered through
U202A and the level is adjusted by R219. The DC
output signal is then fed to J204, pin 1. Install jumper
plug P204 on J201, pins 1-2 to select the 25 kHz RSSI
to be routed to J201, pin 7.
6.1.6 VCO
The Voltage-Controlled Oscillator (VCO) is
formed by Q101 circuitry and high-Q inductor L102.
The VCO oscillates in a frequency range from 184231 MHz. Biasing of Q101 is provided by R102,
R103, R104 and R105. AC voltage divider C104,
C105 and C106 initiates and maintains oscillation and
matches Q101 to the tank circ uit. The high- Q inductor
is grounded at one end to provide shunt inductance to
the tank circu it.
The VCO frequency is controlled in part by DC
voltage across vara ctor diode D101. As voltage ac ross
a reverse-biased varactor diode increases, its capacitance decreases. Therefore, VCO frequency increases
as the control volta ge increa ses. The contr ol line is RF
isolated from tank circ uit by ch oke L101. The amou nt
of frequency change produced by D101 is controlled
by series capacitor C102.
From the limiter the signal is fed to the quadrature detector. An external phase-shift network connected to U201, pin 8, shifts the phase of one of the
detector inputs 90° at 450 kHz (the other inputs are
unshifted in phase). When modulation occurs, the frequency of the IF signal changes at an audio rate as
does the phase of the shifted signal. The detector, that
has no output with a 90° phase shift, converts the
phase shift into an audio signal. Z205 is adjusted to
provide maximum undistorted output from the detector. The audio signal is then fed out on U201, pin 9.
Wideband Audio Amplifier
U202B amplifies the detected audio and data signal. R212/R213/R214 set th e gain of the amplifier and
R215/R216/R217/R218 and RT202 provide a DC reference level. C226 bypasses the 450 kHz IF signal
and C227 bypasses other frequencies. The output signal is adjusted by R220 and fed to J205, pin 1. Install
jumper plug P205 on J205, pins 1-2 to select the
25 kHz audio to be routed to J201, pin 6.
Q102 and Q103 form a cascade-connected buffer
circuitry. DC bias is produced by R107, R108, R109
and R112. A signal oscillated at Q101 is DC cut and
adjusted by C107, and fed into the buffer. An output
from RF choke L104 passes through an adjustment ci r cuit consisting of C114 and C119.
6.1.7 ACTIVE FILTER
Q801 functions as a capacitance multiplier to provide filtering of the 12V supply to Q802. R803 and
R804 provide transistor bias, and C812 provides the
capacitance that is effe ctive ly multiplie d by the gain of
Q801. If a noise pulse or other voltage chan ge appears
on the collector, the base voltage does not change
because of C812. Theref ore , the base current does no t
change and transistor current remains constant. R805
decouples the VCO output from AC ground. L803 is
an RF choke and C810, C811, C813 and C814 provi de
RF bypass.
August 2000
Part No. 001-2001-200
6-4
REF
REF
CLOCK
DATA IN
ENABLE
CIRCUIT DESCRIPTION
DATA OUT
PORT
20
in
out
OSC OR
4-STAGE
DIVIDER
1
18
19
17
SHIFT
REGISTER
AND
CONTROL
LOGIC
13-STAGE R COUNTER
DOUBLE-BUFFERED
STANDBY
6-STAGE
A COUNTER
R REGISTER
16 BITS
C REGISTER
8 BITS
LOGIC
A REGISTER
24 BITS
INTERNAL
CONTROL
POR
12-STAGE
N COUNTER
f
R
f
V
f
R
f
V
f
R
f
V
f
R
f
V
SELECT
LOGIC
AND CONTROL
PHASE/FREQUENCY
DETECTOR A
AND CONTROL
PHASE/FREQUENCY
DETECTOR B
AND CONTROL
16
OUTPUT A
2LOCK DETECT
LD
15
OUTPUT B
(OPEN-DRAIN OUTPUT)
8
Rx
6
PDout
3
OR (UP)
4
OV (DOWN)
INPUT AMP
11
f
in
10
f
in
64/65
PRESCALER
Figure 6-4 SYNTHESIZER BLOCK DIAGRAM
6.1.8 BUFFER
A cascode amplifier formed by Q410/Q411 provides amplification and isolation between the VCO
and Synthesizer. A cascode amplifier is used because
it provides high gain, high isolation and consumes
only a small amount of po wer. The input signal to t his
amplifier is coupled from the VCO RF output on
pin 5. DC blocking and coupling to the VCO is provided by C455 and to the buf fer b y C456. Bias f or the
amplifier is provided by R442, R445, R446 an d R277.
Q411 is a common-emitter amplifier and Q410 is a
common-base with C458 and C457 providing RF
bypass. L405 provides some filtering of the cascode
output. R448 lowers the Q of L405. The output of the
amplifier is coupled by C442/C441 to U401, pin 11.
MODULUS
CONTROL
LOGIC
13
TEST 2
9
TEST 1
6.1.9 SYNTHESIZER
The inputs/outputs of synthesizer U401 are
shown in Figure 6-4. The output signal from the synthesizer loop is the receiver first injection frequency.
This signal is produced by a VCO (voltage-controller
oscillator). The frequency of this oscillator is controlled by a DC voltage. This DC voltage is ge nerat ed
by integrating the pulses from the phase detector in
synthesizer chip U401.
Frequencies are selected by programming
counters in U401 to divide by a certain number. This
programming is provided through J201, pins 12, 18
and 20. The frequency stability of the synthesizer is
established by the ±2.5 PPM sta bility of TCXO Y4 01.
The output of this oscillator is stable from
-30°C to +60°C (-22°F to +140°F).
6-5
August 2000
Part No. 001-2001-200
CIRCUIT DESCRIPTION
The VCO frequency of A401 is controlled by a
DC voltage produced by integrating the phase detector output pulses of U401. The phase detector senses
the phase and frequency of the two input signals (f
and f
) and causes the VCO contro l voltage t o increas e
R
V
or decrease if they are not the same. When the frequencies are the same the VCO is "locked" on frequency.
One input signal to the phase detector in U401 is
the reference frequency (f
). This is the 1 7.5 MHz
R
TCXO frequency divided by the R (reference) counter
to the channel spacing or 6.25 kHz.
The other input to the phase detector in U401 is
from the VCO frequency divided down by the "N"
counter and prescaler in synthesizer U401 to
6.25 kHz. The "N" counter is programmed through
the synthesizer data line on J201, pin 20. U401 is programmed so that the phase detector input (f
cal to the reference freque ncy (f
) (6.25 kHz) when the
R
) is identi-
V
VCO is locked on the correct frequency.
The synthesizer contains the R (reference), N,
and A counters, phase and lock detectors and counter
programming circuitry. Frequencies are selected by
programming the three counters in U401 to divide by
assigned numbers. The programming of these
counters is performed by circuitry in the Third Party
Interface Card (TPI), wh ich is buffered a nd latched
through the Interface Alarm Card (IAC) and fed into
the synthesizer on J201, pin 20 to Data input port
U401, pin 19.
6.25 kHz. Since the VCO is on freq uenc y (receive frequency plus 52.95 MHz) and no mul tiplicat ion is use d,
the channel frequencies change in 6.25 kHz steps and
the reference frequency (f
) is 6.25 kHz for all fre-
R
quencies selected by th is receiver.
The f
V input is produced by dividing the VCO
frequency using the prescaler and N counter in U401.
The prescaler divides by 64 or 65. The divide number
of the prescaler is controlled by the N and A counters
in U401.
The N and A counters function as follows: both
the N and A counters begin counting down from their
programmed number. When the A counter reaches
zero, it halts until the N counter reaches zero. Both
counters then reset an d the cycle repeats. The A
counter is always programmed with a smaller number
than the N counter. While the A counter is counting
down, the prescaler divides by 65. Then when the A
counter is halted, the prescaler divides by 64.
Example:
Assume a receive frequency of 150.025 MHz.
Since the VCO is 52.95 MHz above the receive frequency it must be 202.975 MHz. To produce this frequency, the N and A counters are programmed as follows:
N = 507 A = 28
NOTE: Section 8.2.5 describes how the N and A
counter numbers can be calculated for other channels.
Data is load ed into U401 serially on the Data
input port U401, pin 19. Data is clocked into the shift
registers a bit at a time by a low to high transition on
the Clock input port U401, pin 18. The Clock pulses
come from the MPC via the IAC to J201, pin 18.
As previously stated, the counter divide numbers
are chosen so that when the VCO is operating on the
correct frequency, the VCO-derived input to the phase
detector (f
derived input (f
V) is the same frequency as the TCXO-
R) which is 6.25 kHz.
The f
R input is produced by dividing the
17.5 MHz TCXO frequency by 2800. This division is
done by the "R" counter in U401. The counter always
divides by 2800 regardless of the channel frequency.
This produces a reference frequency (f
August 2000
Part No. 001-2001-200
) of
R
To determine the overall divide number of the
prescaler and N counter, the number of VCO output
pulses required to produce one N counter output pulse
can be counted. In this example, the prescaler divides
by 65 for 65 x 28 or 1,820 in put pul ses. It th en d ivides
by 64 for 64 x (507 - 28) or 30,656 input pulses. The
overall divide number K is therefore (30,656 + 1,820)
or 32,476. The VCO frequency of 202.975 MHz
divided by 80,476 equals 6.25 kHz which is the f
input to the phase detect or. The overall divide number
K can also be determined by the following formula:
K = 64N + A
Where,
N = N counter divide number and
A = A counter divide number.
6-6
R
CIRCUIT DESCRIPTION
6.1.10 BUFFER AMPLIFIER
A cascode amplifier formed by Q401 and Q402
provides amplification and also isolation between the
TCXO and Synthesizer U401. A cascode amplifier is
used because it provides high reverse isolation. The
input signal to this amplifier is from TCXO Y401.
C405 provides DC blocking. Bias for the amplifier is
provided by R404, R406, R407, R408 and R409.
L401 is an RF choke. RF bypass is provided by C403,
C401 and C407. The output of Q401/Q402 is co upled
to U401 by C432.
6.1.11 LOCK DETECT
When the synthesizer is locked on frequency, the
Lock Detect output on U401, pin 2 is a logic high
voltage with very narrow negati ve-going pulses. Then
when the synthesizer is unlocke d, these pulses beco me
much wider, the width may vary at a rate deter mined
by the frequency difference of f
and fR. The lock
V
detect pulses are applied to J401, pin 14 and sent to
the RF Interface on J103, pin 14 for detection and
sampling in the IAC.
6.1.12 CHARGE PUMP, LOOP FILTER
The charge pump circuit charges and discharges
C450, C451 and C452 in the loop filter to provide the
21V VCO control voltage (see Secti on 6.1.13). Puls es
which control the charge pump are fed out of U401,
pins 3/4. When both phase detector inputs are in
phase, these output signals are high except for a very
short period when both pulse low in phase. If the frequency of the f
than that of the f
R input to the phase detector is higher
V input (or if the phase of f
leads fV),
R
the VCO frequency is too low. The negative-going
pulses on the f
wider and the f
If the frequency of the f
V output (pin 4) then become much
R output (pin 3) stays essentially high.
input is greater than fR
V
(VCO frequency too high), the opposite occurs.
Q406 and Q407 are drivers which make the 5V
levels and polarity of U401 phase detector outputs
compatible with the high voltage supply to Q408 and
Q409. Capacitors C444 and C446 momentarily
bypass R432 and R437 when negative-going pulses
occur. This speeds up the turn-off time of Q406 and
Q407 by minimizing the effect of the base charge.
When a negative-going pulse occurs on pin 4,
Q406 turns on which turns on Q408. Q408 sources
current to charge up the loop filter capacitors C450/
C451, thereby increasing the VCO control line voltage. When a negative-going pulse occurs on pin 3,
Q407 turns on which turns on Q409. Q409 sinks current to discharge the loop filter capacitors C450/C451
thereby decreasing t he VCO c ont rol line voltage. The
source cur rent from Q408, when it is on, equals the
sink current from Q409, when it is on.
6.1.13 VOLTAGE MULTIPLIER
The 17.5 MHz from Y401 is amplified by Q401/
Q402 and passed to the reference input of synthesizer
U401, pin 20. This signal is also coupled from the
output of Q401/Q402 through C408 to amplifier
Q403. Biasing for Q403 is provided by R410, R411
and R412. The output of Q403 is direct coupled to
switching transistors Q404/Q405.
When Q405 is turned on and Q404 i f off , C409 i s
grounded on the side connected to the emitter of
Q405. This allows the other side of C409 to charge
from the 12V supply through R414, CR402 to C409.
When Q404 turns on and Q405 is off. C414 charges
up to approximately 12V plus the voltage that was
stored across C809 from the last cycle. The output
voltage is 21V due t o voltage loss in the tr ansistor and
diodes. C413 is an RF bypass and C414 charges to
21V to stabilize the voltage. The 21V output is filtered by C415/L403/C416 to remove the 17.5 MHz
ripple. The 21V output is applied to the charge pump
Q408/Q409 and the VCO control line.
6.1.14 BUFFER AMPLIFIER
A cascode amplifier formed by Q131 and Q132
provides amplification and also isolation between the
VCO and Receiver RF stages. A cascode amplifier is
used because it provides high reverse isolation. The
input signal to this amplifier is coupled from VCO
A401 by C131. C131 also provides DC blocking.
Bias for the amplifier is provided by R134, R133,
R138, R132, R131 and R136. L131 is an RF choke
and R135 sets the RF output impedance of the cascode. RF bypass is provided by C143, C142, C141,
C140, C139, C138, C133, C134, C135 and C136. Th e
output of Q131/Q132 is matched to the Receiver RF
stages by a section of microstrip, C144, signal pad
R139/R140/R141, C145, C146 and L133. C145 couples the signal to the input of the first injection
amplifier.
August 2000
6-7
Part No. 001-2001-200
CIRCUIT DESCRIPTION
6.1.15 FIRST AND SECOND INJECTION AMPLIFIERS
U303 provides the +12V source for these amplifiers. First injection amplifier Q133 is biased by
CR131, R143, R144, R145 and R146. C148, C151,
C149 and C150 provide RF bypass from the DC line.
L134 on the collector is an RF choke. Q133 is
matched to the 50 ohm signal pad R147, R148 and
R149 by lowpass filter C152/L135/C153, C154.
C155, L136, L156, L137, C157 and a section of
microstrip match Q134 to the 50 ohm signal pad.
Second injection amplifier/buffer Q134 is similar in design to Q133. The output of Q134 is matc hed
to 50 ohms by L134/C162/C163 and C164 provides
DC blocking. L140/L141 are tuned to the receive frequency plus 52.95 MHz and passed to Mixer U101.
This injection frequ ency is als o couple d throug h C165
to the injection test voltage circuit U102A. CR133,
R158, R159 provide DC input to U102A,
pin 3. The output of U102A, pin 1 is connected to
J201, pin 13 for a receive injection test point and to
the RF Interface Board on J103, pin 13.
6.2 EXCITER
6.2.1 VCO (A007)
The Voltage-Controlled Oscillator (VCO) is
formed by Q101, associated circuitry and High-Q
indicator L102. The VCO oscillates in a frequency
range from 132-178 MHz. Biasing of Q101 is provided by R102, R103 and R104. An AC voltage
divider formed by C107 and C108 initiates and maintains oscillation. C106 couples Q101 to the High-Q
inductor. RF choke L103 completes the DC bias path
to ground.
The VCO frequency is controlled in part by DC
voltage across varactor diode D101. As voltage
across a reverse-biased varactor diode increases, its
capacitance decreases. Therefore, VCO frequency
increases as th e contr ol vol tage inc rease s. The c ontrol
line is RF isolated from tank circuit by choke L101.
The amount of frequency change produc ed by D101 is
controlled by series capacitor C102.
The frequency is modulated in a similar manner.
The transmit audio/data signal is applied across varactor diode D102 to var y the VCO fr equenc y at an a udio
rate. C104/C105 in serie s with D102 de termine the
amount of modulation produced by the audio signal.
6.2.2 VCO BUFFER
Q102/Q103 form a cascade-connected buffer circuitry. DC bias is produced by R107, R108, R109 and
R1212. A signal oscillated at Q101 is DC cut and
adjusted by C107 and fed into the buffer. An output
from RF choke L104 passes through an adjustment
circuit consisting of C114/C119.
6.2.3 VCO/TCXO FREQUENCY MODULATION
Both the VCO and TCXO a re mod ula te d i n order
to achieve the required frequency response. If only
the VCO was modulated, the phase detector in U403
would sense the frequency change and increase or
decrease the VCO control voltage to counteract the
change (at the lower audio frequencies inside the
closed loop bandwidth of the synth esi zer ) . If only the
TCXO frequency was modulated, the VCO would not
track the higher audio frequencies (those beyond the
closed loop bandwidth of the synthesizer). However,
by modulating both the VCO and TCXO a flat audio
response is achieved. Potentiometers R425 and R446
balance the modulating signals.
There are two 3.5V sources on the Exc it er boar d;
one is a reference for the modulation amplifier to the
VCO, the other is for the modulation amplifier to the
TCXO.
The reference voltage on U402B, pin 5 is also on
buffer U407B, pin 5 to J401, pin 9 and RFIB connector J102, pin 9. The voltage leaves the RFIB on J101,
pin 14 to J2, pin 27 on the backplane, to the bottom
connectors via pin 7 and finally to the MAC on P100,
pin 7.
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Part No. 001-2001-200
6-8
CIRCUIT DESCRIPTION
AMP
EX MOD
LPTT
V REF EX
DATA
CLK
SYN CS EX
SYN LK EX
U407B
AMP
U404A
SYNTHESIZER
PD OUT
U403
RF IN
REF IN
R
Q403/Q404
Q406/Q407
Q414/Q415V
Q416/Q417
CHARGE PUMP
Figure 6-5 EXCITER BLOCK DIAGRAM
With reference to the ground on the Exciter, the
3.5V reference stability is maintained by U126B/C/D
on the MAC. The 3.5V DC passes through summing
amplifier U129B and transmi t modulation gat e U1 18D
to P100, pin 29 (Tx MOD). P100, pin 29 i s con nect ed
to backplane connector J2, pin 8 and RFIB connector
J101, pin 22 to J102, pin 13. The transmit modulation and 3.5V reference enter the Exciter on J401, pin
13 and are routed to U402B, pin 6. R425 sets the
TCXO modulation level. The modulation signal and
the 3.5V DC are applied to U402A, pin 2.
BUFFER
U402AU402B
BUFFER
U404B
VCO
BUFFER
BUFFER
TCXO
Y401
Q410/Q411Q413
BUFFER
SWITCH
Q405
TO PAA007
AMP
established by the ±2.5 PPM sta bility of TCXO Y4 01.
This oscillator is stable from -30°C to +60°C (-22°F to
+140°F).
The VCO frequency of A007 is controlled by a
DC voltage produced by the phase detector in U403.
The phase detector senses the phase and frequency of
the two input signals and c aus es the VCO control voltage to increase or decrease if they are not the same.
When the frequencies are the same, the VCO is then
"locked" on frequency.
6.2.4 SYNTHESIZER
The synthesizer inputs/outputs are shown in Figure 6-5. The synthesizer output signal is the transmit
frequency. This signal is produced by a VCO (voltage-controller oscillator) that is frequency controlled
by a DC voltage produced by synthesizer chip U403.
This DC voltage is filtered by a loop filter made up of
C805, C806 and R804 in the VCO circuitry.
Frequencies are selected by programming
counters in U403 to divide by a certain number. This
programming is provided through J401, pins 12, 19
and 20. The frequency stability of the synthesizer is
The synthesizer contains the R (reference), N,
and A counters, phase and lock detectors and counter
programming circuitry.
One input signal to the phase detector in U403 is
the reference frequency (f
R). This frequency is the
17.5 MHz TCXO frequency divided by the reference
counter to the frequency step or 6.25 kHz. The other
input signal (f
V) is the VCO frequency divided by the
"N" counter in U403. The counters are programmed
through the synthesizer data line on J401, pin 20.
Each channel is programmed by a divide number so
that the phase detector input is identical to the reference frequency (f
R) when the VCO is locked on the
correct frequency.
August 2000
6-9
Part No. 001-2001-200
CIRCUIT DESCRIPTION
Frequencies are selected by programming the
three counters in U403 to divide by assig ned numbers.
The programming of these counters is performed by
circuitry in the Third Party Interface (TPI), buffered
and latched through the In terface Alarm Card (IAC)
and fed into the synthesizer on J401, pin 20 to Data
input port U403, pin 19.
Data is load ed into U403 serially on the Data
input port U403, pin 19 when U403, pin 17 is low.
Data is cloc ked into the shift registe rs a bit at a time
by a low to high transition on the Clock input port
U403, pin 18. The Clock pulses come from the MPC
via the IAC to J401, pin 19.
As previously stated, the counter divide numbers
are chosen so that when the VCO is operating on the
correct frequency, the VCO-derived inpu t to the phase
detector (f
derived input (f
V) is the same frequency as the TCXO-
R). The fR input is produced by divid-
ing the 17.5 MHz TCXO frequency by 2800. This
produces a reference frequency (f
R) of 6.25 kHz.
Since the VCO is on frequency and no multiplication
is used, the freq uencies are c hanged in 6. 25 kHz steps.
The reference frequency is 6.25 kHz for all frequencies selected by this Exciter.
The f
V input is produced by dividing the VCO
frequency using the presc al er and N count er in U403 .
The prescaler divi des by 64 or 65. The divid e n umber
of the prescaler is controlled by the N and A counters
in U403. The N and A counters function as follows:
Both the N and A counters begin counting down
from their programmed number. When the A counter
reaches zero, it halts until the N counter reaches zero.
Both counters then reset and the cycle repeats. The A
counter is always programmed with a smaller number
than the N counter. While the A counter is counting
down, the prescaler divides by 65. Then when the A
counter is halted, the prescaler divides by 64.
Example: To illustrate t he operation of these
counters, assume a transmit frequency of 150.250
MHz. Since the VCO is the channel frequency for
transmit this frequency is used. To produce this frequency, the N and A counters are programmed as follows:
N = 375 A = 40
To determine the overall divide number of the
prescaler and N counter, the number of VCO output
pulses required to prod uce one N counter output pulse
can be counted. In this example, the pres cal er divi des
by 65 for 65 x 40 or 2,600 input pulses. It then
divides by 64 for 64 x (375 - 40) or 21,440 input
pulses. The overall divide number K is therefore
(21,440 + 2,600) or 24,040. The VCO frequency of
150.250 MHz divided by 24,040 equals 6.25 kHz
which is the f
R input to the phase detecto r . The ove rall
divide number K can also be determined by the following formula:
K = 64N + A
Where,
N = N counter divide number and
A = A counter divide number.
NOTE: Section 8.2.5 describes how the N and A
counter numbers can be calculated for other channels.
6.2.5 BUFFER AMPLIFIER
A cascode amplifier formed by Q403 and Q404
provides amplification and isolation between the
TCXO and Synthesizer U403. A cascode amplifier is
used because it provides high gain, high reverse isolation and consumes only a small a mount of power. The
input signal to this amplifier is coupled from TCXO
Y401, pin 5 by C420. C420 also provides DC blocking. Bias for the amplifie r is pro vided by R430, R431,
R432, R433 and R428. L402 is an RF choke. RF
bypass is provided by C416, C418 and C419. The
output of Q403/Q404 is coupled to U403, pin 20 by
C417.
6.2.6 BUFFER AMPLIFIER
A cascode amplifier formed by Q406 and Q407
provides amplification and also isolation between the
VCO and Synthesizer U403. A cascode amplifier is
used because it provides high gain, high isolation and
consumes only a small amount of power. The input
signal to this amplifier is coupled from VCO A007,
pin 6 by C433. C433 also provides DC blocking.
Bias for the amplifier is provided by R450, R451,
R453, R454 and R455. L403 is an RF choke. RF
bypass is provided by C430, C431 and C479. The
output of Q406/Q407 is coupled to U403, pin 11 by a
non-polarized capacitor formed by C429/C499.
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Part No. 001-2001-200
6-10
CIRCUIT DESCRIPTION
6.2.7 LOCK DETECT
When the synthesizer is locked on frequency, the
Lock Detect output on U403, pin 2 is a high voltage
with narrow negative-going pulses. When the synthesizer is unlocked, the negative-going pulses are much
wider, the width may vary at a rate determined by the
frequency difference of f
V/fR.
The locked or unlocked condition of the synthesizer is filtered by R440/C423 and appl ied to J401, pi n
16, then sent to the RF Interface on J102, pin 16 for
detection.
6.2.8 CHARGE PUMP, LOOP FILTER
The charge pump circuit charges and discharges
C519, C520 and C521 in the loop filter to provide the
12V VCO control voltage (see Secti on 6.1.12). Puls es
which control the charge pump are fed out of U403,
pins 3/4. When both phase detector inputs are in
phase, these output signals are high except for a very
short period when both pulse low in phase. If the frequency of the f
than that of the f
R input to the phase detector is higher
V input (or if the phase of f
leads fV),
R
the VCO frequency is too low. The negative-going
pulses on the f
wider and the f
If the frequency of the f
V output (pin 4) then become much
R output (pin 3) stays essentially high.
input is greater than fR
V
(VCO frequency too high), the opposite occurs.
Q414 and Q415 are drivers which make the 5V
levels and polarity of U403 phase detector outputs
compatible with the high voltage supply to Q416 and
Q417. Capacitors C523 and C517 momentarily
bypass R494 and R498 when negative-going pulses
occur. This speeds up the turn-off time of Q414 and
Q415 by minimizing the effect of the base charge.
6.2.9 BUFFER AMPLIFIER
A cascode amplifier formed by Q410/Q411 provides amplification and also isolation between the
VCO and exciter RF stages. A cascode amplifier is
used because it provides high gain, high isolation and
consumes only a small amount of power. The input
signal to this amplifier is t appe d fr om VCO A007, pin
4 by C441. C441 also provid es DC block ing. Bias fo r
the amplifier is provided by R464, R465, R466, R467
and R468. L406 is an RF choke and R483 lowers the
Q of the coil. RF bypass is provided by C434, C442,
C445, C443, C444 and C480. The output of Q410/
Q411 is matched to the Exciter RF stages by a section
of microstrip, C446, signal pad R459/R460/R461,
C498, C450 and L408.
6.2.10 RF AMPLIFIERS
RF amplifier Q413 is biased by CR403, R477,
R478, R479 and R480. C508 provides RF bypass
from the DC line and R479/R480 provide supply voltage isolation. L 41 1 i s an RF choke t o the suppl y line.
Q413 is matched to 50 ohms by low pass filter C509/
L412/C510 and C465 provides DC blocking. The RF
output of the Exciter is on coaxial connector J402 to
the Power Amplifier.
6.3 1 10W POWER AMPLIFIER
6.3.1 AMPLIFIER/PREDRIVER
RF input to the PA from the Exci ter is through a
coaxial cable and conn ector to WO511. C501 couples
the RF to signal pad R501/R502/R503 that connects
the input to 0.3W pre-driver Q501. R504, R505 and
R506 provide DC bias to the gate of Q501. C506,
C507 and C508 provide RF bypass from the DC supply line. L503 is an RF choke . C510 and C522 pro vide
RF bypass. C511/L504/C512/C513 match Q501 output impedance to U501 input impedance. U502 provides Q501 with DC voltage regulated at 8V.
When a negative-going pulse occurs on pin 4,
Q414 turns on which turns on Q416. Q416 sources
current to charge up the loop filter capacitors C519/
C520, thereby increasing the VCO control line voltage. When a negative-going pulse occurs on pin 3,
Q415 turns on which turns on Q417. Q417 sinks current to discharge the loop filter capacitors C519/C520
thereby decreasing t he VCO c ont rol line voltage. The
source current from Q416, when it is on, equals the
sink current from Q417, when it is on.
6.3.2 DRIVER
U501 is a 12W amplifier operating in the 132178 MHz range. The RF is applied to the input of the
splitter and to the finals.
Power control is connected to WO505 from the
RF Interface board (RFIB). RF is filtered from the
control voltage line by various capacitors to U501,
pin 2. This control voltage regulates the RF output of
the amplifier on U501, pin 5 to approximately 10W.
August 2000
6-11
Part No. 001-2001-200
CIRCUIT DESCRIPTION
FINAL 1 CURRENT
DRIVER CURRENT
RF IN
POWER CONTROL
TEMPERATURE SENSOR
FINAL 2 CURRENT
PRE-DRIVER
Q501
U502
AMP
U509
DRIVER
U501
TEMP SENSE
U507U506A
Figure 6-6 110W POWER AMPLIFIER BLOCK DIAGRAM
6.3.3 FINAL AMPLIFIERS
Q502 and Q503 are combined 60W amplifiers. The
10W RF input from the dri ver U501 is applied to a 7 0.7
ohm Wilkinson splitter and then to the gate of each
MOSFET amplifier. The 60W outputs on the drain of
the amplifiers are combined using a Wilkinson combiner . Q502 has a half-wave tr ansmissionline on the input
and Q503 has a half -wave on the output. These T-lines
are used to dr ive the 60W amplifie rs o ut of ph ase. The
output of the combiner is fed from WO513 directly to
the forward/reverse power detect board.
The Wilkinson splitter and combiner provide the
capability to split the drive input and combine the
final outputs while maintaining isolation between the
two final amplifiers. The combiner consists of two
quarter-wave transmission lines and a balancing resistor. During normal op eration, a signal of relatively
equal phase and amplitude is present on both ends of
the balancing resis tor . Therefo re, no current fl ows and
no power is dissipated in the balance resistor. If one
final failed, the other final of a pair would continue to
function.
6.3.4 POWER DETECTORS
The supply current is monitored through a resistor that creates a current output level indicative of the
power output. The outputs of U503, U504 and U505
are monitored by the Universal Station software
U503
Q502
FINAL 1
FINAL 2
Q503
U504
U601A/B
FORWARD
POWER
LPFRF OUTPUT
RF LOAD
U651A/B
REVERSE
(REFLECTED)
POWER
through the RF Interface Board. If a final amplifier
fails, the software will reduce the output power to prevent over-driving the remaining final amplifier.
6.3.5 THERMAL SENSOR
Thermal protection is provided by temperature
sensor U507. The operating range of the sensor is
from -30° C to 100° C (-22° F to 212° F). Amplifier
U506A sends the output of U507 through WO509 to
the RF Interface Board. The RF Interface Board
reduces the power amplifier to half po wer (via the
MPC) if the temperature reading is too high and turns
the fan on and off (not via the MPC). The fan is
turned on at approximately 50°C and off again at
42°C.
6.3.6 FORWARD/REVERSE POWER DETECT,
CIRCULATOR, LOW-PASS FILTER
The power amplifier output is directly coupled to
the forward/reverse power detect board via a jumper.
The output then enters the circulator and exits to the
low-pass filter board and the antenna jack for a minimum power output of 110W at the default setting. If
an antenna is not connected, the circulator connects
the output power to R685.
Forward and reverse power are electromagnetically coupled from the input and reflected ports of the
circulator. R663/R680 calibrate the forward and
reverse sense levels. The sensed levels are coupled to
the RF Interface Board a nd software .
August 2000
Part No. 001-2001-200
6-12
CIRCUIT DESCRIPTION
6.4 RF INTERFACE BOARD
The RF Interface Board (RFIB) connects the
Receiver, Exciter and Power Amplifier to the backplane and power supply (see Figure 6-7).
The input and output connectors for the RF Interface Board are defined as follows.
6.4.1 POWER CONNECTOR
The power supply is connected to the RF Interface Board when the RF module is inserted into the
station cabinet (see Figure 10-2). The jack portion of
the connection is on the RF Interface Board, the plug
portion is attached to the station cabinet.
P101/P102 +26.5V DC - Supply voltage to PA.
+26V ±1%, 20A at 110W.
P103 +15V DC - Supply voltage to Exciter, Receiver
and Power Control. 15V ±1%, 5.5A max.
P104/P105 GROUND - Ground return for the RF assembly.
6.4.2 SIGNAL CONNECTOR (J101)
This is the sign al inte rface con nector (36 pin) that
connects the RFIB to the backplane connector J2 (34
pin) through cable assembly A8.
Pin 1GROUND
Pins 5-6 UNUSED
Pin 7RX WBAND
The wide band audio is from the receive audio
demodulator U202 and goes to the MAC in the Controller card cage. The typical amplitude is
387 mV RMS (-6 dBm) and 2V DC with Standard
TIA Test Modulation into the receiver. Little wave
shaping is done on the receiver board other than a
31 kHz RC LPF which strips off the 450 kHz IF.
Buffering is done with an op-amp.
Pin 8RF DATA A
Data A (U105, pin 11) is the least significant bit
(LSB) in the 3 multiplex chips located on the RFIB.
This pin is a CMOS input from the Controller requiring a logic high for activation.
Pin 9RF DATA C
Data C (U105, pin 9) is the most significant bit
(MSB) in the 3 multiplex chips located on the RFIB.
This pin is a CMOS input from the Controller requiring a logic high for activation.
Pin 10RF MUX2 INH
The Multiplexer-2 Inhibit (U106, pin 6) is a
CMOS input from the Controller that inhibits (disables) the output from the RF 2 Multiplexer with a
logic high.
Pin 1 carries ground current between the RF
Interface board and Backplane board.
Pin 2PC STR
Pin 2 is the power Control Strobe. This is normally low until after the power control data is shifted
into the pow er control register. Then the strobe line
goes high and back to low. The clock or data lines
cannot be changed until after the strobe is set.
Pin 3HS CS EX
Pin 3 is not used at this time.
Pin 4GROUND
Pin 4 carries ground current between the RF
Interface board and Backplane board.
Pin 11RF CLK
The clock will control the synthesizer chip and
power control circuit when loadi ng. This pin is a TTL
input from the Controller.
Pin 12HS CS RX
Pin 12 is not used at this time.
Pin 13RF MUX1 INH
The Multiplexer-1 Inhibit (U105, pin 6) is a
CMOS input from the Controller that inhibits (disables) the output from the RF 1 Multiplexer with a
logic high.
August 2000
6-13
Part No. 001-2001-200
CIRCUIT DESCRIPTION
Pin 14V REF EX
This is the 3.5V reference to the Exciter TCXO.
3.5V from the Exciter is passed from J102, pin 9 to
this pin and the backplane. The voltage then passes
through the MAC and back to the backplane to J101,
pin 22 with the TX MOD. These are connected to
J102, pin 13 back to the Exciter.
Pins 15-18UNUSED
Pin 19RF MUX3 INH
The Multiplexer-3 Inhibit (U104, pin 6) is a
CMOS input from the Controller that inhibits (disables) the output from the RF 3 Multiplexer with a
logic high.
Pin 20LPTT
The Logic Push-To-Talk is an open collector
from the Controller. It has a sink capability of
20 mA and a maximum voltage rating of 18V. The
transmitter should produce power when this pin is a
logic low.
Pin 21SYN CS EX
This input goes low to enable the loading of data
into the exciter synthesizer chip U403.
Pin 22TX MOD
The audio from the MAC in the Controller processes a number of inputs to the station to produce the
signals on this pin . This sig nal goes thr ough th e RFIB
and then to the Exciter. A 707 mV RMS sine wave
(2V P-P) at 1 kHz produces 60% of system deviation
in the transmitter. The source impedance is low and
the input impedance is less than 10k ohms.
Pin 23GROUND
Pin 23 carries ground current between the RFIB
and Chassis Backplane.
Pin 24UNUSED
Pin 25LOGIC CONTROL TO FANS
Pin 26RF DATA B
The Data B (U105, pin 10) is the middle significant bit in the three multiplex chips located on the
RFIB. This pin is a CMOS i nput from the Controller
requiring a logic high for activation.
Pin 27A D LEVEL
20 lines (of the possible 24) of RF functions sampled are multiplexed to the Controller through this pin
using three multiplex chips.
• RF Forward Power Sense
• RF Power Sense Device 1
• RF Power Sense Device 2
• RF Power Sense Device 3
• RF Power Sense Device 4
• RF Reflected Power Sense
• PA Temperature
• Transmit Audio Modulation
• High Stability Exciter Lock Detector
• Exciter Lock Detector
• Receiver Detector Audio
• Receive Signal Strength Indicator
• Receiver Injection Level
• High Stability Receive Lock Detector
• Receiver Lock Detector
• Fan Current 1
• Fan Current 2
• Fan 1 On Sense
• Power Supply Temp
• Battery Voltage
Pin 28RF DATA
A data pin with TTL levels from the Controller
which has the dual role of loading the synthesizer
chips and adjusting the power control D /A lines for
proper output power. Up to four synthesizer ch ips an d
a shift-register could be connected to this pin.
Pin 29SYN CS RX
This input goes low to enable the loading of data
into the receiver synthe sizer chip U401.
Pin 25 is in parallel with the temperature sensor.
August 2000
Part No. 001-2001-200
6-14
CIRCUIT DESCRIPTION
Pin 30RSSI
This pin is the Rec eive Sign al S trengt h Indicatio n
to the Controller. This RSSI is used for tune-up of the
Receiver front-end during factory test mode. The
dynamic range is 60 dB. It has an output from an opamp with the voltage going from 0.5V to 4.5V. The
level has an adjustment in the Receiver.
Pin 31GROUND
Pin 31 carries ground current between the RFIB
and Chassis Backplane.
Pins 32-36 UNUSED
6.4.3 FAN CONNEC TOR (J104)
The outputs to the fan connectors are 4-pin plugin terminals that supply DC voltage. The plug on the
fan is a 2-pin connector. The plug-in terminals are
located on the back of the RFIB.
WO 116+26.5V DC
This capacitive feedthrough pin is at +26.5V DC
and carries the PA current, 25A nominal at 1 10W from
P102 to the Power Amplifier board.
WO 117+26.5V DC GROUND
This capacitive feedthrough pin carries ground
current from P105 to the Power Amplifier board. It
must be capable of carrying up to 25A.
W118+15V DC
This capacitive feedthrough pin connects +15V
DC P103 to t he PA, Exciter, and Forward/Reverse
Power Detect boards. Maximum current handling is
6A (4A nominal at 110W).
WO 119NOT USED
Pin 1FAN 1 LOW
Pin 1 is the ground return for Fan 1.
Pin 2FAN HI
Pin 2 carries the voltage to Fan 1. The current is
1/4A nominal at 20V to 30V. This pin goes high when
the PA heat sensor rises above 50°C and goes low
below 45°C.
Pin 3FAN2 LO
Pin 3 is the ground return for Fan 2.
Pin 4FAN HI
Pin 4 carries the voltage to Fan 2. The Voltage is
20V-30V at 1/4A nominal. Pin 4 goes high when the
PA heat sensor rises above 50°C and goes low below
45°C.
6.4.4 POWER AMPLIFIER CONNECTIONS
WO 115POWER SENSE
This capacitive feedt hrough pi n is at +15 V DC to
the Power Detect Board.
WO 120CTRL OUT
This capacitive f eedthroug h pin carries t he output
of the power control driv er on the RFIB to the power
control pin of the power module on the Power Amplifier board. The voltage varies from 0V-15V with current as high as 0.5A.
WO 121FWD PWR
This capacitive feedthr ough pin is the forward
power sense line. It is a voltage source that is a function of the output power of the Power Amplifier. The
voltage level will be between 0V-5V and drive a 10k
ohm load. A typical voltage of 3V corr elate s to 110W
out of the PA. This line goes through the mult iplexers
and A D LEVEL line to the Controller for processing.
WO 122RF OUT 1
This capacitive feedthrough pin is a voltage
source that is a func ti on of the output power of U50 1.
The voltage level will be between 0V-5V and drives a
10k ohm load. This l ine goes through t he mult iplexers
and A D LEVEL line to the Controller for processing.
6-15
August 2000
Part No. 001-2001-200
CIRCUIT DESCRIPTION
WO 123RF OUT 2
This capacitive feedthrough pin is a voltage
source that is a function of the output power of Q501.
The voltage level will be between 0V-5V and drive a
10k ohm load. This l ine go es th roug h the multipl exers
and A D LEVEL line to the Controller for processing.
WO 124RF OUT 3
This capacitive feedthrough pin is a voltage
source that is a function of the output power of Q502.
The voltage level will be between 0V-5V and drive a
10k ohm load. This l ine go es th roug h the multipl exers
and A D LEVEL line to the Controller for processing.
WO 125RF OUT 4
This capacitive feedthrough pin is a voltage
source that is a function of the output power of Q503.
The voltage level will be between 0V-5V and drive a
10k ohm load. This l ine go es th roug h the multipl exers
and A D LEVEL line to the Controller for processing.
WO147RF DETECT DRIVER
This senses power out of the driver. It is used to
limit the power out of the driver to 0.4 dB over 110W
at room temperature.
WO143+26V DC
This is the +26.5V DC source to the RFIB from
P101.
WO144+15V DC
This is the +15V DC source to the RFIB from
P103.
WO145GROUND
W145 carries ground current from P104 to the
RFIB.
6.4.5 EXCITER CONNECTOR (J102)
WO 126REFL PWR
This capacitive feedthrough pin is the reflected
power sense line. It is a voltage indicative of the
power reflected due to a mismatch. The voltage produced will typicall y be such tha t less th an a 3:1 VSWR
will not trigger alarms and when VSWR = 6:1 the controller will reduce powe r. The voltage level wil l be
between 0V-5V and drive a 10k ohm load. This line
goes through the multipl exe rs an d A D LEVEL line to
the Controller for processing. The time to sense and
reduce the power takes several
seconds.
WO 127TEMP
This capacitive feedthrough pin is the temperature sense l ine of the Power Amplifier. It will be a linearly variable function of temperature ranging from
0V-5V output and 0°C to +100°C (+32°F to 212°F)
input when driving a 10k ohm load. The primary
functions of this line are for fan on/off and PA power
reduction. The fan should be turned on at 50°C and
off at 45°C. The PA should have power reduced when
90°C (194°F) is reached a nd with absolute turn-off at
95°C (203°F). This line goes through the multiplexers
and A D LEVEL line to the Controller for processing.
The connector from the E xciter (J401) to the RF
Interface board (J102) links the Exciter to the MPC in
the Controller Backplane.
Pin 1VCC1
The voltage on this pin is a fused +15V ±1%,
nominal current of 0.5A. It provides current to the
Exciter from the RFIB.
Pins 2-8 GROUND
Pin 9+3.5V DC
Pin 9 is the +3.5V DC TCXO reference voltage
from the Exciter to the MAC.
Pin 10GROUND
Pin 11LPTT
The Logic Push-To-Talk (LPTT) is an open collector from the Controller. It has a sink capability of
20 mA nominal and a volta ge rating of 18V maximum.
The transmitter sho uld produce power when t hi s p in is
a logic low.
August 2000
Part No. 001-2001-200
6-16
CIRCUIT DESCRIPTION
Pin 12SYN CS EX
Pin 12 is the Exciter synthesizer chip select. It
allows data input t o t he s ynthesizer chip when the l in e
is pulled to a logic low.
Pin 13TX MOD
The audio from the MAC in the Controller processes a number of inputs to the station per the TIA
specifications to produce the signal on this pin. This
signal goes through the RFIB to the Exciter. A 707
mV RMS (2V P-P) sine wave at 1 kHz provides 60%
of system deviation in the transmitter. The DC voltage on the line is 3.5V ±0.1V. The source impedance
should be low (output of an op-amp or analog switch
< 200 ohms) and the input impedance will not be less
than 10k ohms.
Pins 14-15GROUND
These pins carry ground current between the
RFIB and th e Exciter boa rd.
Pin 16SYN LK EX
Pin 16 is the Exciter synthesizer lock detector
output. Th e synthesizer is locked with a TTL l ogic
high state.
Pin 17HS LK EX
Pin 17 is not used at this time.
Pin 18HS CS EX
This input is not used at this time.
Pin 19RF CLK
put power. The data has TTL levels. Up to four synthesizer chips and a shift register could be connected
to this pin.
6.4.6 RECEIVER CONNECTOR (J103)
The connector from the Receiver (J201) to the
RF Interface board (J103) links the Receiver to the
MPC in the Controller Backplane.
Pin 1VCC1
Pin 1 is fused +15V ±1% with a nominal current
of 1A provides current from the RFIB to the Receiver.
Pins 2-6 UNUSED
Pin 7RSSI
This pin is the Receive Signal Strength Indicator
(RSSI) to the Controller. The RSSI is used for tuneup of the Receiver front-end during test mode. The
dynamic range is 60 dB. Output is from an op-amp
with the voltage going from 0.5V to 4.5V. The level
has an adjustment in the Receiv er (see Secti on 6.1.4 o r
6.1.5).
Pin 8 UNUSED
Pin 9RX WBAND
The receive wide band audio i s fr om the demodulator and goes to the Main Audio Card (MAC) in the
Controller card cage. The typical amplitude is 387
mV RMS (-6 dBm) and 2V DC with Standard TIA
Test Modulation into the Receiver. Little wave shaping is done on the Receiver board other than a 31 kHz
RC LPF which strips off the 450 kHz IF. Buffering is
done with an op-amp which can drive a 10k ohm load.
The clock controls the Exciter synthesizer when
loading. The input source in the Controller is TTL
with the speed determined by the synthesizer chip.
There could be as many as four synthesizers and a
shift register.
Pin 20RF DATA
Pin 20 is a data pin from the Contr oller which has
the dual role of loading the synthesizer chip and
adjusting the power control D/A lines for proper out-
Pin 10UNUSED
Pin 11GROUND
Pin 11 carries ground current between the RFIB
and the Receiver board.
Pin 12SYN CS RX
Pin 12 is the Receiver synthesizer chip select.
This chip is the same part as used in the E xciter. A
low enables loading the Synthesizer.
6-17
Part No. 001-2001-200
August 2000
CIRCUIT DESCRIPTION
Pin 13RX INJ
This pin is the power sense for the Receiver
injection. It is a linear voltage source that is a function of the injection power. The voltage level will be
between 0V - 5V and be able to drive a 10k ohm load.
Pin 14SYN LK RX
Pin 14 is the main synthesizer lock detector output for the Receiver. The synthesizer is locked with a
TTL logic high state.
Pin 15GROUND
Pin 15 carries ground current between the RFIB
and the Receiver board.
Pin 16HS CS RX
Pin 16 is not used at this time.
Pin 17GROUND
Pin 17 carries ground current between the RFIB
and the Receiver board.
Pin 18RF CLK
The clock controls the Receiver synthesizers
when loading. The input source in the Co ntroller is
TTL with the speed determined by the synthesizer
chip.
Pin 19HS LK RX
Pin 19 is not used at this time.
Pin 20RF DATA
Pin 20 is a data pin from the Controll er which has
the dual role of loading the synthesizer chips and
adjusting the power control D/A lines for proper output power. The data has TTL levels. Up to four synthesizer chips and a shift register could be connected
to this pin.
August 2000
Part No. 001-2001-200
6-18
CIRCUIT DESCRIPTION
PC STR
RF MUX3 INH
VREF EX
LPTT
RF MUX1 INH
A D LEVEL
RF DATA C
RF DATA B
RF DATA A
TX MOD
STN CS EX
HS CS EX
RF MUX2 INH
RSSI
RX WB AUDIO
RF DATA
RF CLK
SYN CS RX
HS CS RX
FAN HIGH
FAN 1 LOW
FAN HIGH
FAN 2 LOW
J1
2
Q101
19
WO103
14
MUX/RES
STR
SER
CLK
OE
E
A0
A1
A2
Z
U103
MUX 3
U104
Q8
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Y0
Y1
Y2
Y3
Y4
Y5
Y6
U109A
FORWARD
POWER
U102A
U112A
U112C
U109D
RF POWER CONTROL
U102B
COMPARATOR
Q108Q111B
U112B
U112D
U109B
POWER
ADJUST
Q102-Q105
+26V
+15V
P101
P102
P103
P104
P105
PA
PWR CNTRL
RF DET (PRE-DRIVER)
FORWARD POWER
FINAL 1 POWER
FINAL 2 POWER
FINAL 3 POWER
FINAL 4 POWER
REFLECTED POWER
TEMPERATURE
EXCITER
20
MUX 1
13
27
9
26
8
22
21
3
10
30
7
28
11
29
12
J104
2
1
4
3
FAN 1 BUFFER
U107A
FAN 2 BUFFER
U107B
E
Z
U105
A2
A1
Y0
A0
Y2
Y1
Y7
Y6
MUX 2
Y0Z
A2
Y1
U106
A1
Y2
A0
Y7
E
Y5
Y4
+15V
U110E
U110B
Q106Q107
5V REGULATOR
U101
U110F
U110A
U108A
+5V
LPTT
VREF EXWO135
SYN LK EX
HS LK EX
RF CLK
RF DATA
TX MOD
SYN CS EX
HS CS EX
RECEIVER
RX INJ
HS LK RX
SYN LK RX
RSSI
RX WBAND
RF DATA
RF CLK
SYN CS RX
HS CS RX
Figure 6-7 RF INTERFACE BOARD BLOCK DIAGRAM
6-19
August 2000
Part No. 001-2001-200
CIRCUIT DESCRIPTION
6.5 800W POWER SUPPLY
WARNING
This power supply cont a ins vol t age pot ential s grea ter
than 400V. Considering the dangerous voltages and
the complexity of the switch-mode power supply, it is
strongly recommended the power supply be returned
to E.F. Johnson for repair (see Section 1.7).
6.5.1 FILTER BOARD
AC power is brought into the power supply
through the IEC connector in the front of the power
supply (see Figure 2-8). This connector is attached to
the EMI filter assembly, Part No. 023-2000-820. The
filter contains common mode and differential mode
filtering such that the supply complies with FCC
Class-A regulations. In addition to the filter components (C1, C2, L1, C3, C4, L2, C5) R1 is used to discharge the filt er capacitors when AC is re moved.
Metal-oxide varistors (RV001/RV002) are placed
across the line on the input a nd outpu t of the EMI f ilter
that clamp transient s on the AC li ne to prev ent damage
to the power supply. The AC power i s fused with
F001 after the connect or and bef ore th e filt er. Replace
fuse with a 15A/250V (314015) fuse.
C111. The resistor network connected to CR104
charges up C106/C107 to +18Voff the line. This provides the bias voltage required to start the controller
IC U102. Once the IC turns on current is being
switched on L107. A small tap winding on L107 provides sustaining curr ent to the U102 . When AC is first
connected it could ta ke several seconds for C106/C107
to charge to +14V before the u nit starts.
U102 samples the input voltage through R105/
R106/R107; the input current through T103/T104/
CR146/CR108/R113/R114; and the output voltage
through the divider at R127 . U102 modulates t he du ty
cycle to MOSFET Q101 such that the input current is
shaped like and in phase with the input voltage. The
controller has two feedback loops; a voltage loop to
keep the 400V constant and a current loop to keep
input current correct. Compensation for the current
error amp is C120/R141/C121 on U102, pin 1. Compensation for the voltage error amp is provided by
C127/C142/C126 on U102, pin 16. U102, pin 4 and
associated circuitry au tomatically adjust the Power
Factor Correction (PFC) for input voltage (100-240V
AC), line frequency (50-60 Hz) and l o ad on the po wer
factor.
NOTE: The output vol tage of the power f act or section
is at 400V DC. This voltage is bled off slowly. After
turning off, it can take more than 5 minutes to discharge.
At the output of the filter board is a bridge rectifier. The rectifier is heat sunk to the filter bracket
through a Grafoil thermal interface pad. Filtered AC
power is connected to the main board via wires W001
and W003. Filter and rectified current is brought to
the main board via wires W0 04 and W005. The sa fety
ground is connected from the filter board to a stud in
the chassis through W002.
6.5.2 POWER FACTOR CORRECTION
The power factor switching frequency is set at
87.5 kHz, ±5 kHz. The average current mode boost
converter is comprised of L107, Q101, CR145, C110,
C111. Half of U102 is used for power factor correction. RT101/RT102 are negative temperature coefficient thermistors that limit the in-rush current to C110/
August 2000
Part No. 001-2001-200
6.5.3 MAIN PULSE WIDTH MODULATOR
The +26.5V output is created from a two-transistor forward converter Q116/Q118. It uses the 400V
output of the power factor correction on C110/C111
for an input voltage. The same controller IC (U102)
drives the +26.5V stage. This stage runs at exactly
twice the power factor correction frequency and uses
trailing edge modulation. The pulse width modulator
uses the PFC supplied current for modulation scheme
that reduces ripple current in C110/C111.
The output of the IC, U102, pin 11 is fed to a
level shifting gate drive network comprised of C139,
C140, T106, C136, C197, C137 and C228. Each
MOSFET (Q116, Q118) of the two-transistor forward
converter has a gate protection zener diode CR117,
CR120 respectively. In addition, each power MOSFET has a gate turnoff network.
6-20
CIRCUIT DESCRIPTION
+15V DC OUT
U119
U116, Q126
L103
Q127
Q128
SAWTOOTH BUFFER
CT
VREF
U112
RAMP/ISD
+15V
OUT
BUCK CONVERTER
CONTROLLER
T105
CURRENT SENSE
T108
Q122, Q123
L102
Q124, Q125
+26.5V
ISOLATION
HI/LO VOLTAGE
PROTECTION
OVER VOLTAGE
+5V TO U104
U105
+15V DC
+5V REG
U104A/B
Q110, Q111, Q112
U111
EXT IN
+26.5V DC
SYNC
L101
T106
CONTROLLER
U115
OVERVOLTAGE
SHUTDOWN
+5V DC OUT
CT
U113
RAMP/ISD
EA OUT/INV
OUT
FAN
FAN CONTROLLER
U120
U117, Q133
PROTECTION
OVER VOLTAGE
L104
T109
Q129, Q130
Q131, Q132
BUCK CONVERTER
U122
U118, Q138
PROTECTION
UNDER VOLTAGE
-5V DC OUT
OUT
U114
VCC
BUCK BOOST CONVERTER
T103
RT101, RT102
Q114
Q115, Q116
Q117, Q118
2-TRANSISTOR
LADDER
IAC
Q108
PFC
Q101
Q107
U102
RESISTOR
FB
I SENSE
T104
L107
CURRENT MODE
BOOST CONVERTER
DC IN
FWD CONVERTER
U110C
THERMAL
SHUTDOWN
T106PWM OUT
GATE DRIVE
LEVEL SHIFTING
U109
U108
Q104
VOLTAGE SENSE
VDC
VCC
RAMP
Q103
U107
Q105, Q106
BATT BACK-UP
ON/OFF SENSE
+6 to +18V
CR110, CR111
CR101, CR102
BRIDGE RECTIFIER
T101
AC IN
AC SENSE
BUFFER/
HYSTERESIS
AMPSENSOR
TEMP OUT
TEMP
TO REMOTE EN
U106U101U110AQ120, Q121U110D
+5V REGULATOR
Figure 6-8 BLOCK DIAGRAM
6-21
August 2000
Part No. 001-2001-200
CIRCUIT DESCRIPTION
In operation, the power MOSFETs Q116, Q118
are on for approximately one-third of the period providing current to the primary side of T107. During
that time CR121 is forward conducting and charging
L101. When the MOSFETs are switched off, the magnetizing current of T107 continues to flow through
CR118, CR119. These diodes place 400V across the
transformer in opposite polarity that resets the transformer core. During the off period CR128 is free
wheeling and L101 is discharging. Transformer T107
provides the isolation between the low voltage and
high voltage sections.
The +26.5V pulse width modulator is peak current mode controlled. This type of converter requires
current and voltage sense. T105, CR112, R125, R146
and C125 provide the current sense circuit. The voltage sense circuit is U109 and the associated circuitry
on the isolated side of the supply.
An opto-isolator is used to cross the boundary
from high to low voltage sections. In the event of an
over-voltage condition (>+32V) U115 and associated
components turn the power sup ply of f . This s hutdown
mechanism latches the power supply Off. The enable
line must be turned Off for 10 seconds for the power
supply to reset. T106 has a tap to provide current to
the optional battery back-up (Part No. 023-3-2000-
830). The +26.5V is available at the high current output connector to the power supply and it also powers
the +15V, +5V and -5V converters through F102.
6.5.4 SYNCHRONIZING CIRCUITS
The +15V and +5V sections run at the same frequency as the + 26.5 V pu lse wi dt h modulator. In order
for a beat note not to be produced, a sync circuit is
used. If two converters are not synchronized, the difference frequency may show up at an undesired location in the repeater.
Divider R151/R152 samples the output of the
main pulse width modulator. When Q116 and Q118
turn on, the output on U104A, pin 3 goes high. C138,
R176, CR122 along with U104B creates a very narrow
pulse on U104B, pin 6. Q110, Q111 and Q112 level
shift and buffer this pulse. When the narrow pulse is
presented to the timing capacit or of the +15V and +5V
converters, the cycle terminates and a new one starts.
This forces the +15V and +5V converters to run at the
same frequency and is slightly delayed from the
+26.5V converter.
6.5.5 FAN AND THERMAL SHUTDOW N
The voltage supply to the thermal measurement
circuit is generated from transformer T101 and the
associated bridge rectifier consisting of CR101,
CR102, CR110 and CR111 and bulk storage capacitor
C101. This voltage is approximately +9V when the
AC voltage is at 120V AC.
NOTE: This DC voltage is depen dant on the input AC
voltage.
U106 provides a very accurate +5V required for
proper operation of the temperature sense circuit. A
precision tempera ture sensor (U101) is mount ed to the
+26.5V rectifier heatsink. The output of this sensor is
10 mV/°C with a ±1% accuracy. This voltage is
amplified by U110A with precision resistors R183/
R184 setting the gain.
The output of gain stage U110A is fed to the
computer interface via WO116 to monitor power supply temperature with the programmer. The output of
U110A, pin 3 is also connected to the thermal shutdown circuit U110C, R135, R136, R137, R138 and
R139. If the heatsink temperature reaches 92°C
(198°F) the output of U110C, pin 8 goes high and saturates Q103. When Q103 is turned on U107 is turned
off and the power supply turns off. The remote voltage is always present so when the heatsink temperature drops to 80°C (176°F) the power supply restarts.
The high temperature cond ition woul d only ex ist i f the
fan was blocked or faulty.
The output of U110A, pin 1 also connects to the
fan controller. U110D with the associated resistors
provides a means to turn the fan on/off. Transistors
Q120/Q121 provide current gain and a voltage level
shift to run the fan. The fan turns on when the heatsink reaches approximat ely 45°C (113°F) and turns off
again when the temperature reaches 35°C (95°C). In
normal operation the fan turns on and off.
August 2000
Part No. 001-2001-200
6-22
CIRCUIT DESCRIPTION
6.5.6 +15V CONVERTER
The input voltage to this "Buck" DC/DC converter is the main +26.5V output f use d thr ough F102.
The bias voltage for the controller IC U112, pin 15 is
provided by a +15V regulator U111. The basic buck
converter consists of MOSFET Q125, Schottky diode
CR126 and storage inductor L102. C165, C166,
C167, L103, C169 and C170 filter the output voltage
and attenuate the ripple at the switching frequency
(160 kHz). The capacitors are an integral part of the
feedback loop. The duty cycle is approximately 60%.
The +15V buck converter is peak current mode
controlled. T108 samples the inductor current while
MOSFET Q125 is on. The sampled current is translated to a voltage via CR127, R209 and R210.
Because the MOSFET is a high-side switch, a
charge pump is required to get the gate voltage above
the input voltage. The charge pump operates as follows. When the output from IC U112, pin 14 is low,
capacitor C162 is charged through CR124, R198,
R199, R200 and Q122/Q123 ar e o ff. When U1 12, pin
14 goes high, the capacitor stays charged and CR124
is reverse biased. Q122/Q123 are turned on forward
biasing CR125 and applying a gate-to-source voltage
of approximately +12V. During this time Q124 is o f f.
When U112, pin 14 goes low, Q124 turns on and rapidly discharges the gate cap acitance.
Resistors R231/R208 cou pled with C164 provide
snubbing for Schottky diode CR126.
Because the +15V converter operates at greater
than 50% duty cycle, slope compensation is required.
Capacitor C176 is the time capaci tor f or t his con verte r
and R223 is the resistor that sets the charge current. A
sawtooth wave is pr esent on the high side of C176 that
is buffered by Q127/Q128. The resistor divider network of R315, R227, R229 and R232 provide the correct amount of compensation for stable operation and
current limiting.
The output voltage is sampled by R215, R216
and R217 and sent to the inverting side of the error
amplifier i nternal to the controller IC on U112, pin 1.
Voltage loop compensation is set by C174, C175 and
R221.
Sync pulse is added into the low side of C176 via
C172 and R225. The free running frequency of the
15V converter (approximately 145 kHz) is set about
10% lower than the 26.5V convert er. This longer duty
cycle allows the sync circuit to synchronize the converter.
Over voltage is sensed using U116 as a reference
and amplifier, CR129 acts as a crowbar on the output. Once the crowbar is turned on, opto-isolator
U119 is activated to shutdown the power supply. The
enable line must be toggled or AC voltage removed
for 10 seconds to reset the power supply.
6.5.7 +5V CONVERTER
Operation of the +5V "Buck" DC/DC converter
is the same as the +15V, except slop compensation is
not required. Some values are different to get the
5.2V DC and current limit to 6A. The duty cycle is
approximately 20%.
6.5.8 -5V CONVERTER
The -5V "Buck-Boost" converter scales and
inverts the voltage. This converter is free running at
approximately 75 kHz. The output switch and controller are built into the 5-leg TO-220 IC U114. L105
is the storage inductor. C204, R270 and R271 close
the voltage feedback loop and are set for optimum stable transient response. C208/C209 reduce output ripple. Under-volt age prot ecti on is r equire d on thi s stag e
and works the same as the over-voltage protection of
the +15V and +5V buck converters, but has opposite
polarity.
6.5.9 POWER SUPPLY REPAIR AND ALIGN-
MENT
If a power supply fails it is typically a Power
MOSFET or Power Diode. In some cases the MOSFET gate may short and cause some of the driver circuits to be damaged. When replacing heat sunk components it is advisable to replace the sil-pad thermal
interface material at the same time. The mounting
hardware mu st be replaced exactly as built in the factory. The mounting screws for the power semiconductors MUST BE torqued to 4-5 in/lbs. Under torque
and over torque can shorten the life of the semiconductor.
6-23
August 2000
Part No. 001-2001-200
CIRCUIT DESCRIPTION
The majority of the v oltage and current li mi ts ar e
set with fixed value components in the power supply.
However, the +26.5V, +15V and +5.2V supplies are
adjustable. When certain components are replaced,
the voltages must be adj usted . The voltag es shoul d be
set at light l oad (i.e. repe ater in the Receive mode).
1. The +26.5V supply can be adjus ted with R174 when
any of the following components are replaced:
R173, R174, R175, U109, U108, U102, R143,
R170 or R171.
2. The +15V supply can be adjusted with R216 when
any of the following components are replaced:
R215, R216, R217 or U112.
3. The +5.2V supply can be a dju sted with R2 54 when
any of the following components are replaced:
R253, R254, R255 or U113.
6.6 BATTERY BACK-UP MODULE
6.6.1 OPERATION
When a battery back-up module is installed in a
power supply it performs the function of running a
repeater in the absence of AC voltage. When AC is
present it can be used to charge a pair of lead-acid batteries in series. The charger is a temperature compensated constant voltage charger. The maximum output
current from the charger is 2.2A. The charger works
when AC is p resent and the repeater is enabled. The
charger swit ch on t he battery back-up modul e mus t b e
"On". The temperature compensation thermal sensor
is part of 023-2000-223 battery back-up module cable
assembly.
When AC is low or not applied to the 023-2000800 power supply the battery input takes over if the
voltage is within range. The input voltage to the battery back-up module acts as the 26.5V supply and the
other voltages in the power supply also are present,
+15, +5.2 and -5V. When AC is restored, the battery
back-up module disengages automatically. The
change over from battery to AC or AC to battery may
cause the repeater to reset, depending on battery condition and load status.
6.6.2 CHARGER
The charger charges the batteries when the
repeater is on and switch S101 is "on". A tap off of
the main transformer of the power supply through
wire W104 and a +26. 5V l ine vi a wire W102 are what
supply the charger with the necessary voltage to
charge the bat teries. The ta p off of the transformer is
biased by the +26.5V and then filtered through L101,
C105 and C119. Since the tap from the power supply
is not a regulated voltage, bleeder resistors R136/
R137 dissipate some power when the batteries are
fully charged. No load situation, the peak voltage of
the tap is ap proximately 63V, is not impressed across
the 50V capacitors C105/C119. During a battery
charging condition the line voltage to the charger on
U107, pin 2 should be about 35V.
While charging batteries, if the charge voltage is
varied with respect to the temperat ure of the batteries,
the lifetime of the batteries is increased dramat ically.
Figure 6-9 shows the algorithm used in float charge
applications for two 12V lead-acid batteries in series.
Figure 6-9 shows that the charge voltage should be
27.3V DC ±0.15V at 25°C (77°F) with -55 mV/°C
temperature compensation.
An LM317M linear voltage regulator (U107) is
used to create the temperature compensated charge
voltage. This device is capable of delivering 2.2A of
continuous current to the batteries .
To create a temperature compensated voltage an
op amp (U104) is used as a voltag e gain devi ce fro m a
temperature probe attached to the batteries (part of
023-2000-223). This op amp wit h R148/ R149 defi nes
the slope for the algorithm of Figure 6-9. The output
of the temperature compensation is attached to the
adjust pin of U107. R138-R140 allow the output voltage to be set properly at a given ambient temperature. F101 is a 4A resettable fuse used to prevent thermal run away in the event of U107 failure. If the
output current to the batteries exceeds 4A this fuse
opens. Once the current drops below 100 mA, the
fuse closes automatically.
NOTE: When using a genera tor, the DC voltage must
be between 23-28.5V (26.5V DC is recommended) and
ripple voltage less than 1% or approximately
0.25V P-P.
August 2000
Part No. 001-2001-200
NOTE: If any of the charging components are replaced, R140 needs to be adjusted to set the output
(battery back-up battery terminals) voltage to 27.3V
±0.15V when temperature sensor is at 22°C (71.6°F).
6-24
Charger Voltage
30V
27.3V
25.2V
-55mV/°C
CIRCUIT DESCRIPTION
6.6.4 ENGAGING THE RELA Y
The main purpose of the Battery Back-Up Module (BBM) is that when the power supply loses AC
line voltage, a pair of series connected 12V lead acid
batteries (approx imatel y 26.4V) or o ther 23-28.5V DC
source will engage to the supply allowing the repeater
to operate. To perform this function a voltage comparator (U101) is used to monitor the charge tap coming
from the power supply.
24V
-30°0°+30°+60°
+22°
Temp (°C)
Figure 6-9 NO LOAD CHARGE VOLTAGE vs.
TEMPERATURE
6.6.3 REVERSE BATTERY PROTECTION
To obtain reverse battery protection a number of
techniques were implemented. Q108/Q110 are
arranged in a Darlington configuration to isolate the
output capacitors C109-C111 from conducting in the
event the batteries are connected backwards. This circuit also provides a means to turn the battery charger
off in case the user wants to run the repeater off of
another DC source. S101 opens the base of Q105
which turns off Q104. CR111 is a green light emitting
diode (LED) located on the right hand side of the battery back-up module when looking at the front of the
power supply that tells t he user the cha r ger is in cha rge
mode and is marked "On".
To notify the user that the batteries are connected
improperly R101/CR101 are connected in series
across the batteries. CR101 is a red LED that lights
when the batteries are connected backwards and is
located on the left hand side of the battery back-up
module when looking at the front of the power supply. This LED is marked "Reverse Bat.". CR113
eliminates a path for the reverse battery current
through the relay and over/under voltage protection
circuitry.
NOTE: Exceeding -30V acr oss the battery back- up terminals with the power supply on will destroy Q105.
A 2.5V reference voltage is supplied to the comparator from U102. The transformer tap voltage is
smoothed and divided by CR114, C118, R116, R121
and R122. The values for these components were calculated so that when the AC line voltage is dropped to
70V AC, the output of the comparator turns Q103/
Q102 on which in turn engages the relay K101. The
relay is capable of 30A which delivers the battery
energy to the power supply via W102 with the return
line being W103.
NOTE: When AC is r estored, the relay disengages and
the charger automatically begins to charge the batteries.
6.6.5 OVER/UNDERVOLTAGE SHUTDOWN
U101 is a quad comparator IC used to create the
overvoltage and undervoltage shutdown circuitry. If
the batteries are drained sufficiently enough such that
the voltage of the batteries drops below 20.3V DC the
output of the comparat or goes low a nd turns Q10 2 off .
By turning Q102 off the batteries are switched out of
the circuit. The ba tt er ies cannot be switched bac k into
the repeater until the voltage rises to 22.6V DC. This
operation is in place to protect the repe at er and the batteries. In the event the batteries are over charged, or
the repeater is driven by the generator that has the
voltage set too high, the relay will disengage above
30.5V DC. In order to switch the batteries back to the
repeater, the voltage must drop below 29V DC.
In an overvoltage or undervoltage situation,
whether AC is present or not, the red LED (CR105)
lights until the problem is rectified. This light is
located on the right-hand side of the battery back-up
module when looking at the front of the power supply
and is marked BAT-BAD.
6-25
August 2000
Part No. 001-2001-200
CIRCUIT DESCRIPTION
6.6.6 BBM FAN CONTROL
The voltage supply to the t hermal measu rement
circuit is taken from the 26.5V DC li ne into the BBM.
A precision temperature sensor U106 is mounted on
the PC board near a screw into the BBM bracket
which transfers heat to the sensor. The output of this
sensor is 10 mV/°C with a ±1% accuracy. This voltage is amplified by U105 with resistors R153/R154
setting the gain.
The output of this gain stage (pin 1) is fed to
another gain stage that performs as a comparator. The
output (pin 7) will go high when the heatsink temperature reaches 45°C and will go low when the temperature goes below 35°C. This output is sent to the power
supply through Q106 to turn the fan on and off.
6.7 CARD RACK
The card rack provides slots for up to eight logic
cards; including Main Processor Card (MPC), Main
Audio Card (MA C) and the Int erface Alarm Card
(IAC). The IAC has a notch in the card to accommodate a pin in Slot-8 so that no other card can be
plugged into this slot.
On the back of the card rack is the Backplane
with plug-in connectors to the cards and cables to the
RF modules, Power Supply and External Connector
Board.
Refer to the component layout and schematic diagram in Section 10 for mo re information on the
repeater backplane.
August 2000
Part No. 001-2001-200
Figure 6-10 BACKPLANE CONNECTORS
6-26
6.8 EXTERNAL CONNECTOR BOARD
The external connector board (A10) is the
interface for the alarm outputs, connecting
repeaters through the high speed data bus.
A7
ALARMS
TO CARD RACK
P10
CIRCUIT DESCRIPTION
A10
P
I
T
-
S
E
1
A
E
D
O
M
T
X
E
EXTERNAL
CONNECTOR
A
+
S
M
X
R
X
T
1
Q
E
R
D
T
N
X
U
O
C
R
A
G
V
5
+1
BOARD
+
D
S
U
A
T
O
V
C
L
I
FA
C
A
N
I
1
A
L
A
A6
REPEATER I/O
TO CARD RACK
J1
J3
N
I
T
D
A
N
D
U
C
V
O
C
A
R
V
G
5
1
I
+
S
S
+
R
N
I
+
1
+
N
I
T
2
+
U
T
O
U
1
O
2
TO CARD RACK
P11
S
H
6
5
+
B
D
-
B
+
D
S
B
H
-
D
B
R
I
D
+
R
I
A
4
L
T
3
A
L
T
2
1
J1
A5
HIGH SPEED
DATA BUS
-
33
-
-
-
N
I
T
2
-
U
T
O
U
1
O
2
34
R
M
S
D
J
A
2
T
A
1
D
A
T
A
2
+
3
+
4
N
2
E
1
-
3
-
1
4
4
2
A
C
T
A
U
I
O
T
X
E
O
L
A
R
C
M
I
N
A
L
J1
Q
Q
E
S
R
T
7
X
1
E
M
I
O
C
C
N
Y
S
1
9
4
M
0
5
M
O
C
-
3
-
4
N
I
D
C
I
X
O
T
V
X
R
X
A
R
T
M
O
U
T
P1
N
+
3
T
+
U
4
O
D
3
X
5
T
M
O
4
5
C
M
5
O
5
C
M
3
O
C
1
0
/
I
E
E
C
I
O
V
N
A
B
W
X
R
M
O
C
25
D
6
M
26
A-
X
R
2
+
A
+
X
A
R
X
T
P
I
1
T
A-
X
G
1
T
N
I
G
R
N
I
R
B
E
B
-
M
XS
R
X
T
J
2
Figure 6-11 EXTERNAL CONNECTOR BOARD
6-27
August 2000
Part No. 001-2001-200
CIRCUIT DESCRIPTION
P2-0
P2-1
P2-2
P2-3
P2-4
P2-5
TxD0
RxD0
P1-6
CTS0
TxD1
RxD1
CTS1
P1-0
P1-1
P1-2
P1-3
P1-4
STAGING
STAGING
LATCH
PROGRAMMABLE
DMA
CONTROLLER
SERIAL
COMMUNICATION
INTERFACE
BAUD RATE
GENERATOR
PROGRAMMABLE
INTERRUPT
CONTROLLER
X1
X2
CLOCK
LC
etc.
PSW
PC
ALU
TA
TB
TC
INT RAM
256 BYTES
GR
MACRO
SERVICE
CHANNEL
INSTRUCTION DECODER
MICRO SEQUENCER
MICRO ROM
LATCH
INT ROM
16K BYTES
QUEUE
ADMA19-A0
PFP
INC
RESET
P2-6
P2-7
P1-7
MSTB
MREQ
R/W
IOSTB
EA
BUS CONTROL LOGIC
P1-4
D7-D0
16-BIT TIMER
P1-5REFRQP0-7
TIME BASE CONTROLLER
P0P1P2PT0-PT7
Figure 6-12 U27 BLOCK DIAGRAM
6.9 MAIN PROCESSOR CARD
6.9.1 INTRODUCTION
The Main Processor Card (MPC) connect s to the
computer with repeater software to program the
repeater parameters, sets and reads the alarms, handles
communication between repeaters, maintains the
audio gating for the MAC, handles initialization
requests from cards and contains the repeater RF data
for the Receiver, Exciter and CWID .
PORT
PORT WITH
COMPARATOR
V
TH
Control function s for ea ch repea ter are performed
by the Main Processor in the MPC installed in each
repeater. The MPC contains the main software and
control over the repeater via microprocessor U27 (see
Figure 6-17).
Information is excha nged betwe en repeate rs via a
High-Speed Data Bus (HSDB) that interconnects all
the MPCs. This control technique is c alled distributive processing and it eliminates the need for a separate system controller at each site. The HSDB processor (U13) on the MPC provides these control
functions. The MPC also contains:
August 2000
Part No. 001-2001-200
6-28
CIRCUIT DESCRIPTION
• Flash Memory, RAM , non-volatile EEPROM.
• I/O chip select to allow the addressing of data
latches for Input/Output.
• Read/Write sele ct ion t o be s ent a nd rec eiv ed on the
Controller Backplane.
• Clock line, data line and chip select line from the
IAC to load the Receiver and Exciter synthesizers .
• Serial communication circuitry and processes for
the High Speed Data Bus (HSDB).
• Asynchronous parallel communication to the other
cards, i.e. alarm input and output circuitry.
• AC Power Failure indication from the IAC.
• Provides an output from the IAC to the power
amplifier to control the output power.
• Exciter Logic Push-To-Talk (PTT).
• Receiver synthesizer lock, Exci ter synthesizer lock ,
thermal level from the power amplifier, VSWR
level from the P A, forwar d power level, RSSI signal
level, audio levels from the MAC, Receiver and
Exciter from the IAC.
6.9.2 MAIN CONTROLLER MICROPROCESSOR
peripherals. Internal RAM and the SFR area are
together and can be relocated anywhere in the 1Mbyte address sp ace . This maintains compatibility with
existing system memory maps.
The two microprocessors and USART (U22) are
reset by integrated circuit U17. Reset occurs when
power is turned o n, when t he 5V su pply dr ops bel ow a
threshold level or the reset switch (S1) is active.
When a microprocessor is reset, several internal
registers are cleared an d the progra m is started ov er
from the beginning. Low-voltage reset prevents
improper operation resulting from low-voltage
conditions.
When power is turned on, the RESET output
U17, pin 6 is initially high and the inverted RESET
output U17, pin 5 is in it ially low. Once the 5V supply
stabilizes, these outp uts remain in these states for
approximately 100 ms to ensure that reset occurs.
This time delay is set by capa citor C14 conn ected
to U17, pin 3. If the 5V supply drops below a nominal
level, the RESET outputs change states and microprocessor operation is interrupted until the 5V supply
returns to normal. C3 prev ents fast transients on the
5V supply from causing reset.
Manual reset can be accomplished by pressing
push-button switch S1. When U17, pin 2 goes low,
U17 goes into the reset sequence described.
U27 contains the main software and control over
the repeater (see Figure 6-12).
The main controller (U27) is a VLSI (Very Large
Scale Integration) CMOS 16-bit single chip computer
with an 8-bit external data bus. This processor has
software compatibility with the V20 (8086/8088),
faster memory access, superior interrupt processing
ability, and enhanced control of internal peripherals.
This ROMless processor has a variety of on-chip components including 256 bytes of RAM, serial and parallel inputs/outputs, comparator port lines and timers.
Eight banks of registers are mapped into internal
RAM below an additional 256-byte special function
register (SFR) area that is used to control on-chip
6.9.3 HIGH SPEED DA T A BUS MICROPROCESSOR (U13)
The HSDB processor (U13) on the MPC provides the interface with the HSDB. It monitors data
on this bus and al so transmits data on to this bus when
necessary. Information on this bus indicates which
repeaters are in use and also which mobiles are using
the system. This info rmation i s used by t he repeat er to
encode data messages to the mobiles that are monitoring that channel. These messages also include information on which repeater is free and current syst em
priority.
August 2000
6-29
Part No. 001-2001-200
CIRCUIT DESCRIPTION
Microprocessor U13 is an 8052 tha t uses exter nal
EPROM (Erasable Programmable Read Only Memory) U14, an 8-bit devic e that store s the p rogram. Th e
microprocessor uses 2k x 8 EPROM and 64k x 8
RAM. The RAM (Random Access Memory) is used
for temporary data sto r age. The HSD B processor is
configured by the Main Processor.
The internal data bus of the microprocessor has
four input/output ports. These ports have eight lines
each, giving a total of 32 input/output lines. These
ports are designated P0, P1, P2, P3. P0 is used as a
data bus. Ports P1 and P2 are always used as general
purpose inputs/outputs. P3 is used for specialized
functions, i.e. a serial port (RxD/TxD) and interrupt
(INT).
The operating speed of the microprocessor is set
by an 11.059 MHz cl ock gene rat ed by Y2. This clock
frequency is divided down by an internal divider to
provide a machine cycle time of 1.08 µs. Most program instructions are executed in one machine cycle
and none require more than four machine cycles.
Pins 1-10ADDRESS BUS
Pins 33-42
This provides a path between the MPC main processor and the external memory on the MPC and the
other cards in the Controller. This bus retrieves information programmed into memory for the operatio n of
the repeate r.
Pins 11-14DATA BUS
Pins 43-46
The data bus provides a means of transferring
data to and from the CPU on the MPC, memory storage on each card and peripheral devices in and out of
the MAC and IAC.
Pin 15MREQ
MREQ is a memory request line operates in conjunction with the Read/Write lines. These provide the
ability to read from or write to the main processor
memory on the MPC.
The microprocessor U13 communicates with the
main processor (U27) through U9 and U10. U9 is a
Transmit FIFO (First In First Out) and U10 is a
Receive FIFO. This combination makes up an asynchronous parallel-to-parallel interface to the Main
Processor.
Microprocessor U13 al so calculates the curren t
system priority for the channel. This priority is from
the programming software responses and the curr ent
priority is sent to the main processor. U13 also reads
repeater number and channel number information in
memory. U13 also determines the current free
repeater and includes that information in the data sent
to the Main Processor.
6.9.4 CHIP SELECT DECODERS (U15/U4)
Chip select decoders se lect the peripheral chip to
read from or write to.
6.9.5 P1 SIGNAL CONNECTOR
Pin 16MSTB
MSTB is a memory strobe line used during MPC
main proces sor Read/Write operations to external
memory on the MPC and other cards plugged into the
backplane.
Pins 17-20UNUSED
Pin 21LPTT
The Logic Push-To-Talk is an open collector
from the Controller. It has a sink capability of 20 mA
and a maximum voltage rating of 18V. The transmitter should produce p ower when thi s pin is a logic lo w.
Transmit indicator is on the IAC and is controlled
independently of the LPTT.
Pins 22-23UNUSED
Pins 24/56HSDB+/HSDB-
This is the signal interface connector P1 (64 pin)
that connects the Address and Data buses and control
lines to the backplane connector.
August 2000
Part No. 001-2001-200
This interc onnects all repeaters to provide an
exchange of information. This control technique is
called distributive processing and eliminates a separate system controller at each site. Information on this
6-30
CIRCUIT DESCRIPTION
bus indicates which repeaters are in use and also
which mobiles are using the sys tem. This informati on
is used by the repeater to encode dat a messages to the
mobiles that are monitoring that channel. These m essages also include information on which repeater is
free and cur rent system priority.
Pins 25-26UNUSED
Pins 27/59-5V IN
This is the -5V input to the MPC from the power
supply via the Controller backplane.
Pins 28-29+5V IN
Pins 60-61
This is the +5V inp ut to the MPC from the power
supply via the Controller backplane.
Pins 30/62+15V IN
This is the +15V input to the MPC from the
power supply via the Controller backplane.
Pins 31-32GROUND
Pins 63-64
This is the ground connection to the MPC from
the power supply via the Controller backplane.
6.9.7 J2 MEMORY SELECT
J2 is jumpered to select ei ther the Flas h memory
or the EPROM memory. Flash memory is ultra-fast
data storage. The normal setting is pin 1 to pin 2.
Pin 1+12V
Pin 2U25, pin 1 Vpp
Pin 3+5V
6.9.8 J3 BAUD RATE
J3 is jumpered to select the baud rate from the
computer to the MPC, these two baud rates must be
the same (see Figure 6-17). The baud rate of the computer can be found from the command line by requesting /b, /h or /? (see Section 3.1.5). To change jumper
J13: Power off the station. Move P3 to the proper
rate. Power on the station.
6.9.9 S2/S3 HSDB SETTINGS
These switches configure; the HSDB for RS-485
or single-ended 5V operation, indicate if the Summit
repeaters are connected to existing repeaters or only
Summit repeaters, and if the repeater is an end
repeater termination. Refer to Sections 2.9 and 7.4.8.
Pin 47READ
Read is used with the MREQ line to read data
from the main processor and external memory.
Pin 48WRITE
Write is used with the MREQ line to wri te data to
This jumper selects EPROM memory loading for
LTR systems. The LTR setting is pin 3 to
pin 4.
6.9.11 J5 HSDB SPEED
J5 is jumpered to select the data bus speed. J5,
pins 2/3 select the LTR 12 MHz crystal.
6.9.12 J6 WATCHDOG
This jumper enables or disables the watchdog
timer for reset. Normal operating mode is P6 jumper ing J6, pins 2/3. This jumper should not be moved or
removed.
August 2000
6-31
Part No. 001-2001-200
CIRCUIT DESCRIPTION
6.10 MAIN AUDIO CARD
6.10.1 INTRODUCTION
This control card stores the information required
to operate the routing of audio and data from the
inputs of the repeater to the outputs. Data is received
on the address bus from the MPC for the operations to
perform. The Audio/Data microprocessor and the
latches open and close gates to route a path for the
audio or data.
Audio control functions for each repeater are performed by the Main Processor in the MPC. The MPC
contains the software and maintains control over the
repeater via microprocessor U27. The audio/data
microprocessor passes received data to the main processor, and it is given the programmable parameters
for the gates.
Information is exchanged between the cards in
the Controller Backpl ane via a data bus a nd an add ress
bus. The address bus provides the link between the
main processor and t he chip and the addres s latc hes on
the MAC. These latches control the octal latches that
select the audio and data gates. The data bus is the
link between the Main Processor and the Audio/Data
Processor on the MAC. The Main Processor controls
the data to the octal latches and opens and closes the
gates required to route audio/data in and out of the
repeater. The MAC also contains:
• The audio interface between the receiver and exciter
and to the external connections.
• The receive audio filtering with de-emphasis.
6.10.2 AUDIO/DATA MICROPROCESSOR
This Audio/Data microp rocessor is o n the MAC
card and is used to deco de LTR data received from the
mobiles. The LTR data is applied to U111, pin 8 (P1.7
input). When a word is successfully decoded the data
is then sent to U161 (Tx FIFO) and transmitted on the
data bus in parallel to the main processor on the MPC.
When it is time to transmit the CW Identification,
the main pro cessor on the MP C sends the ide ntification to U111 via the data bus and U160 (Rx FIFO).
The CWID is sent to the Tx Data Amplifier and Filter. The output of the f i lter is summed with the transmit audio and sent to the Exciter.
U111 also uses six octal latches to provide additional input and output lines. Latch U107/U108 provide outputs which allow U111 to control various
audio gates. Thes e gate s cont rol t he CWI D, FSK da ta,
and receive/transmit audio signals.
Latch U106 provides outputs which allow U111
to route signals to the Audio/Data Test Point by
switching gates on and off. U106 also provides adjustment of the selected EEPOTs.
U155-U156 allow U111 to select the EEPOT to
adjust with chip select lines. These latches also provide routing of some audio/data signals through gates.
In addition, U111 controls the receive and transmit audio gates, receiver squelch, several front-panel
indicators, and oth er funct ions. U1 11 encodes the data
messages transmitted to mobiles monitoring that channel, and controls transmitter keying.
• The squelch filter and detector.
• Slow decay timing circuit that controls a mute gate
on the main receive audi o.
• A filter, DC restoration and slicer circuitry for
detecting the subaudible data.
• The fast squelch and data fed to the mi cropro ces sor
that decodes the data and uses the squelch line as a
data qualification signal.
• Transmit au dio filter and limit er wit h pr e- emphasis.
August 2000
Part No. 001-2001-200
6.10.3 RECEIVE AUDIO
The Receive Wide Band Audio (RX WBAND)
signal from the Receiver is fed into the MAC on P100,
pin 27. This audio signal includes; audio, LTR data,
and noise. The audio processing circuit provides filtering and amplification of the audio signal before it is
routed to the outputs on the MAC card.
A low-pass filter consisting of U121A/B atte nuates frequencies above 3 kHz. This removes high-frequency noise from the audio signal. From the filter
the signal is fed to amplifier U122A to increase the
level before the high-pass filter to preserve adequate
hum and noise ratio.
6-32
CIRCUIT DESCRIPTION
From the audio amplifier the signal is fed to a
high-pass filter consisting of U122B/C/D. This filter
attenuates frequencies below 300 Hz which removes
data present in the wide band audio signal. These filters are configured to act like large inductors. The signal is then fed to U163A which provides 6 dB per
octave de-emphasis.
Audio gates U113B/C/D permit noise squelch circuit, control logic, and audio switch to control gating
of the audio signal. The control signal from the noise
squelch circuit is applied to U113B through U113D.
When a carrier is detected, this input is high and
U113B passes the signal. Programming determines
the gating of audio. When audio is passed by U113B/
C and U114A, the audio can be routed through other
gates to various outputs (see Section 6.10.6).
6.10.4 RECEIVE SQUELCH CIRCUITRY
The receive wide band audio inclu des audio, data
and noise. The squelch circuit detects this noise to
determine receive signal strength. When no carrier or
a weak carrier is received, there is a large amount of
noise present. Conversely, when a strong carrier is
present, there is very little noise present.
U135A is a high-pass filter which attenuates frequencies below approximately 30 kHz so that only
high-frequency noise is passed. This noise is amplified by U135B and U123A. A level control adjusts
the gain of amplifier U135B. The gain of U123A is
partially set by a thermistor to compensate for circuit
gain and noise level changes caused by temperature
variations.
The amplified noise is then applied to a bridge
rectifier. The difference between bridge rectifier outputs is applied to the inputs of U123B. The output of
U123B is positive-going pulses. These pulses are
applied to U123C which is a Schmitt trigger. When
the input signal rises above the reference the output
goes low and causes the reference voltage to decrease
slightly ad ding hysteresis to the tri ggering level. This
hysteresis prevents intermittent sque lching when th e
receive signal strength is near the threshold level.
The output of U123C is applied to U123D and
Logic Squelch to Audio/Data Gate U159B and audio/
data processor U111. Gate U159B routes the squelch
output to th e Audio/Data Test Point J100. U123D
functions as a timing buffer. The output of U123D is
applied to Receive Squelch Active Gate U113D.
When this gate is closed, the squelch circuit controls
Normal Receive Gate U113B to block receive audio if
no signal is present.
6.10.5 RECEIVE DATA CIRCUITRY
The receive wide band audio signal is the unfiltered output of discriminator U202 in the Receiver.
Therefore, this signal contains audio, LTR data, and
noise. A low-pass filter formed by U124A/B attenuates frequencies above 150 Hz by 24 dB per octave so
that only the data freque nci es are passed. From the filter the signal is fed to amplifier U125A. The gain of
U125A is adjusted by a level control. The output of
U125A can be routed through Data To Audio/Date
Gate U159C and the Audio/Data Test Point J100.
DC restoration circuit converts the data signal
from AC floating near ground to a digital signal at levels of 0 and 4.5V. U125B/C provide the reference
voltage on the inverting input of comparator U125D.
Positive peak detector U125B handles the positivegoing peaks of the data s ignal. Negati ve peak de tect or
U125C handles the negative-going peaks of the data
signal.
The voltage on non-inverting input to U125D is
midway between the positive- and negative-going
peaks. The data input is on the non-inverting input of
U125D. When the data signal rises above the reference voltage, the output goes high. Conversely, when
the input voltage drops below the reference voltage,
the output goes low. The receive data is then passed to
audio/data processor U111.
6.10.6 RECEIVE AUDIO PROCESSING
The receive audio signal is fed into the MAC on
P100, pin 27. When a mobile-to-mobile call is
received, Repeat Gate U153C is enabled and the
receive audio signal is routed through T ran smit Option
Gate U158C to the input of the transmit audio buffer
U164B to be retransmitted. Repeat Gate U153C is
controlled by processor U111 through latch U107. A
logic 1 on the control input causes the signal to be
passed.
6-33
August 2000
Part No. 001-2001-200
CIRCUIT DESCRIPTION
When the received audio must be routed to the
backplane (i.e. for other cards), Receive Voice Gate
U115B is enabled by processor U111/latch U108 and
passes the audio signal to amplifier U120B. Receive
To Backplane (RX TO BP) U115C is enabled and
passes the amplified audio to the backplane.
When the audio received must be routed to the
external speaker or speaker/microphone, Local Audio
Mute Gate U114D is enabled by U111/latch U108.
The audio is passed to local audio output amplifier
U132. The gain of U132 is adjusted by the local audio
volume control and on/off switch.
6.10.7 VOTER AUDIO
When used, the Receive audio from the voter
receiver comes into t he MAC on P10 0, pi n 25 . Ampli fier U120A sets the gai n of t he si gnal and the output is
routed to Voter Audio Mute Gate U115A. The gate is
controlled by A/D processor U111/latch U108. If the
gate is enabled, the audio goes to the Receive Mute
Gate U113C and passes throughout the MAC Card.
6.10.8 COMPANDOR OPTION
microphone PTT switch is pressed. This prevents
interference if the microphone remains live when the
PTT switch is pressed.
Buffer U164B combines the microphone audio
signal from U164A with the audio signal from the
Repeat Gate U153C.
U127B/C form a high-pass filter that attenuates
frequencies belo w 300 Hz t o pr event interference wit h
the LTR data applied at U129B. Pre-emphasis at 6 dB
per octave is provided by an RC combination before
the signal is fed to the Limiter U127D.
Limiter U127D and rectifiers form a precision
limiter which prevents over modulation caused by
high-level input si gnal s. With normal input levels, the
output of a bridge rectifier follows the input of the
bridge. When a high-level signal is applied to the
bridge, the bridge op ens and t he output of the b ridge is
limited to a specific level.
The output of the limiter passes to a composite 6pole splatt er filter formed by U127A , U128D and
U128A separated by buffers U128B and U128C.
The compandor option enhances the receive and
transmit audio when use d in conjunction with th e Telephone Interface Card (TIC) in LTR systems.
The filtered Receive Audio passes through the
Receive Mute Gate U113C to the expander input on
A301, pin 1. The expand output of A301, pin 2 is coupled to the audio outputs by U114C.
The TX-VOICE from P100, pin 32, passes
through TX Voice Gate U158A to the expander input
on A301, pin 5. The compressed output of A301, pin
4 is passed to the TX Audio Buffer.
6.10.9 TRANSMIT AUDIO
PTT switch (Q101/Q102) provides local microphone Push-To-Talk (PTT) indication to U105. U105
then tells U111 via the data bus that the local microphone PTT has been activated.
U164A amplifies the microphone audio signal to
provide the correct input level to U164B. Local
Microphone Mute Gate U117C is controlled by A/D
processor U111/latch 106. The function of U117C is
to mute the local microphone audio when the local
August 2000
Part No. 001-2001-200
The output from U128A is fed to Normal Modulation Mute Gate U118B that is controlled by A/D processor U111/latch U106. When enabled, the gate
passes transmit audio to EEPOT U149. U149 is an
electronically ad just able pot entio meter th at ad justs the
gain of transmit audio amplifier U129C. The gain of
U129C can only be adjusted through the software.
Therefore, a computer must be attached to the MAC
card when levels are set.
The output of U129C is fe d to s umming ampli fier
U129B where it is combined with LTR transmit data
and CWID when present. The gain of audio and data
are the same so unity gain is produced. The output
signal is fed to the TCXO where it frequency modulates the tra nsmit signal.
6.10.10 TRANSMIT AUDIO PROCESSING
Transmit voic e from t he backpl ane comes into t he
MAC on P100, pin 32. When used this signal passes
to the transmit voice amplifier U130A. The output
level of the amplifier is a djusted by a level control.
The output of U130A is applied to another transmit
voice amplifier U130B and Transmit Voice Gate
U158A. U158A is controlled by A/D processor U111/
6-34
CIRCUIT DESCRIPTION
latch U107. When enabled, the gate passes the voice
to Transmit Option Gate U158C and on to the transmit
audio buffer U164B. T rans mit Voice amplifier U130B
is adjusted by a level control. The output is fed to
Transmit Net Gate U153B. Gate U153B is controlled
by A/D processor U111/latch U155.
6.10.11 TRANSMIT DATA AND CWID PROCESSING
The data signal is produced by A/D processor
U111 on Transmit Data and Transmit Shape outputs.
The transmit shape output is normally the opposite
logic level of the transm it data outpu t when data is
transmitted. However, the bit before a logic transition
occurs, the transmit shape output is the same logi c
level as the transmit data output. This results in a
logic 1 level that is slightly higher and a logic 0 that is
slightly lower. This pulse shaping minimizes interference between data bits when the data is filtered by the
low-pass filter.
The data from U111 is fed to buffer U126A and
Transmit Data Enable Gate U117B. Gate U117B is
controlled by A/D processor U111 directly. When
enabled this gate passes the data to EEPOT U151.
U151 is an electronically adjustable potentiometer that
adjusts the gain of transmit audio amplifier U126B.
The gain of U126B can only be adjusted through the
software. Therefore, a computer must be attached to
the MAC card. U126B provides the required signal
level at the output of the low-pass filter. A relatively
stable DC bias voltage for U126C/D is required
because these stages are DC coupled to the transmit
TCXO (see Section 6.2.3) and changes in bias voltage
can cause fluctuations in the transmit frequency.
U126C/D fo rm a low-pass filter that attenuates
square-wave harmonics in the data signal above 150
Hz to prevent interference with the audio band. From
this filter th e signal is fed to summing amplifier
U129B and combined with the transmit audio sign al.
The output of U129B is fed to Transmit Modulation
Mute Gate U118D. This gate is controlled by A/D
processor U111/latch U106. When enabled, transmit
audio and data are passed to the Exciter modulation
input and the transmit TCXO.
U111/latch U106. When enabled, this gate passes the
modulation on pin 11 to the summing amplifier
U129B and gate U118D to the modulation in put of the
Exciter.
The repeater on the lowest frequency channel in
each system must periodically transmit the station call
letters as a continuous-wave identification encoded by
Morse Code. This identification is programmed with
the Edit Parameters software.
The CWID output is control led by A/D pr ocessor
U111/latch U107. This output is fed to CWID tone
generator U100B/A and turns the tone generator on
and off to create the Morse Code. From the tone generator the signal is fed to bandpas s fil t er U129A. This
filter passes the 800 Hz fund ament al present in the signal. The output of the filter is jumpered by P106 on
J106, pins 2/3 and P107 on J106, pins 4/5 to the summing amplifier and applied to gate U118D, and to the
modulation input of the Exciter.
The input and output c onne ct ors for the MAC are
defined as follows.
6.10.12 P101 SIGNALING CONNECTOR
The signal interface connector P101 (64 pin) connects the Address and Data buses and control lines to
the backplane connector. See Figures 6-18 and 6-19.
Pins 1-10ADDRESS BUS
Pins 33-42
This provides a path between the MPC main processor and the processor and memory of the MAC.
This bus retrieves inform ation program med into memory for the operation of the MAC.
Pins 11-14DATA BUS
Pins 43-46
This data bus provides a means of transferring
data to and from the processor on the MAC with
peripheral devices in the MAC.
Pin 15MREQ
When needed the External Modulation input on
P100, pin 11 is fed to External Modulation Mute Gate
U118C. Gate U118C is controlled by A/D processor
A memory request line operates in conjunction
with the Read/Write lines. These provide the ability to
read from or w rite to the processor memory.
August 2000
6-35
Part No. 001-2001-200
CIRCUIT DESCRIPTION
Pin 16MSTB
The memory strobe line is used for MAC proces-
sor Read/Write operations to external memory.
Pins 17-20UNUSED
Pin 21LPTT
The Logic Push-To-Talk is not used.
Pins 22-23UNUSED
Pins 24/56HSDB +/-
The High Speed Data Bus interconnects the
Viking VX repeaters. A 50 ohm termination is
required if Viking VX repeaters are used with existing
repeaters and the interface.
Pins 25/57IRDB +/-
This data bus interconnects all repeaters to provide an exchange of programming information with
the programming software and computer. This data
bus allows all repeaters to be accessed without having
to connect the computer to the MPC on each repeater
individually.
Pin 26TLA DB
Pins 31-32GROUND
Pins 63-64
This is the ground connection to the MPC from
the power supply via the Controller backplane.
Pin 47READ
Read is used with the MREQ line to read data
from the processor and ex ternal memory.
Pin 48WRITE
Write is used with the MREQ line to writ e data to
the processor and external memory.
Pins 49-55 UNUSED
Pin 58VOTER DATA IN
This is used in a Voter system. Data from the
voter site is injected at this pin.
6.10.13 P100 EXTERNAL OUTPUTS
Connector P100 contains the audio and data outputs to the terminal block on the back of the Repeater
cabinet. These outp uts are connected to ot her ext er nal
devices. The input and output connectors for the connector are defined as follows.
The Trunk Line Accounting Data Bus is used for
telephone in terconnect calls.
Pins 27/59-5V IN
This is the -5V input to the MPC from the power
supply via the Controller backplane.
Pins 28-29+5V IN
Pins 60-61
This is the +5V input to the MPC from the power
supply via the Controller backplane.
Pins 30/62+15V IN
This is the +15V input to the MPC from the
power supply via the Controller backplane.
August 2000
Part No. 001-2001-200
Pins 1-6UNUSED
Pin 73.5V
This is the 3.5V DC TCXO reference voltage
from the Exciter to the MAC.
Pin 8TX DATA OUT
This output contains trunking sign al ing data and
CWID data when enabled at jumper J106 and used
with external optional equipment.
Pin 9TX DATA IN
This input would normally contain trunking signaling data, CWID data, and an externally summed in
signal. This input is enabled at J106 and is used with
external optional equipment.
6-36
CIRCUIT DESCRIPTION
Pin 10EXT REQ1
This input provides for external requests from
optional equipment.
Pin 11EXT MOD
This input provides for external wide band modulation of the Exciter with out any filtering. This input
is not used at this time.
Pins 13-26 UNUSED
Pin 27RX WB AUDIO
The Receive W ide Band Audi o from the Rece iver
audio demodulator through the RF Interface Board.
The typical amplitude is 387 mV RMS
(-6 dBm) and 2V DC with Standard TIA Test Modulation into the receiver.
Pin 28A D LEVEL
6.10.15 J101 SPEAKER/MICROPHONE
This jack is used in con junct ion wit h J102 when a
combination speaker/microphone is used during setup
and testing of the repeater.
6.10.16 J102 LOCAL MICROPHONE
This jack is used for a microphone to key the
Exciter and inject transmit audio.
6.10.17 J103 GROUND
This jack provides a ground connection for the
MAC when monitoring the test points.
6.10.18 J104 EXTERNAL SPEAKER
This provides an external speaker connection at
the repeater site for monitoring.
6.10.19 J105 WATCH DOG
This is the Audio/Data Level output.
Pin 29TX MOD
The output of this pin is produced by audio and
data inputs to the Repeater to produce the signals on
this pin. This signal goes through the RFIB and then
to the Excite r.
Pin 30UNUSED
Pin 31RX VOICE
This is receive audio output connected to the
backplane.
Pin 32TX VOICE
This is transmit audio input connected to the
repeat gate.
6.10.14 J100 A D LEVEL TEST POINT
J105 enables or disables the watchdog timer for
reset. Normal operating mode is P105 jumpering
J105, pins 2/3. Do not move or remove this jumper.
6.10.20 J106 TX DATA PATH
Jumpers P106/P107 connect J106, pins 1-2 and 34 for external options that need the Tx Data signal.
Normal operation connects J106, pins 2-3 and 4-5.
6.10.21 A301 COMPANDOR CONNECTIONS
EP101Expand In
EP102Expand Out
EP103Ground
EP104Compress Out
EP105Compress IN
EP106+5V
This test point located on the front card edge is
used during alignment to monitor audio and data.
6-37
August 2000
Part No. 001-2001-200
CIRCUIT DESCRIPTION
6.11 INTERFACE ALARM CARD
This card utilizes the information required to
operate the alarms designated in the programming of
the repeater. Data is received on the address bus from
the MPC for the; operation to perform, the processor
and external memory, open and close relays on the
outputs, and receive alarm indications on the inputs.
This information is either rout ed to ext ernal devices or
alarm outputs can be wir ed t o al ar m i npu ts (see Figure
4-10).
The Interface Alarm Card (IAC) contains 4-input
contacts and 4-output contacts. The 4-inputs can be
disabled, energized or de-energized. The 4-output
relays are dry contacts that have a 2A rating and can
be either normally open or normally closed.
The electromechanical relay outputs are comprised of eight SPDT (normally open) relays. The
relays are all open at power-on. Data to the relay is
latched by a write to the base address.
The IAC acti vates relays when alarm trigger
events occ ur. The IAC monitors fo r alarm activity in
the system and can set the various output relays as
defined by the user during programming. When an
external alarm i s set i t can be moni tore d from a remot e
location. Refer to Section 4.3.3 for alarm
programming.
The isolated inputs are dr iven by eit her AC or DC
signals. The active high inputs can be set by switches
to be polarity sensitive, non-polarity sensitive or add a
resistance in series to dissipate unused power (see Figure 6-15).
The active low inputs can also be set for either
+5V or +15V operation when a ground closure is
required to provide an active alarm.
3+
+
N
4
Q2
E
SQ E
7
TR
1
X
E
50
-
3
-
4
IN
COM
SYNC
+
3
4+
OUT
3
D
5
TX
M
O
C
COM 54
COM
5
5
I/0 13
25
IN
CE
I
D
TX
RX VO
ND
OICE
V
BA
TX
6
W
M
RX
OM
C
3-
2
ALARM IN
-
4
1
1
4
C
IA
EXTOU
1
T
COM 49
M
O
C
ALARM OUT
26
Figure 6-13 4 I/O J1 ALARM OUTPUTS
6.11.1 RELAY OUTPUTS
The alarm relay outputs are provided via a terminal block on the back of the repeater (see Figures 6-13
and 6-14).
The alarm outputs are on the termi nal bl ock at th e
rear of the repeater.
6.11.2 ISOLATED INPUTS
The isolated alarm inputs are provided via a terminal block on the back of the repeater (see Figures 613 and 6-14).
August 2000
Part No. 001-2001-200
6-38
1
2
+
N
I
1
2 IN +
UT +
O
1
L
FAI
C
A
N -
I
1
J2
2 IN -
1 OUT -
2 OUT -
A
L
A
34
R
M
S
Figure 6-14 4 I/O J2 ALARM OUTPUTS
2 OUT +
33
CIRCUIT DESCRIPTION
Standard 12V/24V AC control transformer outputs can be accepted as well as DC voltages. This
input voltage range is 5-24V RMS. External resistors
connected in series may be used to extend the input
voltage range.
ALARM +
ALARM -
P500
+15V
ON
1
8+5V
2
7
3
6
45
+5V
Figure 6-15 S500-S503
6.11.3 ALARM INDICATORS
There are three forms of alarm indica tors from
the repeater. One form is the two red LEDs and display combination on the MPC. Refer to Table 1-2 for
the combinations and definitions of the active alarms.
1 is fed back to the input alarm 1 of Repeater 1. Then
the RF Shutdown alarm (#32) is ma pped for alar m 1 in
each repeater. This configuration allows Repeater 2 to
give an alarm when Repeater 1 has an RF Shutdown
alarm output, etc.
The input alarms are given a 15-character
description during programming and a Transmit ID.
These are used when an input alarm is activated to
send a Morse code message consisting of the description over the air to a monitoring transceiver programmed with this ID.
There are 40 internal alarms that can be included
in the output alarm configuration (see Table 1-2).
These alarms can also be programmed to send an output as shown in the cross refe re nce scre en of the al arm
configuration menu (see Figure 4-10). Among these
alarms are the thermal sense from the PA and the AC
fail alarm output on the terminal block at the rear of
the repeater to activate the battery backup.
Another form is the output relay to the terminal
blocks at the rear of the repeater where outputs can be
wired to external devices or to alarm inputs.
The third form is the output relay and to transmit
a 15-character description of the alarm over-the-air to
a remote location. The description is sent in Morse
code with a transmit I D assigned during p rogramming.
A transceiver program med with this ID can monito r
the repeater and aler t the sys te m own er wh en an al arm
occurs.
6.11.4 ALARM FUNCTIONS
The alarms can be configured in various mode s to
alert the system owner to conditions and hazards with
the equipme nt and the repeater site facility. A few of
the possibilities are shown in Figure 6-16. In this
example the input alarm 2 of Repeater 1 is connected
to the door of the bui lding , inp ut alarm 3 of Repeate r 5
is connected to the fire alarm system, the AC fail
alarm (#16 see Table 1-2) is mapped to alarm 2 output
so it can be transmitted (see Figure 4-10) and the output alarm 1 of Repeater 1 is connected to the input
alarm 1 of Repeater 2 and so on until the output alarm
TRANSCEIVER
AC FAIL
DOOR OPEN
REPEATER 1
REPEATER 2
REPEATER 3
REPEATER 4
REPEATER 5
SENSOR ACTIVE
ALARM 2 IN
ALARM 1 IN
ALARM 1 OUT
ALARM 1 IN
ALARM 1 OU T
ALARM 1 IN
ALARM 1 OU T
ALARM 1 IN
ALARM 1 OU T
ALARM 1 IN
ALARM 1 OU T
ALARM 3 IN
Figure 6-16 ALARM EXAMPLE
SECURITY DOOR
SMOKE
DETECTOR
6-39
August 2000
Part No. 001-2001-200
CIRCUIT DESCRIPTION
6.11.5 P500 SIGNALING CONNECTOR
The input and output connectors for the IAC are
defined as follows. The signal interface connector
P500 (64 pin) connects the Address and Data buses
and control lines to the backplane connector. See Figure 6-20.
Pins 1-4ADDRESS BUS (A12-A19 Only)
Pins 33-36
This address bus provides a path between the
MPC main proc essor and the latches and multiplexers
of the IAC. This bus retrieves information programmed into the MPC memory for the operation of
the IAC.
Pins 5/37ALARM 1 IN +/ALARM 1 IN -
This is an input received from a connection to an
external device as a specific alert condition.
Pins 6/38ALARM 2 IN +/ALARM 2 IN -
This is an input received from a connection to an
external device as a specific alert condition.
Pins 11-14DATA BUS
Pins 43-46
This data bus provides a means of transferring
data to and from the latches and multiplexers on the
IAC with peripheral devi ces in the IAC.
Pin 15MREQ
A memory request line operates in conjunction
with the Read/Write lines. These lines read from or
write to the MPC processor memory.
Pins 16/17UNUSED
Pin 18SYNC IN
This is an input received from a connection to an
external device.
Pins 19/51ALARM 1 OUT +/ALARM 1 OUT -
This is an output to an external device to perfo rm
a specific function.
Pins 20/52ALARM 2 OUT +/ALARM 2 OUT -
Pins 7/39ALARM 3 IN +/ALARM 3 IN -
This is an input received from a connection to an
external device as a specific condition.
Pins 8/40ALARM 4 IN +/ALARM 4 IN -
This is an input received from a connection to an
external device as a specific alert condition.
Pin 9SQUELCH ENABLE
This is an output to rear connector J1. It can be
configured for inverted output, non-inverted output or
logic controlled non-inverted output.
Pin 10EXTERNAL REQ 2
This is an input received from a connection to an
external device.
This is an output to an external device to perfo rm
a specific function.
Pins 21-23UNUSED
Pins 24/25+15V ACCESSORY
This DC supply is an output to an ext ernal device
through rear connector J1.
Pins 26/58+15V FILTERED
This DC supply is an output to an ext ernal device
through rear connector J1.
Pins 27/59-5V IN
This is the -5V input from the power supply via
the Controller backplane.
August 2000
Part No. 001-2001-200
6-40
CIRCUIT DESCRIPTION
Pins 28-29+5V IN
Pins 60-61
This is the +5V input to the MPC from the power
supply via the Controller backplane.
Pins 30/62 +15V IN
This is the +15V input to the MPC from the
power supply via the Controller backplane.
Pins 31-32 GROUND
Pins 63-64
This is the ground connection to the MPC from
the power supply via the Controller backplane.
Pins 41-42 UNUSED
Pin 47READ
Read is used with the MREQ line to read data
from the MPC processor and external memory.
6.11.6 P501 EXTERNAL OUTPUTS
Connector P501 contains data and cont rol output s
to the terminal block on the back of the Repeater cabinet. These outputs are connected to other external
devices.
The input and outp ut connec tors for the conn ector
are defined as follows.
Pins 1/17ALARM 3 OUT +/ALARM 3 OUT -
Pins 2/18ALARM 4 OUT +/ALARM 4 OUT -
These are outputs to exter nal device s to perform a
specific function.
Pin 3RX WBAND
Receive Wide Band Audio from the Receiver
audio demodulator through the RF Interface Board.
The typical amplitude is 387 mV RMS (-6 dBm) and
2V DC with Standard TIA Test Modulation into the
receiver.
Pins 4-6UNUSED
Pin 48WRITE
Write is used with the MREQ line to write data to
the MPC processor and external memory.
Pins 49-50 UNUSED
Pins 53-55 UNUSED
Pin 56THERMAL SENSOR
The Therma l Sensor monitors the PA temperature and creates an alarm condition if the temperature
exceeds the limit.
Pin 57POWER SWITCH
Pin 57 turns the v olt ag e f rom t he power supply to
the Repeater on and off. This pin is connected to the
on/off toggle switch S508.
Pin 7EXT OUT 1
This is an external output to rear connector J1.
Pin 8RF CLOCK
The clock will control the synthesizer chips and
power control circ uit when loa ding. This pin is a TTL
input from the Controller.
Pin 9AC FAIL IN
This input from the AC supply is used by the AC
fail output to indicate that the AC has been
interrupted.
Pin 10SYN CS RX
This is the chip select pin for the main receiver
synthesizer chip. This chip is the same part as used in
the Exciter. A low loads the synthesizer.
6-41
August 2000
Part No. 001-2001-200
CIRCUIT DESCRIPTION
Pin 11UNUSED
Pin 12RF MUX 1 INH
The Multiplexer-1 Inhibit (U105, pin 6) is a
CMOS input from the Controller that inhibits (disables) the Multiplexer-1 output with a logic high.
Pin 13RF MUX 2 INH
The Multiplexer-2 Inhibit (U106, pin 6) is a
CMOS input from the Controller that inhibits (disables) the Multiplexer-2 output with a logic high.
Pin 14RF MUX 3 INH
The Multiplexer-3 Inhibit (U104, pin 6) is a
CMOS input from the Controller that inhibits (disables) the output from the RF 3 Multiplexer with a
logic high.
Pin 15PC STR
The Power Control Strobe is normally low until
after the po wer control data is shifted into the power
control register. Then the strobe line goes high and
back to low. The clock or data lines cannot be
changed until after the strobe is set.
Pin 16HS CS EX
This is the Exciter high stability synthesizer chip
select. A low enables loading the high stability synthesizer loop. This pin is only used on high stability
equipped units.
Pins 19-21UNUSED
Pin 22BUF RX WBAND
Pin 23AC FAIL OUT
This is an indication tha t the AC power has been
interrupted.
Pin 24UNUSED
Pin 25HS CS RX
This is the receiver hig h stabil ity synt hesi zer ch ip
select. A low enables loading the high stability synthesizer loop. This pin is only used on high stability
equipped units.
Pin 26SYN CS EX
Pin 26 is the exciter main Synt hesizer Chip Se lect
that allows input of data to U403 when the line is
pulled to logic low.
Pin 27UNUSED
Pin 28A D LEVEL
20 lines (of the possible 24) of RF functions sampled are multiplexed to the Controller through this pin
using three multiplex chips.
Pin 29RF DATA A
Data A (U105, pin 11) is the least significant bit
(LSB) in the 3 multiplex chips located on the RFIB.
This pin is a CMOS input from the Controller requiring a logic high for activation.
Pin 30RF DATA B
Data B (U105, pin 10) is the middle significant
bit in the 3 multiplex chips located on the RFIB. This
pin is a CMOS input from the Controller requiring a
logic high for activation.
This is buffered Receive Wide Band Audio from
the receiver audio demodulator through the RF Interface Board. The typical amplitude is 387 mV RMS (6 dBm) and 5V DC with Standard TIA Test Modulation into the receiver. This is an output to t he rear connector J1.
August 2000
Part No. 001-2001-200
Pin 31RF DATA C
Data C (U105, pin 9) is the most significant bit
(MSB) in the 3 multiplex ch ips located on the RFIB.
This pin is a CMOS input from the Controller requiring a logic high for activation.
6-42
CIRCUIT DESCRIPTION
Pin 32RF DATA
This is a data pin with TTL levels from the Controller which has the dual role of loading the synthesizer chips and adjusting the power control D/A lines
for proper output power. Up to four synthesizer chips
and a shift-register could be connected to this pin.
6.11.7 J500 A D LEVEL TEST POINT
20 lines (of the possible 24) of RF functions sampled are multiplexed to the Controller through this pin
using three multiplex chips.
6.11.8 J501 GROUND
J501 is an IAC ground reference for test points.
6.11.9 J502 +15V
J502 is a voltage test point.
6.11.10 POWER SWITCH
S508 turns the power supply DC voltage on and
off from the front of the IAC.
6.11.11 J505 SQUELCH ENABLE OUTPUT
P505 jumpers J505, pins 1/2 to configure the
squelch enable output for an inverted output. P505
jumpers J505, pins 2/3 t o co nfi gur e t he squelch enable
output for a non-inverted output. P505 jumpers J505,
pins 3/4 to configure the squelch enable output for a
non-inverted output under the control of U503.
6-43
August 2000
Part No. 001-2001-200
CIRCUIT DESCRIPTION
August 2000
Part No. 001-2001-200
6-44
A0-A19
LPTT
IRDB-
RIDB+
SWITCH TxD
SWITCH RxD
READ
WRITE
MREQ
DS1
+5V
U6B
READ
WRITE
LED DRIVER
U15
DISPLAY DRIVER
U26
BALANCED Rx/Tx
U24
U20CU6A
ADDRESS BUS (19:0)
MAIN MICROPROCESSOR
PO0
PO1
PO2
PO3
PO4
PO5
A
B
C
D
DE
D
R
DMARQ0
DMAAKO
TC0
DMARQ1
INT POLL
TxD1
RxD1
TxD0
RxD0
R/W
MREQ
PT2
A0-A19
READY
U27
RESET
READY
INTP0 INTP1 MSTB
T OUT
D0-D7
PT1
PT0
PO6
T OUT
X1
X2
U30A/U31A
Y1
10 MHz
Q2/Q3
U11
RST1
U17
RES IN
RST2
FLASH
EPROM
+5V
RESET
S1
FLASH MEMORY
A0-A16
U25
Vpp
OE WE Vpp CE
DQ0-DQ7
DATA BUS (7:0)
A16
A17
A18
A19
U20BU20A
A13
A14
A15
A0-A14
D0-D7
A
B
C
D
O14
O15
A
B
C
Y2
EPROM
U18
G
O0
U5
O13
G2B
U4
Y0
O11
E
W
RAM
A0-A12
D0-D7
U28
CE
DEWE
Y1
READ
WRITE
MSTB
UART
RxRDY
TxE
D0-D7D0-D7
MODEM DCD 4
COMPUTER Tx 2
COMPUTER Rx 3
U2
Y3
J1
U16F
U16D
U16C
MPC
1
CP
U21
RESET
PROGRAMMING PORT
BAUD RATE
9600
4800
2400
1200
J3
2
4
6
8
10
12
14
76800
38400
19200
1
3
5
7
9
11
13
RxD
TxD
CLOCK
TxC
RxC
U32B
OE
Y0-Y3
U31
OE
U32A
Y0-Y3
U30
RD WR
U22
U2F
RST
U20DU6C
TX FIFO
MR DIR S1
U9
DOR SO
CS
RST P1-1 P3-7 P3-6
D0-D7
U13
A8-A15
HSDB -
HSDB +
U2F/U31B
DE
B
U23
A
R
U16B
DE
P1-3
P3-1
P3-0
HIGH-SPEED DATA BUS
MICROPROCESSOR
PROCESSOR TO PROCESSOR COMMUNICATION FIFOs
A0-A7D0-D7
DE
ADDRESS BUS (7:0)
U2BU6D
ADDRESS
SELECT
P1-0
P1-2
PSEN
ALE
A13
A14
A15
ADDRESS/DATA BUS (8:15)
Y1Y2
A
B
U3
CY0
A0-A7
*U1CS1
DOR SO
A0-A7
MR
DIR
U7BU2A
OE
WE
A8-A12
D0-D7
U2CU7A
DE
U10
S1
EEPROMRAM
A8-A13
D0-D7
A0-A7
U14
OE
ADDRESS BUS (7:0)
LOWER
ADDRESS LATCH
A0-A7D0-D7
U8
CEN
6-45
August 2000
Part No. 001-2001-200
MAIN PROCESSOR CARD BLOCK DIAGRAM
FIGURE 6-17
FOLDOUT
A0-A19
MREQ 15
MSTB 16
D0-D7
VOTER DATA IN 58
+15V 30
+15V 62
P101
Z102
A16-A19
TX FIFO
S1
D0-D7
ADDRESS LATCHES
A-D
U103
D1G1
U101E
DIR
DE
S0
MR
U161
DOR
A0-A7
+9V REG
U136
A12-A15
A-D
G2
U154B
U101CU154D
U162D
U17-1
RESET
U133
Q3
U119
TX FIFO
Q4
Q5
Q6
Q7
Q8
Q9
RX FIFO
Q2
MPC LATCH
Q1
P100
EXT REQ
LOCAL MIC PTT
Q102
OC
D3
U105
D4
D1
AUDIO/DATA
MICROPROCESSOR
P3-7
P1-3
U111
P1-1P1-1
D0-D7
P3-0
RST
D0-D7
D2
P3-6
P1-0
P1-2
A8-A15
ALE
PSEN
P1-6
P1-7
P3-2
P3-3
P3-4U117B-8 TX DATA EN
A13
A14
A15
U159B-8 LOGIC SQUELCH
U125D-14 RX DATA
U126A-3 TX DATA
U126A-3 TX SHAPE
DATA BUS (7:0)
Y2
A
B
U102
C
ADDRESS SELECT
ACCRESS BUS (15:8)
Y1
ADDRESS/DATA BUS (7:0)
U154A
RX FIFO
U119U101D
LOWER ADDRESS LATCH
Q0-Q7
A0-A7
U104
C EN
DE
DOR
U160
A0-A7D0-D7
MR
DIR
S1
U101F
S0
D0-D7
A8-A14
EPROM
U112
OE
A0-A7
GATE LATCHES
D1-D8
CLK
D1-D8
CLK
D1-D8
CLK
D1-D8
CLK
D1-D8
CLK
U108
U107
U106
U156
U155
U115A VOTER AUDIO MUTE
U114D LOCAL AUDIO MUTE
U113C RX MUTE
U114A RX OPTION
U115B RX VOICE
U116B RX AUDIO
U115C RX VOICE TO BACKPLANE
U116A FSK TO AUDIO
U153C REPEAT
U153D TxS TO FSK
U116D TxA TO FSK
U159C DATA TO A D
U116C Tx AUDIO
U158A Tx VOICE
U153A DATA LEVEL TEST
U100B CWID CONTROL
U159A LEVEL DETECT
U158C Tx OPTION
U117C LOCAL MIC MUTE
U118C EXTERNAL MOD MUTE
U118B NORMAL MOD MUTE
U118D Tx MOD MUTE
U151-U149 INC
U151-U149 U/D
CS0
CS1
CS2
CS3
WO 125
CS5
CS6
WO 126
U153B Tx NET
U115D Rx NET
CS10
CS11
U149 CS12
WO 127
U151 CS14
CS15
August 2000
Part No. 001-2001-200
U117A Tx INTERCOM
U157
D1-D8
CLK
U113D Rx SQ ACTIVE
U159B LOGIC SQ A D
U159D Tx MOD A D
U113B NORMAL Rx
WO 118
WO 117
WO 116
MAIN AUDIO CARD LOGIC BLOCK DIAGRAM
FIGURE 6-18
6-46
Rx VOICE
GATE
U114D
LOCAL AUDIO
OUTPUT AMPLIFIER
U132
J104
EXTERNAL SPEAKER
VOTER AUDIO 25
Rx WB AUDIO 27
TxS - 4
SECONDARY AUDIO
FROM SWITCH
TxS + 3
P100
LOW-PASS FILTER
U163B
HIGH-PASS FILTER
> 30 kHz
U135A
Rx DATA
FILTER
U124A/B
VOTER AUDIO
AMPLIFIER
U120A
< 3 kHz
U121A/B
AMPLIFIER
U135B
Rx DATA
AMPLIFIER
U125A
U131C
NOISE
VOTER AUDIO
U115A
Rx AUDIO
AMPLIFIER
U122A
+1.25V
U123AU123B
Tx AUDIO
AMPLIFIER
U131D
MUTE
U108
DC
RESTORATION
U125B/C
HIGH-PASS FILTER
U122B/C/D
NOISE
RECTIFIER
U125D
TxS TO FSK
GATE
U153D
U107
> 300 Hz
DATA LEVEL
TEST GATE
U153A
SCHMITT
TRIGGER
U123C
U111 Rx DATA
DE-EMPHASIS
U163A
TIMING BUFFER
U123D
LOGIC SQ A-D
U159B
GATE
U157
U157
U157
NORMAL RX
GATE
U113B
U113D
Rx ACTIVE
GATE
DA TA TO A-D
GATE
U159C
U107
RX MUTE
GATE
U113C
U108
RX OPTION
U114A
U114B
RX OPTION
A301
COMPANDING
OPTION
GATE
U108
U114C
U108
Rx VOICE
GATE
VOICE
AMPLIFIER
U115BU120B
U108
REPEAT
GATE
Rx NET
GATE
U115D
U153C
U155
U107
RX AUDIO
GATE
U116B
U108
Rx VOICE
TO BACKPLANE
U115C
FSK AMPLIFIER
U165B
FSK TO AUDIO
GATE
U116B
U108
GATE
U108
MAIN AUDIO
AMPLIFIER
U166A
SECONDARY
AUDIO AMPLIFIER
U131A
FSK AMPLIFIER
U165A
TxD
Tx OUTTxD
U109
RxD
U110
Rx IN
BUFFER
U166B
BUFFER
U131B
U162C
U162B
J101
P101
23 SWITCH Tx DATA
22 SWITCH Rx DATA
SPEAKER/MIC
RS-232
P100
31 Rx VOICE
14 Rx AUDIO -
13 Rx AUDIO +
2 RxS -
1 RxS +
MAIN AUDIO
TO SWITCH
SECONDARY AUDIO
TO SWITCH
TxA + 15
MAIN AUDIO
FROM SWITCH
TxA - 16
Tx VOICE 32
Tx AUDIO
AMPLIFIER
U167A
HIGH PASS FITLER
U167B/C
Tx VOICE
AMPLIFIER
U130A
U167D
TxA TO FSK
Tx VOICE
AMPLIFIER
U130B
Tx VOICE
GATE
U158A
U107
GATE
U116D
U107
U107
Tx AUDIO
GATE
U116C
U107
Tx NET
GATE
U153B
U155
LOCAL MIC PTT
J102
Tx OPTION
LOCAL MIC MUTE
U164A
Q101Q102
Tx OPTION
GATE
U158C
U158D
U158B
Tx OPTION
GATE
Tx INTERCOM
GATE
U117A
U157
GATE
U117C
U106
U106
Tx AUDIO
BUFFER
U164B
U105 LOCAL MIC PTT
LEVEL DETECT
GATE
U159A
U106
HIGH-PASS FILTER
> 300 Hz
U127B/C
LIMITER
U127D
Tx MOD A D
GATE
U159D
U157
SPLATTER FILTER
LPF
U127A
BUFFERS
U128B/C
Tx SHAPE U111
Tx DATA U111
LPF
U128D/A
U126A
U106 INC
U106 U/D
NORMAL MOD MUTE
GATE
U118B
U106
U106 INC
U106 U/D
Tx DATA ENABLE
GATE
U117B
U111
Tx AUDIO AMPLIFIER
U149
U129C
Tx DATA AMPLIFIER
U151
U126B
U155 CS12
U155 CS14
Tx DATA FILTER
U126C
CWID TONE
GENERATOR
CWID FILTER
U100B/AU129A
U126D
P106
P107
J106
SUMMING
AMPLIFIER
U129B
J100
A-D LEVEL
TEST POINT
Tx MOD MUTE
GATE
U118D
U106
EXTERNAL MOD MUTE
GATE
U118C
U106
28 A-D LEVEL
8 TxD OUT
9 TxD IN
29 Tx MOD
6-47
August 2000
Part No. 001-2001-200
MAIN AUDIO CARD AUDIO BLOCK DIAGRAM
FIGURE 6-19
FOLDOUT
DO-D7
A13-A19
THERMAL
SENSOR
READ
WRITE
P500
ALARM 2 OUT
ALARM 1 OUT
DATA BUS (7:0)
IAC ADDRESSINGLED CONTROL
A16
A17
A18
A19
A13
A14
A15
+
+
A
B
U501
C
D
Q3
G1
A
B
C
G2MREQ
RD
WR
-
-
U500
O6
Q1
U506
K501
K500
O3
O2
O5
O7
O4
O1
INTR
D0-D7
V IN+
Q501
Q500
D0-D7
CLK
U518
Q4Q7
RSSI O
U519
IFA IN
CLK
D1-D8
Q2
Q1
U503
Q0
Q1
Q2
Q3
Q4
Q6
ANALOG LEVEL DETECTOR
Q5
Q6
Q3
Q4
Q7
+5V
U508
U507D
J500
U509AU509BU507B
U509CU507C
MISC INPUTS
Q1-Q8
U517
OC
D3
D2
D8
D1
U507A
Q502
Q503
RF INTERFACE
Q1
U505
CLK
CLK
U504
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q1
Q2
Q3
Q4
Q5
Q6
Q7
D0-D7
D0-D7
Q8
U508E
K502
K503
U514BU514A
P501
RF MUX 1 INH
RF MUX 2 INH
RF MUX 3 INH
PC STR
HS CS EX
STN CS EX
HS CS RX
STN CS RX
WO 1
AC FAIL IN
RF DATA A
RF DATA B
RF DATA C
RF DATA
RF CLK
AC FAIL OUT
WO 2
EXT REQ 1
A D LEVEL
+
ALARM 3 OUT
+
ALARM 4 OUT
BUF RX WBAND
RX WBAND
OC
U521
Q1-Q8
INVERTED
NON-INVERTED
U503 CONTROL
NON-INVERTED
D1
D2
D6
D3
D4
J505
ALARM INPUTS
U520
U510
U513C
U511
U513B
U512
Q505
Q504
CR507
CR506
CR509
CR508
CR511
CR510
CR513
CR512
S500
S501
S502
S503
+5V
+5V
+5V
+5V
+15V
+15V
+15V
+15V
P500
+
ALARM 1 IN
-
+
ALARM 2 IN
-
EXT REQ 2
J503
+
ALARM 3 IN
-
J504
+
ALARM 4 IN
-
SQUELCH EN
August 2000
Part No. 001-2001-200
INTERFACE ALARM CARD BLOCK DIAGRAM
FIGURE 6-20
6-48
ALIGNMENT AND TEST PROCEDURES
SECTION 7 ALIGNMENT AND TEST PROCEDURES
7.1 RECEIVER ALIGNMENT
C
R I T I C A L A D J U S T M E N T
The TCXO must be adjusted within 5 minutes of turning the AC power on to the repeater. Do not under
any circumstances try to set frequency later on in any
of the tests, as TCXO frequency stability cannot then
be guaranteed.
Refer to Figure 7-1 for component locations.
Refer to Figure 7-6 for equipment needed and setup
diagram. Select "RECEIVER" from the "TEST"
menu in the Repeater Software.
7.1.1 PRETEST
Preset L102, L103, L104, L108, L109, L110,
L140 and L141 tuning screws about 1/4 inch above
the top of the casting.
For 12.5 kHz operation, place jumper plugs
P203, P204 and P205 across pins 2-3 of J203, J204
and J205.
For 25 kHz operation, place jumper plugs P203,
P204 and P205 across pins 1-2 of J203, J204 and
J205.
7.1.2 VOLTAGE MEASUREMENTS
Apply power to the Receiver by plugging the 20pin cable from the RF Interface Board into J201 (see
Figure 7-1
).
Measure the voltages at the following pins.
U301, pin 3+6V DC ±0.3V
U302, pin 3+12V DC ±0.4V
U303, pin 3+12V DC ±0.4V
U304, pin 3+12V DC ±0.4V
R402/R403 junction +3.5V DC ±0.1V
1. Using the PC and software, program the Synthesizer for the Receive frequency.
2. Tune the VCO capacito r L102 f or +7V DC ±0.05V
at TP401.
Increase the receive frequency by 1 MHz.
The voltage on TP401 shall be less than 15V.
Decrease the receive frequency by 1 MHz.
The voltage on TP401 shall be greater than 2.5V.
3. Alternately tune CV151 and CV152 in 1/2-turn to
1-turn increments until a voltage is measured at
TP401. At that time, tune CV151 for a peak, then
CV152 for a peak.
4. Retune CV151/CV152 for a peak at TP401.
For Receivers ope rating within 2 MHz of the top of the
receive band (148-150 or 176-178 MHz).
1. Program the Synthesizer for the Highest receive frequency (i.e. 150 or 178 MHz).
2. Set the control line voltage for 15V at TP401.
Check 2 MHz below the programmed frequency
(i.e. 148 or 176 MHz) to verify that the control voltage at TP401 is greater than 2V. The repeater
receiver can now be programmed for the desired
operating frequency.
For Receivers operating wit hin 2 MHz of the bottom of
the receive band (132-134 or 150-152 MHz).
1. Program the Synthesiz er f or the Lowest receive frequency (i.e. 132 or 150 MHz).
2. Set the control line voltage for 2V at TP401.
Check 2 MHz above the programmed frequency
(i.e. 134 or 176 MHz) to verify that the control voltage at TP401 is less than 15V . The repeater receiver
can now be programmed for the desired operating
frequency.
7.1.3 PROGRAM TUNE-UP CHANNEL
For Receivers operating between:
132-150 MHz, 150-178 MHz.
NOTE: The Channel Frequency and Synthesizer Frequency appear at the bottom of the screen.
August 2000
7-1
Part No. 001-2001-200
ALIGNMENT AND TEST PROCEDURES
J201
2
1
J205
J204
U302
RV211
RV201
RV213
RV203
U202
RV202
Z216
Z214
U203
Z204
U201
L206
CV212
L204
Z202B
Z202A
Z212B
Z206
Z212A
Z205
Q211
Q201
20
19
U304
U204
RV212
Z215
U102
L216
CV212
L214
L213
CV211
Z211AZ211B
Z201A
Z201B
CV201
L203
Q204
Y201
FL201
CV152
L141
U101
L211
J203
L201
CV151
L140
CV106
L110
TP102
CV105
L109
FL102
U301
Q406
Q408
Q407
Q401
Q404
Q402
U303
Q134
CV104
L108
Q403
U401
Q405
Q410
Q133
Q101
Q102
TP401
Q409
Q411
Q132
Q131
CV103
L104
CV102
FL101
CV101
L103
L102
A201
Figure 7-1 RECEIVER ALIGNMENT POINTS
7.1.4 RECEIVER FREQUENCY ADJUST
1. Place a pick-up loop (sniffer) or RF probe connected to a frequency counter near TP102.
2. Set Y401 (TCXO) for the Injection Frequency
±50 Hz (Inj Freq = chnl freq + 52.95 MHz).
7.1.5 VCO TEST
1. The software programs the synthesizer for
1 MHz above the receive channel.
2. The voltage on TP401 should be < 10V.
3. Record the voltage on TP401 __________.
4. The software programs the synthesizer for
1 MHz below the receive channel.
5. The voltage on TP401 should be > 4V.
8. The software programs the synthesizer for the
receive frequency.
7.1.6 FRONT END ADJUSTMENTS
NOTE: Verify that the appropriate IF jumpe rs (J203,
J204, J205) are selected.
1. Set the signal generator to the receive frequency at
a level sufficient to produce an output voltage at
TP201 or J201, pin 7 (RSSI Output).
2. Tune CV101, CV102, CV1 03, CV104, CV105, and
CV106, then repeat, for a peak voltage at TP201.
Decrease the generator output level to maintain a
2-3V reading at TP201.
FOR 12.5 kHz CHANNELS:
NOTE: Perform this test if CV211 and CV212 are
placed on the board.
6. Record the voltage on TP401 __________.
7. If the voltages recorded in Steps 3 and 6 are not
within ±0.2V, tune L102 as required to balance the
voltage readings.
August 2000
Part No. 001-2001-200
1. Set the generator to an RF level sufficient to produce 2V DC at TP201.
2. Remove any modulation from the signal generator.
7-2
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