EDAN INSTRUMENTS V1102EDAN User Manual

Redpine Signals, Inc
.
S
9110-N-11-02 802.11bgn WLAN Module
R
VVeerrssiioonn 11..4488
Sep
tember 2011
2107 N. First Street, #680
n Jose, CA 95131.
Sa Tel: (408) 748-3385
Fax: (408) 705-2019
Email: info@redpinesignals.com
bsite: www.redpinesignals.com
We
Redpine Signals, Inc. Proprietary and Confidential
RS9110
-N-11-02
802.11bgn
WLAN
Module
Data Sheet
Version
1.48
Overview
h
e RS9110-N-11-02 module is a
T complete IEEE 802.11bgn Wi-Fi client device with an integrated MAC, Baseband processor, and RF transceiver with power amplifier. Based on the Redpine Signals RS9110-LI MAC/BBP chip, the module provides a complete end-to-end solution for low-power WLAN applications. It includes a multi­threaded processor and a rich set of peripheral interfaces. It can connect to a host processor through SDIO and SPI interfaces.
Applications:
VOIP handsets
Interactive remote control devices
Industrial automation and telemetry
MP3 music and MP4 video players
Digital cameras and camcorders
Device Features:
Conforms to IEEE 802.11b/g/e/i standards, single-stream 802.11 n
802.11n MAC features for high user throughput
802.11n Space Time Block Code (STBC) support for extended range and higher throughput
Host interface through SDIO and SPI
Bluetooth coexistence
Integrated multi-threaded processor
TCP checksum offloading
Rich set of peripherals – UART, SPI,
I2C, GPIO, and timers
2.4 GHz, 802.11n RF transceiver with high performance power amplifier
Complete WLAN software along with host driver for various operating systems such as Windows XP, Linux, Windows CE
Single supply 3.1 to 3.6 V operation
RS9110-N-11-02 System Block Diagram
T/R
Switch
Balun
3.3V
RF Transce iver
+
PA
Frequency Reference
RS9110-LI
Host Interface
EEPROM
RS9110-N-11-02
Periphe ral I/O
Red
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RS9110
-N-11-02
802.11bgn
WLAN
Module
Data Sheet
Version
1.48
a
of Contents
ble
T
1
Detailed Feature List ............................................................ 7
:
1.1: Host Interfaces...................................................................... 7
1.2: WLAN .................................................................................... 7
1.2.1: MAC .............................................................................................. 7
1.2.2: Baseband Processing.................................................................... 7
1.2.3: RF Transceiver.............................................................................. 7
1.3: Multi-Threaded Processor ...................................................... 7
1.4: Peripherals............................................................................ 8
1.5: Coexistence ........................................................................... 8
1.6: Software ............................................................................... 8
1.7: Compliance and Certification.................................................. 8
2: Package Description ............................................................. 9
2.1: Top View ............................................................................... 9
2.2: Bottom View.......................................................................... 9
2.3: Package Dimensions ............................................................ 10
2.4: Recommended Reflow Profile............................................... 11
2.5: Baking Instructions ............................................................. 11
3: Pin Description ................................................................... 12
3.1: Module Pinout...................................................................... 12
3.2: Pin Description .................................................................... 12
4: Electrical Characteristics .................................................... 19
4.1: Absolute Maximum Ratings.................................................. 19
4.2: Recommended Operating Conditions .................................... 19
4.3: DC Characteristics – Digital I/O Signals ............................... 19
4.4: AC Characteristics – Digital I/O Signals................................ 20
4.4.1: SDIO Interface ........................................................................... 20
4.4.1.1: Full Speed Mode.................................................................... 20
4.4.1.2: High Speed Mode .................................................................. 21
4.4.2: SPI Interface .............................................................................. 21
4.4.2.1: Full Speed Mode.................................................................... 22
4.4.2.2: High Speed Mode .................................................................. 22
4.4.3: Reset Timing............................................................................... 23
4.4.4: JTAG Interface............................................................................ 24
5: Module Power Consumption ............................................... 25
6: Performance Specifications ................................................ 26
6.1: Wireless Specifications ........................................................ 26
6.2: Receive Characteristics........................................................ 26
6.2.1: Sensitivity................................................................................... 26
6.3: Standards Compliance ......................................................... 26
7: Software Details................................................................. 28
7.1: Architecture ........................................................................ 28
7.2: Details................................................................................. 28
7.2.1: 802.1x Supplicant....................................................................... 29
7.2.2: Configuration Utility ................................................................... 29
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RS9110
-N-11-02
802.11bgn
WLAN
Module
Data Sheet
Version
1.48
7.2.3: WLAN Driver ............................................................................... 29
7.
2.4: HAL- Hardware Abstraction Layer............................................... 29
7.2.5: Upper MAC .................................................................................. 29
7.2.6: Lower MAC.................................................................................. 30
7.3: OS Support .......................................................................... 30
8: Ordering Information ......................................................... 31
8.1: Contact Information ............................................................ 31
8.2: Device Ordering Information................................................ 31
8.2.1: Device Packaging........................................................................ 31
8.3: Collateral............................................................................. 32
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RS9110
-N-11-02
802.
11bgn
WLAN
Module
Data Sheet
Version
1.48
Ta
ble
of Figures
i
gure 1: Top View of the Module ................................................................. 9
F
Figure 2: Bottom View of the Module ........................................................... 9
Figure 3: Package and Pad dimensions ...................................................... 10
Figure 4: Reflow Profile.............................................................................. 11
Figure 5: Pinout of the Module ................................................................... 12
Figure 6: Interface Timings – SDIO Interface Full-Speed Mode.................. 20
Figure 7: Interface Timings – SDIO Interface High-speed Mode ................ 21
Figure 8: SPI Protocol ................................................................................ 22
Figure 9: Interface Timings – SPI Interface Full-Speed Mode .................... 22
Figure 10: Interface Timings – SPI Interface High-Speed Mode................. 23
Figure 11: Reset Pin Timing Diagram ......................................................... 24
Figure 12: Interface Timings – JTAG Interface........................................... 24
Figure 13: RS9110-N-11-02 Software Architecture .................................... 28
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RS9110
-N-11-02
802.11bgn
WLAN
Module
Data Sheet
Version
1.48
List of Tables
a
ble 1: Absolute Maximum Ratings........................................................... 19
T
Table 2: Recommended Operating Conditions ............................................ 19
Table 3: Input/Output DC Characteristics .................................................. 20
Table 4: AC Characteristics – SDIO Interface Full-Speed Mode .................. 20
Table 5: AC Characteristics – SDIO Interface High-Speed Mode................. 21
Table 6: AC Characteristics – SPI Interface Full-Speed Mode..................... 22
Table 7: AC Characteristics – SPI Interface High-Speed Mode.................... 23
Table 8: AC Characteristics – JTAG Interface ............................................. 24
Table 9: Wireless Specificiation.................................................................. 26
Table 10: Receive sensitivity...................................................................... 26
Red
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RS9110
-N-11-02
802.11bgn
WLAN
Module
Data Sheet
Version 1.4
8
1: D
1.1
etailed Feature List
: Host Interfaces
SDIO
Version 2.0-compatible
Supports SD-SPI, 1-bit, and 4-bit SDIO modes
Operation up to a maximum clock speed of 50 MHz
SPI Interface
Operation up to a maximum clock speed of 80 MHz
1.2: WLAN
1.2.1: MAC
Conforms to IEEE 802.11b/g/n/e/i standards for MAC1
Dynamic selection of fragment threshold, data rate, and antenna
depending on the channel statistics
Hardware accelerators for WEP 64/128-bit and AES
WPA, WPA2, WPA2-Enterprise, Voice Personal, WPS (PIN/PBC),
WMM and WMM-PS support
AMPDU and AMSDU aggregation for high performance
Firmware downloaded from host based on application
1.2.2: Baseband Processing
Supports DSSS (1, 2 Mbps) and CCK (5.5, 11 Mbps) modes
Supports all OFDM data rates (6, 9, 12, 18, 24, 36, 48, and 54 Mbps)
Supports IEEE 802.11n single-stream modes with data rates up to 65
Mbps
Supports long, short, and HT preamble modes
High-performance multipath compensation in OFDM, DSSS, and CCK
modes
1.2.3: RF Transceiver
Highly integrated 2.4 GHz transceiver with direct conversion architecture
Receiver with 38 dB RF selectable gain range and 60 dB baseband variable
gain range
Power amplifier with 17 dBm maximum output power
Integrated LNA, BPF, and T/R switch
1.3: Multi-Threaded Processor
RISC-based pipelined architecture
1
Compliance to inter-operability specifications based on the standards
Redpi
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RS9110
-N-11-02
802.11bgn
WLAN
Module
Version
1.48
Non-blocking thread operation
P
rocessing capability of up to 118 million instructions per second (MIPS)
at 118 MHz
1.4: Peripherals
I2C interface with support for multiple masters and high-speed mode
SPI peripheral interface
UART interface with programmable baud-rate generator
GPIO interface
1.5: Coexistence
Flexible BT coexistence mechanism with 3-wire hardware interface
1.6: Software
Drivers for Windows Embedded CE, Windows XP and Linux
Control and management GUI
Data Sheet
Embedded software for complete WLAN functionality including 802.11n aggregation and Block-ACK, auto rate adaptation, security, and QoS modes
1.7: Compliance and Certification
Reference design certified for Wi-Fi 802.11n, WPA, WPA2, WPA2­Enterprise, WMM, WMM-PS, WPS, Voice-Personal
FCC, IC, and CE certified
RoHS (Restriction of Hazardous Substances) compliant
Red
pine Signals, Inc. Proprietary and confidential Page 8
RS9110
-N-11-02
802.11bgn
WLAN
Module
Version
1.48
ackage Description
2: P
2
.1: Top View
Data Sheet
2: Bottom View
2.
Figure
Figure
1: Top View of the Module
2: Bottom View of the Module
Red
pine Signals, Inc. Proprietary and confidential Page 9
RS9110
-N-11-02
802.11bgn
WLAN
Module
Data Sheet
Version
1.48
2.3: P
ackage Dimensions
T
he module measures 13.7 x 12.9 x 1.7 mm.
gure
Fi
Red
pine Signals, Inc. Proprietary and confidential Page 10
3: Package and Pad dimensions
RS9110
-N-11-02
802.11bgn
WLAN
Module
Data Sheet
Version
1.48
2.4: R
ecommended Reflow Profile
gure
Fi
te: The profile shown is based on SAC 305 solder (3% silver, 0.5%
No copper). We recommend the ALPHA OM-338 lead-free solder paste. This profile is provided mainly for guidance. The total dwell time depends on the thermal mass of the assembled board and the sensitivity of the components on it.
4: Reflow Profile
2.5: Baking Instructions
The RS9110-N-11-02 package is moisture sensitive and devices must be handled appropriately. After the devices are removed from their vacuum sealed packs, they should be taken through reflow for board assembly within 168 hours at room conditions, or stored at under 10% relative humidity. If these conditions are not met, the devices must be baked before reflow. The recommended baking time is nine hours at 125° C.
Red
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RS9110
-N-11-02
802.11bgn
WLAN
Module
Version
1.48
in Description
3: P
3
.1: Module Pinout
Data Sheet
46
PSPI_CSN1
47
PSPI_MISO
48
PSPI_MOSI
49
PSPI_CLK
50
MODE_SEL_0
51
MODE_SEL_1
52
VRF28
53
HOST_WAKEUP_INT
54
XTAL_EN_IP
55
GPIO_1
56
AGND
57
RF_OUT
58
AGND
43
44
45
GND
VRF33
VRF33
41
42
NC
MODE_SEL_2
39
40
PSPI_CSN0
FBDC1P3
VINLDOP123
36
UART2_IN
VOUTBCKDC1P3
37
38
34
SLEEP_CLK_X135SLEEP_CLK_X2
33
BT_ACTIVE
RS9110-N-11-02 Module
31
32
WLAN_ACTIVE
SLEEP_CLK_IN
BT_PRIORITY
GPIO_0
VINBCKDC
LED_ON
XTAL_EN
UART1_RTS
UART1_CTS
UART2_OUT
UART1_IN
UART1_OUT
DVDD33
GND
GND
GND
30
29
28
27
26
25
24
23
22
21
20
19
18
17
NC
TCK2TDI3TMS4TDO
1
I2C_SCL6I2C_SDA
5
SDIO_CLK
7
8
SDIO_DATA0
SDIO_CMD
9
10
SDIO_DATA2
SDIO_DATA1
12
11
REF_CLK
SDIO_DATA3
13
RESETn
GND
14
15
16
gure
2: Pin Description
3.
Fi
5: Pinout of the Module
Pin No. Pin Name Pin Type Description
1) N
C NC This pin is to be left unconnected
This is a JTAG input pin, and
2) T
CK Input
recommended to be connected to ground.
3) T
DI Input
This is a JTAG input pin, and recommended to be connected to
Red
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RS9110
-N-11-02
802.11bgn
WLAN
Module
Data Sheet
Version
1.48
Pin No. Pin Name Pin Type Description
ground.
This is a JTAG input pin, and
4)
MS Input
T
recommended to be connected to ground.
5)
T
DO Output
This is a JTAG output pin, and recommended to be left open.
I2C Bus Clock. By default, and
6) I
2C_SCL Inout
unless firmware is modified, this line is programmed as an output and should be left open.
I2C Bus Data. By default, and
7) I
2C_SDA Inout
unless firmware is modified, this line is programmed as an output and should be left open.
IO_CLK/SPI_CL
8)
SD K
Input SDIO/SPI interface clock input
9) S
10)
11)
12)
13) S
DIO_CMD/SPI_CS
IO_DATA0/MOS
SD I
IO_DATA1/MIS
SD O
IO_DATA2/SPI_
SD INTR
Input
Inout
Inout
Inout
DIO_DATA3 Inout
IO 4-bit: Command/Response
SD SDIO 1-bit: Command SDIO-SPI: SPI_CS SPI: SPI_CS
SDIO 4-bit: Data [0] SDIO 1-bit: Data line SDIO-SPI: SPI_DIN (MOSI) SPI: SPI_DIN
SDIO 4-bit: Data [1]/Interrupt SDIO 1-bit: Interrupt SDIO-SPI: Reserved SPI: SPI_DOUT
SDIO 4-bit: Data [2]/Read wait SDIO 1-bit: Read wait SDIO-SPI: SPI_DOUT SPI: SPI_INT2
SDIO 4-bit: Data [3] SDIO 1-bit: Reserved SDIO-SPI: SPI_INT SPI: Reserved
14) R
2
PI_INT is used to raise an interrupt, level triggered active_high, upon events in
S
EF_CLK Input Reference Clock source: 40MHz.
the chip pertaining to SPI host interface.
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RS9110
-N-11-02
802.11bgn
WLAN
Module
Data Sheet
Version
1.48
Pin No. Pin Name Pin Type Description
Power-on reset. Active low, and
15)
R
ESET_n Input
required to be active for at least 20 ms
16)
17)
18) U
19) U
20) U
21) U
22) U
23) X
ND Ground Ground
G
D
VDD33 Power 3.3 Volts Input to the I/O Rail
UART Port1 output. This is a firmware configured GPIO pin.
ART1_OUT Inout
Where not used, it should be left open. The default firmware does not use this pin.
UART Port1 input. This is a firmware configured GPIO pin.
ART1_IN Inout
Where not used, it should be left open. The default firmware does not use this pin.
UART Port2 output. This is a firmware configured GPIO pin.
ART2_OUT Inout
Where not used, it should be left open. The default firmware does not use this pin.
UART Port1 CTS. This is a firmware configured GPIO pin. Where not
ART1_CTS Inout
used, it should be left open. The default firmware does not use this pin.
UART Port1 RTS. This is a firmware configured GPIO pin. Where not
ART1_RTS Inout
used, it should be left open. The default firmware does not use this pin.
This signal controls an external reference clock oscillator for power-
TAL_EN Output
save purposes. 1 – Enable 0 – Disable
LED Control signal. Indicates activity on WLAN – the device pulls this line low when the module is
24) L
ED_ON Inout
activated. To be connected to the Cathode of an LED with a recommended series resistor of 820 ohms to VDD.
25) G
ND Ground Ground
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RS9110
-N-11-02
802.11bgn
WLAN
Module
Data Sheet
Version
1.48
Pin No. Pin Name Pin Type Description
G
26)
ND Ground Ground
27)
28)
V
G
29) B
30) G
31) W
32) S
INBCKDC Power
3.3 Volts input to the PMU
General purpose input/output. In
PIO_0 Inout
the default configuration this is programmed as an output and should be left unconnected.
Indicates through ‘logic high’ that BT is transmitting high priority
T_PRIORITY Input
traffic. This is a firmware configured GPIO pin. Where not used, it should be left open.
ND Ground Ground
When configured for BT coexistence, this is an output and indicates with logic high that WLAN
LAN_ACTIVE Output
activity is in progress. When low, BT device has the opportunity to transmit. This is a firmware configured GPIO pin. Where not used, it should be left open.
Sleep clock input is NC for default firmware.
An external 32KHz signal is fed to
LEEP_CLK_IN Input
this pin if the external 32KHz input mode is selected. Please refer to notes on Sleep Clock Input for more details.
This signal may be used by an external Bluetooth device to indicate its activity or impending
33) B
T_ACTIVE Input
activity. This signal is not used in the default BT coexistence firmware. This is a firmware configured GPIO pin. Where not used, it should be left open.
32KHz crystal connection The pin should be left open except
34) S
LEEP_CLK_X2 Input
as describe in mode (iii) as described in note below for Sleep Clock Input.
35) S
LEEP_CLK_X1 Input 32KHz crystal connection
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RS9110
-N-11-02
802.11bgn
WLAN
Module
Data Sheet
Version
1.48
Pin No. Pin Name Pin Type Description
The pin should be left grounded
c
ept as describe in mode (iii) as
ex described in note below for Sleep Clock Input.
UART-2 input. This is a firmware
36)
U
ART2_IN Inout
configured GPIO pin. Where not used, it should be left open.
Internal DC-DC convertor output. A
37) V
OUTBCKDC1P3 Power
Schottky diode is to be placed on this line for protection.
Feedback for the DC-DC Converter
38) F
BDC1P3 Power
Input to the LDO’s. This has to be connected to FBDC1P3.
39) V
INLDOP123 Power
Input to the LDO’s. Connect this to FBDC1P3.
40) N
41) N
42) N
43) V
44) V
45) G
46) P
47) P
48) P
C No-connect This pin is to be left unconnected
C No-connect This pin is to be left unconnected
C No-connect This pin is to be left unconnected
RF33 Power 3.3 Volts input to the RF transceiver
RF33 Power 3.3 Volts input to the RF transceiver
ND Ground Ground
When enabled as a SPI interface pin, this is the chip-select output
SPI_CSN1 Output
from SPI Master. This is a firmware configured GPIO pin. Where not used, it should be left open. Default firmware does not use this pin
When enabled as a SPI interface pin, this is the SPI Master data
SPI_MISO Input
input. This is a firmware configured GPIO pin. Where not used, it should be left open. Default firmware does not use this pin.
When enabled as a SPI interface pin, this is the SPI Master data
SPI_MOSI Output
output. This is a firmware configured GPIO pin. Where not used, it should be left open. Default firmware does not use this pin.
49) P
SPI_CLK Output
When enabled as a SPI interface
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RS9110
-N-11-02
802.11bgn
WLAN
Module
Data Sheet
Version
1.48
Pin No. Pin Name Pin Type Description
pin, this is the SPI Master clock
u
tput. This is a firmware
o configured GPIO pin. Where not used, it should be left open. Default firmware does not use this pin.
BOOT MODE: On no-connect, boot parameters will be loaded from
50)
M
ODE_SEL_0 Input
internal flash. Should be left unconnected so as to enable bootloading.
SDIO MODE: No connect.
51) M
ODE_SEL_1 Input
SPI Mode: Connect pull down of
4.7Kohms.
52) V
53)
HO T
54) X
55) G
RF28 Power 2.8 Volts LDO O/P
This pin is a GPIO. If this is not used, it should be left open. This pin is to be used by those hosts which enter into power save mode and which are not able to detect the regular interrupt pin in
ST_WAKEUP_IN
Output
that power save mode. If used as HOST_WAKEUP_INT, a
pull-up or pull-down of 100K has to be connected on this pin based on the polarity indicated to the firmware.
Active low requires a pull-up. Active high requires a pull-down.
This is a GPIO signal by default and it should be left open.
If used, it can be configured through firmware to be combined, through a logical OR operation, with
TAL_EN_IP Input
the internal oscillator enable and the output given on XTAL_EN pin. This can be used when a crystal oscillator is shared between the WLAN module and other functional blocks in the system.
General purpose input/output. In
PIO_1 Inout
the default configuration this is programmed as an output and should be left unconnected.
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RS91
10-N-11-02 802.11bgn
WLAN
Module
Data Sheet
Version
1.48
Pin No. Pin Name Pin Type Description
G
56)
ND Ground Ground
57)
58)
N
o
F_OUT Rfin/Rfout Antenna Port-50 ohms Impedance
R
G
ND Ground Ground
tes:
Some interfaces are not used in the default configuration or mode of operation. These include the I2C, GPIO, and UART interfaces. These may be used in custom applications with appropriate firmware. These are all fundamentally Inout signals and may be configured either as input or output.
JTAG functionality is not included in default firmware.
The Bluetooth coexistence interface (BT_PRIORITY, WLAN_ACTIVE,
BT_ACTIVE) are also general purpose I/O signals and may be reprogrammed to be inputs or outputs as needed. Please refer to BT coexistence application note for more details.
Sleep clock input:
This should be a 32 kHz clock and is used in power-save modes, if chosen. During the low power sleep state, the module's wake-up timer uses the sleep clock - which can have one of three sources
i) an internal 32 kHz oscillator
This is the recommended mode of operation.
ii) a 32 kHz clock fed into this pin,
iii) a 32 kHz crystal connected to pins SLEEP_CLK_X2 and SLEEP_CLK_X1.
NOTE: The recommended mode of operation is i).
This is a firmware configured GPIO pin and where not used, should be left open.
By default, an internal 32KHz oscillator is used.
Please refer to the Module Integration Guide document for reference schematics and the list of recommended part numbers.
Please contact Redpine for application notes or for customization of a solution.
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RS9110
-N-11-02
802.11bgn
WLAN
Module
Data Sheet
Version
1.48
lectrical Characteristics
4: E
4
.1: Absolute Maximum Ratings
Absolute maximum ratings in the table given below are the values beyond which the device could be damaged. Functional operation at these conditions or beyond these conditions is not guaranteed.
Parameter Symbol Value Units
Input Supply voltage Vi
Supply voltage for I/O Rail DV
Supply Voltage for the RF VR
RF Input Level RF
Storage temperature T
n 3.6 V
DD33
3.6 V
F33 3.6 V
IN 10 dBm
ore
st
-65 to 150
Electrostatic discharge tolerance (HBM) ESD
Electrostatic discharge tolerance (MM) ESD
Electrostatic discharge tolerance (CDM) ESD
HB
MM
CD
2000 V
M
200 V
500 V
M
ble
Ta
1: Absolute Maximum Ratings
2: Recommended Operating Conditions
4.
Parameter Symbol Min. Typ. Max. Units
Input Supply voltage V
IN
3.1 3.3 3.6 V
Supply voltage for I/O Rail DVDD33 3.1 3.3 3.6 V
Supply Voltage for the RF VRF33 3.1 3.3 3.6 V
°C
Ambient temperature T
a
40 25 85 °C
-
ble
Ta
2: Recommended Operating Conditions
ative Humidity: 5 to 95%, non-condensing
Rel
4.3: DC Characteristics – Digital I/O Signals
Parameter Min. Typ. Max. Units
Input high voltage 2
Red
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- 3.6 V
RS9110
-N-11-02
802.1
1bgn
WLAN
Module
Data Sheet
Version
1.48
Parameter Min. Typ. Max. Units
Input low voltage -
Output low voltage -
Output high voltage 2
Input leakage current (at 3.3V or 0V) - - ±1
Tristate output leakage current (at 3.3V
r
0V)
o
ble
Ta
4: AC Characteristics – Digital I/O Signals
4.
3: Input/Output DC Characteristics
.3 - 0.8 V
0
.
4 - - V
- - ±10 µA
- 0.4 V
µA
0
4.4.1: SDIO Interface
4.4.1.1: Full Speed Mode
Parameter Symbol Min. Typ. Max. Units
SDIO_CLK Ts
SDIO_DATA, input setup time Ts 5 - - ns
dio 0 25 MHz
SDIO_DATA, input hold time Th 2 - - ns
SDIO_DATA, clock to output
ay
del
ble
Ta
4: AC Characteristics – SDIO Interface Full-Speed Mode
Tod 5 - 11 ns
SDIO_CLK
Th
SDIO_DATA
Ts
SDIO_DATA
Tod
gure
Fi
6: Interface Timings – SDIO Interface Full-Speed Mode
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RS9110
-N-11-02
802.11bgn
WLAN
Module
Data Sheet
Version
1.48
4.4.1.2: Hi
Parameter Symbol Min. Typ. Max. Units
SDIO_CLK T
SDIO_DATA, input setup time Ts 5 - - ns
SDIO_DATA, input hold time Th 2 - - ns
SDIO_DATA, clock to output d
gh Speed Mode
ay
el
a
ble
T
Fi
5: AC Characteristics – SDIO Interface High-Speed Mode
gure
7: Interface Timings – SDIO Interface High-speed Mode
SDIO_CLK
SDIO_DATA
SDIO_DATA
dio 25 - 50 MHz
s
Tod 5.5 - 12.5 ns
Ts
Th
Tod
4.2: SPI Interface
4.
The SPI Interface is a full duplex serial host interface, which supports 8-bit and 32­bit data granularity. It also supports gated mode of SPI clock and both the low and the high frequency modes. Incase of low frequency host, the data is driven on the falling edge and sampled on the rising edge and hence, it should be ensured that a valid data is present on the bus at the immediate rising edge after the SPI chip select is driven low. For high frequency transmission the data is driven as well as sampled on rising edge.
This interface has the interrupt pin along with the regular signals clock, chip select, data in and data out. Device interrupts the host processor regarding the packet pending event through this interrupt pin. This is an active high signal, and this will get cleared only after clearing the source of the interrupt, i.e. reading the pending packet from device. This will be generally connected to a GPIO pin of host platform and GPIO has to be configured for detecting interrupt on level high, and interrupt from this GPIO has to be mapped to driver ISR.
The SPI Slave supports mode 0 (SPI_POL=0, SPI_PHA=0) and mode 3 (SPI_POL=1, SPI_PHA=1).
Red
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RS9110
-N-11-02
802.11bgn
WLAN
Module
Version
1.48
SPI_CS
SPI_CLK
SPI_DIN
Mode 3
Mode 0
Bit 7
Bit 6
Data Sheet
Bit 4
Bit 5
Bit 3
Bit 2
Bit 1 Bit 0
Bit 0
SPI_DOUT Bit 7 Bit 6 Bit 5
Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Figure
8: SPI Protocol
Bit 0
4
4.2.1: Full Speed Mode
.
Parameter Symbol Min. Typ. Max. Units
SPI_CLK Ts
pi 0 25 MHz
SPI_CS to output delay Tcs 3.5 - 7.5 ns
SPI CS to input setup time Tcst 5.5 - -
SPI_DIN (MOSI), input setup
me
ti
SPI_DIN (MOSI), input hold
me
ti
SPI_DOUT (MISO), clock to
tput delay
ou
Ts 1 - - ns
Th 1.5 - ns
Tod 4 - 9 ns
ble
Ta
6: AC Characteristics – SPI Interface Full-Speed Mode
SPI_CLK
SPI_CS
SPI_MOSI
Tcst
Ts
Th
Tod
SPI_MISO
SPI_CS
Tcs
SPI_MISO
gure
Fi
9: Interface Timings – SPI Interface Full-Speed Mode
4.4.2.2: High Speed Mode
Red
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RS9110
-N-11-02
802.11bgn
WLAN
Module
Data Sheet
Version
1.48
Parameter Symbol Min. Typ. Max. Units
SPI_CLK T
pi 25 - 75 MHz
s
SPI_CS to output delay Tcs 3.5 - 7.5 ns
SPI CS to input setup time Tcst 5.5 - -
SPI_MOSI, input setup time Ts 1 - ns
SPI_MOSI, input hold time Th 1.5 - ns
SPI_MISO, clock to output
el
ay
d
Tod 4 - 9.5 ns
ble
Ta
7: AC Characteristics – SPI Interface High-Speed Mode
SPI_CLK
SPI_CS
SPI_MOSI
SPI_MISO
SPI_CS
Tcst
Ts
Th
Tod
gure
Fi
10: Interface Timings – SPI Interface High-Speed Mode
4.3: Reset Timing
4.
Following diagram shows the timing requirement for reset_n input in two scenarios. If external power supply (instead of 2.8V coming out of the module) is used for reference clock crystal oscillator, it has to be taken care that oscillator output is stable before releasing reset. When using
2.8V coming out of module as power supply for reference clock crystal
oscillator, maximum oscillator stabilization time after feeding power has to be 10ms.
A. Powerup B. Giving hard reset without power reset
SPI_MISO
Tcs
Red
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RS9110
-N-11-02
802.11bgn
WLAN
Module
Version
1.48
3.3V input supply
reset_n
Data Sheet
20msec
1msec
A
Figure
4.4: JTAG Interface
4.
Parameter Symbol Min. Typ. Max. Units
TCK Tj
TDI, setup time Ts
TDI, hold time Th
TMS, setup time Ts
TMS, hold time Th
TDO, clock to output valid Totdo 0 - 14 ns
ble
Ta
TCK
TDI
11: Reset Pin Timing Diagram
tag 0 5 MHz
tdi 5 - - ns
tdi 5 - - ns
tms 5 - - ns
tms 5 - - ns
8: AC Characteristics – JTAG Interface
Tstdi
Thtdi
B
Tstms
TMS
TDO
gure
Fi
Red
pine Signals, Inc. Proprietary and confidential Page 24
12: Interface Timings – JTAG Interface
Thtms
Totdo
RS9110
-N-11-02
802.11bgn
WLAN
Module
Data Sheet
Version
1.48
5: M
odule Power Consumption
T
he following is the typical power consumption data for the RS9110-N­11-02 802.11b/g/n module. A single point 3.3V supply is used. Transmit power at antenna is 15dBm.
Mode Conditions Module
Current
Standard Operational Modes – 2.4 GHz
Data Transfer –
r
ansmit TCP
T
Data Transfer –
ansmit TCP
Tr
Data Transfer –
ansmit TCP
Tr
Data Transfer –
eive TCP
Rec
Data Transfer –
eive TCP
Rec
Data Transfer –
eive TCP
Rec
Listen Rec
Standby Rem
Sleep No
te:
No
1. The current numbers mentioned include the current drawn by the crystal oscillator.
2. Applications where wireless LAN module is inactive for extended periods of time an external power switch can be integrated. This may be used to obtain idle current of less than 5 uAmp which would be the leakage current of the power switch.
1Mbps throughput 19 mA
2Mbps throughput 30 mA
22 Mbps throughput
1Mbps throughput 17 mA
2Mbps throughput 24 mA
22 Mbps throughput
eive mode, with no active packet
reception in progress
aining connected to the Access Point, in Power-Save mode, with DTIM=3, beacon interval of 200 ms
t connected to an AP; ready to connect upon driver command. The module can transition to any active mode in less than
2.5 ms.
200 mA
149 mA
110 mA
1.10 mA
0.52 mA
Red
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RS9110
-N-11-02
802.11bgn
WLAN
Module
Data Sheet
Version
1.48
erformance Specifications
6: P
6
.1: Wireless Specifications
Feature Description
Frequency Band 2.400 – 2.500 GHz (2.4 GHz ISM band)
Frequency Reference 40 MHz
Modulation O
Supported Data Rates 802.11n: 6.5, 13, 19.5, 26, 39, 52, 58.5, 65 Mbps
802.11n Features MCS 0-7, STBC, RIFS, Greenfield Protection
DM with BPSK, QPSK, 16-QAM, and 64-QAM
F
802.11b with CCK and DSSS
2.11g: 6, 9, 12, 18, 24, 36, 48, 54 Mbps
80
802.11b: 1, 2, 5.5, 11 Mbps
MPDU, A-MSDU Aggregation with Block-ack,
A­PSMP, and MTBA
Typical Transmit Power
/- 2 dBm)
(+
ble
Ta
2: Receive Characteristics
6.
6.2.1: Sensitivity
Data Rate Typical Sensitivity (+/- 1.5 dBm)
1 Mbps -9
2 Mbps -9
11 Mbps -8
6 Mbps -9
54 Mbps -7
65 Mbps -7
ble
Ta
17 dBm for 802.11b DSSS 17 dBm for 802.11b CCK 15 dBm for 802.11g/n OFDM
9: Wireless Specificiation
7.0 dBm (< 8% PER)
3.0 dBm (< 8% PER)
8.9 dBm (< 8% PER)
1.0 dBm (<10% PER)
5.0 dBm (< 10% PER)
1.9 dBm (< 10% PER)
10: Receive sensitivity
3: Standards Compliance
6.
RS9110-N-11-02 is compliant with the requirements of IEEE 802.11b,
802.11g, and 802.11n that include the following:
Transmit Spectral Mask
Transmit Center Frequency Leakage
Red
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RS9110
-N-11-02
802.11bgn
WLAN
Module
Data Sheet
Version
1.48
Transmit Center Frequency Tolerance
S
ymbol Clock Frequency Tolerance
Transmit Constellation error
Receiver Adjacent Channel Interference Rejection
Receiver Non-adjacent Channel Rejection
Receiver Minimum Input Level
Receiver Maximum Input Level
Red
pine Signals, Inc. Proprietary and confidential Page 27
RS9110
-N-11-02
802.11bgn
WLAN
Module
Version
1.48
oftware Details
7: S
T
he RS9110-N-11-02 provides a zero-host-load system architecture by implementing most of the 802.11 MAC functions in its internal multi-threaded ThreadArch™ processor. The driver consumes less than 5 MIPS from the host processor, giving the freedom to the host processor to run its own applications.
7.1: Architecture
The following diagram depicts the software architecture of the solution.
Data Sheet
O
P E R A T
I
N
G
S Y S T E
M
802.11 MAC
Management
802.1X
Supplicant
IPSec
WLAN
Configuration
Utility
Management Interface
SME Network Interface
WLAN Host Driver
HAL Interface
HAL
Hardware Interface - SDIO/SPI
Host Interface Module
Power
Save
Encryption/
Decryption
Upper MAC
Packet Interface
Lower MAC
Network Applications
TCP/IP Stack
WMM Roaming
MPDU/MSDU Aggregation
Data Interface
Auto Rate
BBP/RF
Figure
13: RS9110-N-11-02 Software Architecture
2: Details
7.
This section provides an overview of the functionality of each of the key modules in the WLAN system.
Red
pine Signals, Inc. Proprietary and confidential Page 28
RS9110
-N-11-02
802.11bgn
WLAN
Module
Data Sheet
Version
1.48
7.2.1: 8
02.1x Supplicant
W
PA/WPA2-Personal mode functionality
WPA/WPA2-EAP exchanges for entreprise mode
Key negotiation and management – WEP, TKIP, and CCMP
Pre-authentication and PMKSA caching for roaming
7.2.2: Configuration Utility
It is a user-mode application to manage the wireless network connection
SSID selection
Channel and rate selection
Key management
Configuration of 802.11 parameters
7.2.3: WLAN Driver
Consumes < 5 MIPS from host processor
Initialization module
Baseband and RF programming
Firmware downloading
TCP/IP Network Interface Layer
Transmission of TCP/IP packets
Indicating received TCP/IP packets
802.11 Station Management Module
Interaction with HAL layer – SDIO and SPI
Power-save modes
o Sleep
o Standby
7.2.4: HAL- Hardware Abstraction Layer
HAL layer changes depending on the host interface used
SPI Interface – SPI host controller driver
SDIO Interface – SDIO host controller and bus drivers
7.2.5: Upper MAC
Non-time critical 802.11 MAC functions
Classification of the packets
Block-Acknowledgement negotiation
Power save features
Transfer of packets from host to LMAC and vice versa
Red
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RS9110
-N-11-02
802.11bgn
WLAN
Module
Version
1.48
RNG – Random Number Generation
7
.2.6: Lower MAC
Time-critical 802.11 MAC functionality
802.11 frame formatting
802.3 frame to 802.11 conversion and vice-versa
Beacon processing
Backoff algorithm
WEP 64 and 128 bit, WPA/WPA2 encryption and decryption
Auto rate algorithm
A-MPDU and A-MSDU aggregation
Re-transmission
Fragmentation and reassembly
7.3: OS Support
The Lite-Fi™ family devices including RS9110-N-11-02 support the device drivers and wireless configuration utilities for the following operating systems:
Data Sheet
Windows CE® 5.0 and 6.0
Linux – 2.6.xx kernel
Windows XP®
Red
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RS9110
-N-11-02
802.11bgn
WLAN
Module
Data Sheet
Version
1.48
8: O
8
8.
rdering Information
.1: Contact Information
For additional information, please contact Sales at Redpine Signals, Inc.
Redpine Signals, Inc.
2107 North First Street, Suite 680,
San Jose, CA 95131 USA
Phone: +1 408 748 3385
E-mail: sales@redpinesignals.com
site: http://www.redpinesignals.com/
Web
2: Device Ordering Information
The following table lists the part numbers to be used for ordering modules or evaluation boards (EVB). The ‘xx’ in the part numbers indicate a version number – 01, 02, etc., - identifying the version of the custom firmware that is included with the module or EVB. Redpine can create and provide customized firmware based on user requirements.
Device Number Description Packaging Qualification
RS9110-N-11-02-0 Standard Part Tray In
RS9110-N-11-02-1 Standard Part Tape and
reel
RS9110-N-11-02-xx-0 Part with custom
rmware
fi
RS9110-N-11-02-xx-1 Part with custom
rmware
fi
RS9110-N-11-02-EVB Evaluation board
r standard part
fo
RS9110-N-11-02-xx-EVB Evaluation board
r part with
fo custom firmware
2.1: Device Packaging
8.
136 RS9110-N-11-02 modules per tray
Each tray has 17 rows and 8 columns
Tray dimensions 14cm x 32.5cm x 0.8cm (L X W X H)
Tray Industrial
Tape and reel
Board
Board
dustrial
Industrial
Industrial
The device packaging is MSL-3 compliant
Red
pine Signals, Inc. Proprietary and confidential Page 31
RS9110
-N-11-02
802.11bgn
WLAN
Module
Version
1.48
8.
3: Collateral
The following documentation and software are available along with the RS9110-N-11-02 module.
Module Evaluation Board (EVB) with SDIO host interface
Device driver and configuration software for Windows XP, Windows CE, or
Linux3
Test mode software
EVB User Guide
Software Installation Guide
Wi-Fi Evaluation Procedure Manual
Module Integration Guide
Data Sheet
3
lease contact Redpine for details of operating systems and processor platforms
P
supported, and for software porting and customization services
Red
pine Signals, Inc. Proprietary and confidential Page 32
FCC Caution
§ 15.19 Labelling requirements.
This device complies with part 15 of the FCC Rules. Operation is subject to the following two
conditions: (1) This device may not cause harmful interference, and (2) this device must accept
any interference received, including interference that may cause undesired operation.
§ 15.21 Information to user.
Any Changes or modifications not expressly approved by the party responsible for compliance
could void the user's authority to operate the equipment.
§ 15.105 Information to the user. Note:
device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable
protection against harmful interference in a residential installation. This equipment generates uses
and can radiate radio frequency energy and, if not installed and used in accordance with the
instructions, may cause harmful interference to radio communications. However, there is no
guarantee that interference will not occur in a particular installation. If this equipment does cause
harmful interference to radio or television reception, which can be determined by turning the
equipment off and on, the user is encouraged to try to correct the interference by one or more of
the following measures:
-Reorient or relocate the receiving antenna.
-Increase the separation between the equipment and receiver.
-Connect the equipment into an outlet on a circuit different from that to which the receiver is
connected.
Module use requirements
integrator shall apply a label in a visible area on his product with the following statement:
Contains Transmitter Module FCC ID:
This equipment has been tested and found to comply with the limits for a Class B digital
-Consult the dealer or an experienced radio/TV technician for help.
If the FCC ID is not visible when the module is installed inside another device, the OEM
SMQV1102EDAN
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