ECS IC780M-A2 Schematics
5
4
3
2
1
IC780M-A2
D D
SCHEMATICS TABLE:
Page Index
------- ------------------------
1
COVER PAGE
BLOCK DIADRAM2
3
AM3 CPU HT & OVERCLOCK
AM3 CPU MEMORY
4
AM3 CPU CONTROL & MISC
5
AM3 CPU PWR & GND
C C
B B
6
DDR3 DIMM A CHANNEL
7
DDR3 DIMM B CHANNEL
8
DDR3 DIMM POWER
9
10
11
12
13
14
15
CLOCK GEN ICS9LPRS471
CPU VCORE ISL6323
NB POWER
DC-DC
FRONT PANEL/FAN PNL
RX780 HT LINK I/F
16 RX780 PCIE I/F&STRAPS
17
18
RX780 SYSTEM I/F
RX780 POWER
Page Index
------- ------------------------
20
21
22
23
24
25
26
27
28
29
30
31
33
34
35
36
PCI-E x1&PCI1
SB710 PCIE/PCI/CPU/LPC
SB710 ACPI/GPIO//USB/AUDIO
SB710 SATA/IDE/HWM/SPI
SB710 PWR/DECOUPLING
SB710-STRAPS
PCI1&2
USB/IDE
IT8726
PS2/COM/GND
AUDIO ALC662 (CHIP)
AUDIO PANEL
PCIE LAN RTL8111/8101E32
CLOCK DISTRIBUTION
Attention&104&IMPENDANCE
POWER DELIVERY CHART
POWER SEQUENCE
REVISION HISTORY:
Rev Date Notes
------ -------------- ---------------------------------------------------------------------------------
2009/07
V :1.0A
INITIAL RELEASEA
add ACC fuction,Fixed A3 issue1.0 2009/09
19 PCI-E X16 CONN
IMPORTANT NOTES ABOUT
THIS SCHEMATIC
DESIGN NOTE: Example
text for the design note to
show the note inside the
colored box.
DESIGN NOTE: Example
A A
text for the design note to
show the note inside the
colored box.
DESIGN NOTE: Example
text for the design note to
show the note inside the
colored box.
1) DESIGN NOTES in
grey are information
notes.
2) DESIGN NOTES in
yellow are notes of
caution.
3) DESIGN NOTES in
red are critical, and
must be understood and
followed.
5
@ ECS CONFIDENTIAL @
L1:TOPPCB STACK:
L2:PWR
L3:GND
L4:BOTTOM
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
Cover Page
Cover Page
Cover Page
IC780M-A2
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136Thursday, October 15, 2009
136Thursday, October 15, 2009
136Thursday, October 15, 2009
1.0A
1.0A
1.0A
5
4
3
2
1
D D
AMD
AM3
AM3 SOCKET
Clock
Generator
ICS9LPR471
PCIE
16X
SLOT
10
19
16X
HyperTransport
LINK 3.0
OUT
ATI NB
RX780
HyperTransport LINK0 CPU I/F
3,4,5,6
16x16
IN
DDRIII 1066,1333,1600
128bit
DDRIII 1066,1333,1600
UNBUFFERED
DDRIII DIMM1
UNBUFFERED
DDRIII DIMM2
DDRIII FIRST LOGICAL DIMM DDRIII SECOND LOGICAL DIMM
7,9
7,9 8,9
UNBUFFERED
DDRIII DIMM3
UNBUFFERED
DDRIII DIMM4
8,9
1 16X PCIE VIDEO I/F
1 4X PCIE I/F WITH SB
USB 2.0
6 1X PCIE I/F
ATI SB
SB710
USB2.0 (10)
15,16,17,18
4X
PCIE
HD AUDIO I/F
HD AUDIO
CODEC
30,31
6 1X PCIE INTERFACE
C C
RTL8111DL
32
USB-2USB-3
PCIE GPP0
X1*2
USB-1
20
USB-0
322727
32
SATA II
USB4
USB-5
27
B B
USB-6
27
USB-7
27
27
PCI BUS
AC97 2.3/ AZALIA
ATA 66/100/133
ACPI
LPC I/F
INT RTC
HW MONITOR
21,22,23,24,25
SATA II I/F
ATA 66/100/133 I/F
SPI
SATA#0 SATA#1
EIDE
27
FLASH
BIOS
23
SATA#2
2323
SATA#3
23 23
PCI SLOT
#1
DESKTOP AM3
POWER
A A
DDR3
MEMORY
POWER
11
13
5
RX780
CORE & PCIE
POWER
SB710
CORE & PCIE
POWER
PCI SLOT
20
#2
12
12
4
PCI SLOT
26
#3
26
ITE LPC SIO
IT8726
COM1
KBD
MOUSE
29
29
28
Elitegroup Computer Systems
Elitegroup Computer Systems
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
3
2
Date: Sheet
Elitegroup Computer Systems
BLOCK DIAGRAM
IC780M-A2
IC780M-A2
IC780M-A2
2
2
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1.0A
1.0A
1.0A
36Thursday, October 15, 2009
36Thursday, October 15, 2009
36Thursday, October 15, 2009
5
4
3
2
1
HyperTransport
CPUA
N6
L0_CLKIN_H1
P6
L0_CLKIN_L1
N3
L0_CLKIN_H0
N2
L0_CLKIN_L0
V4
L0_CTLIN_H1
V5
L0_CTLIN_L1
U1
L0_CTLIN_H0
V1
L0_CTLIN_L0
U6
L0_CADIN_H15
V6
L0_CADIN_L15
T4
L0_CADIN_H14
T5
L0_CADIN_L14
R6
L0_CADIN_H13
T6
L0_CADIN_L13
P4
L0_CADIN_H12
P5
L0_CADIN_L12
M4
L0_CADIN_H11
M5
L0_CADIN_L11
L6
L0_CADIN_H10
M6
L0_CADIN_L10
K4
L0_CADIN_H9
K5
L0_CADIN_L9
J6
L0_CADIN_H8
K6
L0_CADIN_L8
U3
L0_CADIN_H7
U2
L0_CADIN_L7
R1
L0_CADIN_H6
T1
L0_CADIN_L6
R3
L0_CADIN_H5
R2
L0_CADIN_L5
N1
L0_CADIN_H4
P1
L0_CADIN_L4
L1
L0_CADIN_H3
M1
L0_CADIN_L3
L3
L0_CADIN_H2
L2
L0_CADIN_L2
J1
L0_CADIN_H1
K1
L0_CADIN_L1
J3
L0_CADIN_H0
J2
L0_CADIN_L0
CPUA
ZIF-941P-S
ZIF-941P-S
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
HT LINK
HT LINK
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
AD5
AD4
AD1
AC1
Y6
W6
W2
W3
Y5
Y4
AB6
AA6
AB5
AB4
AD6
AC6
AF6
AE6
AF5
AF4
AH6
AG6
AH5
AH4
Y1
W1
AA2
AA3
AB1
AA1
AC2
AC3
AE2
AE3
AF1
AE1
AG2
AG3
AH1
AG1
HT_CLKOUT_H1
HT_CLKOUT_L1
HT_CLKOUT_H0
HT_CLKOUT_L0
HT_CTLOUT_H1
HT_CTLOUT_L1
HT_CTLOUT_H0
HT_CTLOUT_L0
HT_CADOUT_H15
HT_CADOUT_L15
HT_CADOUT_H14
HT_CADOUT_L14
HT_CADOUT_H13
HT_CADOUT_L13
HT_CADOUT_H12
HT_CADOUT_L12
HT_CADOUT_H11
HT_CADOUT_L11
HT_CADOUT_H10
HT_CADOUT_L10
HT_CADOUT_H9
HT_CADOUT_L9
HT_CADOUT_H8
HT_CADOUT_L8
HT_CADOUT_H7
HT_CADOUT_L7
HT_CADOUT_H6
HT_CADOUT_L6
HT_CADOUT_H5
HT_CADOUT_L5
HT_CADOUT_H4
HT_CADOUT_L4
HT_CADOUT_H3
HT_CADOUT_L3
HT_CADOUT_H2
HT_CADOUT_L2
HT_CADOUT_H1
HT_CADOUT_L1
HT_CADOUT_H0
HT_CADOUT_L0
1.5V
HT_CLKIN_H[0..1]
HT_CLKIN_L[0..1]
HT_CLKOUT_H[0..1]
HT_CLKOUT_L[0..1]
HT_CTLIN_H[0..1]
HT_CTLIN_L[0..1]
HT_CTLOUT_H[0..1]
HT_CTLOUT_L[0..1]
HT_CADIN_H[0..15]
HT_CADIN_L[0..15]
HT_CADOUT_H[0..15]
HT_CADOUT_L[0..15]
CPU_VDDIO_SUSV_DIMM
VCC1.8NB_1V8
VCC3VCC3
HT_CLKIN_H1
HT_CLKIN_L1
HT_CLKIN_H0
HT_CLKIN_L0
HT_CTLIN_H1
HT_CTLIN_L1
HT_CTLIN_H0
HT_CTLIN_L0
HT_CADIN_H15
HT_CADIN_L15
HT_CADIN_H14
HT_CADIN_L14
HT_CADIN_H13
HT_CADIN_L13
HT_CADIN_H12
HT_CADIN_L12
HT_CADIN_H11
HT_CADIN_L11
HT_CADIN_H10
HT_CADIN_L10
HT_CADIN_H9
HT_CADIN_L9
HT_CADIN_H8
HT_CADIN_L8
HT_CADIN_H7
HT_CADIN_L7
HT_CADIN_H6
HT_CADIN_L6
HT_CADIN_H5
HT_CADIN_L5
HT_CADIN_H4
HT_CADIN_L4
HT_CADIN_H3
HT_CADIN_L3
HT_CADIN_H2
HT_CADIN_L2
HT_CADIN_H1
HT_CADIN_L1
HT_CADIN_H0
HT_CADIN_L0
HT_CLKIN_H[0..1]15
HT_CLKIN_L[0..1]15
HT_CLKOUT_H[0..1]15
D D
C C
HT_CLKOUT_L[0..1]15
HT_CTLIN_H[0..1]15
HT_CTLIN_L[0..1]15
HT_CTLOUT_H[0..1]15
HT_CTLOUT_L[0..1]15
HT_CADIN_H[0..15]15
HT_CADIN_L[0..15]15
HT_CADOUT_H[0..15]15
HT_CADOUT_L[0..15]15
Please use 1mm pad size,
place all ELT test pads
on bottom side only.
A1
A31
AM3
Top View
AL1
CPU-R1
CPU-R1
RETENTION
RETENTION
AL31
R84
R84
0-04-O
0-04-O
RN6
RN6
4.7K-8P4R-O
4.7K-8P4R-O
3 4
5 6
7 8
V_DIMM
B
QN18 2N3904-S-OQN18 2N3904-S-O
R62
R62
10K-04-O
10K-04-O
EC
V_DIMM
IMC_DBREQ_
HDT Connector
J1
1
3
5
7
9
11
13
15
17
19
21
23
J1
KEY
KEY
ASP-68200-07-O
ASP-68200-07-O
Use buffered reset
R83 0-04-OR83 0-04-O
V_DIMM
B
E C
QN19 2N3904-S-OQN19 2N3904-S-O
R63
R63
10K-04-O
10K-04-O
2
4
6
8
10
12
14
16
18
20
22
24
26
IMC_DBRDY
QN20 2N3904-S-OQN20 2N3904-S-O
2
V_DIMM
R80
R80
10K-04-O
10K-04-O
B
IMC_CRST_
E C
QN21 2N3904-S-OQN21 2N3904-S-O
LDT_RST-
V_DIMM
R77
R77
10K-04-O
10K-04-O
B
EC
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
IMC_TCK
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
CPU HT & DEBUG
CPU HT & DEBUG
CPU HT & DEBUG
IC780M-A2
IC780M-A2
IC780M-A2
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36Thursday, October 15, 2009
36Thursday, October 15, 2009
36Thursday, October 15, 2009
1.0A
1.0A
1.0A
1 2
3 4
5 6
NB_PWRGD
7 8
1 2
3
SB_PWRGD22,28
CPU_DBREQ_5
CPU_DBRDY5
CPU_TCK5
CPU_TMS5
CPU_TDI5
CPU_TRST-5
CPU_TDO5
B B
A A
IMC_TRST_22
IMC_CRST_22
IMC_DBREQ_22
IMC_DBRDY22
IMC_TMS
IMC_TDI22
IMC_TDO22
IMC_TMS22
LDT_RST-5,17,21
IMC_TCK22
NB_PWRGD
CPU_DBREQ_
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRSTCPU_TDO
IMC_TDI
IMC_TRST_
IMC_TDO
IMC_TMS
LDT_RSTIMC_CRST_
IMC_DBREQ_
IMC_DBRDY
IMC_TCK
V_DIMM
B
E C
QN14 2N3904-S-OQN14 2N3904-S-O
5
R55
R55
10K-04-O
10K-04-O
IMC_TDO
Over Clocking
V_DIMM
R32
R32
IMC_TRST_
10K-04-O
10K-04-O
B
E C
QN15 2N3904-S-OQN15 2N3904-S-O
QN16 2N3904-S-OQN16 2N3904-S-O
4
V_DIMM
B
E C
V_DIMM
R60
R60
10K-04-O
10K-04-O
R85 0-04-OR85 0-04-O
CPU_DBREQ_
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRSTCPU_TDO
IMC_TDI
QN17 2N3904-S-OQN17 2N3904-S-O
RN5
RN5
4.7K-8P4R-O
4.7K-8P4R-O
V_DIMM
R61
R61
10K-04-O
10K-04-O
B
EC
A
B
C
D
E
CPU_VDDIO_SUSV_DIMM
1.5V
Pin naming for memory pins indicate
"DDR3"/"DDR2" connections.
4 4
3 3
MEM_MA_ADD[15..0]7
2 2
M_STP27M_STP27
M_STP25M_STP25
M_STP24M_STP24
MEM_MA1_CLK1_P7
MEM_MA1_CLK1_N7
MEM_MA0_CLK0_P7
MEM_MA0_CLK0_N7
MEM_MA1_CLK0_P7
MEM_MA1_CLK0_N7
MEM_MA0_CLK1_P7
MEM_MA0_CLK1_N7
M_STP22M_STP22
M_STP26M_STP26
M_STP28M_STP28
M_STP29M_STP29
MEM_MA0_CS_L17
MEM_MA0_CS_L07
MEM_MA0_ODT17
MEM_MA0_ODT07
MEM_MA1_CS_L17
MEM_MA1_CS_L07
MEM_MA_RESET-7 MEM_MB_RESET-8
MEM_MA_CAS-7
MEM_MA_WE-7
MEM_MA_RAS-7
MEM_MA_BANK27
MEM_MA_BANK17
MEM_MA_BANK07
MEM_MA_CKE07
MEM_MA_DQS_H77
MEM_MA_DQS_L77
MEM_MA_DQS_H67
MEM_MA_DQS_L67
MEM_MA_DQS_H57
MEM_MA_DQS_L57
MEM_MA_DQS_H47
MEM_MA_DQS_L47
MEM_MA_DQS_H37
MEM_MA_DQS_L37
MEM_MA_DQS_H27
MEM_MA_DQS_L27
MEM_MA_DQS_H17
MEM_MA_DQS_L17
MEM_MA_DQS_H07
MEM_MA_DQS_L07
MEM_MA_DM[7..0]7
DDR3 Memory Interface A DDR3 Memory Interface B
CPUB
CPUB
MEM_MA_DATA63
AE14
MEM_MA_DATA62
AG14
MEM_MA_DATA61
AG16
MEM_MA_DATA60
AD17
MEM_MA_DATA59
AD13
MEM_MA_DATA58
AE13
MEM_MA_DATA57
AG15
MEM_MA_DATA56
AE16
MEM_MA_DATA55
AG17
MEM_MA_DATA54
AE18
MEM_MA_DATA53
AD21
MEM_MA_DATA52
AG22
MEM_MA_DATA51
AE17
MEM_MA_DATA50
AF17
MEM_MA_DATA49
AF21
MEM_MA_DATA48
AE21
MEM_MA_DATA47
AF23
MEM_MA_DATA46
AE23
MEM_MA_DATA45
AJ26
MEM_MA_DATA44
AG26
MEM_MA_DATA43
AE22
MEM_MA_DATA42
AG23
MEM_MA_DATA41
AH25
MEM_MA_DATA40
AF25
MEM_MA_DATA39
AJ28
MEM_MA_DATA38
AJ29
MEM_MA_DATA37
AF29
MEM_MA_DATA36
AE26
MEM_MA_DATA35
AJ27
MEM_MA_DATA34
AH27
MEM_MA_DATA33
AG29
MEM_MA_DATA32
AF27
MEM_MA_DATA31
E29
MEM_MA_DATA30
E28
MEM_MA_DATA29
D27
MEM_MA_DATA28
C27
MEM_MA_DATA27
G26
MEM_MA_DATA26
F27
MEM_MA_DATA25
C28
MEM_MA_DATA24
E27
MEM_MA_DATA23
F25
MEM_MA_DATA22
E25
MEM_MA_DATA21
E23
MEM_MA_DATA20
D23
MEM_MA_DATA19
E26
MEM_MA_DATA18
C26
MEM_MA_DATA17
G23
MEM_MA_DATA16
F23
MEM_MA_DATA15
E22
MEM_MA_DATA14
E21
MEM_MA_DATA13
F17
MEM_MA_DATA12
G17
MEM_MA_DATA11
G22
MEM_MA_DATA10
F21
MEM_MA_DATA9
G18
MEM_MA_DATA8
E17
MEM_MA_DATA7
G16
MEM_MA_DATA6
E15
MEM_MA_DATA5
G13
MEM_MA_DATA4
H13
MEM_MA_DATA3
H17
MEM_MA_DATA2
E16
MEM_MA_DATA1
E14
MEM_MA_DATA0
G14
MEM_MA_DQS_H8
J28
MEM_MA_DQS_L8
J27
J25
MEM_MA_CHECK7
K25
MEM_MA_CHECK6
J26
MEM_MA_CHECK5
G28
MEM_MA_CHECK4
G27
MEM_MA_CHECK3
L24
MEM_MA_CHECK2
K27
MEM_MA_CHECK1MEM_MA_DQS_H0
H29
MEM_MA_CHECK0
H27
W30
EVENT pins are for future AM3r2
1 2
R259 300-04R259 300-04
MEM_MA_DATA[63..0] 7 MEM_MB_DATA[63..0] 8
MEM_MB_DQS_H[8..0]8
MEM_MB_DQS_L[8..0]8
MEM_MA_DQS_H8 7
MEM_MA_DQS_L8 7
MEM_MA_DM8 7
MEM_MA_CHECK[7..0] 7 MEM_MB_CHECK[7..0] 8
Layout: Route as 60 ohms
with 5/10 W/S from CPU pins.
MEM_MA_EVENT_L 7
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_L0
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
AG21
AG20
AE20
AE19
AC25
AA24
AE28
AC28
AD27
AA25
AE27
AC27
AB25
AB27
AA26
AA27
AC26
AD15
AE15
AG18
AG19
AG24
AG25
AG27
AG28
AF15
AF19
AH29
U27
U26
V27
W27
W26
W25
U24
V24
G19
H19
G20
G21
E20
N25
Y27
L27
M25
M27
N24
N26
P25
Y25
N27
R24
P27
R25
R26
R27
T25
U25
T27
W24
D29
C29
C25
D25
E19
F19
F15
G15
AJ25
B29
E24
E18
H15
MA_CLK_H7
MA_CLK_L7
MA_CLK_H6
MA_CLK_L6
MA_CLK_H5
MA_CLK_L5
MA_CLK_H4
MA_CLK_L4
MA_CLK_H3
MA_CLK_L3
MA_CLK_H2
MA_CLK_L2
MA_CLK_H1
MA_CLK_L1
MA_CLK_H0
MA_CLK_L0
MA0_CS_L1
MA0_CS_L0
MA0_ODT1
MA0_ODT0
MA1_CS_L1
MA1_CS_L0
MA1_ODT1
MA1_ODT0
MA_RESET_L
MA_CAS_L
MA_WE_L
MA_RAS_L
MA_BANK2
MA_BANK1
MA_BANK0
MA_CKE1
MA_CKE0
MA_ADD15
MA_ADD14
MA_ADD13
MA_ADD12
MA_ADD11
MA_ADD10
MA_ADD9
MA_ADD8
MA_ADD7
MA_ADD6
MA_ADD5
MA_ADD4
MA_ADD3
MA_ADD2
MA_ADD1
MA_ADD0
MA_DQS_H7
MA_DQS_L7
MA_DQS_H6
MA_DQS_L6
MA_DQS_H5
MA_DQS_L5
MA_DQS_H4
MA_DQS_L4
MA_DQS_H3
MA_DQS_L3
MA_DQS_H2
MA_DQS_L2
MA_DQS_H1
MA_DQS_L1
MA_DQS_H0
MA_DQS_L0
MA_DM7
MA_DM6
MA_DM5
MA_DM4
MA_DM3
MA_DM2
MA_DM1
MA_DM0
ZIF-941P-S
ZIF-941P-S
MA_DATA63
MA_DATA62
MA_DATA61
MA_DATA60
MA_DATA59
MA_DATA58
MA_DATA57
MA_DATA56
MA_DATA55
MA_DATA54
MA_DATA53
MA_DATA52
MA_DATA51
MA_DATA50
MA_DATA49
MA_DATA48
MA_DATA47
MA_DATA46
MA_DATA45
MA_DATA44
MA_DATA43
MA_DATA42
MA_DATA41
MA_DATA40
MA_DATA39
MA_DATA38
MA_DATA37
MA_DATA36
MA_DATA35
MA_DATA34
MA_DATA33
MA_DATA32
MA_DATA31
MA_DATA30
MA_DATA29
MA_DATA28
MA_DATA27
MA_DATA26
MA_DATA25
MA_DATA24
MA_DATA23
MA_DATA22
MA_DATA21
MA_DATA20
MA_DATA19
MA_DATA18
MA_DATA17
MA_DATA16
MA_DATA15
MA_DATA14
MA_DATA13
MA_DATA12
MEM CHA
MEM CHA
MA_DATA11
MA_DATA10
MA_DATA9
MA_DATA8
MA_DATA7
MA_DATA6
MA_DATA5
MA_DATA4
MA_DATA3
MA_DATA2
MA_DATA1
MA_DATA0
MA_DQS_H8
MA_DQS_L8
MA_DM8
MA_CHECK7
MA_CHECK6
MA_CHECK5
MA_CHECK4
MA_CHECK3
MA_CHECK2
MA_CHECK1
MA_CHECK0
MA_EVENT_L
Pin naming for memory pins indicate
"DDR3"/"DDR2" connections.
M_TP30M_TP30
M_TP33M_TP33
M_TP34M_TP34
M_TP35M_TP35M_STP23M_STP23
MEM_MB1_CLK1_P8
MEM_MB1_CLK1_N8
MEM_MB0_CLK0_P8
MEM_MB0_CLK0_N8
MEM_MB1_CLK0_P8
MEM_MB1_CLK0_N8
MEM_MB0_CLK1_P8
MEM_MB0_CLK1_N8
M_TP32M_TP32
M_TP31M_TP31
M_TP29M_TP29
M_TP28M_TP28
MEM_MB0_CS_L18
MEM_MB0_CS_L08
MEM_MB0_ODT18
MEM_MB0_ODT08
MEM_MB1_CS_L18
MEM_MB1_CS_L08
MEM_MB1_ODT18MEM_MA1_ODT17
MEM_MB1_ODT08MEM_MA1_ODT07
MEM_MB_CAS-8
MEM_MB_WE-8
MEM_MB_RAS-8
MEM_MB_BANK28
MEM_MB_BANK18
MEM_MB_BANK08
MEM_MB_CKE18MEM_MA_CKE17
MEM_MB_CKE08
MEM_MB_ADD[15..0]8
MEM_MB_DQS_H[8..0]
MEM_MB_DQS_L[8..0]
MEM_MB_DQS_H78
MEM_MB_DQS_L78
MEM_MB_DQS_H68
MEM_MB_DQS_L68
MEM_MB_DQS_H58
MEM_MB_DQS_L58
MEM_MB_DQS_H48
MEM_MB_DQS_L48
MEM_MB_DQS_H38
MEM_MB_DQS_L38
MEM_MB_DQS_H28
MEM_MB_DQS_L28
MEM_MB_DQS_H18
MEM_MB_DQS_L18
MEM_MB_DQS_H08
MEM_MB_DQS_L08
MEM_MB_DM[7..0]8
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
AJ19
AK19
AL19
AL18
AE30
AC31
AF31
AD29
AE29
AB31
AG31
AD31
AC29
AC30
AB29
AA31
AA28
AE31
AA29
AA30
AK13
AJ13
AK17
AJ17
AK23
AL23
AL28
AL29
AJ14
AH17
AJ23
AK29
W29
W28
W31
M31
M29
U31
U30
Y31
Y30
V31
A18
A19
C19
D19
B19
N31
N28
N29
N30
P29
P31
R29
R28
R31
R30
T31
T29
U29
U28
D31
C31
C24
C23
D17
C17
C14
C13
C30
A23
B17
B13
CPUC
CPUC
MB_CLK_H7
MB_CLK_L7
MB_CLK_H6
MB_CLK_L6
MB_CLK_H5
MB_CLK_L5
MB_CLK_H4
MB_CLK_L4
MB_CLK_H3
MB_CLK_L3
MB_CLK_H2
MB_CLK_L2
MB_CLK_H1
MB_CLK_L1
MB_CLK_H0
MB_CLK_L0
MB0_CS_L1
MB0_CS_L0
MB0_ODT1
MB0_ODT0
MB1_CS_L1
MB1_CS_L0
MB1_ODT1
MB1_ODT0
MB_RESET_L
MB_CAS_L
MB_WE_L
MB_RAS_L
MB_BANK2
MB_BANK1
MB_BANK0
MB_CKE1
MB_CKE0
MB_ADD15
MB_ADD14
MB_ADD13
MB_ADD12
MB_ADD11
MB_ADD10
MB_ADD9
MB_ADD8
MB_ADD7
MB_ADD6
MB_ADD5
MB_ADD4
MB_ADD3
MB_ADD2
MB_ADD1
MB_ADD0
MB_DQS_H7
MB_DQS_L7
MB_DQS_H6
MB_DQS_L6
MB_DQS_H5
MB_DQS_L5
MB_DQS_H4
MB_DQS_L4
MB_DQS_H3
MB_DQS_L3
MB_DQS_H2
MB_DQS_L2
MB_DQS_H1
MB_DQS_L1
MB_DQS_H0
MB_DQS_L0
MB_DM7
MB_DM6
MB_DM5
MB_DM4
MB_DM3
MB_DM2
MB_DM1
MB_DM0
ZIF-941P-S
ZIF-941P-S
MEM CHB
MEM CHB
MB_DQS_H8
MB_DQS_L8
MB_CHECK7
MB_CHECK6
MB_CHECK5
MB_CHECK4
MB_CHECK3
MB_CHECK2
MB_CHECK1
MB_CHECK0
MB_EVENT_L
CPU Memory
MEM_MB_DATA63
AH13
MB_DATA63
MB_DATA62
MB_DATA61
MB_DATA60
MB_DATA59
MB_DATA58
MB_DATA57
MB_DATA56
MB_DATA55
MB_DATA54
MB_DATA53
MB_DATA52
MB_DATA51
MB_DATA50
MB_DATA49
MB_DATA48
MB_DATA47
MB_DATA46
MB_DATA45
MB_DATA44
MB_DATA43
MB_DATA42
MB_DATA41
MB_DATA40
MB_DATA39
MB_DATA38
MB_DATA37
MB_DATA36
MB_DATA35
MB_DATA34
MB_DATA33
MB_DATA32
MB_DATA31
MB_DATA30
MB_DATA29
MB_DATA28
MB_DATA27
MB_DATA26
MB_DATA25
MB_DATA24
MB_DATA23
MB_DATA22
MB_DATA21
MB_DATA20
MB_DATA19
MB_DATA18
MB_DATA17
MB_DATA16
MB_DATA15
MB_DATA14
MB_DATA13
MB_DATA12
MB_DATA11
MB_DATA10
MB_DATA9
MB_DATA8
MB_DATA7
MB_DATA6
MB_DATA5
MB_DATA4
MB_DATA3
MB_DATA2
MB_DATA1
MB_DATA0
MB_DM8
MEM_MB_DATA62
AL13
MEM_MB_DATA61
AL15
MEM_MB_DATA60
AJ15
MEM_MB_DATA59
AF13
MEM_MB_DATA58
AG13
MEM_MB_DATA57
AL14
MEM_MB_DATA56
AK15
MEM_MB_DATA55
AL16
MEM_MB_DATA54
AL17
MEM_MB_DATA53
AK21
MEM_MB_DATA52
AL21
MEM_MB_DATA51
AH15
MEM_MB_DATA50
AJ16
MEM_MB_DATA49
AH19
MEM_MB_DATA48
AL20
MEM_MB_DATA47
AJ22
MEM_MB_DATA46
AL22
MEM_MB_DATA45
AL24
MEM_MB_DATA44
AK25
MEM_MB_DATA43
AJ21
MEM_MB_DATA42
AH21
MEM_MB_DATA41
AH23
MEM_MB_DATA40
AJ24
MEM_MB_DATA39
AL27
MEM_MB_DATA38
AK27
MEM_MB_DATA37
AH31
MEM_MB_DATA36
AG30
MEM_MB_DATA35
AL25
MEM_MB_DATA34
AL26
MEM_MB_DATA33
AJ30
MEM_MB_DATA32
AJ31
MEM_MB_DATA31
E31
MEM_MB_DATA30
E30
MEM_MB_DATA29
B27
MEM_MB_DATA28
A27
MEM_MB_DATA27
F29
MEM_MB_DATA26
F31
MEM_MB_DATA25
A29
MEM_MB_DATA24
A28
MEM_MB_DATA23
A25
MEM_MB_DATA22
A24
MEM_MB_DATA21
C22
MEM_MB_DATA20
D21
MEM_MB_DATA19
A26
MEM_MB_DATA18
B25
MEM_MB_DATA17
B23
MEM_MB_DATA16
A22
MEM_MB_DATA15
B21
MEM_MB_DATA14
A20
MEM_MB_DATA13
C16
MEM_MB_DATA12
D15
MEM_MB_DATA11
C21
MEM_MB_DATA10
A21
MEM_MB_DATA9
A17
MEM_MB_DATA8
A16
MEM_MB_DATA7
B15
MEM_MB_DATA6
A14
MEM_MB_DATA5
E13
MEM_MB_DATA4
F13
MEM_MB_DATA3
C15
MEM_MB_DATA2
A15
MEM_MB_DATA1
A13
MEM_MB_DATA0
D13
J31
J30
J29
MEM_MB_CHECK7
K29
MEM_MB_CHECK6
K31
MEM_MB_CHECK5
G30
MEM_MB_CHECK4
G29
MEM_MB_CHECK3
L29
MEM_MB_CHECK2
L28
MEM_MB_CHECK1
H31
MEM_MB_CHECK0
G31
V29
EVENT pins are for future AM3r2
1 2
R260 300-04R260 300-04
MEM_MB_DQS_H8 8
MEM_MB_DQS_L8 8
MEM_MB_DM8 8
Layout: Route as 60 ohms
with 5/10 W/S from CPU pins.
MEM_MB_EVENT_L 8
CPU_VDDIO_SUSCPU_VDDIO_SUS
MEMORY CLOCK TRANSLATION
DIMM
MEM CHA
1 1
CPU
TO DIMMA0 & DIMMA1
A
A0 A1
B
DDR3 Memory Signal CPU Signal
DIMM A0
MEM_MA0_CLK1 MA_CLK2
MEM_MA0_CLK0 MA_CLK4
DIMM A1
MEM_MA1_CLK1 MA_CLK5
MEM_MA1_CLK0 MA_CLK3
DIMM B0
MEM_MB0_CLK1 MB_CLK2
MEM_MB0_CLK0 MB_CLK4
DIMM B1
MEM_MB1_CLK1 MB_CLK5
MEM_MB1_CLK0 MB_CLK3
MEM CHB
2413
CPU
TO DIMMB0 & DIMMB1
Title
Title
B0 B1
C
D
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
AM3 CPU MEMORY
AM3 CPU MEMORY
AM3 CPU MEMORY
IC780M-A2
IC780M-A2
IC780M-A2
E
4
4
4
of
of
of
1.0A
1.0A
1.0A
36Thursday, October 15, 2009
36Thursday, October 15, 2009
36Thursday, October 15, 2009
5
VCC3 VCC3
+12V
VCCNS_REF
D D
V_DIMM
VCC1.2
CPU_CLKIN_H10
CPU_CLKIN_L10
SB_CPUPWRGD11,21
LDT_STOP-17,21
LDT_RST-3,17,21
VRD_VID111
VRD_VID211
VRD_VID311
CPU_THERMDC28
CPU_THERMDA28
-CPU_THERMTRIP22
C C
B B
PROCHOT_L21
CPU_SIC22
CPU_SID22
CPU_CORE_FB11
CPU_CORE_FB-11
CPU_VDDNB_FB11
CPU_VDDNB_FB-11
CPU_DBREQ_3
CPU_DBRDY3
CPU_TCK3
CPU_TMS3
CPU_TDI3
CPU_TRST-3
CPU_TDO3
EN_VDDA28
2.5VREF
1.5V
1.2V
CPU_CLKP
CPU_CLKN
CPU_PWRGD
LDT_STOPLDT_RST-
CPU_PVEN
CPU_SVD
CPU_SVC
CPU_THERMDC
CPU_THERMDA
CPU_THERMTRIP_L
CPU_PROCHOT_L_15
CPU_SIC
CPU_SID
CPU_VDD_FB_H
CPU_VDD_FB_L
CPU_VDDNB_FB_H
CPU_VDDNB_FB_L
CPU_DBREQ_
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST-
CPU_TDO
VDDA_EN
+12V
VCCNS_REF
CPU_VDDIO_SUS
CPU_VDDHT
M_STP19M_STP19
M_STP4M_STP4
M_TP14M_TP14
M_TP8M_TP8
M_STP1M_STP1
M_STP2M_STP2
M_STP20M_STP20
M_STP18M_STP18
M_TP24M_TP24
for TSI 2009/05/08
M_TP6M_TP6
M_TP5M_TP5
M_STP5M_STP5
M_STP3M_STP3
for ACC 2009/09/10
a,Rshunt near CPU pin<600mil
b,Cseries as a pair within 25mil
c,Cseries to CPU pin trace length<1250mil
d,12:4:6:4:12(1080 for 93ohm)
VCC25A for CPU PLL
U5A
U5A
OP358-S
OP358-S
1
G
可使用
VCC3
DS
Q7
2N7002-SQ72N7002-S
12
EC51
EC51
22U-25DE
22U-25DE
VCC25A
PMS3904
？
VDDA_EN
VCCNS_REF
R261 10K-04R261 10K-04
1 2
A A
5
+12V
84
3
+
+
2
-
-
R262 0-04R262 0-04
1 2
12
R263
R263
10K-04-O
10K-04-O
如果有
overshoot,
Q7
4
CPU_VDDIO_SUS
12
R157
R157
1K-04-O
1K-04-O
CPU_VDDIO_SUS
12
R265
R265
15-1-06
15-1-06
0.25W
12
R266
R266
15-1-06
15-1-06
2 1
12mil(width):20mil(spacing)
4
VCC25A
FB7
FB7
FB120-08
FB120-08
1 2
CPU_VDDIO_PWRGD
C163
C163
.1U-04-O
.1U-04-O
2 1
CPU_M_VREF_SUS CPU_VDDIO_SUS
C282
C282
C283
C283
.1U-04
.1U-04
1000P-04
1000P-04
2 1
CPU_PWRGD
LDT_RSTLDT_STOP-
CPU_PRESENT_L_15
CPU_SIC
CPU_SID
CPU_TEST27_SINGLECHAIN
CPU_THERMTRIP_L_15
CPU_PROCHOT_L_15
CPU_TEST26_BURNIN_L
CPU_SA0
CPU_PWRGD
LDT_STOPLDT_RST-
a,15mil(width):20mil(spacing)
b,reference to GND
C277
C277
10U-X5-08
10U-X5-08
2 1
CPU_CLKP
CPU_CLKN CPU_SVD
RN29 300-8P4RRN29 300-8P4R
R271 1K-04-OR271 1K-04-O
R272 1K-04R272 1K-04
R273 1K-04-OR273 1K-04-O
RN30 300-8P4RRN30 300-8P4R
R274 0-04-OR274 0-04-O
C284 180P-04-OC284 180P-04-O
C285 180P-04-OC285 180P-04-O
C286 180P-04-OC286 180P-04-O
C279
21
21
2
4
6
8
2
4
6
8
21
21
21
C279
3300P-04-O
3300P-04-O
2 1
12
R264
R264
169-1-04
169-1-04
M_TP19M_TP19
M_TP18M_TP18
M_TP12M_TP12
M_STP13M_STP13
M_TP17M_TP17
M_TP11M_TP11
M_STP12M_STP12
M_STP9M_STP9
M_STP7M_STP7
M_STP14M_STP14
M_STP10M_STP10
CPU_VDDIO_SUS
C278
C278
.22U-06
.22U-06
2 1
C280 3900P-04C280 3900P-04
C281 3900P-04C281 3900P-04
R267 39.2-1-04R267 39.2-1-04
1 2
R268 39.2-1-04R268 39.2-1-04
1 2
R269 511-1-04R269 511-1-04
1 2
R270 511-1-04R270 511-1-04
1 2
1
3
5
7
1 2
1 2
1 2
1
3
5
7
1 2
3
2.5V / 0.25A
CPU_VDDA_RUN
M_TP25M_TP25
M_TP13M_TP13
M_STP8M_STP8
M_STP21M_STP21
3
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
CPU_PWRGD
LDT_STOPLDT_RST-
CPU_PRESENT_L_15
CPU_SIC
CPU_SID
CPU_SA0
CPU_ALERT_
CPU_TDI
CPU_TRSTCPU_TCK
CPU_TMS
CPU_DBREQ_
CPU_VDD_FB_H
CPU_VDD_FB_L
CPU_VDDIO_PWRGD
CPU_VTT_SUS_SENSE
CPU_M_ZN
CPU_M_ZP
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST25_H_BYPASSCLK_L
CPU_TEST19_PLLTEST0
CPU_TEST18_PLLTEST1
CPU_TEST17_BP3
CPU_TEST16_BP2
CPU_TEST15_BP1
CPU_TEST14_BP0
CPU_TEST12_SCANSHIFTENB
CPU_TEST7_ANALOG_T
CPU_TEST6_DIECRACKMON
CPU_TEST3_GATE0
CPU_TEST2_DRAIN0
AL10
AJ10
AH10
AH11
AJ11
C10
D10
AL3
AL6
AK6
AK4
AL4
AL9
E12
F12
A10
B10
F10
AJ7
AH9
AJ5
AH7
AJ6
C18
C20
G24
G25
H25
A8
B8
C9
D8
C7
A5
G2
G1
F3
E9
F6
D6
E7
F8
C5
E5
F2
L25
L26
CPUD
CPUD
VDDA_1
VDDA_2
CLKIN_H
CLKIN_L
PWROK
LDTSTOP_L
RESET_L
CPU_PRESENT_L
SIC
SID
SA0
ALERT_L
TDI
TRST_L
TCK
TMS
DBREQ_L
VDD_FB_H
VDD_FB_L
M_VDDIO_PWRGD
VDDR_SENSE
M_VREF
M_ZN
M_ZP
TEST25_H
TEST25_L
TEST19
TEST18
TEST13
TEST9
TEST17
TEST16
TEST15
TEST14
TEST12
TEST7
TEST6
TEST3
TEST2
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
INT. MISC.
INT. MISC.
RSVD6
RSVD7
RSVD8
ZIF-941P-S
ZIF-941P-S
MISC.
MISC.
2
CORE_TYPE
VID5
VID4
SVC/VID3
SVD/VID2
PVIEN/VID1
VID0
THERMDC
THERMDA
THERMTRIP_L
PROCHOT_L
TDO
DBRDY
VDDIO_FB_H
VDDIO_FB_L
VDDNB_FB_H
VDDNB_FB_L
PSI_L
HTREF1
HTREF0
TEST29_H
TEST29_L
TEST24
TEST23
TEST22
TEST21
TEST20
TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
2
CPU_VDDIO_SUS
12
R275
R275
10K-04
10K-04
B
CPU_THERMTRIP_L_15 CPU_THERMTRIP_L
CPU_CORE_TYPE_L
G5
CPU_VID5
D2
CPU_VID4
D1
CPU_SVC
C1
E3
CPU_PVEN
E2
CPU_VID0
E1
CPU_THERMDC
AG9
CPU_THERMDA
AG8
CPU_THERMTRIP_L_15
AK7
CPU_PROCHOT_L_15
AL7
CPU_TDO
AK10
CPU_DBRDY
B6
CPU_VDDIO_FB_H
AK11
CPU_VDDIO_FB_L
AL11
CPU_VDDNB_FB_H
G4
CPU_VDDNB_FB_L
G3
CPU_PSI-
F1
CPU_HTREF1CPU_M_VREF
V8
CPU_HTREF0
V7
M_TP3M_TP3
CPU_TEST29_H_FBCLKOUT_H
C11
CPU_TEST29_L_FBCLKOUT_L
D11
CPU_TEST24_SCANCLK1
AK8
CPU_TEST23_TSTUPD
AH8
CPU_TEST22_SCANSHIFTEN
AJ9
CPU_TEST21_SCANEN
AL8
CPU_TEST20_SCANCLK2
AJ8
CPU_TEST28_H_PLLCHRZ_H
J10
CPU_TEST28_L_PLLCHRZ_L
H9
CPU_TEST27_SINGLECHAIN
AK9
CPU_TEST26_BURNIN_L
AK5
CPU_TEST10_ANALOGOUT
G7
CPU_TEST8_DIG_T
D4
L30
L31
AD25
AE24
AE25
AJ18
AJ20
AK3
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
E C
QN12 2N3904-SQN12 2N3904-S
R276 1K-04R276 1K-04
M_TP10M_TP10
M_TP9M_TP9
R277 1K-04R277 1K-04
R278 1K-04R278 1K-04
M_TP7M_TP7
M_TP26M_TP26
M_TP27M_TP27
M_TP1M_TP1
M_TP4M_TP4
M_TP20M_TP20
M_STP11M_STP11
M_TP22M_TP22
M_TP21M_TP21
M_TP16M_TP16
M_STP17M_STP17
M_STP16M_STP16
M_TP23M_TP23
M_TP15M_TP15
M_STP15M_STP15
M_STP6M_STP6
Layout: Route as 80 ohms diff impedance.
Keep trace to resistor < 1" from CPU pins.
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
AM3 CPU CONTROL&MISC
AM3 CPU CONTROL&MISC
AM3 CPU CONTROL&MISC
CPU_VDDIO_SUS
1 2
1 2
1 2
R280 44.2-1-04R280 44.2-1-04
1 2
1 2
R281 44.2-1-04R281 44.2-1-04
R282 80.6-1-04R282 80.6-1-04
1 2
IC780M-A2
IC780M-A2
IC780M-A2
1
CPU_VDDHT
1
R279
R279
300-04
300-04
1 2
for AM3 CPU
5
5
5
1.0A
1.0A
1.0A
of
36Thursday, October 15, 2009
of
36Thursday, October 15, 2009
of
36Thursday, October 15, 2009
5
CPU_VDD_RUN CPU_VDD_RUN
VCC_CORE
D D
V_DIMM
CPU_VDDNB
VCC1.2
VCC1.2
C C
B B
1.5V
1.2V
CPU_VDD_RUN
CPU_VDDIO_SUS
CPU_VDDNB_RUN
CPU_VDDR
CPU_VDDHT
CPUE
CPUE
B3
VDD_1
C2
VDD_2
C4
VDD_3
D3
VDD_4
D5
VDD_5
E4
VDD_6
E6
VDD_7
F5
VDD_8
F7
VDD_9
G6
VDD_10
G8
VDD_11
H7
VDD_12
H11
VDD_13
H23
VDD_14
J8
VDD_15
J12
VDD_16
J14
VDD_17
J16
VDD_18
J18
VDD_19
J20
VDD_20
J22
VDD_21
J24
VDD_22
K7
VDD_23
K9
VDD_24
K11
VDD_25
K13
VDD_26
K15
VDD_27
K17
VDD_28
K19
VDD_29
K21
VDD_30
K23
VDD_31
L4
VDD_32
L5
VDD_33
L8
VDD_34
L10
VDD_35
L12
VDD_36
L14
VDD_37
L16
VDD_38
L18
VDD_39
L20
VDD_40
L22
VDD_41
M2
VDD_42
M3
VDD_43
M7
VDD_44
M9
VDD_45
M11
VDD_46
M13
VDD_47
M15
VDD_48
M17
VDD_49
M19
VDD_50
M21
VDD_51
M23
VDD_52
N8
VDD_53
N10
VDD_54
N12
VDD_55
N14
VDD_56
N16
VDD_57
N18
VDD_58
N20
VDD_59
N22
VDD_60
P7
VDD_61
P9
VDD_62
P11
VDD_63
P13
VDD_64
P15
VDD_65
P17
VDD_66
P19
VDD_67
P21
VDD_68
P23
VDD_69
R4
VDD_70
R5
VDD_71
R8
VDD_72
R10
VDD_73
R12
VDD_74
R14
VDD_75
R16
VDD_76
R18
VDD_77
R20
VDD_78
R22
VDD_79
T2
VDD_80
T3
VDD_81
T7
VDD_82
T9
VDD_83
T11
VDD_84
T13
VDD_85
ZIF-941P-S
ZIF-941P-S
4
A3
VSS_1
A7
VSS_2
A9
VSS_3
A11
VSS_4
B4
VSS_5
B9
VSS_6
B11
VSS_7
B14
VSS_8
B16
VSS_9
B18
VSS_10
B20
VSS_11
B22
VSS_12
B24
VSS_13
B26
VSS_14
B28
VSS_15
B30
VSS_16
C3
VSS_17
D14
VSS_18
D16
VSS_19
D18
VSS_20
D20
VSS_21
D22
VSS_22
D24
VSS_23
D26
VSS_24
D28
VSS_25
D30
VSS_26
E11
VSS_27
F4
VSS_28
F14
VSS_29
F16
VSS_30
F18
VSS_31
F20
VSS_32
F22
VSS_33
F24
VSS_34
F26
VSS_35
F28
VSS_36
F30
VSS_37
G9
VSS_38
G11
VSS_39
H8
VSS_40
H10
VSS_41
H12
VSS_42
H14
VSS_43
H16
VSS_44
H18
VSS_45
H24
VSS_46
H26
VSS_47
H28
VSS_48
H30
VSS_49
J4
VSS_50
POWER/GND1
POWER/GND1
J5
VSS_51
J7
VSS_52
J9
VSS_53
J11
VSS_54
J13
VSS_55
J15
VSS_56
J17
VSS_57
J19
VSS_58
J21
VSS_59
J23
VSS_60
K2
VSS_61
K3
VSS_62
K8
VSS_63
K10
VSS_64
K12
VSS_65
K14
VSS_66
K16
VSS_67
K18
VSS_68
K20
VSS_69
K22
VSS_70
K24
VSS_71
K26
VSS_72
K28
VSS_73
K30
VSS_74
L7
VSS_75
L9
VSS_76
L11
VSS_77
L13
VSS_78
L15
VSS_79
L17
VSS_80
L19
VSS_81
L21
VSS_82
L23
VSS_83
M8
VSS_84
M10
VSS_85
W10
W12
W14
W16
W18
W20
W22
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AC4
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC20
AC22
AD2
AD3
AD7
AD9
AD11
AD23
AE10
AE12
AF11
AG4
AG5
AG7
AH2
AH3
3
CPUF
CPUF
T15
VDD_86
T17
VDD_87
T19
VDD_88
T21
VDD_89
T23
VDD_90
U8
VDD_91
U10
VDD_92
U12
VDD_93
U14
VDD_94
U16
VDD_95
U18
VDD_96
U20
VDD_97
U22
VDD_98
V9
VDD_99
V11
VDD_100
V13
VDD_101
V15
VDD_102
V17
VDD_103
V19
VDD_104
V21
VDD_105
V23
VDD_106
W4
VDD_107
W5
VDD_108
W8
VDD_109
VDD_110
VDD_111
VDD_112
VDD_113
VDD_114
VDD_115
VDD_116
Y2
VDD_117
Y3
VDD_118
Y7
VDD_119
Y9
VDD_120
Y11
VDD_121
Y13
VDD_122
Y15
VDD_123
Y17
VDD_124
Y19
VDD_125
Y21
VDD_126
Y23
VDD_127
AA8
VDD_128
VDD_129
VDD_130
VDD_131
VDD_132
VDD_133
VDD_134
VDD_135
AB7
VDD_136
AB9
VDD_137
VDD_138
VDD_139
VDD_140
VDD_141
VDD_142
VDD_143
VDD_144
VDD_145
VDD_146
VDD_147
VDD_148
VDD_149
VDD_150
VDD_151
VDD_152
VDD_153
VDD_154
VDD_155
VDD_156
VDD_157
VDD_158
VDD_159
VDD_160
VDD_161
VDD_162
AF7
VDD_163
AF9
VDD_164
VDD_165
VDD_166
VDD_167
VDD_168
VDD_169
VDD_170
ZIF-941P-S
ZIF-941P-S
POWER/GND2
POWER/GND2
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
M12
M14
M16
M18
M20
M22
N4
N5
N7
N9
N11
N13
N15
N17
N19
N21
N23
P2
P3
P8
P10
P12
P14
P16
P18
P20
P22
R7
R9
R11
R13
R15
R17
R19
R21
R23
T8
T10
T12
T14
T16
T18
T20
T22
U4
U5
U7
U9
U11
U13
U15
U17
U19
U21
U23
V2
V3
V10
V12
V14
V16
V18
V20
V22
W7
W9
W11
W13
W15
W17
W19
W21
W23
Y8
Y10
Y12
Y14
Y16
Y18
Y20
Y22
AA4
AA5
AA7
AA9
CPU_VDDNB_RUN CPU_VDDHT
A4
A6
B5
B7
C6
C8
D7
D9
E8
E10
F9
F11
G10
G12
MT1
MT2
MT3
MT4
MT5
MT6
MT7
MT8
MT9
MT10
MT11
MT12
MT13
MT14
MT15
MT16
MT17
B2
H20
AE7
MT18
MT19
MT20
MT21
MT22
MT23
MT24
MT25
MT26
ZIF-941P-S
ZIF-941P-S
CPU_VDDNB_RUN
C343
C343
10U-X5-08
10U-X5-08
2 1
CPUG
CPUG
VDDNB_1
VDDNB_2
VDDNB_3
VDDNB_4
VDDNB_5
VDDNB_6
VDDNB_7
VDDNB_8
VDDNB_9
VDDNB_10
VDDNB_11
VDDNB_12
VDDNB_13
VDDNB_14
MT1
MT2
MT3
MT4
MT5
MT6
MT7
MT8
MT9
MT10
MT11
MT12
MT13
MT14
MT15
MT16
MT17
NP/RSVD
NP/VSS1
NP/VSS2
MT18
MT19
MT20
MT21
MT22
MT23
MT24
MT25
MT26
Processor Power and Ground
POWER/GND3
POWER/GND3
MT27
MT28
MT29
MT30
MT31
MT32
DHOLE1
DHOLE2
MT27
MT28
MT29
MT30
MT31
MT32
DHOLE1
DHOLE2
DHOLE3
C344
C344
C345
C345
10U-08
10U-08
10U-08
10U-08
2 1
2 1
CPU_VDDHT
C340
C340
C339
C339
.22U-06
.22U-06
10U-X5-08
10U-X5-08
2 1
2 1
2
M_ELT1M_ELT1
AA11
VSS_171
AA13
VSS_172
AA15
VSS_173
AA17
VSS_174
AA19
VSS_175
AA21
VSS_176
AA23
VSS_177
AB2
VSS_178
AB3
VSS_179
AB8
VSS_180
AB10
VSS_181
AB12
VSS_182
AB14
VSS_183
AB16
VSS_184
AB18
VSS_185
AB20
VSS_186
AB22
VSS_187
AC7
VSS_188
AC9
VSS_189
AC11
VSS_190
AC13
VSS_191
AC15
VSS_192
AC17
VSS_193
AC19
VSS_194
AC21
VSS_195
AC23
VSS_196
AD8
VSS_197
AD10
VSS_198
AD12
VSS_199
AD14
VSS_200
AD16
VSS_201
AD20
VSS_202
AD22
VSS_203
AD24
VSS_204
AE4
VSS_205
AE5
VSS_206
AE11
VSS_207
AF2
VSS_208
AF3
VSS_209
AF8
VSS_210
AF10
VSS_211
AF12
VSS_212
AF14
VSS_213
AF16
VSS_214
DHOLE3
DHOLE4
DHOLE4
Add MTx and to GND for new net-in method
C346
C346
.22U-06
.22U-06
2 1
2 1
C341
C341
180P-04
180P-04
2 1
2 1
C347
C347
.22U-06
.22U-06
C342
C342
180P-04
180P-04
VDDR_HT3
CPU_VDDIO_SUS
C348
C348
.01U-04
.01U-04
2 1
Must be check VLDT and VDDR again for layout convenient?
CPUH
CPUH
AJ1
VLDT_A_1
AJ2
VLDT_A_2
AJ3
VLDT_A_3
AJ4
VLDT_A_4
A12
VDDR_1
B12
VDDR_2
C12
VDDR_3
D12
VDDR_4
M24
VDDIO_1
M26
VDDIO_2
M28
VDDIO_3
M30
VDDIO_4
P24
VDDIO_5
P26
VDDIO_6
P28
VDDIO_7
P30
VDDIO_8
T24
VDDIO_9
T26
VDDIO_10
T28
VDDIO_11
T30
VDDIO_12
V25
VDDIO_13
V26
VDDIO_14
V28
VDDIO_15
V30
VDDIO_16
Y24
VDDIO_17
Y26
VDDIO_18
Y28
VDDIO_19
Y29
VDDIO_20
AB24
VDDIO_21
AB26
VDDIO_22
AB28
VDDIO_23
AB30
VDDIO_24
AC24
VDDIO_25
AD26
VDDIO_26
AD28
VDDIO_27
AD30
VDDIO_28
AF30
VDDIO_29
ZIF-941P-S
ZIF-941P-S
CPU_VDDR
C349
C349
10U-X5-08
10U-X5-08
2 1
CPU_VDDR
C338
C338
10U-08
10U-08
2 1
CPU_VDDIO_SUS
C293
C293
10U-08-O
10U-08-O
2 1
C350
C350
10U-08
10U-08
2 1
C394
C394
10U-X5-08
10U-X5-08
2 1
VLDT_B_1
VLDT_B_2
VLDT_B_3
VLDT_B_4
VDDR_5
VDDR_6
VDDR_7
VDDR_8
VDDR_9
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
POWER/GND4
POWER/GND4
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
C351
C351
.22U-06
.22U-06
2 1
2 1
C295
C295
10U-08-O
10U-08-O
2 1
2 1
C352
C352
.01U-04
.01U-04
C296
C296
10U-X5-08
10U-X5-08
1
H1
H2
H5
H6
AG12
AH12
AJ12
AK12
AL12
AF18
AF20
AF22
AF24
AF26
AF28
AG10
AG11
AH14
AH16
AH18
AH20
AH22
AH24
AH26
AH28
AH30
AK2
AK14
AK16
AK18
AK20
AK22
AK24
AK26
AK28
AK30
AL5
VDDR_HT3
C334
C334
180P-04
180P-04
2 1
VLDT_HT3_RUN_B
CPU_VDDR
C336
C336
1U-06
1U-06
2 1
C335
C335
180P-04
180P-04
2 1
2 1
C353
C353
10U-X5-08
10U-X5-08
2 1
C337
C337
10U-08
10U-08
Bottom Side Decoupling
CPU_VDDIO_SUS VDDR_HT3 CPU_VDD_RUNCPU_VDDNB_RUN
SC87
SC87
SC88
SC88
SC89
SC89
SC90
10U-08-X-O
10U-08-X-O
10U-08-X
10U-08-X
2 1
2 1
A A
CPU_VDD_RUN
SC97
SC97
10U-08-X-O
10U-08-X-O
2 1
SC98
SC98
10U-08-X-O
10U-08-X-O
2 1
5
10U-08-X
10U-08-X
2 1
SC99
SC99
10U-X5-08-X
10U-X5-08-X
2 1
SC90
10U-08-X
10U-08-X
2 1
SC100
SC100
10U-08-X
10U-08-X
2 1
SC91
SC91
10U-08-X
10U-08-X
2 1
SC101
SC101
10U-X5-08-X
10U-X5-08-X
2 1
2 1
2 1
SC92
SC92
.01U-04-X
.01U-04-X
SC102
SC102
10U-08-X
10U-08-X
SC93
SC93
.01U-04-X
.01U-04-X
2 1
SC103
SC103
10U-X5-08-X
10U-X5-08-X
2 1
SC94
SC94
.22U-06-X
.22U-06-X
2 1
SC104
SC104
10U-08-X
10U-08-X
2 1
4
SC95
SC95
.22U-06-X
.22U-06-X
2 1
SC105
SC105
10U-X5-08-X
10U-X5-08-X
2 1
SC96
SC96
180P-04-X
180P-04-X
2 1
SC106
SC106
10U-08-X
10U-08-X
2 1
SC107
SC107
10U-08-X
10U-08-X
2 1
2 1
SC108
SC108
10U-08-X
10U-08-X
SC109
SC109
10U-X5-08-X
10U-X5-08-X
2 1
SC110
SC110
10U-08-X
10U-08-X
2 1
C287
C287
10U-X5-08
10U-X5-08
2 1
10U-X5-08-X
10U-X5-08-X
2 1
SC111
SC111
C288
C288
.22U-06
.22U-06
2 1
SC112
SC112
10U-08-X
10U-08-X
2 1
3
C323
C323
.01U-04
.01U-04
2 1
10U-X5-08-X
10U-X5-08-X
2 1
SC113
SC113
C326
C326
.01U-04
.01U-04
2 1
SC115
SC115
SC114
SC114
10U-X5-08-X
10U-X5-08-X
10U-08-X
10U-08-X
2 1
2 1
2 1
SC116
SC116
10U-08-X
10U-08-X
C289 .22U-06C289 .22U-06
21
C290 .22U-06C290 .22U-06
21
SC117
SC117
10U-X5-08-X
10U-X5-08-X
2 1
2 1
SC118
SC118
.22U-06-X
.22U-06-X
2
SC119
SC119
.22U-06-X
.22U-06-X
2 1
C291 .22U-06C291 .22U-06
EMC
SC120
SC120
.01U-04-X
.01U-04-X
2 1
21
SC121
SC121
.01U-04-X
.01U-04-X
2 1
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
CPU_VDDNB_RUN
C292
C292
.1U-04
.1U-04
2 1
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
AM3 CPU PWR&GND
AM3 CPU PWR&GND
AM3 CPU PWR&GND
IC780M-A2
IC780M-A2
IC780M-A2
1
6
6
6
of
of
of
1.0A
1.0A
1.0A
36Thursday, October 15, 2009
36Thursday, October 15, 2009
36Thursday, October 15, 2009
5
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
VCC3 VCC3
SMBCK8,10,19,20,22,26
D D
C C
B B
SMBDT8,10,19,20,22,26
MEM_MA_DATA[63..0]4
MEM_MA_CHECK[7..0]4
MEM_MA_ADD[15..0]4
MEM_MA_BANK04
MEM_MA_BANK14
MEM_MA_BANK24
MEM_MA_DM[7..0]4
MEM_MA_DM84
MEM_MA_DQS_H[8..0]4
MEM_MA_DQS_L[8..0]4
MEM_MA_RAS-4
MEM_MA_CAS-4
MEM_MA_WE-4
MEM_MA_CKE04
MEM_MA_CKE14
MEM_MA_EVENT_L4
MEM_MA_RESET-4
MEM_MA0_CS_L04
MEM_MA0_CS_L14
MEM_MA0_ODT04
MEM_MA0_ODT14
MEM_MA0_CLK0_P4
MEM_MA0_CLK0_N4
MEM_MA0_CLK1_P4
MEM_MA0_CLK1_N4
MEM_MA1_CS_L04
MEM_MA1_CS_L14
MEM_MA1_ODT04
MEM_MA1_ODT14
MEM_MA1_CLK0_P4
MEM_MA1_CLK0_N4
MEM_MA1_CLK1_P4
MEM_MA1_CLK1_N4
SCLK0
SDATA0
MEM_MA_DATA[63..0]
MEM_MA_CHECK[7..0]
MEM_MA_ADD[15..0]
MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2
MEM_MA_DM[7..0]
MEM_MA_DM8
MEM_MA_DQS_H[8..0]
MEM_MA_DQS_L[8..0]
MEM_MA_RAS-
MEM_MA_CASMEM_MA_WE-
MEM_MA_CKE0
MEM_MA_CKE1
MEM_MA_EVENT_L
MEM_MA_RESET-
MEM_MA0_CS_L0
MEM_MA0_CS_L1
MEM_MA0_ODT0
MEM_MA0_ODT1
MEM_MA0_CLK0_P
MEM_MA0_CLK0_N
MEM_MA0_CLK1_P
MEM_MA0_CLK1_N
MEM_MA1_CS_L0
MEM_MA1_CS_L1
MEM_MA1_ODT0
MEM_MA1_ODT1
MEM_MA1_CLK0_P
MEM_MA1_CLK0_N
MEM_MA1_CLK1_P
MEM_MA1_CLK1_N
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
MEM_MA_DM8
MEM_MA_DQS_L0
MEM_MA_DQS_H0
MEM_MA_DQS_L1
MEM_MA_DQS_H1
MEM_MA_DQS_L2
MEM_MA_DQS_H2
MEM_MA_DQS_L3
MEM_MA_DQS_H3
MEM_MA_DQS_L4
MEM_MA_DQS_H4
MEM_MA_DQS_L5
MEM_MA_DQS_H5
MEM_MA_DQS_L6
MEM_MA_DQS_H6
MEM_MA_DQS_L7
MEM_MA_DQS_H7
MEM_MA_DQS_L8 MEM_MA_DATA43
MEM_MA_DQS_H8
MEM_MA_RASMEM_MA_CASMEM_MA_WE-
MEM_MA0_CS_L0
MEM_MA0_CS_L1
MEM_MA_CKE0
MEM_MA_CKE1
MEM_MA0_ODT0
MEM_MA0_ODT1
MEM_MA0_CLK0_P
MEM_MA0_CLK0_N
MEM_MA0_CLK1_P
MEM_MA0_CLK1_N
SCLK0
SDATA0
VCC3
MEM_MA_EVENT_L MEM_MA_EVENT_L
MEM_MA_RESET-
SMBus Addressing
4
DDR3_1A
DDR3_1A
188
181
61
180
59
58
178
56
177
175
70
55
174
196
172
171
71
190
52
125
134
143
152
203
212
221
230
161
6
7
15
16
24
25
33
34
84
85
93
94
102
103
111
112
42
43
192
74
73
193
76
50
169
195
77
184
185
63
64
117
237
118
238
236
167
48
49
187
198
168
53
68
79
DDR3-240P-OR
DDR3-240P-OR
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
BA0
BA1
BA2
DM0/DQS9
DM1/DQS10
DM2/DQS11
DM3/DQS12
DM4/DQS13
DM5/DQS14
DM6/DQS15
DM7/DQS16
DM8/DQS17
DQS0
DQS0
DQS1
DQS1
DQS2
DQS2
DQS3
DQS3
DQS4
DQS4
DQS5
DQS5
DQS6
DQS6
DQS7
DQS7
DQS8
DQS8
RAS
CAS
WE
S0
S1
CKE0
CKE1
ODT
RSVD/ODT1
CK0
CK0
CK1
CK1
SA0
SA1
SCL
SDA
VDDSPD
TEST
FREE1
FREE2
FREE3
FREE4
RESET
ERR_OUT
PAR_IN
RSVD/SPD
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQS9
DQS10
DQS11
DQS12
DQS13
DQS14
DQS15
DQS16
DQS17
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
3
MEM_MA_DATA0
3
MEM_MA_DATA1
4
MEM_MA_DATA2
9
MEM_MA_DATA3
10
MEM_MA_DATA4
122
MEM_MA_DATA5
123
MEM_MA_DATA6
128
MEM_MA_DATA7
129
MEM_MA_DATA8
12
MEM_MA_DATA9
13
MEM_MA_DATA10
18
MEM_MA_DATA11
19
MEM_MA_DATA12
131
MEM_MA_DATA13
132
MEM_MA_DATA14
137
MEM_MA_DATA15
138
MEM_MA_DATA16
21
MEM_MA_DATA17
22
MEM_MA_DATA18
27
MEM_MA_DATA19
28
MEM_MA_DATA20
140
MEM_MA_DATA21
141
MEM_MA_DATA22
146
MEM_MA_DATA23
147
MEM_MA_DATA24
30
MEM_MA_DATA25
31
MEM_MA_DATA26
36
MEM_MA_DATA27
37
MEM_MA_DATA28
149
MEM_MA_DATA29
150
MEM_MA_DATA30
155
MEM_MA_DATA31
156
MEM_MA_DATA32
81
MEM_MA_DATA33
82
MEM_MA_DATA34
87
MEM_MA_DATA35
88
MEM_MA_DATA36
200
MEM_MA_DATA37
201
MEM_MA_DATA38
206
MEM_MA_DATA39
207
MEM_MA_DATA40
90
MEM_MA_DATA41
91
MEM_MA_DATA42
96
MEM_MA_DATA43
97
MEM_MA_DATA44
209
MEM_MA_DATA45
210
MEM_MA_DATA46
215
MEM_MA_DATA47
216
MEM_MA_DATA48
99
MEM_MA_DATA49
100
MEM_MA_DATA50
105
MEM_MA_DATA51
106
MEM_MA_DATA52
218
MEM_MA_DATA53
219
MEM_MA_DATA54
224
MEM_MA_DATA55
225
MEM_MA_DATA56
108
MEM_MA_DATA57
109
MEM_MA_DATA58
114
MEM_MA_DATA59
115
MEM_MA_DATA60
227
MEM_MA_DATA61
228
MEM_MA_DATA62
233
MEM_MA_DATA63
234
MEM_MA_CHECK0
39
MEM_MA_CHECK1
40
MEM_MA_CHECK2
45
MEM_MA_CHECK3
46
MEM_MA_CHECK4
158
MEM_MA_CHECK5
159
MEM_MA_CHECK6
164
MEM_MA_CHECK7
165
126
135
144
153
204
213
222
231
162
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
MEM_MA_DM8
MEM_MA_DQS_L0
MEM_MA_DQS_H0
MEM_MA_DQS_L1
MEM_MA_DQS_H1
MEM_MA_DQS_L2
MEM_MA_DQS_H2
MEM_MA_DQS_L3
MEM_MA_DQS_H3
MEM_MA_DQS_L4
MEM_MA_DQS_H4
MEM_MA_DQS_L5
MEM_MA_DQS_H5
MEM_MA_DQS_L6
MEM_MA_DQS_H6
MEM_MA_DQS_L7
MEM_MA_DQS_H7
MEM_MA_DQS_L8
MEM_MA_DQS_H8
MEM_MA_RASMEM_MA_CASMEM_MA_WE-
MEM_MA1_CS_L0
MEM_MA1_CS_L1
MEM_MA_CKE0
MEM_MA_CKE1
MEM_MA1_ODT0
MEM_MA1_ODT1
MEM_MA1_CLK0_P
MEM_MA1_CLK0_N
MEM_MA1_CLK1_P
MEM_MA1_CLK1_N
VCC3
SCLK0
SDATA0
VCC3
MEM_MA_RESET-
2
188
181
61
180
59
58
178
56
177
175
70
55
174
196
172
171
71
190
52
125
134
143
152
203
212
221
230
161
6
7
15
16
24
25
33
34
84
85
93
94
102
103
111
112
42
43
192
74
73
193
76
50
169
195
77
184
185
63
64
117
237
118
238
236
167
48
49
187
198
168
53
68
79
DDR3_3A
DDR3_3A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
BA0
BA1
BA2
DM0/DQS9
DM1/DQS10
DM2/DQS11
DM3/DQS12
DM4/DQS13
DM5/DQS14
DM6/DQS15
DM7/DQS16
DM8/DQS17
DQS0
DQS0
DQS1
DQS1
DQS2
DQS2
DQS3
DQS3
DQS4
DQS4
DQS5
DQS5
DQS6
DQS6
DQS7
DQS7
DQS8
DQS8
RAS
CAS
WE
S0
S1
CKE0
CKE1
ODT
RSVD/ODT1
CK0
CK0
CK1
CK1
SA0
SA1
SCL
SDA
VDDSPD
TEST
FREE1
FREE2
FREE3
FREE4
RESET
ERR_OUT
PAR_IN
RSVD/SPD
DDR3-240P-Y
DDR3-240P-Y
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
DQS9
DQS10
DQS11
DQS12
DQS13
DQS14
DQS15
DQS16
DQS17
1
MEM_MA_DATA0
3
MEM_MA_DATA1
4
MEM_MA_DATA2
9
MEM_MA_DATA3
10
MEM_MA_DATA4
122
MEM_MA_DATA5
123
MEM_MA_DATA6
128
MEM_MA_DATA7
129
MEM_MA_DATA8
12
MEM_MA_DATA9
13
MEM_MA_DATA10
18
MEM_MA_DATA11
19
MEM_MA_DATA12
131
MEM_MA_DATA13
132
MEM_MA_DATA14
137
MEM_MA_DATA15
138
MEM_MA_DATA16
21
MEM_MA_DATA17
22
MEM_MA_DATA18
27
MEM_MA_DATA19
28
MEM_MA_DATA20
140
MEM_MA_DATA21
141
MEM_MA_DATA22
146
MEM_MA_DATA23
147
MEM_MA_DATA24
30
MEM_MA_DATA25
31
MEM_MA_DATA26
36
MEM_MA_DATA27
37
MEM_MA_DATA28
149
MEM_MA_DATA29
150
MEM_MA_DATA30
155
MEM_MA_DATA31
156
MEM_MA_DATA32
81
MEM_MA_DATA33
82
MEM_MA_DATA34
87
MEM_MA_DATA35
88
MEM_MA_DATA36
200
MEM_MA_DATA37
201
MEM_MA_DATA38
206
MEM_MA_DATA39
207
MEM_MA_DATA40
90
MEM_MA_DATA41
91
MEM_MA_DATA42
96
97
MEM_MA_DATA44
209
MEM_MA_DATA45
210
MEM_MA_DATA46
215
MEM_MA_DATA47
216
MEM_MA_DATA48
99
MEM_MA_DATA49
100
MEM_MA_DATA50
105
MEM_MA_DATA51
106
MEM_MA_DATA52
218
MEM_MA_DATA53
219
MEM_MA_DATA54
224
MEM_MA_DATA55
225
MEM_MA_DATA56
108
MEM_MA_DATA57
109
MEM_MA_DATA58
114
MEM_MA_DATA59
115
MEM_MA_DATA60
227
MEM_MA_DATA61
228
MEM_MA_DATA62
233
MEM_MA_DATA63
234
MEM_MA_CHECK0
39
MEM_MA_CHECK1
40
MEM_MA_CHECK2
45
MEM_MA_CHECK3
46
MEM_MA_CHECK4
158
MEM_MA_CHECK5
159
MEM_MA_CHECK6
164
MEM_MA_CHECK7
165
126
135
144
153
204
213
222
231
162
SMBus 0
Device
A A
DIMMA0
DIMMB0
DIMMA1
DIMMB1
8-bit Address (hex)
A0
A2
A4
A6
5
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
4
3
2
Date: Sheet
DDR3 DIMM A CH
DDR3 DIMM A CH
DDR3 DIMM A CH
IC780M-A2
IC780M-A2
IC780M-A2
1
1.0A
1.0A
7
7
7
1.0A
of
36Thursday, October 15, 2009
of
36Thursday, October 15, 2009
of
36Thursday, October 15, 2009
5
VCC3 VCC3
D D
MEM_MB_CHECK[7..0]4
C C
MEM_MB_DQS_H[8..0]4
MEM_MB_DQS_L[8..0]4
B B
A A
SMBCK7,10,19,20,22,26
SMBDT7,10,19,20,22,26
MEM_MB_DATA[63..0]4
MEM_MB_ADD[15..0]4
MEM_MB_BANK04
MEM_MB_BANK14
MEM_MB_BANK24
MEM_MB_DM[7..0]4
MEM_MB_DM84
MEM_MB_RAS-4
MEM_MB_CAS-4
MEM_MB_WE-4
MEM_MB_CKE04
MEM_MB_CKE14
MEM_MB_EVENT_L4
MEM_MB_RESET-4
MEM_MB0_CS_L04
MEM_MB0_CS_L14
MEM_MB0_ODT04
MEM_MB0_ODT14
MEM_MB0_CLK0_P4
MEM_MB0_CLK0_N4
MEM_MB0_CLK1_P4
MEM_MB0_CLK1_N4
MEM_MB1_CS_L04
MEM_MB1_CS_L14
MEM_MB1_ODT04
MEM_MB1_ODT14
MEM_MB1_CLK0_P4
MEM_MB1_CLK0_N4
MEM_MB1_CLK1_P4
MEM_MB1_CLK1_N4
SCLK0
SDATA0
MEM_MB_DATA[63..0]
MEM_MB_CHECK[7..0]
MEM_MB_ADD[15..0]
MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2
MEM_MB_DM[7..0]
MEM_MB_DM8
MEM_MB_DQS_H[8..0]
MEM_MB_DQS_L[8..0]
MEM_MB_RAS-
MEM_MB_CASMEM_MB_WE-
MEM_MB_CKE0
MEM_MB_CKE1
MEM_MB_EVENT_L
MEM_MB_RESET-
MEM_MB0_CS_L0
MEM_MB0_CS_L1
MEM_MB0_ODT0
MEM_MB0_ODT1
MEM_MB0_CLK0_P
MEM_MB0_CLK0_N
MEM_MB0_CLK1_P
MEM_MB0_CLK1_N
MEM_MB1_CS_L0
MEM_MB1_CS_L1
MEM_MB1_ODT0
MEM_MB1_ODT1
MEM_MB1_CLK0_P
MEM_MB1_CLK0_N
MEM_MB1_CLK1_P
MEM_MB1_CLK1_N
4
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
MEM_MB_DM8
MEM_MB_DQS_L0
MEM_MB_DQS_H0
MEM_MB_DQS_L1
MEM_MB_DQS_H1
MEM_MB_DQS_L2
MEM_MB_DQS_H2
MEM_MB_DQS_L3
MEM_MB_DQS_H3
MEM_MB_DQS_L4
MEM_MB_DQS_H4
MEM_MB_DQS_L5
MEM_MB_DQS_H5
MEM_MB_DQS_L6
MEM_MB_DQS_H6
MEM_MB_DQS_L7
MEM_MB_DQS_H7
MEM_MB_DQS_L8
MEM_MB_DQS_H8
MEM_MB_RASMEM_MB_CASMEM_MB_WE-
MEM_MB0_CS_L0
MEM_MB0_CS_L1
MEM_MB_CKE0
MEM_MB_CKE1
MEM_MB0_ODT0
MEM_MB0_ODT1
MEM_MB0_CLK0_P
MEM_MB0_CLK0_N
MEM_MB0_CLK1_P
MEM_MB0_CLK1_N
VCC3
SCLK0
SDATA0
VCC3
MEM_MB_EVENT_L
MEM_MB_RESET-
DDR3_2A
DDR3_2A
188
181
61
180
59
58
178
56
177
175
70
55
174
196
172
171
71
190
52
125
134
143
152
203
212
221
230
161
6
7
15
16
24
25
33
34
84
85
93
94
102
103
111
112
42
43
192
74
73
193
76
50
169
195
77
184
185
63
64
117
237
118
238
236
167
48
49
187
198
168
53
68
79
DDR3-240P-OR
DDR3-240P-OR
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
BA0
BA1
BA2
DM0/DQS9
DM1/DQS10
DM2/DQS11
DM3/DQS12
DM4/DQS13
DM5/DQS14
DM6/DQS15
DM7/DQS16
DM8/DQS17
DQS0
DQS0
DQS1
DQS1
DQS2
DQS2
DQS3
DQS3
DQS4
DQS4
DQS5
DQS5
DQS6
DQS6
DQS7
DQS7
DQS8
DQS8
RAS
CAS
WE
S0
S1
CKE0
CKE1
ODT
RSVD/ODT1
CK0
CK0
CK1
CK1
SA0
SA1
SCL
SDA
VDDSPD
TEST
FREE1
FREE2
FREE3
FREE4
RESET
ERR_OUT
PAR_IN
RSVD/SPD
3
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
DQS9
DQS10
DQS11
DQS12
DQS13
DQS14
DQS15
DQS16
DQS17
MEM_MB_DATA0
3
MEM_MB_DATA1
4
MEM_MB_DATA2
9
MEM_MB_DATA3
10
MEM_MB_DATA4
122
MEM_MB_DATA5
123
MEM_MB_DATA6
128
MEM_MB_DATA7
129
MEM_MB_DATA8
12
MEM_MB_DATA9
13
MEM_MB_DATA10
18
MEM_MB_DATA11
19
MEM_MB_DATA12
131
MEM_MB_DATA13
132
MEM_MB_DATA14
137
MEM_MB_DATA15
138
MEM_MB_DATA16
21
MEM_MB_DATA17
22
MEM_MB_DATA18
27
MEM_MB_DATA19
28
MEM_MB_DATA20
140
MEM_MB_DATA21
141
MEM_MB_DATA22
146
MEM_MB_DATA23
147
MEM_MB_DATA24
30
MEM_MB_DATA25
31
MEM_MB_DATA26
36
MEM_MB_DATA27
37
MEM_MB_DATA28
149
MEM_MB_DATA29
150
MEM_MB_DATA30
155
MEM_MB_DATA31
156
MEM_MB_DATA32
81
MEM_MB_DATA33
82
MEM_MB_DATA34
87
MEM_MB_DATA35
88
MEM_MB_DATA36
200
MEM_MB_DATA37
201
MEM_MB_DATA38
206
MEM_MB_DATA39
207
MEM_MB_DATA40
90
MEM_MB_DATA41
91
MEM_MB_DATA42
96
MEM_MB_DATA43
97
MEM_MB_DATA44
209
MEM_MB_DATA45
210
MEM_MB_DATA46
215
MEM_MB_DATA47
216
MEM_MB_DATA48
99
MEM_MB_DATA49
100
MEM_MB_DATA50
105
MEM_MB_DATA51
106
MEM_MB_DATA52
218
MEM_MB_DATA53
219
MEM_MB_DATA54
224
MEM_MB_DATA55
225
MEM_MB_DATA56
108
MEM_MB_DATA57
109
MEM_MB_DATA58
114
MEM_MB_DATA59
115
MEM_MB_DATA60
227
MEM_MB_DATA61
228
MEM_MB_DATA62
233
MEM_MB_DATA63
234
MEM_MB_CHECK0
39
MEM_MB_CHECK1
40
MEM_MB_CHECK2
45
MEM_MB_CHECK3
46
MEM_MB_CHECK4
158
MEM_MB_CHECK5
159
MEM_MB_CHECK6
164
MEM_MB_CHECK7
165
126
135
144
153
204
213
222
231
162
2
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
MEM_MB_DM8
MEM_MB_DQS_L0
MEM_MB_DQS_H0
MEM_MB_DQS_L1
MEM_MB_DQS_H1
MEM_MB_DQS_L2
MEM_MB_DQS_H2
MEM_MB_DQS_L3
MEM_MB_DQS_H3
MEM_MB_DQS_L4
MEM_MB_DQS_H4
MEM_MB_DQS_L5
MEM_MB_DQS_H5
MEM_MB_DQS_L6
MEM_MB_DQS_H6
MEM_MB_DQS_L7
MEM_MB_DQS_H7
MEM_MB_DQS_L8
MEM_MB_DQS_H8
MEM_MB_RASMEM_MB_CASMEM_MB_WE-
MEM_MB1_CS_L0
MEM_MB1_CS_L1
MEM_MB_CKE0
MEM_MB_CKE1
MEM_MB1_ODT0
MEM_MB1_ODT1
MEM_MB1_CLK0_P
MEM_MB1_CLK0_N
MEM_MB1_CLK1_P
MEM_MB1_CLK1_N
VCC3
SCLK0
SDATA0
VCC3
MEM_MB_EVENT_L
MEM_MB_RESET-
188
181
61
180
59
58
178
56
177
175
70
55
174
196
172
171
71
190
52
125
134
143
152
203
212
221
230
161
6
7
15
16
24
25
33
34
84
85
93
94
102
103
111
112
42
43
192
74
73
193
76
50
169
195
77
184
185
63
64
117
237
118
238
236
167
48
49
187
198
168
53
68
79
DDR3_4A
DDR3_4A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
BA0
BA1
BA2
DM0/DQS9
DM1/DQS10
DM2/DQS11
DM3/DQS12
DM4/DQS13
DM5/DQS14
DM6/DQS15
DM7/DQS16
DM8/DQS17
DQS0
DQS0
DQS1
DQS1
DQS2
DQS2
DQS3
DQS3
DQS4
DQS4
DQS5
DQS5
DQS6
DQS6
DQS7
DQS7
DQS8
DQS8
RAS
CAS
WE
S0
S1
CKE0
CKE1
ODT
RSVD/ODT1
CK0
CK0
CK1
CK1
SA0
SA1
SCL
SDA
VDDSPD
TEST
FREE1
FREE2
FREE3
FREE4
RESET
ERR_OUT
PAR_IN
RSVD/SPD
DDR3-240P-Y
DDR3-240P-Y
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
DQS9
DQS10
DQS11
DQS12
DQS13
DQS14
DQS15
DQS16
DQS17
1
3
4
9
10
122
123
128
129
12
13
18
19
131
132
137
138
21
22
27
28
140
141
146
147
30
31
36
37
149
150
155
156
81
82
87
88
200
201
206
207
90
91
96
97
209
210
215
216
99
100
105
106
218
219
224
225
108
109
114
115
227
228
233
234
39
40
45
46
158
159
164
165
126
135
144
153
204
213
222
231
162
MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63
MEM_MB_CHECK0
MEM_MB_CHECK1
MEM_MB_CHECK2
MEM_MB_CHECK3
MEM_MB_CHECK4
MEM_MB_CHECK5
MEM_MB_CHECK6
MEM_MB_CHECK7
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
DDR3 DIMM B CH
DDR3 DIMM B CH
DDR3 DIMM B CH
IC780M-A2
IC780M-A2
IC780M-A2
1
1.0A
1.0A
8
8
8
1.0A
of
36Thursday, October 15, 2009
of
36Thursday, October 15, 2009
of
36Thursday, October 15, 2009
5
4
3
2
1
DE-COUPLING CAP FOR DIMMs
1.5V
MEM_VDDIO_SUSV_DIMM
D D
0.75V
DDR3_VTTDDR_VTT
MEM_VDDIO_SUS DDR3_VTT
C322
2 1
C325
C325
10U-08
10U-08
2 1
C355
C355
10U-08
10U-08
C356
.1U-04
.1U-04
.1U-04
.1U-04
2 1
2 1
2 1
.1U-04
.1U-04
.1U-04
.1U-04
2 1
2 1
C322
C358
C358
C357
C357
C356
C359
C359
.1U-04
.1U-04
C360
C360
C354
C354
.1U-04
.1U-04
.1U-04
2 1
.1U-04
2 1
2 1
C361
C361
.1U-04
.1U-04
C327
C327
.1U-04
.1U-04
2 1
DDR3_1B
DDR3_1B
2
VSS1
5
VSS2
8
VSS3
11
VSS4
14
VSS5
17
VSS6
20
VSS7
23
VSS8
26
VSS9
29
VSS10
32
C C
B B
35
38
41
44
47
80
83
86
89
92
95
98
101
104
107
110
113
116
119
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
199
166
202
DDR3-240P-OR
DDR3-240P-OR
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VTT1
VTT2
VREFDQ
VREFCA
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
MEM_VDDIO_SUS
51
54
57
60
62
65
66
69
72
75
78
170
173
176
179
182
183
186
189
191
194
DDR3_VTT
197
120
240
1
67
205
208
211
214
217
220
223
226
229
232
235
239
MEM_VREFDQ_SUS
MEM_VREFCA_SUS
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
80
83
86
89
92
95
98
101
104
107
110
113
116
119
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
199
166
202
DDR3_3B
DDR3_3B
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
DDR3-240P-Y
DDR3-240P-Y
MEM_VREFDQ_SUS
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VTT1
VTT2
VREFDQ
VREFCA
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
MEM_VDDIO_SUS
51
54
57
60
62
65
66
69
72
75
78
170
173
176
179
182
183
186
189
191
194
DDR3_VTT
197
120
240
1
67
205
208
211
214
217
220
223
226
229
232
235
239
DDR3_2B
DDR3_2B
2
VSS1
5
VSS2
8
VSS3
11
VSS4
14
VSS5
17
VSS6
20
VSS7
23
VSS8
26
VSS9
29
VSS10
32
VSS11
35
VSS12
38
VSS13
41
VSS14
44
VSS15
47
VSS16
80
VSS17
83
VSS18
86
VSS19
89
VSS20
92
VSS21
95
VSS22
98
VSS23
101
VSS24
104
VSS25
107
VSS26
110
VSS27
113
VSS28
MEM_VREFDQ_SUS
MEM_VREFCA_SUS
116
119
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
199
166
202
DDR3-240P-OR
DDR3-240P-OR
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
MEM_VREFCA_SUS
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VTT1
VTT2
VREFDQ
VREFCA
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
MEM_VDDIO_SUS
51
54
57
60
62
65
66
69
72
75
78
170
173
176
179
182
183
186
189
191
194
DDR3_VTT
197
120
240
1
67
205
208
211
214
217
220
223
226
229
232
235
239
MEM_VREFDQ_SUS
MEM_VREFCA_SUS
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
80
83
86
89
92
95
98
101
104
107
110
113
116
119
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
199
166
202
DDR3_4B
DDR3_4B
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
DDR3-240P-Y
DDR3-240P-Y
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VTT1
VTT2
VREFDQ
VREFCA
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
MEM_VDDIO_SUS
51
54
57
60
62
65
66
69
72
75
78
170
173
176
179
182
183
186
189
191
194
DDR3_VTT
197
120
240
1
67
205
208
211
214
217
220
223
226
229
232
235
239
MEM_VREFDQ_SUS
MEM_VREFCA_SUS
MEM_VDDIO_SUS MEM_VREFDQ_SUS
12
A A
5
12
R283
R283
15-1-06
15-1-06
R284
R284
15-1-06
15-1-06
C328
C328
.1U-04-O
.1U-04-O
2 1
C329
C329
.1U-04
.1U-04
2 1
C332
C332
1000P-04
1000P-04
2 1
Layout: Place within 500
mils of the DIMMB1 socket.
12mil(width):20mil(spacing)
4
MEM_VDDIO_SUS MEM_VREFCA_SUS
12
R285
R285
C330
C330
15-1-06
15-1-06
.1U-04-O
.1U-04-O
2 1
12
3
R286
R286
15-1-06
15-1-06
C331
C331
C333
C333
.1U-04
.1U-04
1000P-04
2 1
1000P-04
2 1
M_ELT2M_ELT2M_ELT3M_ELT3
Layout: Place within 500
mils of the DIMMB1 socket.
12mil(width):20mil(spacing)
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
DDR3 DIMM PWR
DDR3 DIMM PWR
DDR3 DIMM PWR
IC780M-A2
IC780M-A2
IC780M-A2
1
1.0A
1.0A
9
9
9
1.0A
of
36Thursday, October 15, 2009
of
36Thursday, October 15, 2009
of
36Thursday, October 15, 2009
5
VCC3 CLK_VDD
FB19
FB19
FB-600-08
FB-600-08
1 2
BC25
BC25
BC24
BC24
BC27
MC21
MC21
.1U-04
.1U-04
10U-08
10U-08
2 1
2 1
2 1
D D
1- PLACE ALL THE SERIES TERMINATION
RESISTORS AS CLOSE TO U800 AS POSSIBLE
2- ROUTE ALL SRCCLKTx AND SRCCLKCx
AS DIFFERENT PAIR RULE
3- PUT DECOUPLING CAPS CLOSE TO CLK
POWER PIN
VCC3
C C
FB20 FB120-06FB20 FB120-06
VCC3
FB18 FB120-06FB18 FB120-06
1 2
1 2
.1U-04-O
.1U-04-O
1 2
2 1
12
CLK_VDD48
MC10
MC10
1U-06
1U-06
CLK_VDD
BC27
.1U-04
.1U-04
MC15
MC15
2.2U-06
2.2U-06
for VISTA 動態RTC
C80 68P-04C80 68P-04
1 2
R64
X2
X2
3
X-14.318M
X-14.318M
C79 68P-04C79 68P-04
1 2
-HW_RST14,22
CLK_VDD
12
R247
CLK_EN after VCC1.2 stabile.
2009/05/07
B B
CLK_EN12
SB710: Connected to a 14-MHz clock
from external clock generator
1 2
R76 0-04R76 0-04
OSC_14M_SB21
OSC_14M_NB17
R247
1K-04
1K-04
OSC_14M_NB
1 2
R71 0-04R71 0-04
R72 4.7K-04-OR72 4.7K-04-O
VCC3
R67 33-04R67 33-04
1 2
R69 75-04R69 75-04
1 2
R70
R70
100-04
100-04
1 2
R64
1M-04-O
1M-04-O
1 2
1 2
1 2
SMBCK7,8,19,20,22,26
SMBDT7,8,19,20,22,26
R74 8.2K-04-OR74 8.2K-04-O
1 2
R66 8.2K-04-OR66 8.2K-04-O
1 2
R73 8.2K-04R73 8.2K-04
R75 8.2K-04R75 8.2K-04
12
12
OSC_14M_SB_ROSC_14M_SB
OSC_14M_NB_R
2 1
CLK_VDDA
4
BC28
BC28
.1U-04
.1U-04
CLKA
CLKA
44
VDDA
43
GNDA
60
VDDREF
61
GNDREF
39
VDDSATA
42
GNDSATA
64
VDD48
3
GND48
48
VDDCPU
47
GNDCPU
56
VDDHTT
53
GNDHTT
34
VDDATIG
11
VDDSRC1
16
VDDSRC2
25
VDDSB_SRC
28
GNDATIG1
33
GNDATIG2
10
GNDSRC1
17
GNDSRC2
24
GNDSB_SRC
62
X1
63
X2
52
RESTORE#
4
SMBCLK
5
SMBDAT
51
PD#
59
REF0/SEL_HTT66
58
REF1/SEL_SATA
57
REF2
ICS9LPRS471CS
ICS9LPRS471CS
Clock chip has internal serial terminations
for differencial pairs, external resistors are
reserved for debug purpose.
CPUKG0T_LPRS
CPUKG0C_LPRS
CPUKG1T_LPRS
CPUKG1C_LPRS
ATIG0T_LPRS
ATIG0C_LPRS
ATIG1T_LPRS
ATIG1C_LPRS
ATIG2T_LPRS
ATIG2C_LPRS
ATIG3T_LPRS
ATIG3C_LPRS
SB_SRC0T_LPRS
SB_SRC0C_LPRS
SB_SRC1T_LPRS
SB_SRC1C_LPRS
SRC0T_LPRS
SRC0C_LPRS
SRC1T_LPRS
SRC1C_LPRS
SRC2T_LPRS
SRC2C_LPRS
SRC3T_LPRS
SRC3C_LPRS
SRC4T_LPRS
SRC4C_LPRS
SRC5T_LPRS
SRC5C_LPRS
SRC6T/SATAT_LPRS
SRC6C/SATAC_LPRS
HTT0T/66M_LPRS
HTT0C/66M_LPRS
48MHz_0
48MHz_1
3
Place R800/801 less than 500 mils away from U800
R851 less than 100 mils away from R800/801
route CPU clock as 100ohm differential pair
R68 261-04-OR68 261-04-O
1 2
1 2
1 2
50
49
46
45
38
37
36
35
32
31
30
29
27
26
23
22
21
20
19
18
15
14
13
12
9
8
7
6
41
40
55
54
2
1
SIO_CLOCK_R
R81 33-04R81 33-04
R78 33-04R78 33-04
CPU_CLKIN_H 5
CPU_CLKIN_L 5
NBGFX_CLKP 17
NBGFX_CLKN 17
GFX_PECLKP 19
GFX_PECLKN 19
NBSLINK_CLKP 17
NBSLINK_CLKN 17
SBSRC_CLKP 21
SBSRC_CLKN 21
NBGPP_CLKP 17
NBGPP_CLKN 17
GPP_CLK0P 20
GPP_CLK0N 20
GB_CLKP 32
GB_CLKN 32
GPP_CLK1P 20
GPP_CLK1N 20
NBHTREF_CLKP 17
NBHTREF_CLKN 17
CLK_48M_SIO
CLK_48M_USB48M_USB_R
CLK_48M_SIO 28
CLK_48M_USB 22
2
OSC_14M_NB
OSC_14M_SB
CLK_48M_USB
CLK_48M_SIO
CC5 22P-04-OCC5 22P-04-O
21
CC4 22P-04-OCC4 22P-04-O
21
CC6 22P-04CC6 22P-04
21
CC7 22P-04CC7 22P-04
21
1
For EMI 03/23
CLKB
CLKB
THERMAL GND
65
A A
5
4
THERMAL GND
eGND65
ICS9LPRS471CS
ICS9LPRS471CS
Elitegroup Computer Systems
Elitegroup Computer Systems
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
3
2
Date: Sheet
Elitegroup Computer Systems
CLOCK GEN ICS9LPRS472
CLOCK GEN ICS9LPRS472
CLOCK GEN ICS9LPRS472
IC780M-A2
IC780M-A2
IC780M-A2
10
10
10
of
of
1
of
1.0A
1.0A
1.0A
36Thursday, October 15, 2009
36Thursday, October 15, 2009
36Thursday, October 15, 2009
5
+12V_4P
12
R89
R89
10K-04
10K-04
EN_6323
EN_6323
12
12
R88
R88
1K-04
1K-04
ER32 49.9-1-04ER32 49.9-1-04
1 2
R137 590-1-04R137 590-1-04
R139
R139
100-04
100-04
C139
C139
.1U-04-O
.1U-04-O
1 2
R131
R131
100-04
100-04
1 2
R129
R129
100-04
100-04
12
1 2
ER31 300-1-04ER31 300-1-04
R136
R136
100-04
100-04
R121
R121
56K-04-O
56K-04-O
VCORE_REG
VRD_VID1
VRD_VID2
VRD_VID3
+12V_4P
12
12
MC23
MC23
1U-06-O
1U-06-O
R132 470-04-OR132 470-04-O
C132
C132
.1U-04-O
.1U-04-O
VCC5
R35
R35
2.2-08
2.2-08
MC5
MC5
1U-16V-08
1U-16V-08
NB_PWM117
EN_VCORE
SB_CPUPWRGD5,21
VDDPWRGD28
ER29 1K-1-04ER29 1K-1-04
VRD_VID15
VRD_VID25
VRD_VID35
CPU_VDDNB
12
12
VCC_CORE
12
12
12
EN_VCORE28
D D
CPU_VDDNB_FB5
CPU_VDDNB_FB-5
C C
CPU_CORE_FB5
CPU_CORE_FB-5
B B
A A
VCC3
12
1 2
1 2
R135
R135
1 2
R122
R122
10K-04-O
10K-04-O
1 2
PWM3
用
NB_1V8,ISL_PWROK會分2
先到
1.8V再到3V.(
12
R93
R93
1K-04
1K-04
R90
R90
10K-04
10K-04
B
QN2
QN2
2N3904-S
2N3904-S
E C
ER23 2K-1-04ER23 2K-1-04
C144 680P-04C144 680P-04
1 2
C141 680P-04-OC141 680P-04-O
1 2
C133 .1U-04-OC133 .1U-04-O
C137 .1U-04-OC137 .1U-04-O
360-04
ISEN_NB_A
C143
C143
.1U-04-O
.1U-04-O
1 2
ER21 1.5K-1-04ER21 1.5K-1-04
C134
C134
.1U-04-O
.1U-04-O
1 2
1 2
1 2
R113 1.74K-1-04R113 1.74K-1-04
715-1-04
715-1-04
700-04
1 2
1 2
ER20
ER20
43.2K-1-04
43.2K-1-04
6323_VCC
C56 .1U-16VX7-04C56 .1U-16VX7-04
12
12
R43
R43
2.2-06
2.2-06
PWM1
PWM1
2
BOOT
7
PVCC
6
VCC
3
PWM
4
GND
ISL6612ACBZS
ISL6612ACBZS
1 2
C128 100P-04C128 100P-04
C115 220P-04C115 220P-04
R103
R103
2K-04
2K-04
1 2
此線路不會漏電
VCC31.2VSB
R91
R91
1K-04
1K-04
1 2
EN_6323
ISL_PWROK
1 2
R130 0-04R130 0-04
R134 0-04-OR134 0-04-O
1 2
C127 8200P-06C127 8200P-06
1 2
3.77K-04
VCORE_REG
12
1 2
C126 1000P-04C126 1000P-04
1 2
UGATE
PHASE
LGATE
C135 8200P-06C135 8200P-06
1 2
C118 .01U-04C118 .01U-04
1 2
C117
C117
.1U-04
.1U-04
4
VCC5
12
R133
R133
2.2-06
次起來
,
)
PWM2 ISL6323CRZPWM2 ISL6323CRZ
24
EN
34
PWROK
37
VDDPWRGD
48
COMP_NB
1
ER22
ER22
100K-1-04
100K-1-04
1 2
2
3
18
17
15
13
12
19
14
16
4
5
6
7
8
9
11
FB_NB
VSEN_NB
RGND_NB
COMP
FB
RCOMP
VSEN
RGND
APA
OFS
RSET
VID0/VFIXEN
VID1/SEL
VID2/SVD
VID3/SVC
VID4
VID5
FS
12
12
2.2-06
6323_VCC
10
PVCC1_2
VCC
BOOT1
UGATE1
PHASE1
LGATE1
ISEN1+
ISEN1-
BOOT2
UGATE2
PHASE2
LGATE2
ISEN2+
ISEN2-
PWM3
PWM4
ISEN3+
ISEN3-
ISEN4+
ISEN4-
PVCC_NB
BOOT_NB
UGATE_NB
PHASE_NB
LGATE_NB
ISEN_NB
GND
49
BOTTOM PAD
CONNECT TO GND
Through 8 VIAs
12
7X7 QFN
+12V_4P
12
R82
R82
2.2-06
2.2-06
12
MC27
MC27
1U-06
1U-06
29
31
32
33
30
20
21
27
26
25
28
22
23
35
36
44
43
46
45
42
40
39
38
41
47
MC14
MC14
1U-16V-08
1U-16V-08
R95 2.2-06R95 2.2-06
C92 .1U-16VX7-04C92 .1U-16VX7-04
12
1 2
1 2
R101 10.5K-1-06R101 10.5K-1-06
R97 2.2-06R97 2.2-06
12
1 2
R96 10.5K-1-06R96 10.5K-1-06
ISEN3+
ISEN3-
ISEN4-
12
MC24
MC24
1U-16V-08
1U-16V-08
R99 2.2-06R99 2.2-06
12
UGATE_NB
PHASE_NB
LGATE_NB
R102 0-06R102 0-06
1 2
C91 .1U-16VX7-04C91 .1U-16VX7-04
+12V_4P
12
1 2
C98 .1U-16VX7-04C98 .1U-16VX7-04
1 2
R112 10.5K-1-06R112 10.5K-1-06
ISEN4-
PHASE1
PHASE2
PWM3
PWM4
PHASE_NB_A ISEN_NB_A
Disable PWM4 Use 3phase
DPHASE3
DUGATE3
1
DPHASE3
8
DLGATE3
5
3
C130,C101,C109,C122 use 0.1uF/X7R
C56,C91,C92,C98 use 0.1uF/X7R
MC2,MC1,MC3,MC4 install
DUGATE1
DPHASE1
DLGATE1
ISEN1
1 2
R100 0-06R100 0-06
1 2
R98
R98
2.2-06
2.2-06
VCC5
ISEN1
1 2
C109 0.1U-10VX-04C109 0.1U-10VX-04
ISEN2
1 2
C101 0.1U-10VX-04C101 0.1U-10VX-04
VCC5
12
PWM4
PHASE_NB
R120 6.2K-04-OR120 6.2K-04-O
1 2
1 2
C130 0.1U-10VX-04C130 0.1U-10VX-04
1 2
1 2
R94
R94
0-O
0-O
C110
C110
.1U-04
.1U-04
C102
C102
.1U-04
.1U-04
DUGATE2
DPHASE2
DLGATE2
DUGATE3
DPHASE3
DLGATE3
1 2
UGATE_NB
PHASE_NB
LGATE_NB
R42 0-08R42 0-08
R47 10K-04R47 10K-04
G
R40 0-08R40 0-08
R45 10K-04R45 10K-04
G
R39 0-08R39 0-08
R44 10K-04R44 10K-04
G
C136
C136
.1U-04
.1U-04
R41 0-08R41 0-08
R46 10K-04R46 10K-04
G
12
12
DS
MN3
MN3
MN252-6MS
MN252-6MS
12
12
DS
MN10
MN10
MN252-6MS
MN252-6MS
12
DS
MN1
MN1
MN252-6MS
MN252-6MS
12
12
DS
MN4
MN4
MN252-6MS
MN252-6MS
2
+12V_MOS
12
MC3
DS
MN7
MN7
MN252-9MS
MN252-9MS
G
DS
MN11
MN11
MN252-6MS
MN252-6MS
G
+12V_MOS
DS
MN6
MN6
MN252-9MS
MN252-9MS
G
DS
MN2
MN2
MN252-6MS
MN252-6MS
G
+12V_MOS
DS
MN5
MN5
MN252-9MS
MN252-9MS
G
12
DS
MN9
MN9
MN252-6MS
MN252-6MS
G
+12V_MOS
DS
MN8
MN8
MN252-9MS
MN252-9MS
G
DS
MN12
MN12
MN252-6MS
MN252-6MS
G
MC3
4.7U-16V-08
4.7U-16V-08
12
R50
R50
2.2-06
2.2-06
C59
C59
1000P-04
1000P-04
2 1
12
MC4
MC4
4.7U-16V-08
4.7U-16V-08
12
R49
R49
2.2-06
2.2-06
C58
C58
1000P-04
1000P-04
2 1
12
MC1
MC1
4.7U-16V-08
4.7U-16V-08
12
R48
R48
2.2-06
2.2-06
C57
C57
1000P-04
1000P-04
2 1
12
MC2
MC2
4.7U-16V-08
4.7U-16V-08
12
R51
R51
2.2-06
2.2-06
12
C60
C60
1000P-04
1000P-04
12
EC8
EC8
270U-16D-OS
270U-16D-OS
L5 PIND-0.6UDL5 PIND-0.6UD
21
12
SU4
SU4
Short PAD
Short PAD
PHASE1
ISEN1
L4 PIND-0.6UDL4 PIND-0.6UD
SU6
SU6
Short PAD
Short PAD
PHASE2
ISEN2
L3 PIND-0.6UDL3 PIND-0.6UD
SU5
SU5
Short PAD
Short PAD
PHASE3
ISEN3
12
SU8
SU8
Short PAD
Short PAD
12
EC7
EC7
270U-16D-OS
270U-16D-OS
21
12
12
SU10
SU10
Short PAD
Short PAD
12
EC9
EC9
270U-16D-OS
270U-16D-OS
21
12
12
SU9
SU9
Short PAD
Short PAD
12
EC10
EC10
270U-16D-OS
270U-16D-OS
L6 PIND-0.6UDL6 PIND-0.6UD
SU3
SU3
Short PAD
Short PAD
PHASE_NB_A
ISEN_NB_A
12
EC29
EC29
820U-2.5D-OS-J
820U-2.5D-OS-J
12
EC27
EC27
820U-2.5D-OS-J
820U-2.5D-OS-J
12
EC26
EC26
820U-2.5D-OS-J
820U-2.5D-OS-J
ISEN3+
ISEN3-
PHASE3
21
12
12
12
SU7
SU7
Short PAD
Short PAD
EC30
EC30
820U-2.5D-OS-J
820U-2.5D-OS-J
1
+12V_MOS+12V_4P
2 1
L1 RCK-0.9UDL1 RCK-0.9UD
12
EC28
EC28
820U-2.5D-OS-J
820U-2.5D-OS-J
12
EC19
EC19
820U-2.5D-OS-J-O
820U-2.5D-OS-J-O
12
EC22
EC22
820U-2.5D-OS-J-O
820U-2.5D-OS-J-O
1 2
R104 10.5K-1-06R104 10.5K-1-06
CPU_VDDNB
12
R107 0-06R107 0-06
1 2
1 2
C122 0.1U-10VX-04C122 0.1U-10VX-04
EC23
EC23
820U-2.5D-OS-J
820U-2.5D-OS-J
VCC_CORE
12
EC21
EC21
820U-2.5D-OS-J
820U-2.5D-OS-J
12
EC20
EC20
820U-2.5D-OS-J-O
820U-2.5D-OS-J-O
ISEN3
1 2
C121
C121
.1U-04
.1U-04
Elitegroup Computer Systems
Elitegroup Computer Systems
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Elitegroup Computer Systems
CPU VCORE ISL6323
CPU VCORE ISL6323
CPU VCORE ISL6323
IC780M-A2
IC780M-A2
IC780M-A2
11
11
11
of
of
1
of
1.0A
1.0A
1.0A
36Thursday, October 15, 2009
36Thursday, October 15, 2009
36Thursday, October 15, 2009
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