ECS H81H3-AD Schematics REV 1.0
5
4
3
2
1
D
TABLE OF CONTENTS
Page Index
------- ------------------------
Cover Page
2
Block Diagram
3
GPIO Function & INT# Mapping
4
CPU-PEG/DMI/FDI/DDI
5
CPU-MISC
6
C
B
A
CPU-DDR3
7
CPU-POWER
8
CPU-GND
9
PCIE*16
10
DVI-D+VGA
11
DDR3-CHA/CHB
12
DDR3-Vref
13
PCH-DMI/PE/USB2.0
14
PCH-FDI/DDI/USB3.0/CLK
15
PCH-SATA/SATA CONN & PWR/OBR
16
PCH-MISC
17
PCH-POWER
18
PCH-GND
19
PCIE*1
20
USB2.0 CONN & Header
21
USB3.0 Header
22
SPI/SMbus
23
ECIO-IT8732
24
FAN/PS2/Buzzer/F_Panel
25
LPT/COM/TPM
26
LAN RTL8111E
H81H3-AD
Page Index
------- ------------------------
27
AUDIO-ALC662_VD
28
AUDIO-CONN & Header
29
XDP-CPU/PCH
30
DC/DC VDIMM/DDR_VTT/5VDUAL
31
DC/DC PCH_1.5V/PCH,ME_1.05V
32
DC/DC ATX_3VSB/3VDUAL
33
DC/DC Vcore /Gate driver
34
DC/DC VCC3 & VCC & ATX12P
35
PWR Delivery
36
PWR Sequence/RST Diagram
37
CLK Distribution
Rev:V1.0
ECS
CONFIDENTIAL
REVISION HISTORY:
Rev Date Notes
------ -------------- ---------------------------------------------------------------------------------
A1
B
C
V1.0
2013/01/23 Modified Q87H3-AM to Sargo project.
2013/05/10 Swap BIOS_WP and CMOS header, combine bottom side of GND plane VGA and PS2.
2013/05/30 Cancel sparate line of Vcore in GND layer.
2013/06/07 modified for MP.
D
C
B
A
Title
Title
Title
Cover Page
Cover Page
Cover Page
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
H81H3-AD 1.0
H81H3-AD 1.0
H81H3-AD 1.0
1
of
1 37Friday, June 07, 2013
of
1 37Friday, June 07, 2013
of
1 37Friday, June 07, 2013
5
4
3
2
1
DDR3 Channel A
DVI-D
D
VGA
DDI
Haswell
FDI*2
Gen3
1150 pin
DMI2.0
DDR3 Channel B
PCI-E X16
DDR3
1600MHz
D
Jack 3 in 1
HDA
AUDIO
ALC662-VD
F_AUDIO
C
PCI-E X1
PCI-E
Lynx
Point
PCI-E
USB3.0
LAN
H81:Realtek RTL8111E-VC
USB2.0(1 port)
RTL LAN support DASH
USB2.0(2 ports)
USB3.0 down support 2.0
C
RJ45
USB2.0(2 port)
F_USB3.0 header(2 port)
B85:F_USB2.0*2 header(4 ports)
H81 : SATA3.0*2
B
+SATA2.0*1
SATA
USB2.0
SPI
LPC
USB2.0 connector2 ports)
B
SPI
H81:TPM Header
ROM
SIO
IT8732
A
5
4
COM1/2PS2
3
LPT
A
Title
Title
Title
Block Diagram
Block Diagram
Block Diagram
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
H81H3-AD 1.0
H81H3-AD 1.0
H81H3-AD 1.0
1
of
2 37Friday, June 07, 2013
of
2 37Friday, June 07, 2013
of
2 37Friday, June 07, 2013
5
4
3
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1
PCH-GPIO function
---------------------------------------------------------------------------------------------
Pin Name Power Well Usage
---------------------------------------------------------------------------------------------
3VSB GPILPC_PMEGPIO13
D
3VSB NativeGPIO40
3VSB NativeGPIO72
GPIO45 3VSB NativeBIOS WP
3VSB GPIBIOS WPGPIO57
USB_5VDUAL control
USB_5VDUAL control (reserve)
S0/S3/S4/S5:High
S0/S3/S4/S5:High
OUTPUT Low/BIOS WP, High/Normal
INPUT Low/Normal, High/BIOS WP
SIO-GPIO function
---------------------------------------------------------------------------------------------
Pin Name Power Well UsageDefault Status
---------------------------------------------------------------------------------------------
VCC3
3VSB
GP35
3VSB FAN_TAC4
3VSB
LED0
LED1
VCC3
Default Status
CIRRX2Beep(reserve)GP16
FAN_CTL3GP36 Thermal_SD
FAN_TAC3GP37
GPIOTPM Onboard detectGP70
OUTPUT Low/Thermal SD, High/Normal
INPUT Low/TMP Header, High/TMP CHIP
D
GPIO46 3VSB NativeWLAN_DIS_L
GPIO27 ATX_3VSB GPIILAN_WAKE_L
3VSBGPIO61 LPCPD_L Native
GPIO1 VCC3 GPIOBR
GPIO6 Thermal_SD GPIVCC3
GPIO68 VCC3 GPITP_VGA
VCC3 HDPANEL_DETECTGPIO23 Native
GPIO15
C
DL,BIOS must be pro
GPIO24 ME_Disable3VSB GPO
INPUT Low/Active
INPUT Low/Active
INPUT Low/Active
INPUT Low/Active
INPUT Low/On VGA output
INPUT Low/Active
GPO3VSB PEX16_RST
S0:High S3/S4/S5:Low
PCIECLKRQ0#GPIO73 3VSB case open(reserve)
OUTPUT Low/Normal, High/ME disable
RI1# RI1LAN on MB wake up3VSB
BIOS must be pro to Native 3VSBSW
VCC3 BOM detect
VCC3 GPIOGP73 BOM detect
VCC3 GPIOBOM detectGP74
3VSB
3VSB
3VSB
GPIOGP71
GPIOGP76 Changer enable
S0/S3/S4/S5:High
GPIOGP46 Acer Header
GPIOGP47 Acer Header
3VSBSWGP40 5VDUAL Switch3VSB
C
INPUT Low/Active
BOOT device detectGPIO19 GPIVCC3
GPIO51 GPO
VCC3 BOOT device detect
Interrupt mapping
---------------------------------------------------------------------------------------------
Function INT# port PCIe*1 port
---------------------------------------------------------------------------------------------
Device
RTL8111E-VCLAN INTC# port 3
port 4
B
A
5
NAINTB#SATA
LPT integratePCIEX1 INTD#
LPT integrate
4
B
A
Title
Title
Title
GPIO Function & INT# Mapping
GPIO Function & INT# Mapping
GPIO Function & INT# Mapping
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
3
2
Date: Sheet
H81H3-AD 1.0
H81H3-AD 1.0
H81H3-AD 1.0
1
of
3 37Friday, June 07, 2013
of
3 37Friday, June 07, 2013
of
3 37Friday, June 07, 2013
5
4
3
2
1
CPU1C
E15
F15
D14
E14
E13
F13
D12
E12
E11
F11
F10
G10
E9
F9
F8
G8
D3
D4
E4
E5
F5
F6
G4
G5
H5
H6
J4
J5
K5
K6
L4
L5
U3
T3
U1
V1
W2
V2
Y3
W3
D1
C2
B3
A4
P3
PEG_RX[0]
PEG_RX#[0]
PEG_RX[1]
PEG_RX#[1]
PEG_RX[2]
PEG_RX#[2]
PEG_RX[3]
PEG_RX#[3]
PEG_RX[4]
PEG_RX#[4]
PEG_RX[5]
PEG_RX#[5]
PEG_RX[6]
PEG_RX#[6]
PEG_RX[7]
PEG_RX#[7]
PEG_RX[8]
PEG_RX#[8]
PEG_RX[9]
PEG_RX#[9]
PEG_RX[10]
PEG_RX#[10]
PEG_RX[11]
PEG_RX#[11]
PEG_RX[12]
PEG_RX#[12]
PEG_RX[13]
PEG_RX#[13]
PEG_RX[14]
PEG_RX#[14]
PEG_RX[15]
PEG_RX#[15]
DMI_RX[0]
DMI_RX#[0]
DMI_RX[1]
DMI_RX#[1]
DMI_RX[2]
DMI_RX#[2]
DMI_RX[3]
DMI_RX#[3]
RSVD_TP_D1
RSVD_TP_C2
RSVD_TP_B3
RSVD_TP_A4
PEG_RCOMP
HASWELL
R231
24.9-1-04
PEG_RX_P0
PEG_RX_N0
PEG_RX_P1
PEG_RX_N1
PEG_RX_P2
PEG_RX_N2
PEG_RX_P3
PEG_RX_N3
PEG_RX_P4
PEG_RX_N4
PEG_RX_P5
PEG_RX_N5
PEG_RX_P6
PEG_RX_N6
PEG_RX_P7
PEG_RX_N7
PEG_RX_P8
PEG_RX_N8
PEG_RX_P9
PEG_RX_N9
PEG_RX_P10
PEG_RX_N10
PEG_RX_P11
PEG_RX_N11
PEG_RX_P12
PEG_RX_N12
PEG_RX_P13
PEG_RX_N13
PEG_RX_P14
PEG_RX_N14
PEG_RX_P15
PEG_RX_N15
DMI_RX_P0
DMI_RX_N0
DMI_RX_P1
DMI_RX_N1
DMI_RX_P2
DMI_RX_N2
DMI_RX_P3
DMI_RX_N3
PEG_RCOMP
PEG_RX_P09
D
C
+VCOMP_OUT
PEG_RX_N09
PEG_RX_P19
PEG_RX_N19
PEG_RX_P29
PEG_RX_N29
PEG_RX_P39
PEG_RX_N39
PEG_RX_P49
PEG_RX_N49
PEG_RX_P59
PEG_RX_N59
PEG_RX_P69
PEG_RX_N69
PEG_RX_P79
PEG_RX_N79
PEG_RX_P89
PEG_RX_N89
PEG_RX_P99
PEG_RX_N99
PEG_RX_P109
PEG_RX_N109
PEG_RX_P119
PEG_RX_N119
PEG_RX_P129
PEG_RX_N129
PEG_RX_P139
PEG_RX_N139
PEG_RX_P149
PEG_RX_N149
PEG_RX_P159
PEG_RX_N159
DMI_RX_P013
DMI_RX_N013
DMI_RX_P113
DMI_RX_N113
DMI_RX_P213
DMI_RX_N213
DMI_RX_P313
DMI_RX_N313
close to CPU
HASWELL
REV = 1
3 OF 10
PEG_TX[0]
PEG_TX#[0]
PEG_TX[1]
PEG_TX#[1]
PEG_TX[2]
PEG_TX#[2]
PEG_TX[3]
PEG_TX#[3]
PEG_TX[4]
PEG_TX#[4]
PEG_TX[5]
PEG_TX#[5]
PEG_TX[6]
PEG_TX#[6]
PEG_TX[7]
PEG_TX#[7]
PEG_TX[8]
PEG_TX#[8]
PEG_TX[9]
PEG_TX#[9]
PEG_TX[10]
PEG_TX#[10]
PEG_TX[11]
PEG_TX#[11]
PEG_TX[12]
PEG_TX#[12]
PEG_TX[13]
PEG_TX#[13]
PEG_TX[14]
PEG_TX#[14]
PEG_TX[15]
PEG_TX#[15]
DMI_TX[0]
DMI_TX#[0]
DMI_TX[1]
DMI_TX#[1]
DMI_TX[2]
DMI_TX#[2]
DMI_TX[3]
DMI_TX#[3]
A12
B12
B11
C11
C10
D10
B9
C9
C8
D8
B7
C7
A6
B6
B5
C5
E1
E2
F2
F3
G1
G2
H2
H3
J1
J2
K2
K3
M2
M3
L1
L2
AA4
AA5
AB3
AB4
AC5
AC4
AC1
AC2
PEG_TX_P0
PEG_TX_N0
PEG_TX_P1
PEG_TX_N1
PEG_TX_P2
PEG_TX_N2
PEG_TX_P3
PEG_TX_N3
PEG_TX_P4
PEG_TX_N4
PEG_TX_P5
PEG_TX_N5
PEG_TX_P6
PEG_TX_N6
PEG_TX_P7
PEG_TX_N7
PEG_TX_P8
PEG_TX_N8
PEG_TX_P9
PEG_TX_N9
PEG_TX_P10
PEG_TX_N10
PEG_TX_P11
PEG_TX_N11
PEG_TX_P12
PEG_TX_N12
PEG_TX_P13
PEG_TX_N13
PEG_TX_P14
PEG_TX_N14
PEG_TX_P15
PEG_TX_N15
DMI_TX_P0
DMI_TX_N0
DMI_TX_P1
DMI_TX_N1
DMI_TX_P2
DMI_TX_N2
DMI_TX_P3
DMI_TX_N3
PEG_TX_P0 9
PEG_TX_N0 9
PEG_TX_P1 9
PEG_TX_N1 9
PEG_TX_P2 9
PEG_TX_N2 9
PEG_TX_P3 9
PEG_TX_N3 9
PEG_TX_P4 9
PEG_TX_N4 9
PEG_TX_P5 9
PEG_TX_N5 9
PEG_TX_P6 9
PEG_TX_N6 9
PEG_TX_P7 9
PEG_TX_N7 9
PEG_TX_P8 9
PEG_TX_N8 9
PEG_TX_P9 9
PEG_TX_N9 9
PEG_TX_P10 9
PEG_TX_N10 9
PEG_TX_P11 9
PEG_TX_N11 9
PEG_TX_P12 9
PEG_TX_N12 9
PEG_TX_P13 9
PEG_TX_N13 9
PEG_TX_P14 9
PEG_TX_N14 9
PEG_TX_P15 9
PEG_TX_N15 9
DMI_TX_P0 13
DMI_TX_N0 13
DMI_TX_P1 13
DMI_TX_N1 13
DMI_TX_P2 13
DMI_TX_N2 13
DMI_TX_P3 13
DMI_TX_N3 13
FDI_CSYNC14
FDI_INT14
+VCOMP_OUT
CK_DP_SSC_N14
CK_DP_SSC_P14
2012/09/20
remove R for PDG1.0
CK_DP_SSC_N
CK_DP_SSC_P
FDI_TX_N014
FDI_TX_P014
FDI_TX_N114
FDI_TX_P114
FDI_CSYNC
FDI_INT
R230 24.9-1-04
STP6
STP10
STP11
FDI_TX_N0
FDI_TX_P0
FDI_TX_N1
FDI_TX_P1
DP_RCOMP
close to CPU
1
CPU_E16
1
CPU_K11
1
CPU_J12
CPU1
CPU_SUBASSY_STEEL
CPU1D
D16
FDI_CSYNC
D18
FDI_INT
R4
DP_COMP
U5
SSC_DPLL_REF_CLK#
U6
SSC_DPLL_REF_CLK
E16
EDP_DISP_UTIL
K11
RSVD_TP_K11
J12
RSVD_TP_J12
B14
FDI0_TX0#[0]
A14
FDI0_TX0[0]
C13
FDI0_TX0#[1]
B13
FDI0_TX0[1]
HASWELL
HASWELL
REV = 1
DVI-D
4 OF 10
DDIB_TXB[0]
DDIB_TXB#[0]
DDIB_TXB[1]
DDIB_TXB#[1]
DDIB_TXB[2]
DDIB_TXB#[2]
DDIB_TXB[3]
DDIB_TXB#[3]
DDIC_TXC[0]
DDIC_TXC#[0]
DDIC_TXC[1]
DDIC_TXC#[1]
DDIC_TXC[2]
DDIC_TXC#[2]
DDIC_TXC[3]
DDIC_TXC#[3]
DDID_TXD[0]
DDID_TXD#[0]
DDID_TXD[1]
DDID_TXD#[1]
DDID_TXD[2]
DDID_TXD#[2]
DDID_TXD[3]
DDID_TXD#[3]
E17
F17
F18
G18
G19
H19
F20
G20
D19
E19
C20
D20
D21
E21
C22
D22
B15
C15
A16
B16
B17
C17
A18
B18
DDID_TX_P0
DDID_TX_N0
DDID_TX_P1
DDID_TX_N1
DDID_TX_P2
DDID_TX_N2
DDID_TX_P3
DDID_TX_N3
DDID_TX_P0 10
DDID_TX_N0 10
DDID_TX_P1 10
DDID_TX_N1 10
DDID_TX_P2 10
DDID_TX_N2 10
DDID_TX_P3 10
DDID_TX_N3 10
D
C
B
CPU steel (T/U pahse)
PN:20-800-005711 CPU SOCKET STEEL SUBASSY.STEEL....LGA 1155/1156P.W/BACK PLATE,CAP.LOTES
CPU socket (SMD phase)
PN:11-018-115128 SOCKET.CPU..LGA 1150P SMD..15u...BLACK.ACA-ZIF-138-P01...HF.LEAD-FREE.LOTES
A
Title
Title
Title
CPU-PEG/DMI/FDI/DDI
CPU-PEG/DMI/FDI/DDI
CPU-PEG/DMI/FDI/DDI
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
H81H3-AD 1.0
H81H3-AD 1.0
H81H3-AD 1.0
1
of
4 37Friday, June 07, 2013
of
4 37Friday, June 07, 2013
of
4 37Friday, June 07, 2013
B
A
5
4
3
2
1
HASWELL
REV = 1
12'0206
INTEL highlight pin change
(P6/J16/H16/V7/AB6)
DPLL_REF_CLK#
5 OF 10
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
RSVD_T35
RSVD_M38
TESTLO_P6
RSVD_K9
RSVD_H15
RSVD_J9
RSVD_H14
VCC_M8
RSVD_AV2
RSVD_TP
RSVD_TP
PWR_DEBUG
VSS_N39
VSS
VSS
RSVD_TP_K13
RSVD_TP_J8
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
RSVD_AB36
RSVD_TP_AW2
RSVD_TP_AV1
RSVD_AC8
VCOMP_OUT
RSVD_U8
RSVD_AB33
RSVD_T8
RSVD_Y8
RSVD_M10
RSVD_L10
RSVD_M11
RSVD_L12
RSVD_W 8
RSVD_R33
RSVD_P33
VCC_SENSE
VSS_N33
VSS_J11
VSS_M9
VSS_J7
VSS_SENSE
RSVD_N35
DPLL_REF_CLK
CFG_RCOMP
G39
H_BPM0_L
J39
H_BPM1_L
G38
H37
H38
J38
K39
K37
T35
M38
P6
TESTLO_P6
K9
H15
J9
H14
M8
AV2
J16
H16
N40
PWR_DEBUG
N39
V7
AB6
K13
J8
R1
SMRCOMP0
P1
SMRCOMP1
R2
SMRCOMP2
AB36
AW2
AV1
AC8
P4
U8
AB33
T8
CPU_T8
Y8
12'0203 (WW05)
M10
update T8 pin name & reserve test point
L10
M11
L12
W8
R33
P33
E40
VCORE_VCC_SEN
N33
J11
M9
J7
F40
VCORE_VSS_SEN
N35
CPU_N35
W6
W5
H40
CFG_RCOMP
+3VSB
CPU_G38
CPU_H37
CPU_H38
CPU_J38
CPU_K39
CPU_K37
1
close to CPU
1
STP1
1
STP2
1
STP3
1
STP4
1
STP5
1
STP7
R220 49.9-1-04
.1U-16VX7-04-OC164
R211 150-1-04
R209 10K-04-O
R223 100-1-04
R225 75-1-04
R224 100-1-04
STP12
1
STP9
2012/09/20
remove R for PDG1.0
R189 49.9-1-04
GND
+VCCST
close to CPU
+VCOMP_OUT
GND
12'0425
R52,C5 Removed from design
N35 Renamed to STP11
0731 Add follow Sonie-Anthony
GND
+VCORE
+V_1P05_PCH
GND
GND
GND
CK_DP_NSSC_N
CK_DP_NSSC_P
GND
D
C
B
AK21
AB35
M39
M36
D38
AB38
AA37
AA36
W38
AA34
W34
W36
G40
C38
C37
B37
P36
N37
K38
F37
Y38
V39
U39
U40
V38
T40
Y35
V37
Y34
U38
V35
Y36
Y37
V36
D39
F38
F39
E39
E37
L39
L37
V4
V5
N5
K8
J10
CPU1E
BCLK#
BCLK
VIDSCLK
VIDSOUT
VIDALERT
SM_DRAMPWROK
PWRGOOD
RESET
PM_SYNC
PECI
CATERR
PROCHOT
THERMTRIP
SKTOCC
SM_VREF
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[17]
CFG[16]
CFG[19]
CFG[18]
TCK
TDI
TDO
TMS
TRST
PRDY
PREQ
DBR
TESTLO_N5
RSVD_TP
RSVD_TP
HASWELL
CK_DMI_100M_N14
CK_DMI_100M_P14
+VCCIO_OUT
VR_SVID_CK33
D
VR_SVID_DATAOUT33
VR_SVID_ALERT_L33
C
B
VR_SVID_CK
VR_SVID_DATAOUT
VR_SVID_ALERT_L
DRAM_PWROK16
CPU_PWROK5,16,29
CPU_PLTRST_L15,29
PCH_PECI15
SIO_PECI23
PM_SYNC15
+VCCIO_OUT
VR_HOT_L33
+V_1P05_PCH
PCH_THERMTRIP_L15
DIMM_VREF_CA_A11,12
DIMM_VREF_CA_B11,12
Mitch 2/18 unstaffed below circuit after MP.
PCH_PWROK8,15,16,23
QN7002-T1B-AT-S
CK_DMI_100M_N
CK_DMI_100M_P
R173 90.9-1-04-O
R164 110-1-04
R170 75-1-04
R174 0-04
R165 0-04
R175 0-04
DRAM_PWROK
CPU_PWROK
CPU_PLTRST_L
12'0328
change to 2 ohm (PN:05-152-200108)
QN9
R313 0-04
R280 0-04
R208 0-04
R278 0-04-O
R276 0-04
R195 51-04
R183 1K-04
2014f
R293 2-04
R292 2-04-O
Mitch 3/5 unstaffed by PDG2.0
D
G
S
R194 0-04
R182 0-04
+3VSB
R180
1K-04
R179
10K-04-O
VI_SID_ARL
12'0328
pull-up change to reserve 1K ohm
12'0425
Stuff 1k ohm
R169 44.2-1-04
DRAM_PWROK_RC
.1U-16VX7-04-OC289
R279 10K-04
CPU_PWROK_RC
.1U-16VY5-04-OC244
CPU_RST_L_RC
.1U-16VY5-04-OC188
CPU_PECI
PM_SYNC
PROCHOT_L
47P-04C179
CPU_THERMTRIP_L
DIMM_VREF_CPU
C274
.022U-16VX7-04
DIMM_VREF_CPU_C
H_SKTOCC_L
GND
close to CPU
VID_CK_R
VR_SVID_DATAOUT_R
VID_ALERT_L_R
R168 100-04-O
GND
12'0405 (WW14)
GND
stuffed
GND
GND
R291
24.9-1-04
GND
GND
STP8
close to CPU
R268 1K-04-O
R257 1K-04-O
R261 1K-04-O
R251 1K-04-O
R240 1K-04-O
R227 1K-04-O
R232 1K-04-O
R247 1K-04-O
R221 1K-04-O
R269 1K-04-O
R262 1K-04-O
R235 1K-04-O
R228 1K-04-O
R222 1K-04-O
R233 1K-04-O
R236 1K-04-O
R252 1K-04-O
R258 1K-04-O
R241 1K-04-O
R248 1K-04-O
GND
R213 49.9-1-04
GND
CK_DMI_100M_N
CK_DMI_100M_P
VID_CK_R
VR_SVID_DATAOUT_R
VID_ALERT_L_R
DRAM_PWROK_RC
CPU_PWROK_RC
CPU_RST_L_RC
PM_SYNC
CPU_PECI
1
CPU_M36
PROCHOT_L
CPU_THERMTRIP_L
H_SKTOCC_L
DIMM_VREF_CPU
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG17
CFG16
CFG19
CFG18
H_TCK
H_TDI
H_TDO
H_TMS
H_TRST_L
H_PRDY_L
H_PREQ_L
FP_RST_L_R
TESTLO_N5
12'0206
INTEL highlight pin change
(N5/K8/J10)
GND
FP_RST_L16,24,29
H_TRST_L29
H_PRDY_L29
H_PREQ_L29
H_TCK29
H_TDI29
H_TMS29
H_TDO29
H_BPM0_L29
H_BPM1_L29
PWR_DEBUG29
CFG[0..3]29
CFG[4..7]29
A
CFG[8..11]29
CFG[12..15]29
CFG[16..17]29
CFG[18..19]29
VCORE_VCC_SEN33
VCORE_VSS_SEN33
CK_DP_NSSC_N14
CK_DP_NSSC_P14
5
H_TRST_L
H_PRDY_L
H_PREQ_L
H_TCK
H_TDI
H_TMS
H_TDO
H_BPM0_L
H_BPM1_L
PWR_DEBUG
CFG[0..3]
CFG[4..7]
CFG[8..11]
CFG[12..15]
CFG[16..17]
CFG[18..19]
VCORE_VCC_SEN
VCORE_VSS_SEN
CK_DP_NSSC_N
CK_DP_NSSC_P
GND
R190 0-04
FP_RST_L_R
CPU XDP
Vcore sense
R283
10K-04
SLP_S3_L16,20,21,23,31
SLP_S3_L_QB_1
Power Down Sequencing Circuit
4
3
R289
10K-04
SLS3_BF
C
B
QN11
PMBS3904-S
E
GND
2
R287
1K-04
R301
1K-04
R307
1K-04-O
B
B
B
CPU-MISC
CPU-MISC
CPU-MISC
QN10
PMBS3904-S
E C
GND
R297 100-04
SLS3_C2
C
QN12
PMBS3904-S
E
GND
R306 100-04-O
SLS3_C3
C
QN13
PMBS3904-S-O
E
GND
H81H3-AD 1.0
H81H3-AD 1.0
H81H3-AD 1.0
SLS3_B1
SLS3_B2
SLS3_B3
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
2
C218
2.2U-6V3Y5-06-O
1
GND
1
VR_EN 33
VR_READY 16,29,33
CPU_PWROK 5,16,29
5 37Friday, June 07, 2013
5 37Friday, June 07, 2013
5 37Friday, June 07, 2013
A
of
of
of
5
4
3
2
1
D
C
B
A
M_DATA_A[0..63]11
M_DQS_A_P[0..7]11
M_DQS_A_N[0..7]11
M_MA_A[0..15]11
M_BS_A[0..2]11
M_CS_A_L[0..1]11
M_CKE_A[0..1]11
M_ODT_A[0..1]11
M_CLK_A_P[0..1]11
M_CLK_A_N[0..1]11
M_WE_A_L11
M_CAS_A_L11
M_RAS_A_L11
DDR3 CH.A
M_DATA_B[0..63]11
M_DQS_B_P[0..7]11
M_DQS_B_N[0..7]11
M_MA_B[0..15]11
M_BS_B[0..2]11
M_CS_B_L[0..1]11
M_CKE_B[0..1]11
M_ODT_B[0..1]11
M_CLK_B_P[0..1]11
M_CLK_B_N[0..1]11
M_WE_B_L11
M_CAS_B_L11
M_RAS_B_L11
DDR3 CH.B
DDR3_DRAMRST_L6,11
M_DATA_A[0..63]
M_DQS_A_P[0..7]
M_DQS_A_N[0..7]
M_MA_A[0..15]
M_BS_A[0..2]
M_CS_A_L[0..1]
M_CKE_A[0..1]
M_ODT_A[0..1]
M_CLK_A_P[0..1]
M_CLK_A_N[0..1]
M_WE_A_L
M_CAS_A_L
M_RAS_A_L
M_DATA_B[0..63]
M_DQS_B_P[0..7]
M_DQS_B_N[0..7]
M_MA_B[0..15]
M_BS_B[0..2]
M_CS_B_L[0..1]
M_CKE_B[0..1]
M_ODT_B[0..1]
M_CLK_B_P[0..1]
M_CLK_B_N[0..1]
M_WE_B_L
M_CAS_B_L
M_RAS_B_L
DDR3_DRAMRST_L
M_DATA_A0
M_DATA_A1
M_DATA_A2
M_DATA_A3
M_DATA_A4
M_DATA_A5
M_DATA_A6
M_DATA_A7
M_DATA_A9
M_DATA_A13
M_DATA_A10
M_DATA_A11
M_DATA_A12
M_DATA_A8
M_DATA_A14
M_DATA_A15
M_DATA_A17
M_DATA_A21
M_DATA_A18
M_DATA_A19
M_DATA_A20
M_DATA_A16
M_DATA_A22
M_DATA_A23
M_DATA_A25
M_DATA_A29
M_DATA_A26
M_DATA_A27
M_DATA_A28
M_DATA_A24
M_DATA_A30
M_DATA_A31
M_DATA_A33
M_DATA_A37
M_DATA_A34
M_DATA_A35
M_DATA_A36
M_DATA_A32
M_DATA_A38
M_DATA_A39
M_DATA_A41
M_DATA_A45
M_DATA_A42
M_DATA_A43
M_DATA_A44
M_DATA_A40
M_DATA_A46
M_DATA_A47
M_DATA_A49
M_DATA_A53
M_DATA_A50
M_DATA_A51
M_DATA_A52
M_DATA_A48
M_DATA_A54
M_DATA_A55
M_DATA_A57
M_DATA_A61
M_DATA_A58
M_DATA_A59
M_DATA_A60
M_DATA_A56
M_DATA_A62
M_DATA_A63
M_DQS_A_P0
M_DQS_A_P1
M_DQS_A_P2
M_DQS_A_P3
M_DQS_A_P4
M_DQS_A_P5
M_DQS_A_P6
M_DQS_A_P7
M_DQS_A_N0
M_DQS_A_N1
M_DQS_A_N2
M_DQS_A_N3
M_DQS_A_N4
M_DQS_A_N5
M_DQS_A_N6
M_DQS_A_N7
AD38
AD39
AF38
AF39
AD37
AD40
AF37
AF40
AH40
AH39
AK38
AK39
AH37
AH38
AK37
AK40
AM40
AM39
AP38
AP39
AM37
AM38
AP37
AP40
AV37
AW37
AU35
AV35
AT37
AU37
AT35
AW35
AY6
AU6
AV4
AU4
AW6
AV6
AW4
AY4
AR1
AR4
AN3
AN4
AR2
AR3
AN2
AN1
AL1
AL4
AJ3
AJ4
AL2
AL3
AJ2
AJ1
AG1
AG4
AE3
AE4
AG2
AG3
AE2
AE1
AE39
AJ39
AN39
AV36
AV5
AP3
AK3
AF3
AV32
AE38
AJ38
AN38
AU36
AW5
AP2
AK2
AF2
AU32
CPU1A
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_DQS[8]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS#[8]
HASWELL
HASWELL
REV = 1
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
SA_ODT[0]
SA_ODT[1]
SA_ODT[2]
SA_ODT[3]
SA_ECC_CB[0]
SA_ECC_CB[1]
SA_ECC_CB[2]
SA_ECC_CB[3]
SA_ECC_CB[4]
SA_ECC_CB[5]
SA_ECC_CB[6]
SA_ECC_CB[7]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CKE[0]
SA_CKE[1]
SA_CKE[2]
SA_CKE[3]
SA_CS#[0]
SA_CS#[1]
SA_CS#[2]
SA_CS#[3]
SA_CK[0]
SA_CK#[0]
SA_CK[1]
SA_CK#[1]
SA_CK[2]
SA_CK#[2]
SA_CK[3]
SA_CK#[3]
RSVD_AW 12
SA_RAS
SA_WE
RSVD_AV20
RSVD_AW 27
SA_CAS
SM_DRAMRST
1 OF 10
AU13
AV16
AU16
AW17
AU17
AW18
AV17
AT18
AU18
AT19
AW11
AV19
AU19
AY10
AT20
AU21
AW10
AY8
AW9
AU8
AW33
AV33
AU31
AV31
AT33
AU33
AT31
AW31
AV12
AY11
AT21
AV22
AT23
AU22
AU23
AU14
AV9
AU10
AW8
AY15
AY16
AW15
AV15
AV14
AW14
AW13
AY13
AW12
AU12
AU11
AV20
AW27
AU9
AK22
M_MA_A0
M_MA_A1
M_MA_A2
M_MA_A3
M_MA_A4
M_MA_A5
M_MA_A6
M_MA_A7
M_MA_A8
M_MA_A9
M_MA_A10
M_MA_A11
M_MA_A12
M_MA_A13
M_MA_A14
M_MA_A15
M_ODT_A0
M_ODT_A1
M_BS_A0
M_BS_A1
M_BS_A2
M_CKE_A0
M_CKE_A1
M_CS_A_L0
M_CS_A_L1
M_CLK_A_P0
M_CLK_A_N0
M_CLK_A_P1
M_CLK_A_N1
CPU_AW12
M_RAS_A_L
M_WE_A_L
CPU_AV20
CPU_AW27
M_CAS_A_L
DRAMRT
R446
0-04
1
1
1
TP4
TP3
TP2
DDR3_DRAMRST_L 6,11
C366
.1U-16VX7-04-O
close to DIMM slot
GND
**Attention**Attention
M_DATA_B0
M_DATA_B1
M_DATA_B2
M_DATA_B3
M_DATA_B4
M_DATA_B5
M_DATA_B6
M_DATA_B7
M_DATA_B8
M_DATA_B9
M_DATA_B10
M_DATA_B11
M_DATA_B12
M_DATA_B13
M_DATA_B14
M_DATA_B15
M_DATA_B17
M_DATA_B21
M_DATA_B19
M_DATA_B23
M_DATA_B20
M_DATA_B16
M_DATA_B18
M_DATA_B22
M_DATA_B25
M_DATA_B28
M_DATA_B27
M_DATA_B30
M_DATA_B24
M_DATA_B29
M_DATA_B26
M_DATA_B31
M_DATA_B32
M_DATA_B33
M_DATA_B34
M_DATA_B35
M_DATA_B36
M_DATA_B37
M_DATA_B38
M_DATA_B39
M_DATA_B45
M_DATA_B41
M_DATA_B47
M_DATA_B43
M_DATA_B44
M_DATA_B40
M_DATA_B46
M_DATA_B42
M_DATA_B52
M_DATA_B53
M_DATA_B50
M_DATA_B55
M_DATA_B48
M_DATA_B49
M_DATA_B54
M_DATA_B51
M_DATA_B61
M_DATA_B60
M_DATA_B59
M_DATA_B63
M_DATA_B56
M_DATA_B57
M_DATA_B58
M_DATA_B62
M_DQS_B_P0
M_DQS_B_P1
M_DQS_B_P2
M_DQS_B_P3
M_DQS_B_P4
M_DQS_B_P5
M_DQS_B_P6
M_DQS_B_P7
M_DQS_B_N0
M_DQS_B_N1
M_DQS_B_N2
M_DQS_B_N3
M_DQS_B_N4
M_DQS_B_N5
M_DQS_B_N6
M_DQS_B_N7
AE34
AE35
AG35
AH35
AD34
AD35
AG34
AH34
AL34
AL35
AK31
AL31
AK34
AK35
AK32
AL32
AN34
AP34
AN31
AP31
AN35
AP35
AN32
AP32
AM29
AM28
AR29
AR28
AL29
AL28
AP29
AP28
AR12
AP12
AL13
AL12
AR13
AP13
AM13
AM12
AR9
AP9
AR6
AP6
AR10
AP10
AR7
AP7
AM9
AL9
AL6
AL7
AM10
AL10
AM6
AM7
AH6
AH7
AE6
AE7
AJ6
AJ7
AF6
AF7
AF35
AL33
AP33
AN28
AN12
AP8
AL8
AG7
AN25
AF34
AK33
AN33
AN29
AN13
AR8
AM8
AG6
AN26
CPU1B
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
SB_DQS[8]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS#[8]
HASWELL
HASWELL
REV = 1
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
SB_ODT[0]
SB_ODT[1]
SB_ODT[2]
SB_ODT[3]
SB_ECC_CB[0]
SB_ECC_CB[1]
SB_ECC_CB[2]
SB_ECC_CB[3]
SB_ECC_CB[4]
SB_ECC_CB[5]
SB_ECC_CB[6]
SB_ECC_CB[7]
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CKE[0]
SB_CKE[1]
SB_CKE[2]
SB_CKE[3]
SB_CS#[0]
SB_CS#[1]
SB_CS#[2]
SB_CS#[3]
SB_CK[0]
SB_CK#[0]
SB_CK[1]
SB_CK#[1]
SB_CK[2]
SB_CK#[2]
SB_CK[3]
SB_CK#[3]
SB_CAS
RSVD_AL20
SB_RAS
SB_WE
SA_DIMM_VREFDQ
SB_DIMM_VREFDQ
2 OF 10
AL19
M_MA_B0
AK23
M_MA_B1
AM22
M_MA_B2
AM23
M_MA_B3
AP23
M_MA_B4
AL23
M_MA_B5
AY24
M_MA_B6
AV25
M_MA_B7
AU26
M_MA_B8
AW25
M_MA_B9
AP18
M_MA_B10
AY25
M_MA_B11
AV26
M_MA_B12
AR15
M_MA_B13
AV27
M_MA_B14
AY28
M_MA_B15
AM17
M_ODT_B0
AL16
M_ODT_B1
AM16
AK15
AM26
AM25
AP25
AP26
AL26
AL25
AR26
AR25
AK17
M_BS_B0
AL18
M_BS_B1
AW28
M_BS_B2
AW29
M_CKE_B0
AY29
M_CKE_B1
AU28
AU29
AP17
M_CS_B_L0
AN15
M_CS_B_L1
AN17
AL15
AM20
M_CLK_B_P0
AM21
M_CLK_B_N0
AP22
M_CLK_B_P1
AP21
M_CLK_B_N1
AN20
AN21
AP19
AP20
AP16
M_CAS_B_L
AL20
CPU_AL20
AM18
M_RAS_B_L
AK16
M_WE_B_L
AB39
DIMM_DQ_CPU_VREF_A
AB40
DIMM_DQ_CPU_VREF_B
1
C257
.022U-16VX7-04
R286
24.9-1-04
STP13
DIMM_DQ_AC
GND
C252
.022U-16VX7-04
DIMM_DQ_BC
R285
24.9-1-04
GND
DIMM_DQ_CPU_VREF_A 12
DIMM_DQ_CPU_VREF_B 12
D
C
B
A
Title
Title
Title
CPU-DDR3
CPU-DDR3
CPU-DDR3
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
H81H3-AD 1.0
H81H3-AD 1.0
H81H3-AD 1.0
1
of
6 37Friday, June 07, 2013
of
6 37Friday, June 07, 2013
of
6 37Friday, June 07, 2013
5
4
3
2
1
12'0425
SC12 change to 0.1UF
SC14 change to 4.7UF
+VCCST
D
+V_1P05_PCH
C
C193
.1U-16VX7-04
GND
+VCCIO_PCH
+V_1P05_PCH
12'0425
Added new caps for VCCIO_OUT
+VCCIO_OUT
R201
0-04-O
C194
4.7U-25VX5-08
GND
R199 0-04
09/04 reserve for power quality
B
R234 0-04-O
R229
0-04
R304
0-04
VCCIO_OUT
2014b
2014a
GND
VCCIO_OUT
C182
4.7U-6.3VX6S-O
CPU_AB8
+VCORE
AB8
A24
A25
A26
A27
A28
A29
A30
G33
B25
B27
B29
B31
B33
G31
B35
C24
C25
C26
C27
C28
C29
C30
C32
C34
C35
D25
D27
D29
D31
E33
D33
E31
D35
E24
E25
E26
E27
E28
E29
E30
E32
E34
E35
G22
G23
G24
G25
G26
G27
G28
G29
G30
G32
G34
G35
H23
H25
H27
H29
H31
P8
L40
L31
L18
L17
J33
J31
F23
F25
F27
F29
F31
F33
F35
L34
CPU1F
VCC_P8
VCCIO_OUT
VCCIO2PCH
VCC_L31
VCC_L18
VCC_L17
VCC_J33
VCC_A24
VCC_A25
VCC_A26
VCC_A27
VCC_A28
VCC_A29
VCC_A30
VCC_G33
VCC_B25
VCC_B27
VCC_B29
VCC_B31
VCC_J31
VCC_B33
VCC_G31
VCC_B35
VCC_C24
VCC_C25
VCC_C26
VCC_C27
VCC_C28
VCC_C29
VCC_C30
VCC_C32
VCC_C34
VCC_C35
VCC_D25
VCC_D27
VCC_D29
VCC_D31
VCC_E33
VCC_D33
VCC_E31
VCC_D35
VCC_E24
VCC_E25
VCC_E26
VCC_E27
VCC_E28
VCC_E29
VCC_E30
VCC_E32
VCC_E34
VCC_F23
VCC_F25
VCC_F27
VCC_F29
VCC_F31
VCC_E35
VCC_F33
VCC_F35
VCC_G22
VCC_G23
VCC_G24
VCC_G25
VCC_G26
VCC_G27
VCC_G28
VCC_G29
VCC_G30
VCC_G32
VCC_G34
VCC_G35
VCC_H23
VCC_H25
VCC_H27
VCC_H29
VCC_H31
VCC_L34
HASWELL
HASWELL
REV = 1
6 OF 10
VCC_C31
VCC_C33
VCC_L16
VCC_L15
VCC_J35
VCC_H33
VCC_H35
VCC_J21
VCC_J22
VCC_J23
VCC_J24
VCC_J25
VCC_J26
VCC_J27
VCC_J28
VCC_J29
VCC_J30
VCC_J32
VCC_J34
VCC_K19
VCC_K21
VCC_K23
VCC_K25
VCC_K27
VCC_K29
VCC_K31
VCC_M13
VCC_K33
VCC_K35
VCC_L19
VCC_L20
VCC_L21
VCC_L22
VCC_L23
VCC_L24
VCC_L25
VCC_L26
VCC_L27
VCC_L28
VCC_L29
VCC_L30
VCC_L32
VCC_L33
VCC_M17
VCC_M15
VCC_M19
VCC_M21
VCC_M23
VCC_M25
VCC_M27
VCC_M29
VCC_M33
VDDQ_AJ12
VDDQ_AJ13
VDDQ_AJ15
VDDQ_AJ17
VDDQ_AJ20
VDDQ_AJ21
VDDQ_AJ24
VDDQ_AJ25
VDDQ_AJ28
VDDQ_AJ29
VDDQ_AJ9
VDDQ_AT17
VDDQ_AT22
VDDQ_AU15
VDDQ_AU20
VDDQ_AU24
VDDQ_AV10
VDDQ_AV11
VDDQ_AV13
VDDQ_AV18
VDDQ_AV23
VDDQ_AV8
VDDQ_AW 16
VDDQ_AY12
VDDQ_AY14
VDDQ_AY9
C31
C33
L16
L15
J35
H33
H35
J21
J22
J23
J24
J25
J26
J27
J28
J29
J30
J32
J34
K19
K21
K23
K25
K27
K29
K31
M13
K33
K35
L19
L20
L21
L22
L23
L24
L25
L26
L27
L28
L29
L30
L32
L33
M17
M15
M19
M21
M23
M25
M27
M29
M33
AJ12
AJ13
AJ15
AJ17
AJ20
AJ21
AJ24
AJ25
AJ28
AJ29
AJ9
AT17
AT22
AU15
AU20
AU24
AV10
AV11
AV13
AV18
AV23
AV8
AW16
AY12
AY14
AY9
+VCORE
+VDIMM
+VCORE
C247
22U-6V3X5-08
C237
22U-6V3X5-08
C248
22U-6V3X5-08
+VDIMM
C264
22U-6V3X5-08-O
C259
22U-6V3X5-08
place caps in CPU socket cavity
+VCORE
C205
22U-6V3X5-08-O
place caps at top CPU socket edge
+VDIMM
C417
22U-6V3X5-08-O
place caps between CHA/CHB DIMM
C161
22U-6V3X5-08
C208
22U-6V3X5-08
C240
22U-6V3X5-08
C263
22U-6V3X5-08-O
C265
22U-6V3X5-08-O
C223
22U-6V3X5-08-O
C387
22U-6V3X5-08-O
C160
22U-6V3X5-08
C207
22U-6V3X5-08
C227
22U-6V3X5-08
C262
22U-6V3X5-08
C266
22U-6V3X5-08
C236
22U-6V3X5-08-O
C388
22U-6V3X5-08-O
C246
22U-6V3X5-08
C225
22U-6V3X5-08
C162
22U-6V3X5-08-O
C261
22U-6V3X5-08-O
C267
22U-6V3X5-08
C209
22U-6V3X5-08-O
GND
C419
22U-6V3X5-08-O
GND
C239
22U-6V3X5-08
C206
22U-6V3X5-08
C163
22U-6V3X5-08-O
C260
22U-6V3X5-08-O
12'1217
Intel spec. cost down VDDQ cap.
GND
12'0405
unstuff
C226
22U-6V3X5-08
C238
22U-6V3X5-08
C224
22U-6V3X5-08-O
GND
12'0405
stuff 18pcs
07/19 change to 15pcs-Anthony
D
C
B
A
Title
Title
Title
CPU-POWER
CPU-POWER
CPU-POWER
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
H81H3-AD 1.0
H81H3-AD 1.0
H81H3-AD 1.0
1
of
7 37Friday, June 07, 2013
of
7 37Friday, June 07, 2013
of
7 37Friday, June 07, 2013
A
5
4
3
2
1
HASWELL
REV = 1
VSS_K15
VSS_K16
VSS_K32
VSS_L36
VSS_M4
VSS_M5
VSS_M6
VSS_M7
VSS_M35
VSS_M40
VSS_N1
VSS_N2
VSS_N3
VSS_N4
VSS_N6
VSS_N7
VSS_N8
VSS_N34
VSS_P2
VSS_P5
VSS_P7
VSS_P34
VSS_P35
VSS_P38
VSS_R3
VSS_R5
VSS_R6
VSS_R7
VSS_R8
VSS_R35
VSS_R40
VSS_T1
VSS_T2
VSS_T4
VSS_T5
VSS_T6
VSS_T7
VSS_T33
VSS_T39
VSS_U2
VSS_U4
VSS_U7
VSS_U33
VSS_U34
VSS_U37
VSS_V3
VSS_V6
VSS_V8
VSS_V33
VSS_V40
VSS_W1
VSS_W4
VSS_W7
VSS_W33
VSS_W35
VSS_W37
VSS_Y4
VSS_Y5
VSS_Y6
VSS_Y33
VSS_NCTF_AU40
VSS_NCTF_AV39
VSS_NCTF_AW38
VSS_NCTF_AY3
VSS_NCTF_B38
VSS_NCTF_B39
VSS_NCTF_C40
VSS_NCTF_D40
K15
K16
K32
L36
M4
M5
M6
M7
M35
M40
N1
N2
N3
N4
N6
N7
N8
N34
P2
P5
P7
P34
P35
P38
R3
R5
R6
R7
R8
R35
R40
T1
T2
T4
T5
T6
T7
T33
T39
U2
U4
U7
U33
U34
U37
V3
V6
V8
V33
V40
W1
W4
W7
W33
W35
W37
Y4
Y5
Y6
Y33
AU40
AV39
AW38
AY3
B38
B39
C40
D40
D
C
B
CPU1H
AY18
RSVD_AY18
AW24
RSVD_AW 24
AW23
RSVD_AW 23
AV29
RSVD_AV29
P_PWOK_R
AV24
AU39
AU27
AU1
AT40
AK20
R34
H12
Y7
T34
J40
J17
J15
RSVD_AV24
RSVD_AU39
RSVD_AU27
RSVD_AU1
RSVD_AT40
RSVD_AK20
RSVD_Y7
RSVD_T34
RSVD_R34
RSVD_J40
RSVD_J17
RSVD_J15
RSVD_H12
HASWELL
D
R281
PCH_PWROK5,15,16,23
60.4K-1-04
R282
32.4K-1-04
2014c
12'0425
SR19 change to 2.67k
C
B
GND
REV = 1
HASWELL
RSVD_TP_K12
RSVD_TP_J13
RSVD_TP_P37
RSVD_TP_N38
RSVD_TP_R36
RSVD_TP_C39
VSS_U35
VSS_P40
VSS_R38
VSS_T37
VSS_V34
VSS_R39
VSS_T38
VSS_U36
VSS_P39
VSS_T36
VSS_R37
VSS_J14
RSVD_TP_N36
8 OF 10
K12
J13
P37
N38
R36
C39
U35
P40
R38
T37
V34
R39
T38
U36
P39
T36
R37
J14
N36
GND
GND
AP11
AP14
AP15
AP24
AP27
AP30
AP36
AP4
AP5
AR11
AR14
AR16
AR17
AR18
AR19
AR20
AR21
AR22
AR23
AR24
AR27
AR30
AR31
AR32
AR33
AR34
AR35
AR36
AR37
AR38
AR39
AR40
AR5
AT1
AT10
AT11
AT12
AT13
AT14
AT15
AT16
AT2
AT24
AT25
AT26
AT27
AT28
AT29
AT3
AT30
AT32
AT34
AT36
AT38
AT39
AT4
AT5
AT6
AT7
AT8
AT9
AU2
AU25
AU3
AU30
AU34
AU38
AU5
AU7
AV21
AV28
AV3
AV30
AV34
AV38
AV7
AW26
AW3
AW30
CPU1G
VSS_AP11
VSS_AP14
VSS_AP15
VSS_AP24
VSS_AP27
VSS_AP30
VSS_AP36
VSS_AP4
VSS_AP5
VSS_AR11
VSS_AR14
VSS_AR16
VSS_AR17
VSS_AR18
VSS_AR19
VSS_AR20
VSS_AR21
VSS_AR22
VSS_AR23
VSS_AR24
VSS_AR27
VSS_AR30
VSS_AR31
VSS_AR32
VSS_AR33
VSS_AR34
VSS_AR35
VSS_AR36
VSS_AR37
VSS_AR38
VSS_AR39
VSS_AR40
VSS_AR5
VSS_AT1
VSS_AT10
VSS_AT11
VSS_AT12
VSS_AT13
VSS_AT14
VSS_AT15
VSS_AT16
VSS_AT2
VSS_AT24
VSS_AT25
VSS_AT26
VSS_AT27
VSS_AT28
VSS_AT29
VSS_AT3
VSS_AT30
VSS_AT32
VSS_AT34
VSS_AT36
VSS_AT38
VSS_AT39
VSS_AT4
VSS_AT5
VSS_AT6
VSS_AT7
VSS_AT8
VSS_AT9
VSS_AU2
VSS_AU25
VSS_AU3
VSS_AU30
VSS_AU34
VSS_AU38
VSS_AU5
VSS_AU7
VSS_AV21
VSS_AV28
VSS_AV3
VSS_AV30
VSS_AV34
VSS_AV38
VSS_AV7
VSS_AW 26
VSS_AW 3
VSS_AW 30
HASWELL
HASWELL
REV = 1
VSS_AW 32
VSS_AW 34
VSS_AW 36
VSS_AW 7
VSS_AY17
VSS_AY23
VSS_AY26
VSS_AY27
VSS_AY30
VSS_AY5
VSS_AY7
VSS_B24
VSS_B26
VSS_B28
VSS_B30
VSS_B34
VSS_B36
VSS_C12
VSS_C14
VSS_C16
VSS_C18
VSS_C19
VSS_C21
VSS_C23
VSS_C36
VSS_B10
VSS_B23
VSS_D11
VSS_D13
VSS_D15
VSS_D17
VSS_D23
VSS_D24
VSS_D26
VSS_D28
VSS_D30
VSS_D34
VSS_D36
VSS_D37
VSS_E10
VSS_E18
VSS_E20
VSS_E22
VSS_E23
VSS_E36
VSS_E38
VSS_B32
VSS_F32
VSS_F12
VSS_F14
VSS_F16
VSS_F19
VSS_F21
VSS_F22
VSS_F24
VSS_F26
VSS_F28
VSS_F30
VSS_F34
VSS_F36
VSS_D32
VSS_G11
7 OF 10
VSS_B4
VSS_B8
VSS_C4
VSS_C6
VSS_C3
VSS_D9
VSS_D2
VSS_D5
VSS_D6
VSS_D7
VSS_E7
VSS_E8
VSS_E3
VSS_E6
VSS_F1
VSS_F4
VSS_F7
VSS_G9
AW32
AW34
AW36
AW7
AY17
AY23
AY26
AY27
AY30
AY5
AY7
B24
B26
B28
B30
B34
B36
B4
B8
C4
C6
C12
C14
C16
C18
C19
C21
C23
C36
B10
B23
C3
D9
D11
D13
D15
D17
D2
D23
D24
D26
D28
D30
D34
D36
D37
D5
D6
D7
E7
E8
E10
E18
E3
E20
E22
E23
E36
E38
B32
E6
F1
F32
F12
F14
F16
F19
F21
F22
F24
F26
F28
F30
F34
F36
F4
D32
F7
G9
G11
GND
GND
A11
A13
A15
A17
A23
AA3
AA6
AA7
AA8
AA33
AA35
AA38
AB5
AB7
AB34
AB37
AC3
AC6
AC7
AC33
AC34
AC35
AC36
AC37
AC38
AC39
AC40
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD33
AD36
AE5
AE8
AE33
AE36
AE37
AE40
AF1
AF4
AF5
AF8
AF33
AF36
AG5
AG8
AG33
AG36
AG37
AG38
AG39
AG40
AH1
AH2
AH3
AH4
AH5
AH8
AH33
AH36
AJ11
AJ14
AJ16
AJ18
AJ19
AJ22
AJ23
AJ26
AJ27
AJ30
AJ31
AJ32
AJ33
A5
A7
CPU1I
VSS_A5
VSS_A7
VSS_A11
VSS_A13
VSS_A15
VSS_A17
VSS_A23
VSS_AA3
VSS_AA6
VSS_AA7
VSS_AA8
VSS_AA33
VSS_AA35
VSS_AA38
VSS_AB5
VSS_AB7
VSS_AB34
VSS_AB37
VSS_AC3
VSS_AC6
VSS_AC7
VSS_AC33
VSS_AC34
VSS_AC35
VSS_AC36
VSS_AC37
VSS_AC38
VSS_AC39
VSS_AC40
VSS_AD1
VSS_AD2
VSS_AD3
VSS_AD4
VSS_AD5
VSS_AD6
VSS_AD7
VSS_AD8
VSS_AD33
VSS_AD36
VSS_AE5
VSS_AE8
VSS_AE33
VSS_AE36
VSS_AE37
VSS_AE40
VSS_AF1
VSS_AF4
VSS_AF5
VSS_AF8
VSS_AF33
VSS_AF36
VSS_AG5
VSS_AG8
VSS_AG33
VSS_AG36
VSS_AG37
VSS_AG38
VSS_AG39
VSS_AG40
VSS_AH1
VSS_AH2
VSS_AH3
VSS_AH4
VSS_AH5
VSS_AH8
VSS_AH33
VSS_AH36
VSS_AJ11
VSS_AJ14
VSS_AJ16
VSS_AJ18
VSS_AJ19
VSS_AJ22
VSS_AJ23
VSS_AJ26
VSS_AJ27
VSS_AJ30
VSS_AJ31
VSS_AJ32
VSS_AJ33
HASWELL
HASWELL
REV = 1
9 OF 10
VSS_AJ5
VSS_AJ8
VSS_AJ34
VSS_AJ35
VSS_AJ36
VSS_AJ37
VSS_AJ40
VSS_AK1
VSS_AK4
VSS_AK5
VSS_AK6
VSS_AK7
VSS_AK8
VSS_AK9
VSS_AK10
VSS_AK11
VSS_AK12
VSS_AK13
VSS_AK14
VSS_AK18
VSS_AK19
VSS_AK24
VSS_AK25
VSS_AK26
VSS_AK27
VSS_AK28
VSS_AK29
VSS_AK30
VSS_AK36
VSS_AL5
VSS_AL11
VSS_AL14
VSS_AL17
VSS_AL21
VSS_AL22
VSS_AL24
VSS_AL27
VSS_AL30
VSS_AL36
VSS_AL37
VSS_AL38
VSS_AL39
VSS_AL40
VSS_AM1
VSS_AM2
VSS_AM3
VSS_AM4
VSS_AM5
VSS_AM11
VSS_AM14
VSS_AM15
VSS_AM19
VSS_AM24
VSS_AM27
VSS_AM30
VSS_AM31
VSS_AM32
VSS_AM33
VSS_AM34
VSS_AM35
VSS_AM36
VSS_AN5
VSS_AN6
VSS_AN7
VSS_AN8
VSS_AN9
VSS_AN10
VSS_AN11
VSS_AN14
VSS_AN16
VSS_AN18
VSS_AN19
VSS_AN22
VSS_AN23
VSS_AN24
VSS_AN27
VSS_AN30
VSS_AN36
VSS_AN37
VSS_AN40
VSS_AP1
AJ5
AJ8
AJ34
AJ35
AJ36
AJ37
AJ40
AK1
AK4
AK5
AK6
AK7
AK8
AK9
AK10
AK11
AK12
AK13
AK14
AK18
AK19
AK24
AK25
AK26
AK27
AK28
AK29
AK30
AK36
AL5
AL11
AL14
AL17
AL21
AL22
AL24
AL27
AL30
AL36
AL37
AL38
AL39
AL40
AM1
AM2
AM3
AM4
AM5
AM11
AM14
AM15
AM19
AM24
AM27
AM30
AM31
AM32
AM33
AM34
AM35
AM36
AN5
AN6
AN7
AN8
AN9
AN10
AN11
AN14
AN16
AN18
AN19
AN22
AN23
AN24
AN27
AN30
AN36
AN37
AN40
AP1
GND
G12
G13
G14
G15
G16
G17
G21
G36
G37
H10
H11
H13
H17
H18
H20
H21
H22
H24
H26
H28
H30
H32
H34
H36
H39
K10
K14
K17
K18
K20
K22
K24
K26
K28
K30
K34
K36
K40
M12
M14
M16
M18
M20
M22
M24
M26
M28
M30
M32
M34
M37
CPU1J
G3
VSS_G3
G6
VSS_G6
G7
VSS_G7
VSS_G12
VSS_G13
VSS_G14
VSS_G15
VSS_G16
VSS_G17
VSS_G21
VSS_G36
VSS_G37
H1
VSS_H1
H4
VSS_H4
H7
VSS_H7
H8
VSS_H8
H9
VSS_H9
VSS_H10
VSS_H11
VSS_H13
VSS_H17
VSS_H18
VSS_H20
VSS_H21
VSS_H22
VSS_H24
VSS_H26
VSS_H28
VSS_H30
VSS_H32
VSS_H34
VSS_H36
VSS_H39
J3
VSS_J3
J6
VSS_J6
J18
VSS_J18
J19
VSS_J19
J20
VSS_J20
J36
VSS_J36
J37
VSS_J37
K1
VSS_K1
K4
VSS_K4
K7
VSS_K7
VSS_K10
VSS_K14
VSS_K17
VSS_K18
VSS_K20
VSS_K22
VSS_K24
VSS_K26
VSS_K28
VSS_K30
VSS_K34
VSS_K36
VSS_K40
L3
VSS_L3
L6
VSS_L6
L7
VSS_L7
L8
VSS_L8
L9
VSS_L9
L11
VSS_L11
L13
VSS_L13
L14
VSS_L14
L35
VSS_L35
L38
VSS_L38
M1
VSS_M1
VSS_M12
VSS_M14
VSS_M16
VSS_M18
VSS_M20
VSS_M22
VSS_M24
VSS_M26
VSS_M28
VSS_M30
VSS_M32
VSS_M34
VSS_M37
HASWELL
GND
A
Title
Title
Title
CPU-GND
CPU-GND
CPU-GND
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
10 OF 10
H81H3-AD 1.0
H81H3-AD 1.0
H81H3-AD 1.0
1
GND
of
8 37Friday, June 07, 2013
of
8 37Friday, June 07, 2013
of
8 37Friday, June 07, 2013
A
5
4
3
2
1
+VCC3
**PCIE SPEC**
VCC3:3A
12V:5.5A
3VSB:0.375A
SMBCLK_STBY16,19,22,23,26
D
PEG_TX_P04
PEG_TX_N04
PEG_TX_P14
PEG_TX_N14
PEG_TX_P24
PEG_TX_N24
PEG_TX_P34
PEG_TX_N34
C
B
PEG_TX_P44
PEG_TX_N44
PEG_TX_P54
PEG_TX_N54
PEG_TX_P64
PEG_TX_N64
PEG_TX_P74
PEG_TX_N74
PEG_TX_P84
PEG_TX_N84
PEG_TX_P94
PEG_TX_N94
PEG_TX_P104
PEG_TX_N104
PEG_TX_P114
PEG_TX_N114
PEG_TX_P124
PEG_TX_N124
PEG_TX_P134
PEG_TX_N134
PEG_TX_P144
PEG_TX_N144
PEG_TX_P154
PEG_TX_N154
SMBDATA_STBY16,19,22,23,26
PCIE_WAKE_L16,19
PEG_TX_P0
PEG_TX_N0
PEG_TX_P1
PEG_TX_N1
PEG_TX_P2
PEG_TX_N2
PEG_TX_P3
PEG_TX_N3
PEG_TX_P4
PEG_TX_N4
PEG_TX_P5
PEG_TX_N5
PEG_TX_P6
PEG_TX_N6
PEG_TX_P7
PEG_TX_N7
PEG_TX_P8
PEG_TX_N8
PEG_TX_P9
PEG_TX_N9
PEG_TX_P10
PEG_TX_N10
PEG_TX_P11
PEG_TX_N11
PEG_TX_P12
PEG_TX_N12
PEG_TX_P13
PEG_TX_N13
PEG_TX_P14
PEG_TX_N14
PEG_TX_P15
PEG_TX_N15
SMBCLK_STBY
SMBDATA_STBY
PCIE_WAKE_L
.22U-16VX5-04C147
.22U-16VX5-04C145
.22U-16VX5-04C150
.22U-16VX5-04C149
.22U-16VX5-04C159
.22U-16VX5-04C157
.22U-16VX5-04C166
.22U-16VX5-04C165
.22U-16VX5-04C170
.22U-16VX5-04C169
.22U-16VX5-04C177
.22U-16VX5-04C176
.22U-16VX5-04C191
.22U-16VX5-04C189
.22U-16VX5-04C196
.22U-16VX5-04C195
.22U-16VX5-04C211
.22U-16VX5-04C202
.22U-16VX5-04C233
.22U-16VX5-04C230
.22U-16VX5-04C256
.22U-16VX5-04C253
.22U-16VX5-04C278
.22U-16VX5-04C276
.22U-16VX5-04C287
.22U-16VX5-04C286
.22U-16VX5-04C292
.22U-16VX5-04C291
.22U-16VX5-04C307
.22U-16VX5-04C303
.22U-16VX5-04C310
.22U-16VX5-04C311
+3VSB
PEG_TX_C_P0
PEG_TX_C_N0
PEG_TX_C_P1
PEG_TX_C_N1
PEG_TX_C_P2
PEG_TX_C_N2
PEG_TX_C_P3
PEG_TX_C_N3
PEG_TX_C_P4
PEG_TX_C_N4
PEG_TX_C_P5
PEG_TX_C_N5
PEG_TX_C_P6
PEG_TX_C_N6
PEG_TX_C_P7
PEG_TX_C_N7
PEG_TX_C_P8
PEG_TX_C_N8
PEG_TX_C_P9
PEG_TX_C_N9
PEG_TX_C_P10
PEG_TX_C_N10
PEG_TX_C_P11
PEG_TX_C_N11
PEG_TX_C_P12
PEG_TX_C_N12
PEG_TX_C_P13
PEG_TX_C_N13
PEG_TX_C_P14
PEG_TX_C_N14
PEG_TX_C_P15
PEG_TX_C_N15
GND
Mitch 1/22 modified.
PCIE16X
B1
12V_A
B2
12V_B
B3
12V_D
B4
GND1
B5
SMCLK
B6
SMDAT
B7
GND3
B8
3.3V_A
B9
JTAG1
B10
3.3VAUX
B11
WAKE#
________ KEY ________
B12
RSVD_A
B13
GND5
B14
HSOP0_H
B15
HSON0_L
B16
GND7
B17
PRSNT2#
B18
GND8
____________________
B19
HSOP1_H
B20
HSON1_L
B21
GND11
B22
GND12
B23
HSOP2_H
B24
HSON2_L
B25
GND15
B26
GND16
B27
HSOP3_H
B28
HSON3_L
B29
GND19
B30
RSVD_C
B31
PRSNT2#
B32
GND21
____________________
B33
HSOP4_H
B34
HSON4_L
B35
GND23
B36
GND24
B37
HSOP5_H
B38
HSON5_L
B39
GND27
B40
GND28
B41
HSOP6_H
B42
HSON6_L
B43
GND31
B44
GND32
B45
HSOP7_H
B46
HSON7_L
B47
GND35
B48
PRSNT2#
B49
GND36
____________________
B50
HSOP8_H
B51
HSON8_L
B52
GND39
B53
GND40
B54
HSOP9_H
B55
HSON9_L
B56
GND43
B57
GND44
B58
HSOP10_H
B59
HSON10_L
B60
GND47
B61
GND48
B62
HSOP11_H
B63
HSON11_L
B64
GND51
B65
GND52
B66
HSOP12_H
B67
HSON12_L
B68
GND55
B69
GND56
B70
HSOP13_H
B71
HSON13_L
B72
GND59
B73
GND60
B74
HSOP14_H
B75
HSON14_L
B76
GND63
B77
GND64
B78
HSOP15_H
B79
HSON15_L
B80
GND67
B81
PRSNT2#
B82
RSVD_G
PCIEX16-BK
PRSNT1*
12V_C
12V_E
GND2
JTAG2
JTAG3
JTAG4
JTAG5
3.3V_B
3.3V_C
PWRGD
GND4
REFCLK_+_H
REFCLK_-_L
GND6
HSIP0_H
HSIN0_L
GND9
RSVD_B
GND10
HSIP1_H
HSIN1_L
GND13
GND14
HSIP2_H
HSIN2_L
GND17
GND18
HSIP3_H
HSIN3_L
GND20
RSVD_D
RSVD_E
GND22
HSIP4_H
HSIN4_L
GND25
GND26
HSIP5_H
HSIN5_L
GND29
GND30
HSIP6_H
HSIN6_L
GND33
GND34
HSIP7_H
HSIN7_L
GND37
RSVD_F
GND38
HSIP8_H
HSIN8_L
GND41
GND42
HSIP9_H
HSIN9_L
GND45
GND46
HSIP10_H
HSIN10_L
GND49
GND50
HSIP11_H
HSIN11_L
GND53
GND54
HSIP12_H
HSIN12_L
GND57
GND58
HSIP13_H
HSIN13_L
GND61
GND62
HSIP14_H
HSIN14_L
GND65
GND66
HSIP15_H
HSIN15_L
GND68
+12V
C139
.1U-16VX7-04-O
Ra
R137 0-04-O
BAT54A-S
1
2
Rb
+VCC3
12
EC14
+
1000U-6V3LD8H11E-O
GND
C128
.1U-16VX7-04-O
D18
D
,
+12V
C122
.1U-16VX7-04-O
GND
+VCC3
3
Rc
R134
1K-04
PEX16_RST
Bom
C111
.1U-16VX7-04-O
-Mitch
GPIO
PEG Reset
NO GPIO
PEG Reset
Ra Rb Rc
V VX
V
X X
C
B
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
PEX16_RST_L
A12
A13
PEX16_100M_P
A14
PEX16_100M_N
A15
A16
PEG_RX_P0
A17
PEG_RX_N0
A18
A19
A20
A21
PEG_RX_P1
A22
PEG_RX_N1
A23
A24
A25
PEG_RX_P2
A26
PEG_RX_N2
A27
A28
A29
PEG_RX_P3
A30
PEG_RX_N3
A31
A32
A33
A34
A35
PEG_RX_P4
A36
PEG_RX_N4
A37
A38
A39
PEG_RX_P5
A40
PEG_RX_N5
A41
A42
A43
PEG_RX_P6
A44
PEG_RX_N6
A45
A46
A47
PEG_RX_P7
A48
PEG_RX_N7
A49
A50
A51
A52
PEG_RX_P8
A53
PEG_RX_N8
A54
A55
A56
PEG_RX_P9
A57
PEG_RX_N9
A58
A59
A60
PEG_RX_P10
A61
PEG_RX_N10
A62
A63
A64
PEG_RX_P11
A65
PEG_RX_N11
A66
A67
A68
PEG_RX_P12
A69
PEG_RX_N12
A70
A71
A72
PEG_RX_P13
A73
PEG_RX_N13
A74
A75
A76
PEG_RX_P14
A77
PEG_RX_N14
A78
A79
A80
PEG_RX_P15
A81
PEG_RX_N15
A82
GND
R132 33-04
C141
10P-04-O
GND
PEX16_100M_P 14
PEX16_100M_N 14
PEG_RX_P0 4
PEG_RX_N0 4
PEG_RX_P1 4
PEG_RX_N1 4
PEG_RX_P2 4
PEG_RX_N2 4
PEG_RX_P3 4
PEG_RX_N3 4
PEG_RX_P4 4
PEG_RX_N4 4
PEG_RX_P5 4
PEG_RX_N5 4
PEG_RX_P6 4
PEG_RX_N6 4
PEG_RX_P7 4
PEG_RX_N7 4
PEG_RX_P8 4
PEG_RX_N8 4
PEG_RX_P9 4
PEG_RX_N9 4
PEG_RX_P10 4
PEG_RX_N10 4
PEG_RX_P11 4
PEG_RX_N11 4
PEG_RX_P12 4
PEG_RX_N12 4
PEG_RX_P13 4
PEG_RX_N13 4
PEG_RX_P14 4
PEG_RX_N14 4
PEG_RX_P15 4
PEG_RX_N15 4
PEX16_RST
PCH_GPIO1516
TACH5_GP6916
+12V
1
EC11
+
470U-16DE-O
2
GND
Between PCIEX16 & PCIEX1
+3VSB
GND
2012/7/05
PCIe Gen3 slot reset circuit update .
+VCC3
C135
.1U-16VX7-04-O
GND
PCIRST3_L23
RJ12
0-04(1-2)
1
3
Mitch 6/10 add option
2
A
Title
Title
Title
PCIE*16
PCIE*16
PCIE*16
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
H81H3-AD 1.0
H81H3-AD 1.0
H81H3-AD 1.0
1
of
9 37Monday, June 10, 2013
of
9 37Monday, June 10, 2013
of
9 37Monday, June 10, 2013
A
DDID_TX_N04
DDID_TX_P04
DDID_TX_N24
DDID_TX_P24
DDID_TX_N14
DDID_TX_P14
DDID_TX_P34
DDID_TX_N34
D
DVI_HPD14
DDID_CTRLCLK14
DDID_CTRLDATA14
GND
stitching caps for Hsync/Vsync
C
DVI-D
VGA
VGA_RED14
VGA_GREEN14
VGA_BLUE14
B
Level shifter,default 0 ohm
VGA_HSYNC14
7/17 Anthony add
A
VGA_PCH_DDCSDA14
VGA_PCH_DDCSCL14
R26
150-1-04
VGA_HSYNC
5
.1U-16VX7-04C51
DDID_TX_N0
DDID_TX_P0
DDID_TX_N2
DDID_TX_P2
DDID_TX_N1
DDID_TX_P1
DDID_TX_P3
DDID_TX_N3
DVI_HPD
DDID_CTRLCLK
DDID_CTRLDATA
.1U-16VY5-04C258
R36
150-1-04
GNDGND
1
2
3
GND
1 2
R42 0-04
VGA_PCH_DDCSDA
3.3V Tolerant 5V Tolerant
VGA_PCH_DDCSCL
3.3V Tolerant 5V Tolerant
5
DDID_CTRLCLK
DDID_CTRLDATA
VGA_RED
VGA_GREEN
VGA_BLUE
R40
150-1-04
GND
+VGA_VCC
U6
5
4
74LVC32-5-S-O
+V_1P05_PCH
R45
2.2K-04
R46
2.2K-04
C29
10P-04
GND
VGA_H_SYNC
DDID_N2_C
.1U-16VX7-04C50
DDID_P2_C
.1U-16VX7-04C47
DDID_N0_C
.1U-16VX7-04C46
DDID_P0_C
.1U-16VX7-04C53
DDID_N1_C
.1U-16VX7-04C52
DDID_P1_C
.1U-16VX7-04C48
DDID_P3_C
.1U-16VX7-04C49
DDID_N3_C
Mitch 2/25 modify 680 to 470 ohm by PDG.
DDID_N1_C
DDID_P1_C
DDID_N2_C
DDID_P2_C
DDID_N3_C
DDID_P3_C
DDID_N0_C
DDID_P0_C
+VCC3
G
QN2
QN7002-T1B-AT-S
S
+VCC3
G
QN3
QN7002-T1B-AT-S
S
Bead 80 OHM
P/N:16-101-800162
FB7 FB-80-S
FB9 FB-80-S
FB11 FB-80-S
C11
C15
10P-04
10P-04
GND
GND
C9
.1U-16VX7-04-O
GND
VGA_VSYNC14
+VCC3
G
MN2 QN7002-T1B-AT-S
S
D
VGA_DDCSDA_5V
+VCC3
VGA_PCH_DDCSDA
VGA_PCH_DDCSCL
VGA_DDCSDA_5V
VGA_DDCSCL_5V
G
MN1 QN7002-T1B-AT-S
S
D
VGA_DDCSCL_5V
4
RN1
1
2
DDID_N3_C
DDID_P3_C
DDID_N0_C
DDID_P0_C
DDID_N1_C
DDID_P1_C
DDID_N2_C
DDID_P2_C
RN4
1
3
5
7 8
470-8P4R-04
RN3
1
3
5
7
470-8P4R-04
+VCC
2
4
6
2
4
6
8
G
DVI_CLK_DN_C
3
4
DVI_CLK_DP_C
5
6
DVI_TX0_DN_C
7
8
DVI_TX0_DP_C
0-8P4R
RN2
2
1
DVI_TX1_DN_C
4
3
DVI_TX1_DP_C
56
DVI_TX2_DN_C
78
DVI_TX2_DP_C
0-8P4R
Mitch 2/27 staff by default.
DDID_LEVEL_SF
D
QN5
QN7002-T1B-AT-S
S
GND
+DVI_VCC
R33
2.2K-04
D
DVI_SCL
+DVI_VCC
R34
2.2K-04
D
DVI_SDA
Mitch 5/13 change bead 47 ohm to 80 ohm for EMI.
VGA_VSYNC
GND
+DVI_VGA_VCC
7/17 Anthony modify
R57 2.2K-04
R47 2.2K-04
R64 2.2K-04
R58 2.2K-04
C12
22P-04
GND
U5
1
2
3
74LVC32-5-S-O
1 2
R31 0-04
PFB2 0-08
1
1
1
1
10'06'18
RN TO single RES
4
VGA_R
VGA_G
VGA_B
C30
22P-04
GND
+VGA_VCC
5
4
VGA_V_SYNC
+VGA_VCC
12
Mitch 5/13 staffed for EMI.
GND
2
2
2
2
FB8 0
FB10 0
FB12 0
C16
22P-04
GND
C18
.1U-16VX7-04-O
GND
C44
.1U-16VX7-04
+VGA_VCC
+VCC3
7/17 Anthony add
3
CMK2 CMK-160-08-HDMI-O
3
DDID_N3_C DVI_CLK_DN_C
DDID_P3_C
CMK1 CMK-160-08-HDMI-O
DDID_N0_C
DDID_P0_C
CMK4 CMK-160-08-HDMI-O
DDID_N1_C
DDID_P1_C
CMK3 CMK-160-08-HDMI-O
DDID_N2_C
DDID_P2_C
Mitch 2/27 unstaff choke by default.
DVI_HPD
+DVI_VGA_VCC
Spec:200ma(max)
DVI_TX1_DN_C
DVI_TX1_DP_C
DVI_TX2_DN_C
DVI_TX2_DP_C
DVI_TX0_DP_C
DVI_TX0_DN_C
DVI_CLK_DP_C
DVI_CLK_DN_C
2
1
1
2
1
2
C31
10P-04-O
GND
C45
100P-04-O
GND
VGA_RED_CONN
VGA_GREEN_CONN
C43
.1U-25VX7-06
GND
4
2
1
DVI_CLK_DP_C
3
4
2
3
2
3
2
R44
1M-04
PFB1 FB-600
2
1000P-50VX7-04 C41
GND
GND
GND
DVI_TX0_DN_C
1
DVI_TX0_DP_C
4
DVI_TX1_DN_C
1
DVI_TX1_DP_C
4
DVI_TX2_DN_C
1
DVI_TX2_DP_C
+VCC3
G
QN1
QN7002-T1B-AT-S
S
D
+DVI_VCC
1
GND
U2
1
I/O1
NC1
2
I/O2
NC2
3
GND2
GND1
4
NC3
I/O3
5
NC4
I/O4
AZ1045-04F-S-O
U1
1
I/O1
NC1
2
NC2
I/O2
3
GND2
GND1
4
NC3
I/O3
5
NC4
I/O4
AZ1045-04F-S-O
VGA_RED_CONN
VGA_GREEN_CONN
VGA_BLUE_CONN
C17
C13
10P-04-O
10P-04-O
GND
07/18 change to reserve-Anthony
VGA_H_SYNC
VGA_V_SYNC
C63
100P-04-O
GND
Mitch 1/22 changed to low profile footprint for DTX.
VGA
CONN-VGA-STBL
6
1
7
2
8
3
9
4
10
5
17
16
GND
3
6
7
16
8
15
14
22
3
11
19
U3
1
2
3
AZC099-04S-R7G-S-O
.1U-25VX5-04-O
F1
1
FUSE-1.1A-18
1
C40
15P-04
2
GND
2
DVI-D
DDC CLK
DDC DATA
HOT PLUG DETECT
V SYNC
GND (ANALOG)
+5V POWER
TMDS CLK SHIELD
TMDS 2/4 SHIELD
TMDS DATA 1/3 SHIELD
TMDS DATA 0/5 SHIELD
CONN-24P3R-I
6
5
4
C67
GND
2
+VCC_VGA_S
R65 0-04
1
R55 10-04
1
R48 10-04
R59 0-04
Mitch 5/13 staff 10ohm for EMI.
1
C66
100P-04-O
2
GND
for EMI reserve
2012/12.17 Jerry
Reserve RN7,RN7 ,Add CMK9,CMK10,CMK11,CMK12 160 ohm for EMI and SI
DVI_SCL
DVI_SDA
DVI_HPD_D_R
GND
DVI_SDA
GND
DVI_SCL
+VCC
7/17 Anthony add
Close To GMCH
C70
C61
15P-04
2 1
GND
Mitch 5/13 staff 15pF for EMI.
DVI_HPD_D
R30
20K-04
GND
C42
1U-16VX7-06-O
GND
10
DVI_TX1_DN_C
9
DVI_TX1_DP_C
8
7
DVI_TX2_DN_C
6
DVI_TX2_DP_C
GND
10
DVI_TX0_DP_C
9
DVI_TX0_DN_C
8
7
DVI_CLK_DP_C
6
DVI_CLK_DN_C
GND
11
12
DDC1DATA
13
VGA_H_SYNC_RVGA_BLUE_CONN
14
VGA_V_SYNC_R
15
DDC1CLK
R32
0-04
2012/7/3
R103 change from 1K to 0 ohm
C14
1U-10VY5-06
GND
If build in Internal DVI Con,
that can use the circuit to protect reverse voltage together.
match the trace impedance.
1
100P-04-O
2
GND
Close to Connector
Slew Rate Control
2
+DVI_VCC
DVI_HPD_D_R
GND
+12V
R67
10K-04
+12_VGA_G
G
S
D
QN6
APM2306AC-TRG-S
R61 0-08-O
1
2
2
3.3V Tolerant
2
3.3V Tolerant
2
1
1
2
TMDS DATA 2+
TMDS DATA 2-
TMDS DATA 4+
TMDS DATA 4-
TMDS DATA 1+
TMDS DATA 1-
TMDS DATA 3+
TMDS DATA 3-
TMDS DATA 0+
TMDS DATA 0-
TMDS DATA 5+
TMDS DATA 5-
TMDS CLK +
TMDS CLK -
CASEGND
CASEGND
M1
M2
GND
C10
.1U-16VY5-04
+DVI_VGA_VCC
GND
VGA_DDCSDA_5V
VGA_H_SYNC
VGA_V_SYNC
VGA_DDCSCL_5V
VGA_H_SYNC_R
VGA_V_SYNC_R
Title
Title
Title
DVI-D+VGA
DVI-D+VGA
DVI-D+VGA
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
DVI_TX2_DP_C
1
DVI_TX2_DN_C
5
4
10
DVI_TX1_DP_C
9
DVI_TX1_DN_C
13
12
18
DVI_TX0_DP_C
17
DVI_TX0_DN_C
21
20
23
DVI_CLK_DP_C
24
DVI_CLK_DN_C
10-025-024578=>
10-025-024980=>
VGA_RED_CONN
AZC099-04S-R7G-S-O
AZC099-04S-R7G-S-O
GND
H81H3-AD 1.0
H81H3-AD 1.0
H81H3-AD 1.0
U4
1
2
3
U8
1
2
3
4
VGA_GREEN_CONN
6
5
VGA_BLUE_CONN
4
DDC1DATA
6
5
DDC1CLK
4
1
DVI port
.1U-16VY5-04-O
.1U-16VY5-04-O
D
DVI
C
B
+VGA_VCC
C27
GND
+VGA_VCC
A
C64
GND
of
10 37Friday, June 07, 2013
of
10 37Friday, June 07, 2013
of
10 37Friday, June 07, 2013
5
M_DQS_A_N[0..7]6
M_DQS_A_P[0..7]6
M_DQS_A_N[0..7]
M_DQS_A_P[0..7]
4
M_DATA_A[0..63]6
M_DATA_A[0..63]
GND
3
2
1
+DDR_VTTR
C423
4.7U-25VX5-08
C376
.1U-16VX7-04
D
C
B
+VDIMM
A
GND
M_DQS_A_N0
M_DQS_A_P1
M_DQS_A_P0
M_ODT_A1
M_ODT_A0
79
195
77
ODT0
ODT1
RSVD
FREE
FREE
FREE
FREE
49
48
198
187
+DDR_VTTR
2013/1/8 by nick change remove DIMM
M_DQS_B_N[0..7]6
M_DQS_B_P[0..7]6
M_ODT_B0
M_ODT_B1
79
68
77
195
ODT1
ODT0
RSVD
NC/PAR IN
FREE
FREE
FREE
FREE
48
49
187
198
+DDR_VTTR
167
53
68
NC/TEST4
NC/PAR IN
NC/ERR OUT
VTT
VTT
240
120
GND
M_DQS_B_N[0..7]
M_DQS_B_P[0..7]
53
167
39
NC/TEST4
NC/ERR OUT
VTT
VTT
240
120
239
GND
45
40
39
CB(2)
CB(1)
CB(0)
VSS
VSS
VSS
239
235
232
46
40
45
CB(0)
CB(3)
CB(1)
CB(2)
VSS
VSS
VSS
VSS
229
232
235
164
159
158
46
CB(6)
CB(5)
CB(4)
CB(3)
VSS
VSS
VSS
VSS
229
226
223
220
165
164
159
158
CB(7)
CB(6)
CB(5)
CB(4)
VSS
VSS
VSS
VSS
217
226
223
220
M_DQS_A_N1
165
7
16
6
15
CB(7)
DQS(0)
DSQ(1)
DQS*(0)
DSQ*(1)
VSS
VSS
VSS
VSS
VSS
VSS
VSS
166
199
202
205
217
208
214
211
CHANNEL A DIMMs
M_ODT_A[0..1]6
M_CS_A_L[0..1]6
M_CKE_A[0..1]6
M_CLK_A_P[0..1]6
M_CLK_A_N[0..1]6
M_DQS_B_N0
M_DQS_B_P2
M_DQS_B_N1
M_DQS_B_P0
M_DQS_B_P1
25
15
16
6
7
DSQ(1)
DQS(0)
DSQ*(1)
DQS*(0)
VSS
VSS
VSS
VSS
VSS
VSS
VSS
214
211
208
205
202
199
166
163
CHANNEL B DIMMs
M_ODT_B[0..1]6
M_CS_B_L[0..1]6
M_CKE_B[0..1]6
C406
.1U-16VX7-04
C411
.1U-16VX7-04
close to CHA-DIMM2
M_ODT_B[0..1]
M_CS_B_L[0..1]
M_CKE_B[0..1]
C414
.1U-16VX7-04
5
M_CLK_B_P[0..1]6
M_CLK_B_N[0..1]6
C416
.1U-16VX7-04
C415
.1U-16VX7-04
M_DQS_A_P2
M_DQS_A_N2
25
24
DSQ(2)
VSS
VSS
160
163
M_DQS_B_N2
24
DSQ(2)
DSQ*(2)
VSS
VSS
160
157
M_DQS_A_P3
M_DQS_A_N3
34
33
DSQ(3)
DSQ*(2)
DSQ*(3)
VSS
VSS
VSS
VSS
148
151
154
157
M_ODT_A[0..1]
M_CS_A_L[0..1]
M_CKE_A[0..1]
M_CLK_A_P[0..1]
M_CLK_A_N[0..1]
M_DQS_B_P3
M_DQS_B_P4
M_DQS_B_N3
34
33
85
DSQ(3)
DSQ*(3)
VSS
VSS
VSS
VSS
145
148
151
154
M_DQS_A_P5
M_DQS_A_N5
M_DQS_A_P4
M_DQS_A_P6
M_DQS_A_N4
103
85
93
84
94
DQS(4)
DQS(5)
DQS*(5)
DQS*(4)
VSS
VSS
VSS
VSS
VSS
VSS
VSS
142
139
133
136
145
130
127
M_DQS_B_P6
M_DQS_B_P5
M_DQS_B_N4
M_DQS_B_N5
M_DQS_B_N6
84
94
93
103
102
DQS(4)
DQS(5)
DSQ(6)
DQS*(4)
DQS*(5)
VSS
VSS
VSS
VSS
VSS
VSS
VSS
124
127
130
133
136
139
142
M_CLK_B_P[0..1]
M_CLK_B_N[0..1]
+VDIMM
C364
.1U-16VX7-04-O
GND
close to CHB-DIMM1
M_DQS_A_N7
M_DQS_A_N6
M_DQS_A_P7
111
112
102
DQS(7)
DSQ(6)
DQS*(7)
DSQ*(6)
VSS
VSS
VSS
VSS
VSS
124
121
119
116
113
M_DQS_B_N7
M_DQS_B_P7
112
111
43
DQS(7)
DSQ*(6)
DQS*(7)
VSS
VSS
VSS
VSS
VSS
116
113
121
119
110
.1U-16VX7-04-O
C400
42
43
DQS(8)
DQS*(8)
VSS
VSS
VSS
VSS
104
110
107
42
125
DQS(8)
DQS*(8)
DM0/DQS9
VSS
VSS
VSS
VSS
107
104
101
C373
.1U-16VX7-04-O
4
M_DATA_A3
M_DATA_A2
M_DATA_A1
M_DATA_A7
M_DATA_A8
M_DATA_A4
M_DATA_A0
M_DATA_A6
M_DATA_A5
12
144
152
143
135
134
126
125
203
153
204
212
213
221
222
230
231
3
161
162
DQ(0)
NC/DQS9*
DM0/DQS9
VSS
98
101
126
NC/DQS9*
VSS
98
95
VSS
VSS
95
134
92
VSS
92
135
NC/DQS10*
DM1/DQS10
VSS
89
NC/DQS10*
DM1/DQS10
VSS
VSS
VSS
86
89
143
DM2/DQS11
VSS
VSS
VSS
86
83
C398
1U-16VX7-06
NC/DQS11*
NC/DQS12*
NC/DQS13*
NC/DQS14*
NC/DQS15*
NC/DQS16*
DM3/DQS12
DM2/DQS11
DM4/DQS13
DM5/DQS14
DM6/DQS15
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
44
47
80
83
M_DATA_B[0..63]6
153
152
144
NC/DQS11*
DM3/DQS12
VSS
VSS
VSS
41
44
47
80
VSS
VSS
VSS
VSS
41
38
32
35
29
26
23
20
17
14
+VDIMM
M_DATA_B[0..63]
222
221
213
212
204
203
NC/DQS15*
NC/DQS14*
NC/DQS13*
NC/DQS12*
VSS
VSS
35
38
DM4/DQS13
VSS
VSS
29
32
DM5/DQS14
VSS
VSS
VSS
VSS
20
17
23
26
+VDIMM
.1U-16VX7-04-O
C412
GND
+VCC3
DM6/DQS15
VSS
VSS
14
11
+VDIMM
C404
.1U-16VY5-04-O
GND
NC/DQS17*
DM7/DQS16
DM8/DQS17
VDD
VDD
VDD
VSS
VSS
VSS
VSS
2
8
5
197
194
DIMM_VREF_CA_A5,12
DIMM_VREF_DQ_A12
SMBCLK_MAIN11,22,25,29
SMBDATA_MAIN11,22,25,29
M_BS_A[0..2]6
GND
231
161
162
NC/DQS16*
NC/DQS17*
DM8/DQS17
DM7/DQS16
VDD
VDD
VSS
VSS
VSS
5
2
194
197
191
DIMM_VREF_CA_B5,12
DIMM_VREF_DQ_B12
SMBCLK_MAIN11,22,25,29
SMBDATA_MAIN11,22,25,29
M_BS_B[0..2]6
C407
.1U-16VX7-04-O
VDD
189
191
M_DATA_B1
M_DATA_B0
3
4
DQ(0)
DQ(1)
VDD
VDD
VDD
189
186
.1U-16VX7-04-O
VSS
11
230
VSS
8
stiching caps for CMD,CTL,ADDR
C377
.1U-16VX7-04-O
4
DQ(1)
VDD
186
M_DATA_B2
9
DQ(2)
VDD
183
+VCC3
C410
9
DQ(2)
VDD
183
M_DATA_B3
10
DQ(3)
VDD
182
128
123
122
10
DQ(6)
DQ(5)
DQ(4)
DQ(3)
VDD
VDD
VDD
VDD
173
176
179
182
+VCC3
DIMM_VREF_CA_A
DIMM_VREF_DQ_A
SMBCLK_MAIN
SMBDATA_MAIN
M_BS_A[0..2]
M_DATA_B6
M_DATA_B7
M_DATA_B4
M_DATA_B5
122
123
128
129
DQ(4)
DQ(5)
DQ(6)
DQ(7)
VDD
VDD
VDD
VDD
179
176
173
170
DIMM_VREF_CA_B
DIMM_VREF_DQ_B
SMBCLK_MAIN
SMBDATA_MAIN
M_BS_B[0..2]
.1U-16VX7-04-O
3
129
170
M_DATA_B8
12
78
DQ(7)
VDD
DQ(8)
VDD
C363
DQ(8)
VDD
78
M_DATA_B9
13
DQ(9)
VDD
75
M_DATA_A9
M_DATA_A10
M_DATA_A11
19
13
18
DQ(9)
DQ(11)
DQ(10)
VDD
VDD
VDD
72
69
75
M_DATA_B10
M_DATA_B11
M_DATA_B12
131
19
18
DQ(12)
DQ(11)
DQ(10)
VDD
VDD
VDD
72
66
69
.1U-16VX7-04-O
M_DATA_A15
M_DATA_A16
M_DATA_A13
M_DATA_A14
M_DATA_A12
131
132
138
137
21
DQ(12)
DQ(13)
DQ(15)
DQ(14)
DQ(16)
VDD
VDD
VDD
VDD
VDD
65
60
66
62
57
M_DATA_B17
M_DATA_B16
M_DATA_B15
M_DATA_B14
M_DATA_B13
22
21
138
137
132
DQ(17)
DQ(16)
DQ(15)
DQ(14)
DQ(13)
VDD
VDD
VDD
VDD
VDD
54
57
60
62
65
C375
M_DATA_A17
22
54
M_DATA_B18
27
51
M_DATA_A18
27
DQ(17)
VDD
51
M_DATA_B19
28
DQ(18)
VDD
236
DQ(18)
VDD
DQ(19)
VDDSPD
+VDIMM
M_DATA_A21
M_DATA_A22
M_DATA_A19
M_DATA_A20
28
140
141
146
DQ(19)
DQ(20)
DQ(21)
DQ(22)
VREFDQ
VREFCA
VDDSPD
1
67
236
M_DATA_B22
M_DATA_B23
M_DATA_B21
M_DATA_B20
141
146
140
147
DQ(21)
DQ(22)
DQ(20)
DQ(23)
VREFCA
VREFDQ
SCL
1
67
118
C362
.1U-16VX7-04-O
GND
+VDIMM
C386
1U-16VX7-06
GND
M_DATA_A23
M_DATA_A24
M_DATA_A25
31
30
147
DQ(25)
DQ(24)
DQ(23)
SCL
SDA
SA1
118
238
237
GND
M_DATA_B24
M_DATA_B26
M_DATA_B25
30
31
36
DQ(24)
DQ(25)
DQ(26)
SA1
SA0
SDA
237
117
238
GND
M_DATA_A31
M_DATA_A29
M_DATA_A28
M_DATA_A27
M_DATA_A30
M_DATA_A26
156
155
150
149
37
36
DQ(31)
DQ(30)
DQ(29)
DQ(28)
DQ(27)
DQ(26)
BA2
SA0
BA1
BA0
52
71
117
190
M_BS_A1
M_BS_A2
M_BS_A0
CH.A
DIMM0
DIMM1
M_DATA_B27
M_DATA_B28
M_DATA_B29
M_DATA_B30
M_DATA_B31
M_DATA_B32
37
149
150
155
156
81
DQ(27)
DQ(28)
DQ(29)
DQ(30)
DQ(31)
DQ(32)
BA2
CKE1
BA1
BA0
52
71
169
190
M_BS_B0
M_BS_B1
M_BS_B2
M_CKE_B1
CH.BHSA1 SA0
H L
DIMM0
DIMM1
H
.1U-16VX7-04-O
C401
.1U-16VX7-04-O
C399
M_DATA_A36
M_DATA_A35
M_DATA_A33
M_DATA_A32
M_DATA_A34
200
88
87
82
81
DQ(36)
DQ(35)
DQ(34)
DQ(33)
DQ(32)
S0*
CKE1
S1*
CKE0
76
50
193
169
M_CS_A_L0
M_CKE_A1
M_CS_A_L1
M_CKE_A0
SA0SA1
LL
H
L
M_DATA_B33
M_DATA_B34
M_DATA_B35
M_DATA_B36
M_DATA_B37
201
200
88
87
82
DQ(37)
DQ(36)
DQ(35)
DQ(34)
DQ(33)
CKE0
S1*
S0*
50
76
193
M_CKE_B0
M_CS_B_L0
M_CS_B_L1
C361
.1U-16VX7-04-O
C409
.1U-16VX7-04-O
M_DATA_A37
M_DATA_A38
M_DATA_A39
201
206
207
DQ(37)
DQ(38)
DQ(39)
CK1/NU
CK1/NU*
63
64
M_DATA_B40
M_DATA_B39
M_DATA_B38
90
207
206
DQ(40)
DQ(39)
DQ(38)
CK1/NU*
CK1/NU
CK0*
64
63
185
.1U-16VX7-04-O
C360
.1U-16VX7-04-O
2
M_DATA_A40
90
185
M_DATA_B41
91
184
C374
M_DATA_A41
91
DQ(40)
DQ(41)
CK0
CK0*
184
M_DATA_B42
96
DQ(42)
DQ(41)
CK0
M_DATA_A43
M_DATA_A42
M_DATA_A45
M_DATA_A44
96
97
209
210
DQ(42)
DQ(43)
DQ(44)
DQ(45)
A2
A1
A0
61
181
188
M_MA_A2
M_MA_A0
M_MA_A1
M_DATA_B46
M_DATA_B45
M_DATA_B44
M_DATA_B43
210
209
215
97
DQ(45)
DQ(44)
DQ(46)
DQ(43)
A0
A1
A3
A2
61
188
181
180
M_MA_B0
M_MA_B1
M_MA_B3
M_MA_B2
C413
.1U-16VX7-04-O
M_DATA_A46
M_DATA_A51
M_DATA_A52
M_DATA_A50
M_DATA_A47
M_DATA_A48
M_DATA_A49
218
106
105
215
100
216
99
DQ(52)
DQ(51)
DQ(50)
DQ(46)
DQ(49)
DQ(47)
DQ(48)
A7
A6
A5
A8
A4
A9
A3
56
58
59
178
177
175
180
M_MA_A4
M_MA_A5
M_MA_A8
M_MA_A3
M_MA_A7
M_MA_A6
M_MA_A9
M_CLK_A_P0
M_CLK_A_N0
M_CLK_A_P1
M_CLK_A_N1
M_DATA_B48M_MA_B5
M_DATA_B47
M_DATA_B49
M_DATA_B53
M_DATA_B50
M_DATA_B52
M_DATA_B51
216
99
100
105
106
218
219
DQ(47)
DQ(48)
DQ(49)
DQ(50)
DQ(51)
DQ(52)
DQ(53)
A10/AP
A9
A8
A7
A6
A5
A4
70
56
58
59
175
177
178
M_MA_B9
M_MA_B10
M_MA_B6
M_MA_B7
M_MA_B4
M_MA_B8
M_CLK_B_P0
M_CLK_B_N0
M_CLK_B_P1
M_CLK_B_N1
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
M_DATA_A53
219
DQ(53)
A10/AP
70
M_MA_A10
M_DATA_B54
224
DQ(54)
A11
55
M_MA_B11
M_DATA_A55
M_DATA_A54
225
224
DQ(55)
DQ(54)
A11
A12
55
174
M_MA_A11
M_MA_A12
M_DATA_B56
M_DATA_B55
225
108
DQ(55)
DQ(56)
A13
A12
196
174
M_MA_B13
M_MA_B12
DDR3-CHA
DDR3-CHA
DDR3-CHA
M_DATA_A59
M_DATA_A56
M_DATA_A57
M_DATA_A63
M_DATA_A58
M_DATA_A60
M_DATA_A61
M_DATA_A62
233
234
228
227
115
114
109
108
DQ(62)
DQ(63)
DQ(61)
DQ(60)
DQ(59)
DQ(58)
DQ(57)
DQ(56)
RESET*
A13
A14
A15
CAS*
RAS*
WE*
74
73
168
196
172
171
192
M_WE_A_L
M_MA_A13
M_MA_A14
M_DATA_B58
M_DATA_B57
114
109
DQ(57)
A14
172
171
M_MA_B14
M_MA_B15
M_RAS_A_L
M_MA_A15
M_CAS_A_L
DDR3_DRAMRST_L
M_MA_A[0..15]
M_DATA_B60
M_DATA_B61
M_DATA_B62
M_DATA_B63
M_DATA_B59
234
233
228
227
115
DQ(63)
DQ(62)
DQ(61)
DQ(60)
DQ(59)
DQ(58)
RESET*
A15
CAS*
RAS*
WE*
74
73
168
192
M_WE_B_L
M_RAS_B_L
M_CAS_B_L
DDR3_DRAMRST_L
M_MA_B[0..15]
place between CHA&CHB
Don't punch VIAS
H81H3-AD 1.0
H81H3-AD 1.0
H81H3-AD 1.0
GND
close to CHA-DIMM0
Mitch 2/26 swap DIMM number.
DIMM2DDR3-240P-BL
Mitch 2/26 swap DIMM number.
+DDR_VTTR
DIMM1DDR3-240P-BL
C389
4.7U-25VX5-08
GND
close to CHB-DIMM0
M_WE_B_L 6
M_RAS_B_L 6
M_CAS_B_L 6
DDR3_DRAMRST_L 6,11
1
M_WE_A_L 6
M_RAS_A_L 6
M_CAS_A_L 6
DDR3_DRAMRST_L 6,11
M_MA_A[0..15] 6
C403
.1U-16VX7-04
M_MA_B[0..15] 6
of
11 37Thursday, June 13, 2013
of
11 37Thursday, June 13, 2013
of
11 37Thursday, June 13, 2013
D
C
B
A
5
+VDIMM
R456
D
C378
.1U-16VX7-04
GND
1K-1-04
DIMM_VREF_CA_A_R
R457
1K-1-04
GND
R458
0-04
DIMM_VREF_CA_A
C380
.1U-16VX7-04
GND
4
DIMM_VREF_CA_A
C390
.1U-16VX7-04-O
C379
10U-6V3X5-08
DIMM_VREF_CA_A 5,11
GND
GND GND
3
+VDIMM
R462
1K-1-04-O
DIMM_VREF_CA_B_R
R463
1K-1-04-O
GND
R465
0-04
R464
0-04-O
0726 Fellow Intel PDG 1.0
VREF_CA Share-Anthony
DIMM_VREF_CA_B
C392
.1U-16VX7-04
GND
C391
10U-6V3X5-08
2
DIMM_VREF_CA_B 5,11
1
D
close to DIMMclose to DIMM
DIMM_VREF_CA Circuit
C393
.1U-16VX7-04-O
DIMM_DQ_CPU_VREF_B6
+VDIMM
GND
R466
1K-1-04
DIMM_DQ_CPU_VREF_B_R
R467
1K-1-04
GND
C394
.1U-16VX7-04
R468
0-04
12'0328
change to 2 ohm (PN:05-152-200108)
R469
2-04
C397
.1U-16VX7-04
GND
GND
C396
.1U-16VX7-04
C395
10U-6V3X5-08
C
DIMM_VREF_DQ_B 11
+VDIMM
C381
C
.1U-16VX7-04-O
GND
close to DIMM's vref close to DIMM's vref
DIMM_DQ_CPU_VREF_A6
GND
R459
1K-1-04
DIMM_DQ_CPU_VREF_A_R
R460
1K-1-04
GND
C382
.1U-16VX7-04
R461
0-04
GND
12'0328
change to 2 ohm (PN:05-152-200108)
R455
2-04
close to DIMM close to DIMM
C385
.1U-16VX7-04
GND
GND
C384
.1U-16VX7-04
GND GND
C383
10U-6V3X5-08
DIMM_VREF_DQ_A 11
DIMM_VREF_DQ Circuit
B
B
A
Title
Title
Title
DDR3-Vref
DDR3-Vref
DDR3-Vref
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
H81H3-AD 1.0
H81H3-AD 1.0
H81H3-AD 1.0
1
of
12 37Friday, June 07, 2013
of
12 37Friday, June 07, 2013
of
12 37Friday, June 07, 2013
A
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