ECS G10IL1 Schematics
5
hexainf@hotmail.com
POSITIVO 3G 2050 - 82GG10000-C0
4
3
2
1
Project Name : G10IL1 (02/April-08)
D D
Platform : Diamondville +945GSE+ICH7M(SB)
PAGE
CONTENT
M/B Schematic Version Change List
1.
INDEX
2.
SYSTEM BLOCK DIAGRAM
3.
POWER DIAGRAM & SEQUENCE
4.
GPIO & Power Consumption
5.
CPU Diamondville 1/2
6.
C C
B B
A A
CPU Diamondville 2/2
7.
CLOCK GEN (ICS9LPR365)
8.
NB HOST/VSS 1/5
9.
NB DMI / VGS
10.
NB DDR INTERFACE / VSS 3/5
11.
NB I/O POWER 4/5
12.
DDR2 SODIMM
13.
CRT / LVDS
14.
ICH7M RTC / SATA / HDA / LPC 1/3
15.
ICH7M SYS / GPIO / PCIE / USB 2/3
16.
ICH7M Power 3/3
17.
USB / WEBCAM / SATA
18.
LED / 3G / TP / BT/ SSD
19.
Minicard
20.
LAN RTL8102E
21.
Cardreader (RTS5158E)
22.
FAN / DC_IN / LID / KB
23.
EC IT8512 / BIOS
24.
VCC SW
25.
+1.5V /+1.05VS (OZ8318)
26.
CPU CORE (MAX8770)
27.
0.9VS / +1.8VS (OZ811)
28.
+3.3VA / +5VA (OZ815)
29.
BATT IN / CHARGER (OZ8602)
30.
Coyote
31.
CODEC / AMP / INT_MIC / SPK
32.
EXT_MIC / HEADPHONE / MDC
33.
Appendix Ver. History
Release Date PCB P/N NotePCBA P/NVersion
Daughter Board Schematic Version Change List
PCB Description
Initial
PCB P/N PCB DescriptionRelease Date Version PCBA P/N Note
5
4
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
5008
5008
5008
Date: Sheet
Date: Sheet
3
2
Date: Sheet
G10ILX
G10ILX
G10ILX
INDEX
INDEX
INDEX
1
A
A
A
of
of
of
133Wednesday, April 02, 2008
133Wednesday, April 02, 2008
133Wednesday, April 02, 2008
20
5
4
3
2
1
SYSTEM BLOCK DIAGRAM
CPU
Diamondville-SC
FCBGA-8
D D
DDR2 RAM BUS
2GB MAX MEMORY
SO-DIMM0
200 Pin
400/533MHZ
12
North Bridge
SMBUS
FSB
400/533MHZ
945GSE
998 Pin FCBGA
45nm 22*22478 balls
5,6
9,10,11
THERMAL SENSOR
LVDS
RGB
EMC1402
LCD
CRT
5
13
13
Headphone Out x 1
INT Mic In x 1
MIC/Line In x 1
Internal SPK
4 2W x 2
C C
RJ11
Amplifier
APA2068 ALC662
16 Pin SOP
Modem
Daughter Board
USB x 1
Codec
AZALIZA
48 Pin LQFP
17
USB x 1
USB x 1
31
17
17
USB4
USB7
USB3
DMI
X2
South Bridge
Controll Link
PCIE1
PCIE2
SATA0
Mini Card x 1
19
LAN
RTL8102E(10/100)
64 Pin QFN
HDD x 1
2.5" SATAI/II
27
20
RTC
32.768KHZ
CRYSTAL
25MHZ
RJ45
ICH7M
WEBCAM
18
Flash Rom
8 Pin M-SOP
RTS5158E
LQFP 48
SSD
Mini Card
21
B B
no-stuff
CRYSTAL
12MHZ
Cardreader
Card CON
3G
17
USB0
USB6
18
USB5
USB2
SPI
22
Embedded Controller (EC)
USB1
Charger
A A
FAN
3 Pin
GPIO
29
22
652 Pin BGA
14,15,16
LPC
ITE8512E-CX
SMBUS 1
*Option
Coyote
22
30
PS/2
K/B Matrix
SMBUS 0
CRYSTAL
40MHZ
CRYSTAL
32.768KHZ
CRYSTAL
32.768KHZ
T/P
6 Pin
Internal K/B
25
18
22
Title
Title
CPU Thermal Sensor75Clock Gen
EMC1402
5
4
3
CRYSTAL
14.318MHZ
7
Battery
10 Pin
2
21
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
5008
5008
5008
Date: Sheet
Date: Sheet
Date: Sheet
G10ILX
G10ILX
G10ILX
SYSTEM BLOCK DIAGRAM
SYSTEM BLOCK DIAGRAM
SYSTEM BLOCK DIAGRAM
1
233Wednesday, April 02, 2008
233Wednesday, April 02, 2008
233Wednesday, April 02, 2008
of
of
of
A
A
A
5
hexainf@hotmail.com
4
3
2
1
POWER BLOCK DIAGRAM
System Poewr On Sequence
VID0
VID1
MAX8796
VID2
D D
VID3
VID4
IMVP-6
VID5
VID6
OZ8138
C C
OZ811
B B
OZ815
VIN
ME4410
ME4410
VIN
ME4410
ME4410
VIN
ME4410
ME4410
VIN
ME4410
ME4410
VIN
ME4410
ME4410
+1.5V
+1.05VS
+1.8VS
+3VA
+CPU_CORE
3A
6A/8A
7.2A/10A
6A/8A
+0.9VSAPL5331
5A/7A
+2.5V
0.25A/1A
APL5331 APL5331
+3VS
P1503BVG
+3V
1A
+1.25V
14mA/0.5A
Adaptor or Battery
+5VA_LDO
PWRSW
+3VA / +5VA
+3.3VS_ON
*
VINSW
+5VS
+3.3VS
+1.8VS_DDR_ON
+1.8VS
+0.9VS
RSMRST#
*
PWRBTN#
*
PM_SLP_S4#
*
*
PM_SLP_S3#
*
*
+5V_ON
*
+5V
+3.3V
+1.5V_ON
*
+1.5V
+1.05V
VCORE_ON
*
+CPU_CORE
PWROK
*
H_PWRGD
PCIRST# / PLTRST#
CPURST#
EC Control Pin (O/P)
*
EC Control Pin(I/P)
*
*
+3.3VS_ON
3.3VS_ON_HV
3.3VS_ON_HV
5V_ON_HV
+1.5V_ON
+1.5V_ON
1ms
5ms
10ms
20ms
5ms
20ms
110ms(min)
20ms
1ms
1ms
5ms
100ms
150ms
P1503BVG
A A
VIN
ME4410
ME4410
+5VA
6A/8A
P1503BVG
+5VS
+5V
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
P1503BVG
5
4
3
2
Custom
5008
5008
5008
Date: Sheet
Date: Sheet
Date: Sheet
G10ILX
G10ILX
G10ILX
POWER DIAGRAM & SEQUENCE
POWER DIAGRAM & SEQUENCE
POWER DIAGRAM & SEQUENCE
1
of
of
of
333Wednesday, April 02, 2008
333Wednesday, April 02, 2008
333Wednesday, April 02, 2008
A
A
A
5
4
3
2
1
ICH9M
GPIO
PM_BM_BUSY#
GPIO0
GPIO1
D D
C C
B B
A A
EC_EXTSMI#
INT_PIRQE#
GPIO2
INT_PIRQF#
GPIO3
GPIO4
GPIO5
INT_PIRQH#
GPIO6
BIOS_REC
GPIO7
GPIO8
GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO17
GPIO18
GPIO19
GPIO21
GPIO22
GPIO23
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO30
GPIO31
GPIO32
GPIO33
GPIO35 GPE1
GPIO36
GPIO37
GPIO38
GPIO39
GPIO40
GPIO41
GPIO42
GPIO43
GPIO48
GPIO49
GPIO50
GPIO51
GPIO52
GPIO53
GPIO54
GPIO55
(TACH3)
N.C
N.C
(WOL_EN)
N.C
(ALERT#)
N.C
SMB_ALERT#
LAN_PHYPC
(GLAN_DOCK#)
N.C
(NETDETECT)
N.C
PM_STPPCI#
(TACH0)
N.C
N.C
SATA1GP
SATA0GP
(SCLOCK)
N.C
LDRQ1#
CRB_SV_DET
PM_STPCPU#
PM_SLP_S4_STATE#
QRT_STATE0
QRT_STATE1
USB_OC#5
USB_OC#6
USB_OC#7
PM_CLKRUN#
HDA_DOCK_EN
(HDA_DOCK_RST)
N.C
CLK_SATA_OE#
SATA2GP
SATA3GP
ODD_DET
ICH_GPIO39
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
MFG_MODE
H_PWRGD
PCI_REQ#1
PCI_GNT#1
PCI_REQ#2
PCI_GNT#2
PCI_REQ#3
PCI_GNT#3
GPA0
GPA1
GPA2
GPA3
GPA4
GPA5
GPA6
GPA7
GPB0
GPB1
GPB2
GPB3
GPB4
GPB6
GPB7
GPC0
GPC1
GPC2
GPC3
GPC4
GPC5
GPC6
GPC7
GPD0
GPD1
GPD2
GPD3
GPD4
GPD5
GPD6
GPD7
GPE0GPIO34
GPE2
GPE3
GPE4
GPE5
GPE6
GPE7
GPF0
GPF1
GPF2
GPF3
GPF4
GPF5
GPF6
GPF7
GPG0
GPG1
GPG2
GPG6
GPH0
GPH1
GPH2
GPH3
GPH4
GPH5
GPH6
ITE8512E
GPIO
CHG_G_LED
CHG_R_LED
PWR_LED#
RF_LED#
BTL_BEEP
CPU_VID4
PM_RSMRST#
EC_BL_PWM
PM_SLP_S4#
PM_SLP_S3#
CPU_VID2
BAT_SMBCLK
BAT_SMBDAT
H_A20GATE
H_RCIN#
+1.5V_ON
SMP_EN#
SMB_CLK
SMB_DAT
N.C
LCDSW0
SLP_S4_COY
LCDSW1
CPU_VID3
ADAP_IN
PWRBTN#
EC_LPCRST#
N.C
EC_EXTSMI#
EC_PROCHOT#
CHG_ON#
EC_BL_EN
LID#
SET_V
PWROK
Vcore_ON
PWRSW
P_ID0
P_ID1
MUTE
COYTOE_RDY
WLAN_ON
FP_ON#
3G_INT#
TP_CLK
TP_DATA
MMB_SMB_CLK
MMB_SMB_DAT
EC_WDOG OK
Coyote_VDDP_ON#
FLFRAME#
WEBCAN_ON
MMB_RST#
+1.8V_DDR_ON
SENBAT_V
MMB_INT
+5V_ON
AUX_OFF#
+3.3VS_ON
Default
Pull/Mode
UP / GPI /GPI/ADC
UP / GPI
UP / GPI
UP / GPI
UP / GPI
UP / GPI
UP / GPI
UP / GPI
UP / GPI
UP / GPI
Dn / GPI
/ GPI
/ GPI
/ GPO
UP / Func1
Dn / GPI
Dn / GPI
/ GPI
/ GPI
Dn / GPI
Dn / GPI
Dn / GPI
Dn / GPI
UP / GPI
UP / GPI
UP / GPI
UP / Func1
UP / GPI
UP / GPI
UP / GPI
Dn / GPI
Dn / GPI
Dn / GPI
Dn / GPI
Dn / GPI
Dn / GPI
UP / GPI
Dn / GPI
Dn / GPI
UP / GPI
UP / GPI
UP / GPI
UP / GPI
UP / GPI
UP / GPI
UP / GPI
UP / GPI
UP / GPI
Dn/GPO/TM
Dn/GPO/ID7
Dn/GPI/ID0
Dn/GPI/ID1
Dn/GPI/ID2
Dn/GPI/ID3
Dn/GPI/ID4
Dn/GPI/ID5
Dn/GPI/ID6
GPI0
GPI1
GPI2
GPI3
GPI4INT_PIRQG#
GPI5
GPI6
GPI7
GPJ0
GPJ1
GPJ2
GPJ3GPIO11
GPJ4
GPJ5
ITE8512E
GPIO
BATT_TEMP
ADAPTOR_I
BAT_V
DDR2_TEMP
BAT_I
SLP_S3_COY
EC_BSEL0
EC_BSEL1
EC_BRGHT
CHG_I
FAN_CTRL0
CHG_REF
N.C
PM_THROTTING#
Default
Pull/Mode
/GPI/ADC
/GPI/ADC
/GPI/ADC
/GPI/ADC
/GPI/ADC
/GPI/ADC
/GPI/ADC
/GPI/DAC
/GPI/DAC
/GPI/DAC
/GPI/DAC
/GPI/DAC
/GPI/DAC
IMVP-6+
VCC
+3.3V
+1.8VS
+1.5V
+1.05
VCC ICC(mA)
+5V
+5VS
+3.3V
+3.3VS
+1.5V
Penryn CPU
CPU CORE(V)
1.25
Cantiga
ICC(mA)
262
86
14688.52
W
0.87
5.733178
0.129
15.43
ICH9M
mW
102
210
347
1145.1
212
699.6
2982
1988
1715.7+1.05V
1634
ICC(A)
44.0
TEMP( )
TEMP( )
105
70
W
46.2
TEMP( )
+3.3V
+3.3V
VCC
+3.3V(DVDD)
+5V(AVDD)
VCC
+5V
VCC
+3.3V
VCC
+3.3VS
+1.8VS
+1.5VS
ITE8512E
ICC(mA)VCC
100
330
mW
CLOCK GENERATOR
ICC(mA)VCC
250
825
mW
ALC662
ICC(mA)
mW
132
40
51
255GPB5
APA2068
ICC(mA)
20
100
mW
EMC1402
ICC
170uA
0.56
mW
RTL81102E
ICC(mA)
103
198
367
mW
339.9
356.4
550.5
TEMP( )
70
TEMP( )
70
TEMP( )
70
TEMP( )
85
TEMP( )
150
TEMP( )
70
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
5008
5008
5008
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
G10ILX
G10ILX
G10ILX
GPIO & Power Consumption
GPIO & Power Consumption
GPIO & Power Consumption
1
of
of
of
433Wednesday, April 02, 2008
433Wednesday, April 02, 2008
433Wednesday, April 02, 2008
A
A
A
5
hexainf@hotmail.com
4
3
2
1
H_A#[31:3]8
D D
C C
H_ADSTB#08
H_REQ#[4:0]8
H_A#[35:3]8
H_ADSTB#18
H_A20M#14
H_FERR#14
H_IGNNE#14
H_STPCLK#14
H_INTR14
H_NMI14
H_SMI#14
TP15TP15
TP16TP16
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
Z0501
Z0502
U4A
U4A
P21
A[3]#
H20
A[4]#
N20
A[5]#
R20
A[6]#
J19
A[7]#
N19
A[8]#
G20
A[9]#
M19
A[10]#
H21
A[11]#
L20
A[12]#
M20
A[13]#
K19
A[14]#
J20
A[15]#
L21
A[16]#
K20
ADSTB[0]#
D17
AP0
N21
REQ[0]#
J21
REQ[1]#
G19
REQ[2]#
P20
REQ[3]#
R19
REQ[4]#
C19
A[17]#
F19
A[18]#
E21
A[19]#
A16
A[20]#
D19
A[21]#
C14
A[22]#
C18
A[23]#
C20
A[24]#
E20
A[25]#
D20
A[26]#
B18
A[27]#
C15
A[28]#
B16
A[29]#
B17
A[30]#
C16
A[31]#
A17
A[32]#
B14
A[33]#
B15
A[34]#
A14
A[35]#
B19
ADSTB[1]#
M18
AP1
U18
A20M#
T16
FERR#
J4
IGNNE#
R16
STPCLK#
T15
LINT0
R15
LINT1
U17
SMI#
D6
NC1
G6
NC2
H6
NC3
K4
NC4
K5
NC5
M15
NC6
L16
NC7
Diamondville_SC_Rev1
Diamondville_SC_Rev1
V19
ADS#
Y19
BNR#
U21
BPRI#
ADDR
GROUP
0
ADDR
GROUP
0
ADDR GROUP 1
ADDR GROUP 1
DEFER#
CONTROL
CONTROL
RESET#
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
XDP/ITP SIGNALS
XDP/ITP SIGNALS
PROCHOT#
THRMDA
THRMDC
THERM
THERM
THERMTRIP#
BCLK[0]
BCLK[1]
H CLK
H CLK
NC
NC
DRDY#
DBSY#
BR0#
IERR#
INIT#
LOCK#
RS[0]#
RS[1]#
RS[2]#
TRDY#
HITM#
PRDY#
PREQ#
TRST#
BR1#
RSVD3
RSVD2
RSVD1
T21
T19
Y18
T20
H_IERR#
F16
H_INIT#_IN
V16
W20
H_CPURST#
D15
H_RS#0
W18
H_RS#1
Y17
H_RS#2
U20
W19
AA17
HIT#
V20
K17
J18
H15
J15
K18
PREQ#
J16
TCK
M17
TCK
TDI
N16
TDI
TDO
M16
TDO
TMS
L17
TMS
TRST#
K16
Z0503
V15
H_PROCHOT#_IN
G17
H_THERMDA
E4
H_THERMDC
E5
PM_THRMTRIP#
H17
V11
V12
C21
C1
A3
.
.
+1.05V
TP11TP11
H_ADS# 8
H_BNR# 8
H_BPRI# 8
H_DEFER# 8
H_DRDY# 8
H_DBSY# 8
H_BREQ#0 8
1 2
H_LOCK# 8
H_CPURST# 8
H_TRDY# 8
H_HIT# 8
H_HITM# 8
R73
R73
750-04
750-04
1 2
A C
PM_THRMTRIP# 14
CLK_CPU_BCLK 7
CLK_CPU_BCLK# 7
R68
R68
D10
D10
@BAT54
@BAT54
1K-04
1K-04
+1.05V
R84
R84
330--04
330--04
1 2
EC_PROCHOT# 23
H_INIT# 14
H_RS#[2:0] 8
H_D#[63:0]8
H_D#[63:0]8
+1.05V
12
R34
R34
1K-1-04
1K-1-04
H_GTLREF place within 0.5''
12
C85
C85
R33
R33
2K-1-04
2K-1-04
.1U-16-04Y-Z
.1U-16-04Y-Z
H_DSTBN#08
H_DSTBP#08
H_DINV#08
H_DSTBN#18
H_DSTBP#18
H_DINV#18
R245 @1K-04R245 @1K-04
1 2
R244 @1K-04R244 @1K-04
1 2
TP13TP13
TP6TP6
TP12TP12
TP8TP8
TP14TP14
TP7TP7
CPU_BSEL09,23
CPU_BSEL19
CPU_BSEL29
BSEL
FSB
FSB400
FSB533
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
TP9TP9
TP3TP3
H_GTLREF
TEST1
TEST2
Z0506
Z0507
H_EXTBGREF
Z0508
Z0509
Z0510
Z0511
BSEL1
Z0505
Y11
W10
Y12
AA14
AA11
W12
AA16
Y10
Y9
Y13
W15
AA13
Y16
W13
AA9
W9
Y14
Y15
W16
V9
AA5
Y8
W3
U1
W7
W6
Y7
AA6
Y3
W2
V3
U2
T3
AA8
V2
W4
Y4
Y5
Y6
R4
A7
U5
V5
T17
R6
M6
N15
N6
P17
T6
J6
H5
G5
BSEL0BSEL2
000
100
U4B
U4B
D[0]#
D[1]#
D[2]#
DATA GRP 0 DATA GRP 1
DATA GRP 0 DATA GRP 1
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#
DP#0
D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#
DP#1
GTLREF
ACLKPH
DCLKPH
BINIT#
MISC
MISC
EDM
EXTBGREF
FORCEPR#
HFPLL
MCERR#
RSP#
BSEL[0]
BSEL[1]
BSEL[2]
Diamondville_SC_Rev1
Diamondville_SC_Rev1
MHZ
100
133
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
DATA GRP 2
DATA GRP 2
D[44]#
D[45]#
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#
DP#2
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
DATA GRP 3
DATA GRP 3
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#
DP#3
COMP[0]
COMP[1]
COMP[2]
COMP[3]
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
CORE_DET
CMREF[1]
H_D#32
R3
H_D#33
R2
H_D#34
P1
H_D#35
N1
H_D#36
M2
H_D#37
P2
H_D#38
J3
H_D#39
N3
H_D#40
G3
H_D#41
H2
H_D#42
N2
H_D#43
L2
H_D#44
M3
H_D#45
J2
H_D#46
H1
H_D#47
J1
K2
K3
L1
Z0512Z0504
M4
C2
G2
F1
D3
B4
E1
A5
C3
A6
F2
C6
B6
B3
C4
C7
D2
E2
F3
C5
D4
T1
T2
F20
F21
R18
R17
U4
V17
N18
A13
B7
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
Z0513
COMP0
COMP1
COMP2
COMP3
Z0514
H_CMREF
TP4TP4
R239 27.4-1-04R239 27.4-1-04
R240 54.9-1-04R240 54.9-1-04
R75 27.4-1-04R75 27.4-1-04
R74 54.9-1-04R74 54.9-1-04
H_D#[63:0] 8
H_DSTBN#2 8
H_DSTBP#2 8
H_DINV#2 8
H_D#[63:0] 8
COMP0/2 TRACE 27.4 OHM +-15%
COMP1/3 TRACE 55 OHM +-15%
within 0.5''
H_DSTBN#3 8
H_DSTBP#3 8
H_DINV#3 8
TP5TP5
1 2
1 2
1 2
1 2
H_DPRSTP# 14
H_DPSLP# 14
H_DPWR# 8
H_PWRGD 14
H_CPUSLP# 8,14
TP10TP10
Close to CPU within 20mil
H_FERR#
R85 @56-04R85 @56-04
H_IERR#
H_CPURST#
H_STPCLK#
TDI
TDO
TMS
PREQ#
H_A#32
H_A#33
H_A#34
H_A#35
TRST#
TCK
H_A20M#
H_IGNNE#
H_SMI#
H_DPSLP#
H_DPRSTP#
H_PWRGD
H_DPWR#
1 2
R273 56-04R273 56-04
1 2
R258 @56-04R258 @56-04
1 2
R69 56-04R69 56-04
1 2
R263 56-04R263 56-04
1 2
R262 @56-1-04R262 @56-1-04
1 2
R261 56-04R261 56-04
1 2
R259 56-04R259 56-04
1 2
R257 1K-04R257 1K-04
1 2
R252 1K-04R252 1K-04
1 2
R253 1K-04R253 1K-04
1 2
R251 1K-04R251 1K-04
1 2
R260 56-04R260 56-04
1 2
R277 56-04R277 56-04
1 2
R71 1K-04R71 1K-04
1 2
R242 1K-04R242 1K-04
1 2
R70 56-04R70 56-04
1 2
R86 1K-04R86 1K-04
1 2
R79 1K-04R79 1K-04
1 2
R87 @1K-04R87 @1K-04
1 2
R246 1K-04R246 1K-04
1 2
+1.05V
+1.05V
+3.3V
12
R89
R89
100K-04
100K-04
C145
B B
R72 1K-04R72 1K-04
1 2
Z0515PM_THRMTRIP#
C131
C131
.1U-16-04Y-Z
.1U-16-04Y-Z
B
Q12
Q12
TR-2N3904
TR-2N3904
E C
C145
1U-10-06Y-Z
1U-10-06Y-Z
AUX_OFF 28
+1.05V +1.05V
12
R38
R38
1K-1-04
1K-1-04
12
R37
R37
C92
C92
2K-1-04
2K-1-04
.1U-16-04Y-Z
.1U-16-04Y-Z
H_EXTBGREFH_CMREF
C405
C405
1U-16-06Y-Z
1U-16-06Y-Z
12
12
R250
R250
1K-1-04
1K-1-04
R243
R243
2K-1-04
2K-1-04
CPU Thermal Sensor
Used for Balance +1.05V & GND
+1.05V
C105
C118
C118
.1U-16-04Y-Z
.1U-16-04Y-Z
C105
.1U-16-04Y-Z
.1U-16-04Y-Z
2
C157
C157
.1U-16-04Y-Z
.1U-16-04Y-Z
C158
C158
.1U-16-04Y-Z
.1U-16-04Y-Z
C122
C122
.1U-16-04Y-Z
.1U-16-04Y-Z
C150
C150
.1U-16-04Y-Z
.1U-16-04Y-Z
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
C81
C81
.1U-16-04Y-Z
.1U-16-04Y-Z
5008
5008
5008
C78
C78
.1U-16-04Y-Z
.1U-16-04Y-Z
G10ILX
G10ILX
G10ILX
CPU Penryn 1/2
CPU Penryn 1/2
CPU Penryn 1/2
1
of
of
of
533Wednesday, April 02, 2008
533Wednesday, April 02, 2008
533Wednesday, April 02, 2008
A
A
A
THERMDAH_THERMDA
THERMDC
VDD_7421
C388
C388
2.2U-6.3-06R-K
2.2U-6.3-06R-K
U2
2
4
3
D+
THERM#
D-
1
VDD
GND
5
ADATA
SCLK
ALERT
EMC1402U2EMC1402
7
8
6
1 2
ALERT#
R233
R233
@10K-04
@10K-04
SMBDAT_EC 7,23
SMBCLK_EC 7,23
R235
R235
1 2
100K-04
100K-04
4
VDD_7421
IC
EMC1402
ADT7421
LM95245
SETTING
R34
R32
0R0R
100R_1 100R_1
0R
0R
R41
@10K
@10K
10K
*
3
R234 68-06R234 68-06
1 2
+3.3V
Close to IC
R237 0-04R237 0-04
1 2
H_THERMDC
R236 0-04R236 0-04
A A
1 2
5
C390
C390
2200P-50-04X-K
2200P-50-04X-K
5
D D
+1.05V
U4C
U4C
+1.05V
V10
VCCF
A9
VCCQ1
B9
VCCQ2
+CPU_CORE
A10
VCCP1
A11
C C
B B
VCCP2
A12
VCCP3
B10
VCCP4
B11
VCCP5
B12
VCCP6
C10
VCCP7
C11
VCCP8
C12
VCCP9
D10
VCCP10
D11
VCCP11
D12
VCCP12
E10
VCCP13
E11
VCCP14
E12
VCCP15
F10
VCCP16
F11
VCCP17
F12
VCCP18
G10
VCCP19
G11
VCCP20
G12
VCCP21
H10
VCCP22
H11
VCCP23
H12
VCCP24
J10
VCCP25
J11
VCCP26
J12
VCCP27
K10
VCCP28
K11
VCCP29
K12
VCCP30
L10
VCCP31
L11
VCCP32
L12
VCCP33
M10
VCCP34
M11
VCCP35
M12
VCCP36
N10
VCCP37
N11
VCCP38
N12
VCCP39
P10
VCCP40
P11
VCCP41
P12
VCCP42
R10
VCCP43
R11
VCCP44
R12
VCCP45
Diamondville_SC_Rev1
Diamondville_SC_Rev1
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VCCPC64
VCCPC63
VCCPC62
VCCPC61
VCCA
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
VCCSENSE
VSSSENSE
C9
D9
E9
F8
F9
G8
G14
H8
H14
J8
J14
K8
K14
L8
L14
M8
M14
N8
N14
P8
P14
R8
R14
T8
T14
U8
U9
U10
U11
U12
U13
U14
F14
F13
E14
E13
D7
F15
D16
E18
G15
G16
E17
G18
C13
D13
CPU_VCCA
H_VID0 22,26
H_VID1 22,26
H_VID2 22,26
H_VID3 22,26
H_VID4 22,26
H_VID5 22,26
H_VID6 22,26
VCORE_VCCSENSE
VCORE_VSSSENSE
12
+CPU_CORE
130mA
R254
R254
100-1-04
100-1-04
12
R255
R255
100-1-04
100-1-04
C408
C408
0.1U-10-04X-K
0.1U-10-04X-K
VCORE_VCCSENSE 26
VCORE_VSSSENSE 26
+1.5V
B38
B38
0-06
0-06
C407
C407
4.7U-10-08Y-Z
4.7U-10-08Y-Z
4
+CPU_CORE
C96
C96
C425
C425
C424
C424
C426
C426
4.7U-10-08R-K
4.7U-10-08R-K
4.7U-10-08R-K
4.7U-10-08R-K
4.7U-10-08R-K
4.7U-10-08R-K
4.7U-10-08R-K
C423
C423
C451
C451
0.1U-10-04X-K
0.1U-10-04X-K
C430
C430
0.1U-10-04X-K
0.1U-10-04X-K
C456
C456
C466
C466
C100
C100
2.2U-10-06R-K
2.2U-10-06R-K
C448
C448
0.1U-10-04X-K
0.1U-10-04X-K
C433
C433
0.1U-10-04X-K
0.1U-10-04X-K
0.1U-10-04X-K
0.1U-10-04X-K
4.7U-10-08R-K
2.2U-10-06R-K
2.2U-10-06R-K
0.1U-10-04X-K
0.1U-10-04X-K
0.1U-10-04X-K
0.1U-10-04X-K
C130
C130
C454
C454
+1.05V
C91
C91
2.2U-10-06R-K
2.2U-10-06R-K
C441
C441
0.1U-10-04X-K
0.1U-10-04X-K
C428
C428
0.1U-10-04X-K
0.1U-10-04X-K
C414
C414
C412
C412
C114
C114
2.2U-10-06R-K
2.2U-10-06R-K
C452
C452
C429
C429
0.1U-10-04X-K
0.1U-10-04X-K
C447
C447
0.1U-10-04X-K
0.1U-10-04X-K
C453
C453
0.1U-10-04X-K
0.1U-10-04X-K
2500mA
0.1U-10-04X-K
0.1U-10-04X-K
C445
C445
0.1U-10-04X-K
0.1U-10-04X-K
C450
C450
0.1U-10-04X-K
0.1U-10-04X-K
C409
C409
0.1U-10-04X-K
0.1U-10-04X-K
C460
C460
3
C446
C446
0.1U-10-04X-K
0.1U-10-04X-K
C449
C449
0.1U-10-04X-K
0.1U-10-04X-K
C427
C427
C432
C432
C468
C468
0.1U-10-04X-K
0.1U-10-04X-K
C156
C156
C431
C431
0.1U-10-04X-K
0.1U-10-04X-K
C435
C435
0.1U-10-04X-K
0.1U-10-04X-K
C411
C411
C395
C395
0.1U-10-04X-K
0.1U-10-04X-K
0.1U-10-04X-K
0.1U-10-04X-K
0.1U-10-04X-K
0.1U-10-04X-K
C396
C396
0.1U-10-04X-K
0.1U-10-04X-K
C415
C415
C159
C159
4.7U-10-08R-K
4.7U-10-08R-K
C420
C420
C162
C162
4.7U-10-08R-K
4.7U-10-08R-K
C413
C413
C143
C143
0.1U-10-04X-K
0.1U-10-04X-K
C455
C455
C410
C410
C467
C467
2
0.1U-10-04X-K
0.1U-10-04X-K
U4D
U4D
A2
VSS1
A4
VSS2
A8
VSS4
A15
VSS5
A18
VSS6
A19
VSS7
A20
VSS8
B1
VSS9
B2
VSS10
B5
VSS11
B8
VSS12
B13
VSS13
B20
VSS14
B21
VSS15
C8
VSS16
C17
VSS17
D1
VSS18
D5
VSS19
D8
VSS20
D14
VSS21
D18
VSS22
D21
VSS23
E3
VSS24
E6
VSS25
E7
VSS26
E8
VSS27
E15
VSS28
E16
VSS29
E19
VSS30
F4
VSS31
F5
VSS32
F6
VSS33
F7
VSS34
F17
VSS35
F18
VSS36
G1
VSS37
G4
VSS38
G7
VSS39
G9
VSS41
G13
VSS42
G21
VSS45
H3
VSS46
H4
VSS48
H7
VSS49
H9
VSS51
H13
VSS52
H16
VSS53
H18
VSS54
H19
VSS55
J5
VSS56
J7
VSS57
J9
VSS58
J13
VSS59
J17
VSS60
K1
VSS61
K6
VSS62
K7
VSS63
K9
VSS64
K13
VSS65
K15
VSS66
K21
VSS67
L3
VSS68
L4
VSS69
L5
VSS70
L6
VSS71
L7
VSS72
L9
VSS73
L13
VSS74
L15
VSS75
L18
VSS76
L19
VSS77
M1
VSS78
M5
VSS79
M7
VSS80
M9
VSS81
M13
VSS82
M21
VSS83
N4
VSS84
Diamondville_SC_Rev1
Diamondville_SC_Rev1
VSS162
VSS161
VSS160
VSS159
VSS158
VSS157
VSS156
VSS155
VSS154
VSS153
VSS152
VSS151
VSS149
VSS148
VSS147
VSS146
VSS145
VSS144
VSS143
VSS142
VSS141
VSS140
VSS139
VSS138
VSS137
VSS136
VSS135
VSS134
VSS133
VSS132
VSS131
VSS130
VSS129
VSS128
VSS127
VSS126
VSS125
VSS124
VSS123
VSS122
VSS121
VSS120
VSS119
VSS118
VSS117
VSS116
VSS115
VSS114
VSS113
VSS112
VSS111
VSS110
VSS109
VSS108
VSS107
VSS106
VSS105
VSS104
VSS103
VSS102
VSS101
VSS100
VSS99
VSS98
VSS97
VSS96
VSS95
1
N5
N7
N9
N13
N17
P3
P4
P5
P6
P7
P9
P13
P15
P16
P18
P19
R1
R5
R7
R9
R13
R21
T4
T5
T7
T9
T10
T11
T12
T13
T18
U3
U6
U7
U15
U16
U19
V1
V4
V6
V7
V8
V13
V14
V18
V21
W1
W5
W8
W11
W14
W17
W21
Y1
Y2
Y20
Y21
AA2
AA3
AA4
AA7
AA10
AA12
AA15
AA18
AA19
AA20
0.1U-10-04X-K
0.1U-10-04X-K
0.1U-10-04X-K
0.1U-10-04X-K
0.1U-10-04X-K
0.1U-10-04X-K
0.1U-10-04X-K
0.1U-10-04X-K
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
5008
5008
5008
Date: Sheet
Date: Sheet
2
Date: Sheet
G10ILX
G10ILX
G10ILX
CPU Penryn 2/2
CPU Penryn 2/2
CPU Penryn 2/2
1
A
A
A
of
of
of
633Wednesday, April 02, 2008
633Wednesday, April 02, 2008
633Wednesday, April 02, 2008
0.1U-10-04X-K
0.1U-10-04X-K
0.1U-10-04X-K
0.1U-10-04X-K
0.1U-10-04X-K
0.1U-10-04X-K
0.1U-10-04X-K
0.1U-10-04X-K
A A
5
4
0.1U-10-04X-K
3
0.1U-10-04X-K
0.1U-10-04X-K
0.1U-10-04X-K
0.1U-10-04X-K
0.1U-10-04X-K
5
hexainf@hotmail.com
D D
+3.3V
R373
R373
1 2
R303
R303
1 2
10K-04
10K-04
@10K-04
@10K-04
CLKREQB#
PM_STPCPU#
Reserved FOR EMI
C514 @10P-25-04NC514 @10P-25-04N
C520 @10P-25-04NC520 @10P-25-04N
C552 @10P-25-04NC552 @10P-25-04N
C539 @10P-25-04NC539 @10P-25-04N
C C
CLK_CARD48
CLK_USB48
CLK_ICH14
CLK_EC_LPC
+1.05V
4
+3.3V
B42
B42
BD-QT1608RL120HC
BD-QT1608RL120HC
C501
C501
4.7U-10-08Y-Z
4.7U-10-08Y-Z
NB_DOT_96CLK#9
MCH_CLK_REQ#9
CLK_DEBUG BD19,30
NB_DOT_96CLK9
C500
C500
CLK_EC_LPC23
CLK_SB_PCI15
CLK_CARD4821
CLK_USB4815
CLK_ICH1415
SMBCLK_EC5,23
SMBDAT_EC5,23
.1U-16-04Y-Z
.1U-16-04Y-Z
C547
C547
.1U-16-04Y-Z
.1U-16-04Y-Z
C519
C519
C537
C537
.1U-16-04Y-Z
.1U-16-04Y-Z
.1U-16-04Y-Z
.1U-16-04Y-Z
R374 475-1-04R374 475-1-04
1 2
R358 33-04R358 33-04
1 2
R350 33-04R350 33-04
1 2
R329 33-04R329 33-04
1 2
C513 @5P-25-04NC513 @5P-25-04N
R322 33-04R322 33-04
1 2
R330 33-04R330 33-04
1 2
R391 33-04R391 33-04
1 2
R98 0-04R98 0-04
1 2
R97 0-04R97 0-04
1 2
1A
CLK_VDDA
C492
C492
.1U-16-04Y-Z
.1U-16-04Y-Z
XTAL_OUT
XTAL_IN
CLKREQB#
PCI2
PCI3
PIC4/LCDCK_SEL
PCIF5/ITP_EN
CLK_BSEL0
CLK_BSEL1
CLK_BSEL2
DOT_96
DOT_96#
3
U16
U16
2
VDD_PCI
9
VDD_48
16
VDD_PLL3
39
VDD_SRC
55
VDD_CPU
61
VDD_REF
59
XTAL_OUT
60
XTAL_IN
1
PCI_0/CLKREQ_A#
3
PCI_1/CLKREQ_B#
4
PCI_2
5
PCI_3
6
PCI_4/LCDCLK_SEL
7
PCIF_5/ITP_EN
10
USB_48MHz/FS_A
57
FS_B/TEST_MODE
62
REF/FS_C/TEST_SEL
13
SRC_0/DOT_96
14
SRC_0#/DOT_96#
64
SCL
63
SDA
8
VSS_PCI
11
VSS_48
15
VSS_I/O
19
VSS_PLL3
23
VSS_SRC_1
29
VSS_SRC_2
42
VSS_SRC_3
52
VSS_CPU
58
VSS_REF
ICS9LPRS365BG
ICS9LPRS365BG
VDD_I/O
VDD_PLL3_I/O
VDD_SRC_I/O_1
VDD_SRC_I/O_2
VDD_SRC_I/O_3
VDD_CPU_I/O
CPU_STOP#
PCI_STOP#
CKPWRGD/PD#
CPU_0
CPU_0#
CPU_1_MCH
CPU_1_MCH#
SRC_8/CPU_ITP
SRC_8#/CPU_ITP#
LCDCLK/27M
LCDCLK#/27M_SS
SRC_2
SRC_2#
SRC_3/CLKREQ_C#
SRC_3#/CLKREQ_D#
SRC_4
SRC_4#
SRC_6
SRC_6#
SRC_7/CLKREQ_F#
SRC_7#/CLKREQ_E#
SRC_9
SRC_9#
SRC_10
SRC_10#
SRC_11/CLKREQ_H#
SRC_11#/CLKREQ_G#
2
+1.05V
B11
1A
CLK_VDD_IO
C165
C165
C511
C511
C488
C488
.1U-16-04Y-Z
.1U-16-04Y-Z
.1U-16-04Y-Z
PM_STPCPU#
PM_STPPCI#
CLK_GEN_PWRGD
.1U-16-04Y-Z
R353 10K-04R353 10K-04
R377 @10K-04R377 @10K-04
1 2
1 2
12
20
26
36
45
49
37
38
56
54
53
51
50
47
46
48
NC
17
18
21
22
24
25
27
28
41
40
44
43
30
31
34
35
33
32
C494
C494
.1U-16-04Y-Z
.1U-16-04Y-Z
.1U-16-04Y-Z
.1U-16-04Y-Z
+3.3V
PM_STPCPU# 15
PM_STPPCI# 15
CLK_CPU_BCLK 5
CLK_CPU_BCLK# 5
CLK_MCH_BCLK 8
CLK_MCH_BCLK# 8
NB_LVDS_SSCLK 9
NB_LVDS_SSCLK# 9
CLK_ICH_SATA 14
CLK_ICH_SATA# 14
GCLK 9
GCLK# 9
CLK_DMI_ICH 15
CLK_DMI_ICH# 15
CLK_PCIE_NEW_CARD 19
CLK_PCIE_NEW_CARD# 19
CLK_PCIE_GLAN 20
CLK_PCIE_GLAN# 20
BD-QT1608RL120HC
BD-QT1608RL120HC
C163
C163
C496
C496
.1U-16-04Y-Z
.1U-16-04Y-Z
CLK REQ O/PFrom
B11
4.7U-10-08Y-Z
4.7U-10-08Y-Z
+3.3V
12
R317
R317
4.7k-04
4.7k-04
R312 0-04R312 0-04
C512
C512
@.1U-16-04Y-Z
@.1U-16-04Y-Z
B SRC4MCH_GCLK
1 2
CHECK
1
VCORE_CLK_EN# 15,26
R364
R364
@1K-04
@1K-04
0
CLK_BSEL2
B B
0
CLK_BSEL1
1
CLK_BSEL0
A A
BSEL
BSEL2
FSB
FSB533
FSLC
0
5
Bsel [0..2] VIH = 0.7V VIL = 0.3V
CPU
BSEL0
BSEL1
FSLB
0
0
FSLA
11
1
MHZ
100FSB400
133
1 2
1 2
1 2
+1.05V
1 2
PCI
PCI-E
MHZ
MHZ
33 100
R363
R363
1K-04
1K-04
R328
R328
1K-04
1K-04
R321
R321
2.2K-04
2.2K-04
XTAL_OUT
XTAL_IN
Y6
Y6
14.318MHz_49_SMT
14.318MHz_49_SMT
R344
R344
1 2
10M-1-04
10M-1-04
C544
3
C544
20P-50-04N-J
20P-50-04N-J
0 = Pin17/18 LCDCLK & DOT_96 for internal graphic controller support
1 = Pin17/18 27M & 27M_SS & SRC_0 for external graphic controller
support
PIC4/LCDCK_SEL
12
R337
R337
10K-04
10K-04
2
C517
C517
20P-50-04N-J
20P-50-04N-J
Ce = 2*CL - ( Cs + Ci )
CL = Crystal Load Cap = 20P
Ci = IC internal Cap = 5P
Cs = 2P
Ce = Crystal external Cap = 33P
4
12
R338
R338
10K-04
10K-04
12
R357
R357
10K-04
10K-04
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
5008
5008
5008
Date: Sheet
Date: Sheet
Date: Sheet
0= Pin46/47 SRC output.
1= Pin46/47 ITP output.
PCIF5/ITP_EN
0 = Overclocking of CPU and SRC Allowed
1 = Overclocking of CPU and SRC NOT
allowed
PCI2
G10ILX
G10ILX
G10ILX
CLOCK GEN
CLOCK GEN
CLOCK GEN
1
733Wednesday, April 02, 2008
733Wednesday, April 02, 2008
733Wednesday, April 02, 2008
A
A
A
of
of
of
5
4
3
2
1
U3E
U3E
AH33
VSS1
Y33
VSS2
V33
VSS3
R33
VSS4
G33
VSS5
AK32
VSS6
D D
C C
B B
AG32
AE32
AC32
AA32
AM31
AA31
AG30
AE30
AC30
AA30
AA29
AK28
AH28
AE28
AA28
AM27
AF27
AB27
AA27
AH26
AN25
AK25
AG25
AE25
AM22
AF22
AM20
AK20
AH20
AF20
AM18
AH18
AF18
AK17
AH16
VSS7
VSS8
VSS9
VSS10
U32
VSS11
H32
VSS12
E32
VSS13
C32
VSS14
VSS15
AJ31
VSS16
VSS17
U31
VSS18
T31
VSS19
R31
VSS20
P31
VSS21
N31
VSS22
M31
VSS23
J31
VSS24
F31
VSS25
AL30
VSS26
VSS27
VSS28
VSS29
VSS30
Y30
VSS31
V30
VSS32
U30
VSS33
G30
VSS34
E30
VSS35
B30
VSS36
VSS37
U29
VSS38
R29
VSS39
P29
VSS40
N29
VSS41
M29
VSS42
H29
VSS43
E29
VSS44
B29
VSS45
VSS46
VSS47
VSS48
VSS49
U28
VSS50
T28
VSS51
J28
VSS52
D28
VSS53
VSS54
VSS55
VSS56
VSS57
Y27
VSS58
U27
VSS59
T27
VSS60
R27
VSS61
P27
VSS62
N27
VSS63
M27
VSS64
G27
VSS65
E27
VSS66
C27
VSS67
B27
VSS68
AL26
VSS69
VSS70
W26
VSS71
U26
VSS72
VSS73
VSS74
VSS75
VSS76
J25
VSS77
G25
VSS78
A25
VSS79
H23
VSS80
F23
VSS81
B23
VSS82
VSS83
AJ22
VSS84
VSS85
G22
VSS86
E22
VSS87
J21
VSS88
H21
VSS89
F21
VSS90
VSS91
VSS92
VSS93
VSS94
D20
VSS95
W19
VSS96
R19
VSS97
VSS98
VSS99
VSS100
U18
VSS101
H18
VSS102
D18
VSS103
VSS104
V17
VSS105
T17
VSS106
F17
VSS107
B17
VSS108
VSS109
U16
VSS110
945GMS
945GMS
VSS
VSS
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
J16
AL15
AG15
W15
R15
F15
D15
AM14
AH14
AE14
H14
B14
F13
D13
AL12
AG12
H12
B12
AN11
AJ11
AE11
AM9
AJ9
AB9
W9
R9
M9
J9
F9
C9
A9
AL8
AG8
AE8
U8
AA7
V7
R7
N7
H7
E7
B7
AL6
AG6
AE6
AB6
W6
T6
M6
K6
AN5
AJ5
B5
AA4
V4
R4
N4
K4
H4
E4
AL3
AD3
W3
T3
B3
AK2
AH2
AF2
AB2
M2
K2
H2
F2
V1
R1
Reference Voltage for RCOMP
10mil/20mil W/S
H_YRCOMP
12
R52
R52
24.9-1-04
24.9-1-04
H_DVREF
C125
C125
.1U-16-04Y-Z
.1U-16-04Y-Z
+1.05V
+1.05V
+1.05V
12
R48
R48
54.9-1-04
54.9-1-04
10mil/20mil W/S
H_YSCOMP
+1.05V
12
R57
R57
221-1-04
221-1-04
10mil/20mil W/S 10mil/20mil W/S
H_YSWING
12
R55
R55
C117
C117
100-1-04
100-1-04
.1U-16-04Y-Z
.1U-16-04Y-Z
+1.05V
12
R65
R65
100-1-04
100-1-04
12
R62
R62
200-1-04
200-1-04
C95 closed to NB within 100mil
12
12
12
12
R81
R81
24.9-1-04
24.9-1-04
R82
R82
54.9-1-04
54.9-1-04
R90
R90
221-1-04
221-1-04
R88
R88
100-1-04
100-1-04
10mil/20mil W/S
H_XRCOMP
10mil/20mil W/S
H_XSCOMP
H_XSWING
C135
C135
.1U-16-04Y-Z
.1U-16-04Y-Z
H_D#[63:0]5 H_A#[35:3] 5
H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_YSWING
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
U3A
U3A
C4
HD0#
F6
HD1#
H9
HD2#
H6
HD3#
F7
HD4#
E3
HD5#
C2
HD6#
C3
HD7#
K9
HD8#
F5
HD9#
J7
HD10#
K7
HD11#
H8
HD12#
E5
HD13#
K8
HD14#
J8
HD15#
J2
HD16#
J3
HD17#
N1
HD18#
M5
HD19#
K5
HD20#
J5
HD21#
H3
HD22#
J4
HD23#
N3
HD24#
M4
HD25#
M3
HD26#
N8
HD27#
N6
HD28#
K3
HD29#
N9
HD30#
M1
HD31#
V8
HD32#
V9
HD33#
R6
HD34#
T8
HD35#
R2
HD36#
N5
HD37#
N2
HD38#
R5
HD39#
U7
HD40#
R8
HD41#
T4
HD42#
T7
HD43#
R3
HD44#
T5
HD45#
V6
HD46#
V3
HD47#
W2
HD48#
W1
HD49#
V2
HD50#
W4
HD51#
W7
HD52#
W5
HD53#
V5
HD54#
AB4
HD55#
AB8
HD56#
W8
HD57#
AA9
HD58#
AA8
HD59#
AB1
HD60#
AB7
HD61#
AA2
HD62#
AB5
HD63#
A10
HXRCOMP
A6
HXSCOMP
C15
HXSWING
J1
HYRCOMP
K1
HYSCOMP
H1
HYSWING
945GMS
945GMS
HADSTB0#
HADSTB1#
H_AVREF
HBREQ0#
HCPURST#
HOST
HOST
HDEFER#
HDSTBN0#
HDSTBN1#
HDSTBN2#
HDSTBN3#
HDSTBP0#
HDSTBP1#
HDSTBP2#
HDSTBP3#
HCPUSLP#
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HADS#
HBNR#
HBPRI#
HDVREF
HCLKN
HCLKP
HDBSY#
HDINV0#
HDINV1#
HDINV2#
HDINV3#
HDPWR#
HDRDY#
HHIT#
HHITM#
HLOCK#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HRS0#
HRS1#
HRS2#
HTRDY#
F8
D12
C13
A8
E13
E12
J12
B13
A13
G13
A12
D14
F14
J13
E17
H15
G15
G14
A15
B18
B15
E14
H13
C14
A17
E15
H17
D17
G17
F10
C12
H16
E2
B9
C7
G8
B10
E1
AA6
AA5
C10
C6
H5
J6
T9
U6
G7
E6
F3
M8
T1
AA3
F4
M7
T2
AB3
C8
B4
C5
G9
E9
G12
B8
F12
A5
B6
G10
E8
E10
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_DVREF
H_DVREF
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
H_CPUSLP#_GMCH
H_ADS# 5
H_ADSTB#0 5
H_ADSTB#1 5
H_BNR# 5
H_BPRI# 5
H_BREQ#0 5
H_CPURST# 5
CLK_MCH_BCLK# 7
CLK_MCH_BCLK 7
H_DBSY# 5
H_DEFER# 5
H_DINV#[3:0] 5
H_DPWR# 5
H_DRDY# 5
H_DSTBN#[3:0] 5
H_DSTBP#[3:0] 5
H_HIT# 5
H_HITM# 5
H_LOCK# 5
H_REQ#[4:0] 5
H_RS#[2:0] 5
R285 0-04R285 0-04
1 2
H_TRDY# 5
H_CPUSLP# 5,14
A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
5008
5008
5008
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
G10ILX
G10ILX
G10ILX
NB HOST/VSS
NB HOST/VSS
NB HOST/VSS
1
A
A
A
of
of
of
833Wednesday, April 02, 2008
833Wednesday, April 02, 2008
833Wednesday, April 02, 2008
5
hexainf@hotmail.com
4
3
2
1
CFG CONTROL
CFG2 CFG1 CFG0
00001
D D
DMI_RXN015
DMI_RXN115
CHECK ?
CHECK ?
C C
DMI_RXP015
DMI_RXP115
DMI_TXN015
DMI_TXN115
DMI_TXP015
DMI_TXP115
MA_CK012
MA_CK112
MA_CK#012
MA_CK#112
MA_CKE012
MA_CKE112
MA_CS#012
MA_CS#112
MA_ODT012
MA_ODT112
M_RCOMPN
M_RCOMPP
M_VREF_MCH0
M_VREF_MCH1
AM30
AG33
AG14
AF33
AN30
AN21
AN22
AF26
AF25
AF12
AK14
AH12
AF11
AE12
AF14
AN12
AN14
AA33
AJ21
AJ14
AJ12
Y29
Y32
Y28
Y31
V28
V31
V29
V32
AG1
AJ1
AF1
AK1
AE1
U3B
U3B
DMI_RXN0
DMI_RXN1
DMI_RXP0
DMI_RXP1
DMI_TXN0
DMI_TXN1
DMI_TXP0
DMI_TXP1
SM_CK0
SM_CK1
SM_CK2
SM_CK3
SM_CK0#
SM_CK1#
SM_CK2#
SM_CK3#
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
SMOCDCOMP0
SMOCDCOMP1
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3
SMRCOMPN
SMRCOMPP
SMVREF0
SMVREF1
CFG0
CFG1
CFG2
CFG3
CFG5
CFG6
DMI
DMI
MCH_RSVD1
MCH_RSVD2
MCH_RSVD7
MCH_RSVD8
MCH_RSVD9
CFG/RSVD
CFG/RSVD
DDR2 MUXING
DDR2 MUXING
ICHSYNC#
BM_BUSY#
EXT_TS0#
PM
PM
EXT_TS1#/DPRSLPVR
THRMTRIP#
PWROK
RSTIN#
DREF_CLKN
DREF_CLKP
CLK
CLK
DREF_SSCLKN
DREF_SSCLKP
CLKREQB
945GMS
945GMS
C18
E18
G20
G18
J20
J18
K32
K31
C17
F18
A3
E31
G21
F26
PM_DPRSLPVR_IN
H26
J15
DELAY_VR_PWRGOOD
AB29
GMCH_RST#
W27
A27
A26
J33
H33
J22
CFG3
CFG5
PCI Express Graphics Lane
MCH_CFG5
FSB
533
400
0
CPU_BSEL0 5,23
CPU_BSEL1 5
CPU_BSEL2 5
12
12
R275
R275
R256
R256
@2.2K-1-04
@2.2K-1-04
2.2K-1-04
2.2K-1-04
0 = DMIX2
*
1=DMI X4 945GMS no support
MCH_SYNC# 15
PM_BM_BUSY# 15
R283R283
R45 100-04R45 100-04
NB_DOT_96CLK# 7
NB_DOT_96CLK 7
NB_LVDS_SSCLK# 7
NB_LVDS_SSCLK 7
MCH_CLK_REQ# 7
PM_DPRSLPVR 15,26
DELAY_VR_PWRGOOD 15,26
PLT_RST# 15,19,20,23,30
+1.5V
R49
PEG_COMP
+1.5V
R49
24.9-1-04
24.9-1-04
Disable SDVO
R264 2.2K-04R264 2.2K-04
SDVOCTRL_DATA
1 2
GCLK#7
GCLK7
NB_DCC_CLK13
NB_CRT_BLUE13
NB_CRT_GREEN13
NB_CRT_RED13
R286
R286
R284
R284
150-04
150-04
150-04
150-04
1 2
1 2
CHECK ?
NB_DCC_DATA13
NB_CRT_VSYNC13
NB_CRT_HSYNC13
R83
R83
R270 255-1-04R270 255-1-04
150-04
150-04
1 2
LCD_BL_EN13
LVDS_EDID_CLK13
LVDS_EDID_DAT13
NB_FP_EN13
1 2
R271 1.5K-1-04R271 1.5K-1-04
LVDSA_CLKN13
LVDSA_CLKP13
LVDSA_N113
LVDSA_N213
LVDSA_N313
LVDSA_P113
LVDSA_P213
LVDSA_P313
NB_CRT_IREF
LCTLA_CLK
LCTLB_CLK
L_IBG
AA26
H27
J27
Y26
H20
H22
A24
A23
E25
F25
C25
D25
F27
D27
H25
H30
G29
F28
E28
G28
H28
K30
K27
J29
J30
K29
D30
C30
A30
A29
G31
F32
D31
H31
G32
C31
F33
D33
F30
E33
D32
F29
U3F
U3F
SDVOCTRL_DATA
SDVOCTRL_CLK
GCLKN
GCLKP
DDCCLK
DDCDATA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
VSYNC
HSYNC
REFSET
LBKLT_CTRL
LBKLT_EN
LCTLA_CLK
LCTLB_CLK
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL
LACLKN
LACLKP
LBCLKN
LBCLKP
LADATAN0
LADATAN1
LADATAN2
LADATAP0
LADATAP1
LADATAP2
LBDATAN0
LBDATAN1
LBDATAN2
LBDATAP0
LBDATAP1
LBDATAP2
SDV0_TVCLKIN#
SDVO_FLDSTALL#
MISC
MISC
SDVO_TVCLKIN
SDVO_FLDSTALL
SDVO
SDVO
SDVOB_GREEN#
SDVOB_BLUE#
SDVOB_GREEN
LVDS VGA
LVDS VGA
TV_DCONSEL0
TV_DCONSEL1
945GMS
945GMS
EXP_COMPI
EXP_ICOMPO
SDVO_INT#
SDVO_INT
SDVOB_RED#
SDVOB_CLKN
SDVOB_RED
SDVOB_BLUE
SDVOB_CLKP
TVDAC_A
TVDAC_B
TVDAC_C
TV_REFSET
TV_IRTNA
TV
TV
TV_IRTNB
TV_IRTNC
R28
M28
N30
R30
T29
M30
P30
T30
P28
N32
P32
T32
N28
M32
P33
R32
A21
C20
E20
G23
B21
C21
D21
G26
J26
+1.8VS
B B
12
12
R238
R238
80.6-1-04
80.6-1-04
R28
R28
80.6-1-04
80.6-1-04
M_RCOMPN
M_RCOMPP
12
12
R40
R40
10K-1-04
10K-1-04
0.05A
R43
R43
10K-1-04
10K-1-04
M_VREF_MCH0
C99
C99
.1U-16-04Y-Z
.1U-16-04Y-Z
Add R?/R?/C? for Layout
A A
5
+1.8VS+1.8VS
12
R30
R30
10K-1-04
10K-1-04
0.05A
12
R32
R32
10K-1-04
10K-1-04
M_VREF_MCH1
C83
C83
.1U-16-04Y-Z
.1U-16-04Y-Z
4
Colse to NB
DELAY_VR_PWRGOOD
C406
C406
.1U-16-04Y-Z
.1U-16-04Y-Z
+3.3V
R91 10K-04R91 10K-04
1 2
R278 10K-04R278 10K-04
1 2
R279 10K-04R279 10K-04
1 2
R280 10K-04R280 10K-04
1 2
R281 10K-04R281 10K-04
1 2
R265 10K-04R265 10K-04
1 2
3
MCH_CLK_REQ#
LCTLA_CLK
LCTLB_CLK
LVDS_EDID_CLK
LVDS_EDID_DAT
NB_FP_EN
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
5008
5008
5008
Date: Sheet
Date: Sheet
2
Date: Sheet
G10ILX
G10ILX
G10ILX
NB(2)_DMI/VGA/MICS
NB(2)_DMI/VGA/MICS
NB(2)_DMI/VGA/MICS
1
of
of
of
933Wednesday, April 02, 2008
933Wednesday, April 02, 2008
933Wednesday, April 02, 2008
A
A
A
5
MA_DQ[63:0] 12
MA_BA[2:0]
D D
U3C
AC31
AB28
AE33
AF32
AC33
AB32
AB31
AE31
AH31
AK31
AK27
AH30
AH32
AF31
AH27
AF28
AG31
AG28
AG27
AN27
AM26
AN26
AH25
AG26
AM12
AM11
AK11
AG11
AG19
AG21
AG20
U3C
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
AL28
SA_DQ10
SA_DQ11
SA_DQ12
AL32
SA_DQ13
AJ28
SA_DQ14
AJ27
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
AJ32
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
AJ26
SA_DQ26
AJ25
SA_DQ27
AL27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
AL11
SA_DQ33
AH9
SA_DQ34
AK9
SA_DQ35
SA_DQ36
SA_DQ37
AM8
SA_DQ38
AK8
SA_DQ39
AG9
SA_DQ40
AF9
SA_DQ41
AF8
SA_DQ42
AK6
SA_DQ43
AF7
SA_DQ44
SA_DQ45
AJ6
SA_DQ46
AH6
SA_DQ47
AN6
SA_DQ48
AM6
SA_DQ49
AK3
SA_DQ50
AL2
SA_DQ51
AM5
SA_DQ52
AL5
SA_DQ53
AJ3
SA_DQ54
AJ2
SA_DQ55
AG2
SA_DQ56
AF3
SA_DQ57
AE7
SA_DQ58
AF6
SA_DQ59
AH5
SA_DQ60
AG3
SA_DQ61
AG5
SA_DQ62
AF5
SA_DQ63
SB_CAS#
SB_RAS#
SB_WE#
945GMS
945GMS
MA_DQ0
MA_DQ1
MA_DQ2
MA_DQ3
MA_DQ4
MA_DQ5
MA_DQ6
MA_DQ7
MA_DQ8
MA_DQ9
MA_DQ10
MA_DQ11
MA_DQ12
MA_DQ13
MA_DQ14
MA_DQ15
MA_DQ16
MA_DQ17
MA_DQ18
MA_DQ19
MA_DQ20
MA_DQ21
MA_DQ22
MA_DQ23
C C
B B
MA_DQ24
MA_DQ25
MA_DQ26
MA_DQ27
MA_DQ28
MA_DQ29
MA_DQ30
MA_DQ31
MA_DQ32
MA_DQ33
MA_DQ34
MA_DQ35
MA_DQ36
MA_DQ37
MA_DQ38
MA_DQ39
MA_DQ40
MA_DQ41
MA_DQ42
MA_DQ43
MA_DQ44
MA_DQ45
MA_DQ46
MA_DQ47
MA_DQ48
MA_DQ49
MA_DQ50
MA_DQ51
MA_DQ52
MA_DQ53
MA_DQ54
MA_DQ55
MA_DQ56
MA_DQ57
MA_DQ58
MA_DQ59
MA_DQ60
MA_DQ61
MA_DQ62
MA_DQ63
MA_DM[7:0]
MA_DQS[7:0] 12
MA_DQS#[7:0] 12
MAA_A[13:0] 12
MA_BA0
AK12
SA_BS_0
SA_BS_1
SA_BS_2
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_CAS#
SA_RAS#
DDR2 SYSTEM MEMORY
DDR2 SYSTEM MEMORY
SA_RCVENINB
SA_RCVENOUTB
SA_WEB
SB_BS_0
SB_BS_1
SB_BS_2
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
AH11
AG17
AB30
AL31
AF30
AK26
AL9
AG7
AK5
AH3
AC28
AJ30
AK33
AL25
AN9
AH8
AM2
AE3
AC29
AK30
AJ33
AM25
AN8
AJ8
AM3
AE2
AJ15
AM17
AM15
AH15
AK15
AN15
AJ18
AF19
AN17
AL17
AG16
AL18
AG18
AL14
AJ17
AK18
AN28
AM28
AH17
AH21
AJ20
AE27
AN20
AL21
AK21
AK22
AL22
AH22
AG22
AF21
AM21
AE21
AL20
AE22
AE26
AE20
MA_BA1
MA_BA2
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
MA_DQS0
MA_DQS1
MA_DQS2
MA_DQS3
MA_DQS4
MA_DQS5
MA_DQS6
MA_DQS7
MA_DQS#0
MA_DQS#1
MA_DQS#2
MA_DQS#3
MA_DQS#4
MA_DQS#5
MA_DQS#6
MA_DQS#7
MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
Z1001
Z1002
MA_CAS#
MA_RAS#
TP1TP1
TP2TP2
MA_WE#
4
+1.05V +1.5V
T25
R25
P25
N25
M25
P24
N24
M24
Y22
W22
V22
U22
T22
R22
P22
N22
M22
Y21
W21
V21
U21
T21
R21
P21
N21
M21
Y20
W20
V20
U20
T20
R20
P20
N20
M20
Y19
P19
N19
M19
Y18
P18
N18
M18
Y17
P17
N17
M17
Y16
P16
N16
M16
Y15
P15
N15
M15
Y14
W14
V14
U14
T14
R14
P14
N14
M14
AB10
AA10
T10
R10
P10
N10
L10
D1
M10
A18
+1.05V
U3H
U3H
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VTT_NCTF1
VTT_NCTF2
VTT_NCTF3
VTT_NCTF4
VTT_NCTF5
VTT_NCTF6
MCH_RSVD3
MCH_RSVD4
MCH_RSVD5
MCH_RSVD6
945GMS
945GMS
3
NCTF
NCTF
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8
VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36
VCCAUX_NCTF37
VCCAUX_NCTF38
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12
VSS_NCTF13
VSS_NCTF14
VSS_NCTF15
VSS_NCTF16
VSS_NCTF17
VSS_NCTF18
VSS_NCTF19
CFG19
MCH_RSVD10
MCH_RSVD11
MCH_RSVD12
MCH_RSVD13
MCH_RSVD14
MCH_RSVD15
MCH_RSVD16
MCH_RSVD17
MCH_RSVD18
MCH_RSVD19
MCH_RSVD20
MCH_RSVD21
MCH_RSVD22
MCH_RSVD23
MCH_RSVD24
MCH_RSVD25
AD25
AC25
AB25
AD24
AC24
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
K14
AD13
Y13
W13
V13
U13
T13
R13
P13
N13
M13
AD12
Y12
W12
V12
U12
T12
R12
P12
N12
M12
AD11
AD10
K10
AN33
AA25
V25
U25
AA22
AA21
AA20
AA19
AA18
AA17
AA16
AA15
AA14
AA13
A4
A33
B2
AN1
C1
K28
K25
K26
R24
T24
K21
K19
K20
K24
K22
J17
K23
K17
K12
K13
K16
K15
2
U3G
U3G
AM33
AL33
AN32
AN31
AN19
AM19
AL19
AK19
AH19
W33
NC1
NC2
NC3
C33
NC4
B33
NC5
NC6
A32
NC7
NC8
W28
NC9
V27
NC10
W29
NC11
J24
NC12
H24
NC13
W32
NC14
G24
NC15
F24
NC16
E24
NC17
D24
NC18
K33
NC19
A31
NC20
E21
NC21
C23
NC22
NC23
NC24
NC25
NC26
AJ19
NC27
NC28
AN3
NC29
Y9
NC30
J19
NC31
H19
NC32
G19
NC33
F19
NC34
E19
NC35
D19
NC36
C19
NC37
B19
NC38
A19
NC39
Y8
NC40
G16
NC41
F16
NC42
E16
NC43
D16
NC44
C16
NC45
B16
NC46
AN2
NC47
A16
NC48
Y7
NC49
AM4
NC50
AF4
NC51
AD4
NC52
AL4
NC53
AK4
NC54
W31
NC55
AJ4
NC56
AH4
NC57
AG4
NC58
AE4
NC59
AM1
NC60
945GMS
945GMS
NC
NC
MCH_RSVD26
MCH_RSVD27
MCH_RSVD28
MCH_RSVD29
MCH_RSVD30
MCH_RSVD31
MCH_RSVD32
MCH_RSVD33
MCH_RSVD34
MCH_RSVD35
MCH_RSVD36
MCH_RSVD37
MCH_RSVD38
MCH_RSVD39
MCH_RSVD40
MCH_RSVD41
MCH_RSVD42
NC61
NC62
NC63
NC64
NC65
NC66
NC67
NC68
NC69
NC70
NC71
NC72
W30
Y6
AL1
Y5
Y10
W10
W25
V24
U24
V10
U10
K18
Y25
Y24
AB22
AB21
AB19
AB16
AB14
AA12
W24
AA24
AB24
AB20
AB18
AB15
AB13
AB12
AB17
1
A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
5008
5008
5008
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
G10ILX
G10ILX
G10ILX
NB DDR INTERFACE/VSS
NB DDR INTERFACE/VSS
NB DDR INTERFACE/VSS
1
of
of
of
10 33Wednesday, April 02, 2008
10 33Wednesday, April 02, 2008
10 33Wednesday, April 02, 2008
A
A
A
Loading...