8
Digitally signed by
fdsf
DN: cn=fdsf,
o=fsdfsd, ou=ffsdf,
email=fdfsd@fsdff,
c=US
Date: 2010.01.06
06:11:39 +07'00'
7
6
5
4
3
2
1
A901 SCHEMATICS
D D
01.THIS PAGE
02.FCPGA370-1
03.FCPGA370-2
04.CLOCK GENERATOR
05.SIS630S-1 HOST/MEMORY
06.SIS630S-2 PCI/IDE
07.SIS630S-3 VGA/AGP
08.SIS630S-4 SOUTH BRIDGE
09.SIS630S-5 POWER
10.DIMM
C C
11.LVDS TRANSMITTER & LCD CONN.
12.VIDEO BRIDGE(SIS301DH)
13.CRT & S-VIDEO
14.HDD & CDROM CONN.
15.AC'97 CODEC
16.OP AMPLIFIER & AUDIO JACK
17.RJ11/RJ45 JACKS & MODEM CARD
18.REALTEK RTL8100 ETHERNET LAN
19.W83L517D LPC SUPER IO
B B
20.COM & LPT PORTS
21.KEYBOARD CONTROLLER
22.ROM & POWER GOOD
23.RTC BATTERY & POWER SW
PCB NO. : KK0A901011020
24.USB PORTS
25.CPU VCORE/VTT/VCC2.5V
REV. : 2.0
26.VCC3/VCC5
27.VCC1.8V/AUX POWERS
P.leader
Check by Design byAppr.by
28.VCC3_DIMM & VTTPWGD
A A
8
29.REVISION HISTORY
VER
DATE
VER
DATE
28 15
2/8 2/8 2/8 2/8 2/8 2/8 2/8 2/8 2/8 2/8 2/8
2/8
21PAGE 26 292823 2422 25
2/8 2/8 2/8 2/8 2/8 2/8 2/8 2/8 2/8
7
9 16510 173 11 184 19126
2.02.02.02.02.02.02.02.02.02.02.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0
27
2.02.02.02.02.02.02.02.02.0
6
13 20PAGE 1 7 14
2/8 2/8 2/8 2/8 2/8 2/8 2/8 2/8
5
4
ALPHA-TOP CORP.
Title
A901 MAIN BOARD
Size Document Number Rev
B
A901-1-4-01 2.0
3
Date: Sheet
2
129Tuesday, May 28, 2002
of
1
8
HD[0..63]
HD[0..63]5
D D
C C
B B
HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
HD8
HD9
HD10
HD11
HD12
HD13
HD14
HD15
HD16
HD17
HD18
HD19
HD20
HD21
HD22
HD23
HD24
HD25
HD26
HD27
HD28
HD29
HD30
HD31
HD32
HD33
HD34
HD35
HD36
HD37
HD38
HD39
HD40
HD41
HD42
HD43
HD44
HD45
HD46
HD47
HD48
HD49
HD50
HD51
HD52
HD53
HD54
HD55
HD56
HD57
HD58
HD59
HD60
HD61
HD62
HD63 HA3
7
VCORE
AA37
AA5
AB2
AB34
AD32
AE5
AF2
AF34
AH24
W1
D#0
T4
D#1
N1
D#2
M6
D#3
U1
D#4
S3
D#5
T6
D#6
J1
D#7
S1
D#8
P6
D#9
Q3
D#10
M4
D#11
Q1
D#12
L1
D#13
N3
D#14
U3
D#15
H4
D#16
R4
D#17
P4
D#18
H6
D#19
L3
D#20
G1
D#21
F8
D#22
G3
D#23
K6
D#24
E3
D#25
E1
D#26
F12
D#27
A5
D#28
A3
D#29
J3
D#30
C5
D#31
F6
D#32
C1
D#33
C7
D#34
B2
D#35
C9
D#36
A9
D#37
D8
D#38
D10
D#39
C15
D#40
D14
D#41
D12
D#42
A7
D#43
A11
D#44
C11
D#45
A21
D#46
A15
D#47
A17
D#48
C13
D#49
C25
D#50
A13
D#51
D16
D#52
A23
D#53
C21
D#54
C19
D#55
C27
D#56
A19
D#57
C23
D#58
C17
D#59
A25
D#60
A27
D#61
E25
D#62
F16
D#63
VCCCORE1
VCCCORE2
VCCCORE3
GND1
GND2
GND3
A37
AB32
AC33
VCCCORE4
VCCCORE5
VCCCORE6
GND4
GND5
GND6
AC5
AD2
AD34
VCCCORE7
VCCCORE8
VCCCORE9
GND7
GND8
GND9/NC
AF32
AF36
AG5
AH32
AH36
AJ13
AJ17
VCCCORE10
VCCCORE11
VCCCORE12
GND10
GND11
GND12
AH2
AH34
AJ11
AJ15
6
AJ21
AJ25
AJ29
AJ5
VCCCORE13
VCCCORE14
VCCCORE15
VCCCORE16
GND13
GND14
GND15
GND16
AJ19
AJ23
AJ27
AJ3
AJ9
AK2
AK34
AM12
VCCCORE17
VCCCORE18
VCCCORE19
VCCCORE20
VID4
VID25
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
GND17/RSV
GND18
GND19/VTT|PWRGD
GND20/RSV
AJ7
AK4
AL1
AL3
5
AM16
AM20
AM24
AM28
AM32
AM4
AM8
B10
B14
B18
B22
B26
B30
B34B6C3
D20
D24
D28
D32
VCCCORE21
VCCCORE22
VCCCORE23
VCCCORE24
VCCCORE25
VCCCORE26
VCCCORE27
VCCCORE28
VCCCORE29
VCCCORE30
VCCCORE31
VCCCORE32
VCCCORE33
VCCCORE34
VCCCORE35
VCCCORE36
VCCCORE37
VCCCORE38
VCCCORE39
VCCCORE40
VCCCORE41
VRM 8.5
VID3 VID2 VID1 VID0 VCC_CORE
0
1
GND21
GND22
AM10
GND23
AM14
GND24
AM18
GND25
AM22
GND26
AM26
GND27
AM30
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
GND28
AM34
GND29
AM6
AN3
GND30/DYN|OE
GND31
B12
GND32
B16
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
GND33
B20
GND34
B24
GND35
B28
B32B4B8
GND36
GND37
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
GND38
D18D2D22
GND39
GND40
GND41
D36D6E13
E17E5E9
VCCCORE42
VCCCORE43
VCCCORE44
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
GND42
GND43
GND44
D26
D30
D34D4E11
F14F2F22
VCCCORE45
VCCCORE46
VCCCORE47
VCCCORE48
1.05/1.075 [V]
1.10/1.125 [V]
1.15/1.175 [V]
1.20/1/275 [V]
1.25/1.275 [V]
1.30/1.325 [V]
1.35/1.375 [V]
1.40/1.475 [V]
1.45/1.475 [V]
1.50/1.575 [V]
1.55/1.575 [V]
*
1.60/1.675 [V]
*
1.65/1.675 [V]
*
1.70/1.775 [V]
*
1.75/1.775 [V]
*
1.80/1.875 [V]
* Joshua
GND45
GND46
GND47
GND48
E15
E19E7F20
F26
F30
F34F4H32
VCCCORE49
VCCCORE50
VCCCORE51
VCCCORE52
GND49
GND50
GND51
GND52
F24
F28
F32
4
H36J5K2
VCCCORE53
VCCCORE54
VCCCORE55
VCCCORE56
GND53
GND54
GND55
GND56
F36G5H2
H34
K32
K34
M32N5P2
VCCCORE57
VCCCORE58
VCCCORE59
VCCCORE60
GND57
GND58
GND59
GND60
K36L5M2
M34
P34
R32
VCCCORE61
VCCCORE62
VCCCORE63
VCCCORE64
GND61
GND62
GND63
GND64
P32
P36Q5R34
R745
0
R36S5T2
T34
VCCCORE65
VCCCORE66
VCCCORE67
VCCCORE68
GND65
GND66
GND67
GND68
T32
T36U5V2
3
VTT
V32
V36
W5
X34
VCCCORE69
VCCCORE70
VCCCORE71
VCCCORE72
GND69
GND70
GND71
GND72
Z34
Z2
X32
V34Y5Y37
C700
0.1UF
Y35
Z32
VCCCORE74
VCCCORE75
VCCCORE73/VTT
GND73
GND74
GND75
GND76
X36
CPUVREF
C701
C702
0.1UF
VREF0
VREF1
VREF2
VREF3
VREF4
VREF5
VREF6
VREF7/CMOSREF
BP#[2]
BP#[3]
BPM#[0]
BPM#[1]
RS#[2]
RS#[1]
RS#[0]
REQ#[4]
REQ#[3]
REQ#[2]
REQ#[1]
REQ#[0]
A#[35]/RSVD
A#[34]/RSVD
A#[33]/RSVD
A#[32]/RSVD
A#[31]
A#[30]
A#[29]
A#[28]
A#[27]
A#[26]
A#[25]
A#[24]
A#[23]
A#[22]
A#[21]
A#[20]
A#[19]
A#[18]
A#[17]
A#[16]
A#[15]
A#[14]
A#[13]
A#[12]
A#[11]
A#[10]
A#[9]
A#[8]
A#[7]
A#[6]
A#[5]
A#[4]
A#[3]
PGA370-1_TU
0.1UF
C703
PGA1
E33
F18
K4
R6
V6
AD6
AK12
AK22
G33
E37
C35
E35
AK28
AH22
AH26
AL17
AL19
AH18
AH16
AK18
AF4
W3
AC1
X6
AD4
AA3
Z4
AK6
AA1
Y3
AF6
AB4
AB6
AE3
AJ1
AC3
AG3
Z6
AE1
AN7
AL5
AK14
AL7
AN5
AK10
AH6
AL9
AH10
AL15
AN9
AH8
AH12
AK8
0.1UF
2
C770
1000PF
R701
150 1%
CPUVREF
RS-2
RS-1
RS-0
HREQ-4
HREQ-3
HREQ-2
HREQ-1
HREQ-0
HA31
HA30
HA29
HA28
HA27
HA26
HA25
HA24
HA23
HA22
HA21
HA20
HA19
HA18
HA17
HA16
HA15
HA14
HA13
HA12
HA11
HA10
HA9
HA8
HA7
HA6
HA5
HA4
VTT
Use 0603 Packages and
distribute within 500
mils of CPUVREF inputs
R700
(1 cap for every 1 inputs)
75 1%
C704
C705
0.1UF
0.1UF
PIN_AK22
0.1uF
RS-2 5
RS-1 5
RS-0 5
HREQ-4 5
HREQ-3 5
HREQ-2 5
HREQ-1 5
HREQ-0 5
HA[3..31]
HA[3..31] 5
C707
1
CPUVREF
C706
0.1UF
VCMOS1.5V
C771
1000PF
R702
75 1%
R703
150 1%
C772
1000PF
PIN_AF36
VCC5
VCC5
VTT
A A
PIN_AF36
R709
1K
MMBT3904
8
Q32
R708
2.7K
Cu+/Tu-
R706
2.7K
Cu-/Tu+
Q31
2N7002
Cu+/Tu-
7
R746
0R
Cu-/Tu+ 3,4
6
VTT
R707
0
R705
1K
R704
1K
VTT_PWRGD 28
C445
VCC3
THERMDP
THERMDN
R283 1K
R284 1K
2200PF
THERMDP3
THERMDN3
5
C444
0.1UF
U28
12
3
DXP
4
DXN
6
ADD1
10
ADD0
1
NC1
5
NC2
9
NC3
GND
7
4
2
15
VCC
STBY
SMBCLK
SMBDATA
ALERT
NC4
NC5
GND
8
MAX1617A_QSOP16
14
12
11
13
16
R282
10K
VCC3
SMCLK 3,21
SMDA 3,21
THRM- 3,21
R285 10K
3
ALPHA-TOP CORP.
VCC3
Title
FCPGA370-1
Size Document Number Rev
A901-1-4-01 2.0
B
Date: Sheet
2
229Tuesday, May 28, 2002
1
of
8
VCMOS1.5V
R727
56
330
330
1 2
1
3
5
7
R720
CPURST-5
VCMOS1.5V
150
150
2
4
6
8
2
4
6
8
C752
0.1UFR
2
4
6
8
1UF-0805
VTT
R
VTT
RN40
470 8P4R
RN41
470 8P4R
R733
R712
330
PICD0
PICD1
FLUSHCPUINITSTPCLKSMI-
SMI-8
IGNNEA20M-
A20M-8
NMI
NMI8
INTR
INTR8
CPUSLP-
FERR-
FERR-8
RN44
10KRX4
R734 10KR
8
ITPREQ-
C728
56PF
C729
56PFR
C730
56PFR
C731 56PFR
C732
56PFR
C733
56PFR
C734
56PFR
C735 56PFR
VCC2.5V
R724
R725
1
3
5
7
1
3
5
7
R731
R732
C753 3300PFR
THERMDP
THERMDN
VCC3
D D
SMISTPCLKCPUSLPCPUINITINTR
FERRIGNNE-
C C
A20M-
B B
CPURST-5
CPUINIT-8
STPCLK-8
IGNNE-8
A A
VCORE
C708
1UF-0805
R716
150
R722
0
VCC3
30KR 1%
7
C709
1UF-0805
THERMDP2
THERMDN2
CPUCLK4
C737
10pF
7
C711
C710
C712
1UF-0805
1UF-0805
1UF-0805
R715
1K
ITPREQ-
ITPPRDY-
PICCLK
PICCLK4
PICD0
PICD1
A20M-
A20M-8
STPCLKCPUSLPSMI-
SMI-8
CPUINITFERR-
FERR-8
IGNNE- HTRDY-
IGNNE-8
INTR
INTR8
NMI
NMI8
THERMDP
THERMDN
R721 1K
VTT
R723 14
VCC2.5V
R726
150 1%
R729
150 1%
CPUPWGD22
C736
18PFR
STPCLK-8
CPUINIT-8
Change form MAX1617
U50
20
VCC
19
CPUT1/PII1
18
CUPT2/PII2
17
VREF
16
VCORE/GPIO16
15
+1.5V/GPIO15
14
+2.5VIN/GPIO14
13
GPIO13
12
GND
W83L785RR SSOP20
C713
1UF-0805
VTT2
CLKREF
FAININ1/GPIO1
FAININ2/GPIO2
C714
1UF-0805
C739
4.7uF_1206
PWMOUT1
PWMOUT2
GPIO5
GPIO6
SMI#/GPIO7
OVT#GPIO8
6
C715
1UF-0805
AN35
AN37
AN33
AL33
AK32
J37
A35
J33
J35
L35
AE33
AG35
AH30
AJ35
AG33
AC35
AG37
AE35
M36
L37
AK26
AL31
AL29
AH28
W37
X4
AH4
N33
N35
N37
Q33
Q35
Q37
Y1
W35
R2
L33
G37
X2
F10
Y33
RN42
10KRX4
SCL
SDATEMP_FAULT/GPIO1
6
C716
C717
1UF-0805
1UF-0805
TDI
TDO
TRST#
TCK
TMS
PREQ#
PRDY#
PICCLK
PICD[0]
PICD[1]
A20M#
STPCLK#
SLP#
SMI#
INIT#
FERR#
IGNNE#
IERR#
INTR/LINT[0]
NMI/LINT[1]
PWRGOOD
THERMDP
THERMDN
THERMTRIP#
BCLK
RESET2#/VSS
RSVD/RESET#
RSVD
RSVD
RSVD/NCHCTRL
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD/VTT
RSVD/BR1#
RSVD
GND/CLKREF
PGA2
PGA370-2_TU
VCC3
135
246
1
2
3
4
5
6
7
8
9
1011
C718
1UF-0805
7
8
C720
C719
1UF-0805
1UF-0805
C29
E29
E31
A29
RSVD/DEP5#
RSVD/DEP6#
RSVD/DEP7#
135
7
246
8
C721
1UF-0805
C31
C33
A31
A33
RSVD/DEP1#
RSVD/DEP4#
RSVD/DEP3#
RSVD/DEP2#
RN43
10KRX4
5
C722
1UF-0805
AM2
GND/RSVD
RSVD/DEP0#
FANON
THRM-
SMCLK
SMDA
5
C724
C723
1UF-0805
AK16
AH20
AA33
AA35
RSVD/VTT
RSVD/VTT
RSVD/VTT
RSVD/VTT
FANON 21
THRM- 2,21
SMCLK 2,21
SMDA 2,21
C725
1UF-0805
AL13
AL21
AN11
RSVD/VTT
RSVD/VTT
AN15
AN21
E23
RSVD/VTT
RSVD/VTT
RSVD/VTT
VCORE
C740
+
4.7UF/6.3V-A
G35
S33
S37
RSVD/VTT
RSVD/VTT
RSVD/VTT
VCORE
4.7UF/6.3V-A
4
VTT2
U35
U37
RSVD/VTT
RSVD/VTT
RSVD/VTT
C741
+
4.7UF/6.3V-A
C766
+
4
VTT
VCC_1.5V/VTT
VCC_2.5V
VCC_CMOS/VTT
VID[0]
VID[1]
VID[2]
VID[3]
J-VID[4]/GND
BSEL0/BSEL
BSEL1/GND
J-BSEL1/RSVD
BNR#
BPRI#
TRDY#
DEFER#
LOCK#
DRDY#
HITM#
HIT#
DBSY#
ADS#
FLUSH#
BREQ0#
RSVD/RSP#
RSVD/BERR#
RSVD/BINIT#
RSVD/AP0#
RSVD/AP1#
RSVD/AERR#
RSVD/RP#
VCOREDET
CPUPRES#
EDGCTRL/VRSEL
PLL1
PLL2
RSVD/RTTCTRL
RSVD/SLEWCTRL
C742
+
4.7UF/6.3V-A
C767
+
4.7UF/6.3V-A
AD36
Z36
AB36
AL35
AM36
AL37
AJ37
AK36
AJ33
AJ31
AK30
AH14
AN17
AN25
AN19
AK20
AN27
AL23
AL25
AL27
AN31
AE37
AN29
AC37
V4
B36
AL11
AN13
AK24
AN23
E21
C37
AG1
W33
U33
S35
E27
C743
+
4.7UF/6.3V-A
C768
+
4.7UF/6.3V-A
3
VID0
VID1
VID2
VID3
VID4
BSEL0
BSEL1
BNRBPRI-
DEFERHLOCKDRDYHITMHITDBSYADSFLUSH-
BREQ0-
PIN_AG1
PLL1
PLL2
RTTCTRL
SLEWCTRL
C744
+
4.7UF/6.3V-A
3
VTT
R717 1K_R
R718
C738
33uF_SMD
R728 56 1%
R730 110 1%
C745
+
4.7UF/6.3V-A
2
VCORE
12
C726
+
330UFR/2.5V-D
VTT2
CB31
0.1uF
VID0 25
VID1 25
VID2 25
VID3 25
VID4 25
BNR- 5
BPRI- 5
HTRDY- 5
DEFER- 5
HLOCK- 5
DRDY- 5
HITM- 5
HIT- 5
DBSY- 5
ADS- 5
BREQ0- 5
VCC3
1K_R
1 2
L70
4.7uH_SMD
C746
+
4.7UF/6.3V-A
ALPHA-TOP CORP.
Title
FCPGA370-2
Size Document Number Rev
A901-1-4-01 2.0
B
Date: Sheet
VCORE
C747
+
4.7UF/6.3V-A
2
Cu-/Tu+2,4
C748
+
4.7UF/6.3V-A
12
C727
+
330UFR/2.5V-D
CB32
0.1uF
VTT
CB30 0.1UF
CB35
CB36 0.1UF
CB37 0.1UF
CB38 0.1UF
CB39 0.1UF
CB40 0.1UF
CB41 0.1UF
CB42
CB43
CB44 0.1UF
CB45 0.1UF
CB46 0.1UF
CB47 0.1UF
C760 0.1UF
C761 0.1UF
C762 0.1UF
C763 0.1UF
C764 0.1UF
C765 0.1UF
C749
+
4.7UF/6.3V-A
VTT
VTT TERMINATION VLOTAGENOTE:
NEAR CPU
CB33
0.1uF
Q33
FDN335N
R719
1K
0.1UF
0.1UF
0.1UF
C750
+
4.7UF/6.3V-A
329Tuesday, May 28, 2002
1
PIN_AG1
of
1
CB34
0.1uF
C751
+
4.7UF/6.3V-A
0
0
8
7
6
5
4
3
2
1
VCC3_CLK
C535
0.1UF
L44
FCM2012K-600-0805
1
15
19
27
30
36
42
6
3
16
22
33
39
10
47
44
24
23
CLK1
ICS9248-135
VDDREF
VDD
VDD
VDD
VDD
VDD
VDD
VDDPCI
GNDREF
GND
GND
GND
GND
GNDPCI
VDDLCPU
GNDL
SCLK
SDATA
X1
Y5
4
14.318MHz_49S
C412
10PF
CPUCLK_F
CPUCLK1
CPUCLK2
FS1/PCICLK_F
FS2/PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
FS3/REF0
REF1
CPU2.5_3.3#/24_48MHZ
FS0/48MHZ
SDRAM_F1
SDRAM_F0
SDRAM7
SDRAM6
SDRAM5
SDRAM4
SDRAM3
SDRAM2
SDRAM1
SDRAM0
PCI_STOP#
CPU_STOP#
PD#
SDRAM_STOP#
X2
5
C413
10PF
46
45
43
7
8
9
11
12
13
14
2
48
25
26
41
40
38
37
35
34
32
31
29
28
21
20
18
17
D D
C383
0.1UF
C388
+
10UF/10V-A
VCC2.5V
C C
10UF/10V-A
VTTPG_CLK28
B B
C390
1000PF
L45
FCM2012K-600-0805
C404
+
VCC3
Q40
FDN357N
C384
0.1UF
1000PF
C406
0.1UF
C391
VCC3_CLK
SMBC8,10
SMBD8,10
C385
0.1UF
C407
1000PF
VCCLK
1000PF
C392
C408
0.1UF
C386
0.1UF
C393
1000PF
C409
1000PF
FS0~FS3 AND CPU2.5_3.3- HAVE INTERNAL PULL-DOWN 120K TO GND
PD- HAS INTERNAL PULL-UP 120K TO VCC3
REF0 AND 48MHz HAS DOUBLE STRENGTH
VCC3
FS1
FS2
FS3
CPU2.5_3.3FS0
PCISTPPD-
SDRAMSTP-
Damping Resistors
Place near to the
Clock Generator
R260
R261
R262
R263 33
R264
R265
R749 33
R266 33
R267 33
R268
R269
R270
R271
R272
R273
R274
VCC3
R280 10K
630SCCLK
22
CPUCLK
22
630PCLK
33
SIOPCLK
33
33
APICCLK
VOSCI
VBRCLK
SIO48M
22
UCLK48M
22
630SDCLK
22
SDCLK3
22
SDCLK2
22
SDCLK1
22
SDCLK0
22
630SCCLK 5
CPUCLK 3
630PCLK 6
SIOPCLK 19
VGACLK 7
PCILAN 18
VOSCI 7
VBRCLK 12
SIO48M 19
UCLK48M 8
630SDCLK 5
SDCLK3 10
SDCLK2 10
SDCLK1 10
SDCLK0 10
CPUSTP- 8
FSS2
FSS1
11
1
3
5
7
9
S1
JUMPERX6
By-Pass Capacitors
Place near to the Clock Gernerator
630SCCLK
630PCLK
VOSCI
SIO48M
UCLK48M
SDCLK3
SDCLK2
SDCLK0
630SDCLK
SDCLK1
CPUCLK
VGACLK
SIOPCLK
PCILAN
VBRCLK
APICCLK
VCC5
R497
10K
2
4
6
8
10
12
PID0
PID1
PID2
R281 10K
C381 10PFR
C382 10PF
C389 10PF
C394 10PF
C395 10PF
C396 10PFR
C397 10PF
C398 10PF
C399 10PF
C400 18PF
C402 33PF
C403 10PF
C405 10PF
C411 10PF
C410 10PF
C773 10PF
PID[0..2]
VCC3
KBSEL 21
PID[0..2] 8
(1)OFF <-----------------------> ON(0)
PCI
(MHz)
33.3
33.3
33.3
33.3
FS2
R527 0
FS1
R528 0
CLOSE TO CLK GEN.
4
APICCLK
A A
8
R750
33
D
Cu-/Tu+2,3
R751
130
Q41
2N7002
7
PICCLK 3
(FS3)
(FS2)
0011
0011
SIS630S CLOCK
(FS1) SDRAM
0
1110
6
R275 10K
R276 10K
R277 10K
R278 10K
R279 10K
(FS0)
CPU
(MHz)
100001
133.3
100
133.3
CPU2.5_3.3PDPCISTP-
SDRAMSTP-
FS0
(MHz)
100
100
133.3
133.3
5
FSS2
FSS1
FS1/FS2
0
1
NOTE: FS1 CONTROLS CPU FREQUENCY
FS2 CONTROLS DRAM FREQUENCY
3
FREQUENCY
100
133
ALPHA-TOP CORP.
Title
CLOCK GENERATOR
Size Document Number Rev
B
A901-1-4-01 2.0
Date: Sheet
429Tuesday, May 28, 2002
2
of
1
Clock Generator
8
VTT
7
VTT
6
5
4
3
2
1
R247
75 1%
R249
D D
C C
B B
150 1%
CB5
0.001UF
GTLVREFA
CB7
0.001UF
630SCCLK
630SCCLK4
CPURST-3
HLOCK-
HLOCK-3
DEFER-
DEFER-3
HTRDY-
HTRDY-3
CPURST-
BPRI-
BPRI-3
BREQ0-
BREQ0-3
HITM-3
DRDY-3
DBSY-3
RS-2
RS-22
RS-1
RS-12
RS-0
RS-02
ADS-
ADS-3
HITM-
HIT-
HIT-3
DRDYDBSY-
BNR-
BNR-3
HREQ-4
HREQ-3
HREQ-2
HREQ-1
HREQ-0
HA31
HA30
HA29
HA28
HA27
HA26
HA25
HA24
HA23
HA22
HA21
HA20
HA19
HA18
HA17
HA16
HA15
HA14
HA13
HA12
HA11
HA10
HA9
HA8
HA7
HA6
HA5
HA4
HA3
GTLVREFA
GTLVREFB
R248
75 1%
150 1%
R250
G27
G28
M24
G29
M25
M26
M27
M28
M29
P29
A24
B24
P26
V29
T29
R26
P25
R29
V26
R25
U29
U26
R24
U28
T27
U27
P28
R27
T26
T28
R28
P27
H26
J26
H29
H27
K27
H28
J29
J27
K26
J28
K28
L26
L27
L28
K29
L29
N25
N28
N29
N26
P24
N27
CB6
0.001UF
GTLVREFB
CB8
0.001UF
GTLVREFA
GTLVREFB
VSSQA
VSSQB
CPUCLK
HLOCK#
DEFER#
HTRDY#
CPURST#
BPRI#
BREQ0#
RS#[2]
RS#[1]
RS#[0]
ADS#
HITM#
HIT#
DRDY#
DBSY#
BNR#
HREQ#[4]
HREQ#[3]
HREQ#[2]
HREQ#[1]
HREQ#[0]
HA#[31]
HA#[30]
HA#[29]
HA#[28]
HA#[27]
HA#[26]
HA#[25]
HA#[24]
HA#[23]
HA#[22]
HA#[21]
HA#[20]
HA#[19]
HA#[18]
HA#[17]
HA#[16]
HA#[15]
HA#[14]
HA#[13]
HA#[12]
HA#[11]
HA#[10]
HA#[9]
HA#[8]
HA#[7]
HA#[6]
HA#[5]
HA#[4]
HA#[3]
MD63
T25
MD63
MD62
W28
MD62
MD61
W27
MD61
MD60
Y29
MD60
MD59
Y27
MD59
MD58
Y26
MD58
MD57
AA28
MD56
AA26
MD57
MD56
MD55
AB28
MD55
MD54
AB26
MD54
MD53
AC29
MD53
MD52
AC27
MD52
MD51
AC25
MD51
MD50
AD28
MD50
MD49
AD27
MD49
MD48
Y25
MD48
MD47
AG22
MD47
MD46
AJ22
MD46
MD45
AF21
MD45
MD44
AH21
MD44
MD43
AF20
MD43
MD42
AH20
MD42
MD41
AJ20
MD41
MD40
AG19
MD40
MD39
AJ19
MD39
MD38
AF18
MD37
AH18
MD38
MD36
AF17
MD37
MD35
AG17
MD36
MD34
AJ17
MD35
MD34
MEMORY
630S-1
HOST
MD33
AF16
MD33
MD32
AH16
MD32
MD31
T24
MD31
MD30
W29
MD30
MD29
U25
MD29
MD28
W26
MD28
MD27
Y28
MD27
MD26
V25
MD26
MD25
AA29
MD25
MD24
AA27
MD24
MD23
AB29
MD23
MD22
AB27
MD22
MD21
V24
MD21
MD20
AC28
MD20
MD19
AC26
MD19
MD18
AD29
MD18
MD17
W25
MD17
MD16
AD26
MD16
MD15
AF22
MD15
MD14
AH22
MD14
MD13
AE23
MD13
MD12
AG21
MD12
MD11
AJ21
MD11
MD10
AG20
MD10
MD9
AE22
MD9
MD8
AF19
MD8
MD7
AH19
MD7
MD6
AE18
MD6
MD5
AG18
MD5
MD4
AJ18
MD4
MD3
AD20
MD3
MD2
AH17
MD2
MD1
AE21
MD1
MD0
AG16
MD0
CSA#[5]
CSA#[4]
CSA#[3]
CSA#[2]
CSA#[1]
CSA#[0]
CSB#[5]
CSB#[4]
CSB#[3]
CSB#[2]
CSB#[1]
CSB#[0]
MA[14]
MA[13]
MA[12]
MA[11]
MA[10]
MA[9]
MA[8]
MA[7]
MA[6]
MA[5]
MA[4]
MA[3]
MA[2]
MA[1]
MA[0]
DQM[7]
DQM[6]
DQM[5]
DQM[4]
DQM[3]
DQM[2]
DQM[1]
DQM[0]
WE#
SRAS#
SCAS#
SDCLK
CKE
MD[0..63]
CHIPSET5
AE24
AG24
AF24
AJ25
AH25
AG25
AF28
AF29
AA25
AE25
AE26
AE27
AB25
AF27
AF26
AG29
AG28
AG27
AH28
AB24
AH27
AD24
AJ27
AG26
AH26
AJ26
AF25
Y24
AE28
AF23
AG23
AD25
AE29
AJ24
AD22
AH23
AH24
AJ23
AJ16
E9
MD[0..63] 10
MA[0..14]
DQM[0..7]
RP25 10X4
1 8
2 7
3 6
4 5
R251 10
R252 10
R253 10
RP49
1 8
2 7
10X4
3 6
4 5
RP50
1 8
10X4
2 7
3 6
4 5
RP51
1 8
2 7
3 6
10X4
4 5
RP23 10X4
1 8
2 7
3 6
4 5
1 8
2 7
3 6
4 5
RP21 10X4
10
R254
10
R255
R256
10
630SDCLK
12
R257
8.2K
CSB-0
CSB-1
CSA-1
CSA-0
RAMW-
SRASSCAS-
Q18
D
G
SD
2N7002
MA[0..14] 10
DQM[0..7] 10
CSA-[0..1]
CSB-[0..1]
MA14
MA13
MA12
MA11
MA10
MA9
MA8
MA3
MA2
MA1
MA0
MA7
MA6
MA5
MA4
DQM1
DQM5
DQM0
DQM4
DQM3
DQM7
DQM2
DQM6
RAMW- 10
SRAS- 10
SCAS- 10
630SDCLK 4
CKE_AUX 28
CKE 22
CSA-[0..1] 10
CSB-[0..1] 10
VCC12
12
R303
33K
CPUAVDD
HD#62
HD#63
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
HD#53
HD#52
HD#51
HD#50
HD#49
HD#48
HD#47
HD#46
HD#45
HD#44
HD#43
HD#42
HD#41
HD#40
HD#39
HD#38
HD#37
HD#36
HD#35
HD#34
HD#33
HD#32
HD#31
HD#30
HD#29
HD#28
HD#27
HD#26
HD#25
HD#24
HD#23
HD#22
HD#21
HD#20
HD#19
HD#18
HD#17
HD#16
HD#15
HD#14
HD#13
HD#12
HD#11
HD#10
HD#9
HD#8
HD#7
HD#6
HD#5
HD#4
HD#3
HD#2
HD#1
L25
HD5
K25
HD4
HD3
HD#0
SDAVDD
SDAVSS
F29
F28
G26
G25
AE19
AE20
HD2
HD1
HD0
3
+3VAUX
630S-1
FCM1608K-121
C378
0.01UF
ALPHA-TOP CORP.
Title
Size Document Number Rev
Date: Sheet
R259
1 2
C379
1UF-0805
SIS630S-1 HOST/MEMORY
B
A901-1-4-01 5.0
2
C380
+
10UF/10V-A
R304
100K
12
529Tuesday, May 28, 2002
of
1
C377
0.01UF
V27
V28
CPUAVSS
E21
HD63
HD62
A19
C19
B20
B21
B19
A21
A20
D19
E20
D20
B22
C22
C20
A22
D21
A23
C21
B23
C23
A25
E22
D22
D24
D23
C25
B25
C24
E25
F22
D25
E23
B26
E24
C26
A26
A27
D26
B27
C27
B28
F24
C28
D28
H24
C29
E26
D27
J25
E28
D29
E27
H25
K24
F25
F27
E29
F26
HD61
HD60
HD59
HD58
6
HD57
HD56
HD55
HD54
HD53
HD52
HD51
HD50
HD49
HD48
HD47
HD46
HD45
HD44
HD43
HD42
HD41
HD40
HD39
HD38
5
HD37
HD36
HD35
HD34
HD33
HD32
HD31
HD30
HD29
HD28
HD27
HD26
HD25
HD24
HD23
HD22
HD21
HD20
HD19
4
HD18
HD17
HD16
HD15
HD14
HD13
HD12
HD11
HD10
HD9
HD8
HD7
HD6
VCC3 VCC3
R258 0
C375
+
A A
HD[0..63]2
HA[3..31]2
HREQ-[0..4]2
8
10UF/10V-A
HD[0..63]
HA[3..31]
HREQ-[0..4]
C376
1UF-0805
7
8
D D
AD[0..31]18
AD[0..31]
7
6
AD29
AD31
AD30
AD28
AD27
AD26
AD25
AD24
AD23
5
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
4
AD0
AD1
C373
1000PF
3
C374
0.1UF
R245
0
(For internal PLL)
VCC1.8V
C372
+
10UF/10V-A
2
1
ICHRDYA
IDREQ[A]
IIRQA
CBLIDA
IIOR#[A]
IIOW#[A]
IDACK#[A]
IDSAA[2]
IDSAA[1]
IDSAA[0]
IDECSA#[1]
IDECSA#[0]
ICHRDYB
IDREQ[B]
IIRQB
CBLIDB
IIOR#[B]
IIOW#[B]
IDACK#[B]
IDSAB[2]
IDSAB[1]
IDSAB[0]
IDECSB#[1]
IDECSB#[0]
CHIPSET4
AE13
AG8
AF9
AH9
AH8
AF8
AJ8
AD14
AE14
AG9
AF10
AJ9
AH13
AD17
AF15
AG15
AG13
AF13
AJ13
AG14
AF14
AD18
AJ14
AH14
630S-2
IDESAA2
IDESAA1
IDESAA0
IDECS-A1
IDECS-A0
IDESAB2
IDESAB1
IDESAB0
IDECS-B1
IDECS-B0
IDESAA[0..2]
IDECS-A[0..1]
IDESAB[0..2]
IDECS-B[0..1]
IDEDA[0..15]
IDEDB[0..15]
ICHRDYA
IDEREQA
IDEIRQA
CBLIDA
IDEIOR-A
IDEIOW-A
IDACK-A
ICHRDYB
IDEREQB
IDEIRQB
IDEIOR-B
IDEIOW-B
IDACK-B
ICHRDYA 14
IDEREQA 14
IDEIRQA 14
CBLIDA 14
IDEIOR-A 14
IDEIOW-A 14
IDACK-A 14
IDESAA[0..2] 14
IDECS-A[0..1] 14
ICHRDYB 14
IDEREQB 14
IDEIRQB 14
IDEIOR-B 14
IDEIOW-B 14
IDACK-B 14
IDESAB[0..2] 14
IDECS-B[0..1] 14
IDEDA[0..15] 14
IDEDB[0..15] 14
M4M2M3
N5
AD15
AD16
IDB15
AE8
AJ12
IDEDB15
AD13
AD14
IDA1
IDA0
AE12
IDEDA0
IDEDA1
AD12
IDA2
AJ6
AG7
IDEDA2
L3K1K2M5K3K4L5G1G2G3G4F1K5F2F4E1E2K6E3J4E4
AD10
AD11
IDA4
IDA3
AD12
IDEDA4
IDEDA3
N6
AF6
IDEDA5
L2
AD7
AD5
AD6
AD9
AD8
IDE
IDA9
IDA8
IDA7
IDA6
IDA5
AE6
AJ5
AH5
AE11
IDEDA8
IDEDA7
IDEDA9
IDEDA6
M1N4P6N3AH15
AD3
AD2
AD1
AD0
AD4
IDA14
IDA13
IDA12
IDA11
IDA10
IDA15
AJ7
AH7
AF7
AH6
AG6
AD13
IDEDA14
IDEDA10
IDEDA13
IDEDA11
IDEDA12
IDEDA15
IDEAVDD
D1
INT-A12,18
INT-B
INT-C18
INT-D
IRDY-18
STOP-18
PAR18
C/BE-[0..3]
PCIRST-
PREQ-[0..2]
PGNT-[0..2]
INT-A
INT-B
INT-C
INT-D
FRAME-
IRDYTRDYSTOP-
SERR-
PAR
DEVSELPLOCK-
PREQ-2
PREQ-1
PREQ-0
PGNT-2
PGNT-1
PGNT-0
C/BE-3
C/BE-2
C/BE-1
C/BE-0
R246 33
AJ15
C1
PREQ#[2]
C2
PREQ#[1]
C3
PREQ#[0]
D2
PGNT#[2]
D3
PGNT#[1]
D4
PGNT#[0]
F3
C/BE#[3]
H4
C/BE#[2]
J1
C/BE#[1]
L1
C/BE#[0]
N1
INTA#
P4
INTB#
P5
INTC#
P3
INTD#
H3
FRAME#
H2
IRDY#
H1
TRDY#
J2
STOP#
B11
SERR#
M6
PAR
J3
DEVSEL#
L4
PLOCK#
PCICLK
C11
PCIRST#
AD31
PCI
IDB0
IDB1
IDB2
AE17
AG12
AF12
IDEDB1
IDEDB2
IDEDB0
630S-2
IDB3
IDB4
IDB5
IDB6
IDB7
IDB8
IDB9
IDB10
IDB11
IDB12
IDB13
IDB14
AH11
AE16
AJ10
AD15
AE15
AG10
AH10
AF11
AG11
AJ11
AD16
AH12
IDEDB7
IDEDB8
IDEDB10
IDEDB9
IDEDB13
IDEDB12
IDEDB11
IDEDB14
IDEDB4
IDEDB3
IDEDB6
IDEDB5
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
PREQ-[0..2]18
PGNT-[0..2]18
C/BE-[0..3]18
C C
FRAME-18
TRDY-18
SERR-18
DEVSEL-18
PLOCK-
PCIRST-7,12,18,19,21
B B
630PCLK4
INT-C
INT-B
INT-D
INT-A
VCC3
VCC3
PREQ-2
PREQ-1
PREQ-0
SERR-
PGNT-2
PGNT-1
PGNT-0
6
5
RP57
1 8
2 7
3 6
4 5
10KX4
RP58
1 8
2 7
3 6
4 5
10KX4
ALPHA-TOP CORP.
Title
SIS630S-2 PCI/IDE
Size Document Number Rev
B
A901-1-4-01 5.0
4
3
Date: Sheet
2
629Tuesday, May 28, 2002
of
1
2.7KX4
STOPTRDYIRDYFRAME-
A A
8
VCC3
7
1 8
2 7
3 6
4 5
PLOCK-
DEVSEL-
RP5
4 5
3 6
2 7
1 8
RP56
R301 2.7K
1 2
R302 2.7K
1 2
8.2KX4
8
D D
ROUT13
GOUT13
BOUT13
HSYN13
VSYN13
DDC1DATA13
DDC1CLK13
C C
B B
A A
Place these circuits near to SiS-630S
VCOMP
DACAVDDC
DACAVSSC
VRSET
8
VOSCI4
R243
140 1%
C363 1UF-0805
C366
0.01UF
FCM2012K-600-0805
C367
1UF-0805
R241
L41
1 2
7
B14
ROUT
A14
GOUT
A15
BOUT
D15
HSYNC
A16
VSYNC
C15
DDC1DATA
B16
0
VRSET
VVREF
VCOMP
ECLKAVDD
DCLKAVDD
DCLKAVSS
DACAVDDC
DACAVSSC
DACAVDDB
DACAVSSB
VVREF
C360
0.1UF
VCC3 VCC3
DACAVDDB
C532
0.1UF
DACAVSSB
7
C16
A11
E19
C14
B15
F15
F16
E16
F18
F20
E14
D14
DDC1CLK
SSYNC
VOSCI
RSET
VREF
COMP
ECLKAVDD
DCLKAVDD
DCLKAVSS
DACAVDDC
DACAVSSC
DACAVDDB
DACAVSSB
CHIPSET3
630S-3
C368
0.01UF
6
AD6
AG1
AF3
AF2
AF1
AAD0
AAD1
AAD2
AAD3
AAD4
L42
1 2
FCM2012K-600-0805
C369
1UF-0805
6
AE4
AE3
AAD5
AAD6
DCLKAVDD
DCLKAVSS
AE2
AE1
AD5
AAD7
AAD8
VGA
B5
AD4
AD1
AC4
AC3
AC2
AC5
AA4Y5Y4Y3Y2Y1W4W3V5V4V3V2V1U5U4
AAD9
AAD10
AAD11
AAD12
AAD13
AAD14
AAD15
AAD16/B5
630S-3
C361
0.01UF
ECLKAVDD
C534
0.1UF
ECLKAVSS
R1
B3
B2
B0
B1
AAD17/B2
AAD18/B3
AAD19/B0
AAD20/B1
1 2
FCM2012K-600-0805
C362
1UF-0805
5
R2
R3
R4
AAD21/R1
AAD22/R2
AAD23/R3
L39
C370
0.01UF
5
R5
R6
R7
AAD24/R4
AAD25/R5
AAD26/R6
G2
G3
G0
G1
W5
AAD27/R7
AAD28/G2
AAD29/G0
AAD30/G1
AAD31/G3
AGP
VCC3
CE8
+
10UF/10V-A
L43
1 2
FCM2012K-600-0805
C371
1UF-0805
G6
G7
G4
G5
U2U1T5T4T1R1R2
SBA7
SBA6/G4
SBA5/G5
SBA4/G6
SBA3/G7
C530
0.1UF
VCC3
C533
0.1UF
4
ENPVDD- 11
ENBLT- 11
VBBLANK- 11,12
R536
0
R3
SBA2/DDC2CLK
SBA1/DDC2DAT
SBA0/VBBLANK#
4
R0/ACBE3#
B4/ACBE2#
ACBE1#
ACBE0#
VBCAD/AREQ#
VGCLK/AGNT#
B7/AFRAME#
B6/AIRDY#
ATRDY#
ADEVSEL
ASERR#
APAR
ASTOP#
VBHCLK/RBF#
VBCTL0/WBF#
VBCTL1/PIPE#
VBCLK/ST2
VBVSYNC/ST1
VBHSYNC/ST0
SB_STB
SB_STB#
AD_STB0
AD_STB0#
AD_STB1
AD_STB1#
AGPCLKECLKAVSS
AGPVREF
AGPRCOMP
AGPAVDD1
AGPAVSS1
AGPAVDD2
AGPAVSS2
AGPVSSREF
U3
AA3
AC1
AG2
R6
T6
AB2
Y6
AB3
AB4
AB6
AA5
AB5
P2
P1
U6
R4
R5
V6
T2
T3
AD2
AD3
W1
W2
AJ3E15
AA1
AB1
AE10
AD10
AE9
AD8
AA2
R240 22
R537 0
R538 0
VGACLKECLKAVSS
AGPRCOMP
AGPAVDD1
AGPAVSS1
AGPAVDD2
AGPAVSS1
AGPRCOMP
3
R0
B4
B7
B6
3
VBCAD 12
VBHCLK 12
VBCTL0 12
VBCTL1 12
VGACLK 4
VCC3
R244
59 1%
RR[0..7]
GG[0..7]
BB[0..7]
C358
10PF
VBCLK 12
VBVSYNC 11,12
VBHSYNC 11,12
RR[0..7] 11,12
GG[0..7] 11,12
BB[0..7] 11,12
VGCLK 11,12
4
R242
8.2K
PCIRST-6,12,18,19,21
AGPAVDD1
AGPAVSS1
Place these circuits near to SiS-630S
ALPHA-TOP CORP.
Title
SIS630S-3 VGA/DFP
Size Document Number Rev
B
A901-1-4-01 5.0
Date: Sheet
2
R1
R2
R3
R4
R5
R7
R6
R0
G0
G1
G3
G2
G7
G6
G5
G4
B6
B5
B3
B2
B4
B7
B0
B1
C364
0.01UF
2
RP43
1 8
2 7
3 6
4 5
RP44 22X4
1 8
2 7
3 6
4 5
RP45 22X4
RP46 22X4
RP47 22X4
RP48
1 8
2 7
3 6
4 5
VCC3
G
CLOSE TO SiS630S
L40
1 2
FCM2012K-600-0805
C365
CE9
1UF-0805
10UF/10V-A
22X4
18
27
36
45
18
27
36
45
18
27
36
45
22X4
SI2303_SOT23
Q17
D S
VCC3
1
AGPAVDD2
+
729Tuesday, May 28, 2002
1
RR1
RR2
RR3
RR4
RR5
RR7
RR6
RR0
GG0
GG1
GG3
GG2
GG7
GG6
GG5
GG4
BB6
BB5
BB3
BB2
BB4
BB7
BB0
BB1
C531
0.1UF
of
C359
0.1UF
8
PID[0..2]4
Place near to 630S
BIT_CLK
D D
NEDD NOT to place
near to 630S
ENTEST
AC'97 Pull-Down
In order to stabilize
630S AC,97 controller
pull-down resistors on
SDATI1 and SDATI0 can
not be removed.
C C
SDATI1
SDATI0
B B
A A
R231 100K
R232 100K
8
R229
4.7K
C354
10PFR
LVDSPD-11
AC_RESET-15,17
BIT_CLK15,17
AUXOK23
PWROK22
7
PID[0..2]
R510
SPKR
PSONKBSMIRING
PMETHERM-
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
ENTEST
SWI-
SCI
0
PID0
PID1
PID2
GPIO6
SPDIF
GPIO8
GPIO9
R233 0
R234 0
C
RTCVDD
C355
0.1UF
SPKR16
PSON-26
KBSMI-21
RING20
PME-18,19
SWI-21
SCI21
SPDIF15,16
SDATI117
SDATI015
SDATO15,17
SYNC15,17
BATOK23
SDATI1
SDATI0
SDATO
SYNC
D21 BAT54
A
NC
BIT_CLK
AUXOK
BATOK
R235
10K
VCC3
7
6
CHIPSET2
630S-4
E18
SPK
E11
PSON#
C7
ACPILED
B12
EXTSMI#
E10
PWRBTN#
B6
RING
A6
PME#
D13
THERM#
B7
KBDAT/GP10
A7
KBCLK/GP11
D8
PMDAT/GP12
C8
PMCLK/GP13
B8
KLOCK#/GP14/TXD
AE7
RESERVE2
AH2
RESERVE1
N2
ENTEST
C12
GP0/PREQ#3/TXD[
D12
GP1/PGNT#3/TXD[
E17
GP2/LDRQ1#/TXD[
F12
GP3/RXER
C10
GP4/TXCLK
F14
GP5/COL
C6
GP6/CRS
E12
GP7/SPDIF
D9
GP8/MDC
D10
GP9/RXCLK
B10
AC_SDIN[1]
A10
AC_SDIN[0]
A13
AC_SDOUT
B13
AC_SYNC
D11
AC_RESET#
C13
AC_BIT_CLK
A5
AUXOK
C5
BATOK
C4
PWROK
A4
RTCVDD
A3
RTCVSS
6
ACPI
KBC
AC97
RTC
OSC32KHI
B4
R237
1 2
10M
Y4
32.768K_TO26
C356
10PF
Place close to 630S
5
630S-4
OSC32KHO
VSSA
VSSB
B5
F13
F17
N24
C357
10PF
5
VSSC
U24
VSSD
4
LPC
CPU_S
SMB
USB
3
LAD0
LAD1
LAD2
LAD3
LDRQ#
LFRAME#
SIRQ
SMI#
INTR
A20M#
INIT#
IGNNE#
FERR#
STPCLK#
CPUSTOP#/CPUSLP
SMCLK
SMBDAT
TXEN/GP15/SMBAL
RXDV/OC0#
MDIO/OC1#
UV0-
UV0+
UV1-
UV1+
UV2-
UV2+
UV3-
UV3+
UV4-
UV4+
UV5-
UV5+
USBCLK48M
USBVDD0
USBVDD1
2
SMBD
GPIO15
LAD[0..3] 19
LDRQ- 19
LFRAME- 19
SERIRQ 19
NMI 3
SMI- 3
INTR 3
A20M- 3
CPUINIT- 3
IGNNE- 3
FERR- 3
STPCLK- 3
CPUSTP- 4
SMBC 4,10
SMBD 4,10
VCC3
UV0- 24
UV0+ 24
UV1- 24
UV1+ 24
UV2- 24
UV2+ 24
UV3- 24
UV3+ 24
UV4- 24
UV4+ 24
UV5- 24
UV5+ 24
UCLK48M 4
CB4 1UF-0805
VCC3
CE7
+
10UF/10V-A
AG4
AF4
AJ4
AE5
AF5
AH4
AG5
C18
NMI
D16
D18
B17
A17
B18
A18
C17
D17
AH3
AG3
A8
F10
D6
H5
J5
G5
H6
E5
F5
E6
F6
F8
E7
E8
D7
A12
B2
B3
LAD0
LAD1
LAD2
LAD3
LDRQLFRAME-PWRBTNSERIRQ
CPUSTP-
SMBC
1 2
R230 10K
CB3
0.1UF
1
MII
C9
RXD[0]
B9
RXD[1]
E13
RXD[2]
A9
RXD[3]
LANCLK25M
PWRBTN-21
4
D5
SWICPUSTPLFRAMELDRQ-
PWRBTN-
3
PME-
R600 4.7K
R603 4.7K
R602 4.7K
R601 4.7K
R236 20K
1 2
R238 10K
GPIO11
GPIO10
GPIO14
GPIO6
GPIO9
GPIO12
PID2
PID0
PID1
GPIO8
GPIO13
GPIO15
1 8
2 7
3 6
4 5
RP40 4.7KX4
1 8
2 7
3 6
4 5
RP41 4.7KX4
RP42 4.7KX4
ALPHA-TOP CORP.
Title
SIS630S-4 SOUTH BRIDGE
Size Document Number Rev
B
A901-1-4-01 2.0
Date: Sheet
2
VCC3
+3VAUX
18
27
36
45
SMBC
SMBD
SERIRQ
THERM-
+3VAUX
LAD0
LAD1
LAD2
LAD3
RP37
1 8
2 7
3 6
4 5
4.7KX4
RP39
4.7KX4
829Tuesday, May 28, 2002
of
1
VCC3
VCC3
18
27
36
45
8
7
6
5
4
3
2
1
VCC3
VCC1.8V
C332
1UF-0805
C336
1UF-0805
C340
0.1UF
C344
0.1UF
10UF/10V-A
+3VAUX
+
+1.8VAUX
CE5
VTT
C350
0.1UF
C333
1UF-0805
C337
1UF-0805
C341
0.1UF
C345
0.1UF
C346
1UF-0805
C347
1UF-0805
C348
0.1UF
C349
0.1UF
C351
0.01UF
VCC1.8V
VCC3
AA11
AA12
AA13
AA18
AA19
AA20
AA22
AB12
AB19
AB21
AB22
H10
H17
U21
U22
V21
V22
W21
W22
Y21
AB10
AB11
AB13
AB18
AB20
H11
H12
H18
N22
T22
Y22
AA10
AA14
AA17
AA21
AB14
AB17
H13
H16
K21
M21
N21
T21
J11
J12
J18
J10
J13
J16
J17
J19
J20
L21
J9
K8
K9
M9
L8
M8
L9
N9
U9
H9
J8
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
PVDD
PVDD
PVDD
PVDD
PVDD
PVDD
PVDD
PVDD
PVDD
PVDD
PVDD
PVDD
PVDD
PVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
AUX3.3V
AUX1.8V
CHIPSET1
630S-5
VCC3
AA8
AA9
AB8
AB9N8P8P9U8V8V9W8W9Y8Y9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
630S-5
POWER
VDDQ
VDDQ
H19
H20
GTLVTT
H21
H22
GTLVTT
GTLVTT
J21
J22
GTLVTT
GTLVTT
VTT
K22
L22
GTLVTT
GTLVTT
M22
GTLVTT
GTLVTT
VSSD
VSSD
VSSD
VSSD
VSSD
VSSD
VSSD
VSSD
VSSD
VSSD
VSSD
VSSD
VSSD
VSSD
VSSD
VSSD
VSSD
VSSD
VSSD
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L13
L14
L15
L16
L17
M12
M13
M14
M15
M16
M17
M18
N11
N12
N13
N14
N15
N16
N17
N18
N19
P14
P15
P18
P19
R14
R15
T14
T15
U14
U15
V14
V15
W13
W14
W15
P16
P17
R16
R17
R18
R19
T16
T17
T18
T19
U16
U17
U18
U19
V16
V17
V18
W16
W17
P11
P12
P13
R11
R12
R13
T11
T12
T13
U11
U12
U13
V12
V13
VCC3
R224
R225
R226
R227
R228
C331
1UF-0805
C335
1UF-0805
C339
0.1UF
C343
0.1UF
4.7KR
4.7K
4.7K
4.7KR
4.7K
D D
MD63: AGP DLL Enable
MD62: PCI PLL Enable
C C
B B
MD61: SDRAM DLL Enable
MD60: CPU DLL Enable
MD[59..58]: PLL ER[1..0]
MD[57..56]: DLL ER[1..0]
MD[55..53]: Clock skew control of AGP
MD37: Enable External CLKGEN
MD36: Enable Ext-PLink
MD35: Multi-function Select
MD34: Enable Multi-function
MD33: Enable Video Bridge
MD32: PAL/NTSC Select
MD31: Quick Start Function
1: Enable
0: Disable
MDD[0..63]10
(Default 00)
(Default 00)
inner-outer loop
(Default 001)
MDD[0..63]
C330
1UF-0805
C334
1UF-0805
C338
0.1UF
C342
0.1UF
(Default: Enable)
(Default: Enable)
(Default: Enable)
MDD37
MDD36
MDD33
MDD38
MDD39
10UF/10V-A
A A
8
7
6
+
5
0.1UF
0.01UF
ALPHA-TOP CORP.
Title
Title = SIS630S-5 POWER
Size Document Number Rev
B
A901-1-4-01 5.0
4
3
Date: Sheet
2
929Tuesday, May 28, 2002
of
1
C353
C352
CE6