5
4
3
2
1
A790GXM-AD3
D D
V : 1.0
REVISION HISTORY:
Rev Date Notes
SCHEMATICS TABLE:
Page Index
------- ------------------------
COVER PAGE
1
BLOCK DIADRAM
2
3
AM3 CPU HT & OVERCLOCK
4
AM3 CPU MEMORY I/F
5
AM3 CPU CONTROL & MISC
6
C C
B B
A A
AM3 CPU PWR & GND
7
DDR3 DIMM A CHANEL
8
DDR3 DIMM B CHANEL
9
DDR3 DIMM POWER
10
CLOCK GEN ICS9LPRS471
11
CPU VCORE ISL6323
12
NB POWER
13
DC-DC
14
FRONT PANEL(Remind)
15
ALL FAN CTAL
16
RS790GX HT LINK I/F
RS790GX PCIE I/F
17
18
RS790GX SP&MEM&STRAPS
19
RS790GX SYSTEM I/F
20
RS790GX POWER
VGA & PS2
21
HDMI / DVI
22
Notes:
1). "PWR" net means inner power plane under impedance trace.
2). "GND" net means inner ground plane under impedance trace.
3). IP1 footprint is J2X2_IP
4). After nelist running, please specially take care the single net name: "IMPEDANCE_T" and "IMPEDANCE_B".
5
Page Index
------- ------------------------
23
PCI-E X16 CONN&PCI-E X8CONN
24
SB750 PWR/DECOUPLING
25
SB750 STRAPS
26
SB750 ACPI/GPIO//USB/AUDIO
27
SB750 PCIE/PCI/CPU/LPC
28
SB750 SATA/IDE/HWM/SPI
29
PCI-Ex1 X2slots & IDE
30
PCI1&2
31
IT8726 I/O CHIP
32
Audio Codec ALC888S
Audio Interface
33
PCIE LAN RTL8111C/8101E-1
34
35
USB PORTS(2~9)
36
e-SATA CHIP-JM361
POWER DELIVERY CHART
37
38
CLOCK DISTRIBUTION
POWER SEQUENCE
39
PCB1
PCB1
PCB RevB
PCB RevB
4
A---25/07/08 - 15-V18-010010
B---15/10/08 - 15-V18-010020
1.0 --- 01/07/09' -15-V18-011000(GE1)
15-V18-011001(CHUANYI)
PCB Impedance control
(OHM) (mil)
1)Circuit type 1
Layer 1:TOP
Layer 2:PWR
Layer 3:GND
Layer 4:BOTTOM
3
Trace Width Impedance Default
(S/W/S)
4
(20/4/20) 50
VCC5
GND
3
4 2
Trace on layer 1
IPIP
IMPEDANCE_T
1
IMPEDANCE_B
Trace on layer 4
Trace Length
1. From V17100(RS780DM-A)
2. Change to AM3 CPU&DDR3
3. Add e-SATA
4. Add Stand-By LED
5. Add NBFAN*1
6. DEL COM1& Add DVI
7. Add CLR_CMOS Button
8. Del 1394
1. Modify for scrool/flighting screen
2. Increase stability issue
3. Verify audio connector & EMI suggestion
4. Move NB_FAN&PWR_FAN placement & cost-down some 0
Ohm parts
5. Change PCB silkscreen with PWR_BTN&RST_BTN +
SATA1~SATA6
6. Revise eSATA circuit
7. SB ver. from A12 change to A14(PA_SB700AJ8)
1. Modify for scrool/flighting screen
2. Increase stability issue
3. Debug HDMI(EMI) suggestion
4. SB Ver. Change from A14 to A12
5. SATA1/2~SATA5/6 Refine
6. Revise OS-CON to E/C
7. SB ver. from A12 change to A14(PA_SB700AJ8)
IMPORTANT NOTES ABOUT
THIS SCHEMATIC
1) DESIGN NOTES in
grey are information
notes.
2) DESIGN NOTES in
yellow are notes of
caution.
3) DESIGN NOTES in
red are critical, and
must be understood and
followed.
Cover Page
Cover Page
Cover Page
A790GXM-AD3
A790GXM-AD3
A790GXM-AD3
13 9 Tuesday, February 24, 2009
13 9 Tuesday, February 24, 2009
13 9 Tuesday, February 24, 2009
1
(inch)
8
PCB STACK:
Pre-preg
1080
2
DESIGN NOTE: Example
text for the design note to
show the note inside the
colored box.
DESIGN NOTE: Example
text for the design note to
V
show the note inside the
colored box.
DESIGN NOTE: Example
text for the design note t o
show the note inside the
colored box.
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
1.0
1.0
1.0
of
of
of
5
4
3
2
1
AM3 SOCKET
D D
OVER Clock
3
Clock
Generator
ICS9LPR471
10
AM3
Deneb FX-9x, 45nm,
4Cores, 1333Mhz(2MB
Dedicated L2+6MB
Share L3)
HyperTransport
LINK
OUT
3,4,5,6
16x16
IN
RX780/RS780/RS780D
DDRIII 1066,1333,2000
128bit
DDRIII 1066,1333,2000
Side port
FRAME BUFFER
DDR3 512MBIT
HyperTransport LINK0 CPU I/F
UNBUFFERED
DDRIII DIMM1
UNBUFFERED
DDRIII DIMM2
DDRIII FIRST LOGICAL DIMM
13
8X
7,9
7,9 8,9
DX10 IGP( RS780)
VGA CON
HDMI /DVI CON
C C
17
18
LVDS/TVOUT/TMDS(RS780/740)
DISPLAY PORT X2 (RS780)
Side Port Memory(RS780/740)
1 X16 PCIE I/F
1 X4 PCIE I/F WITH SB
16X
6 1X PCIE INTERFACE
16X or 8X
UNBUFFERED
DDRIII DIMM3
UNBUFFERED
DDRIII DIMM4
DDRIII SECOND LOGICAL DIMM
PCIE
8X
SLOT
(RS780D)
16
PCIE
16X
SLOT
16
8,9
6 X1 PCIE I/F (4 X1 for RS740)
11,12,13,14,15
4X
PCIE
SB750
USB2.0 (12)+ 1.1(2)
USB-7
24
USB-8
B B
USB-9
24
24 24
USB-11 USB-10
USB-12
27
USB-2 USB-6 USB-3 USB-4 USB-5
24 24 24 24
27
PCI BUS
USB-1
USB 2.0
28 28
PCI BUS
SATA II (6 PORTS)
AZALIA HD AUDIO
ATA 66/100/133
SPI I/F
LPC I/F(S5)
ACPI 1.1
INT RTC
HW MONITOR
PCI/PCI BDGE
19,20, 21, 22, 23,
PCIE GPP[1:0]
X1
26
HD AUDIO I/F
SATA II I/F
ATA 66/100/133 I/F
ATA 66/100/133 I/F
PCIE GPP3
GIGABIT
RTL8111C
27
HD AUDIO HDR
29
SATA#0 SATA#1
IDE CON
FLASH
BIOS
24
23
23 23
PCIE GPP4
e-SATA
JM361
HD AUDIO
REAR CON
SATA#2
27
30
SATA#3
23 23
SATA#4
23
SATA#5
23
PCI SLOT
#1
DESKTOP AM2/AM2g2
POWER
A A
5
DDR2
MEMORY
POWER
34
36
25
PCI SLOT
#2
RS780
CORE & PCIE
POWER
SB700
CORE & PCIE
POWER
4
25
ITE LPC SIO
IT8726
31
35
3
KBD
MOUSE
17
2
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
A790GXM-AD3
A790GXM-AD3
A790GXM-AD3
23 9 Tuesday, February 24, 2009
23 9 Tuesday, February 24, 2009
23 9 Tuesday, February 24, 2009
of
of
1
of
1.0
1.0
1.0
35
5
4
3
2
1
CPU HyperTransport and Overclock
HT_CLKIN1_P 16
D D
C C
CPU_VDDIO_SUS V_DIMM
1.5V
HT_CLKIN1_N 16
HT_CLKIN0_P 16
HT_CLKIN0_N 16
HT_CTLIN1_P 16
HT_CTLIN1_N 16
HT_CTLIN0_P 16
HT_CTLIN0_N 16
HT_CADIN15_P 16
HT_CADIN15_N 16
HT_CADIN14_P 16
HT_CADIN14_N 16
HT_CADIN13_P 16
HT_CADIN13_N 16
HT_CADIN12_P 16
HT_CADIN12_N 16
HT_CADIN11_P 16
HT_CADIN11_N 16
HT_CADIN10_P 16
HT_CADIN10_N 16
HT_CADIN9_P 16
HT_CADIN9_N 16
HT_CADIN8_P 16
HT_CADIN8_N 16
HT_CADIN7_P 16
HT_CADIN7_N 16
HT_CADIN6_P 16
HT_CADIN6_N 16
HT_CADIN5_P 16
HT_CADIN5_N 16
HT_CADIN4_P 16
HT_CADIN4_N 16
HT_CADIN3_P 16
HT_CADIN3_N 16
HT_CADIN2_P 16
HT_CADIN2_N 16
HT_CADIN1_P 16
HT_CADIN1_N 16
HT_CADIN0_P 16
HT_CADIN0_N 16
HT_CLKIN1_P
HT_CLKIN1_N
HT_CLKIN0_P
HT_CLKIN0_N
HT_CTLIN1_P
HT_CTLIN1_N
HT_CTLIN0_P
HT_CTLIN0_N
HT_CADIN15_P
HT_CADIN15_N
HT_CADIN14_P
HT_CADIN14_N
HT_CADIN13_P
HT_CADIN13_N
HT_CADIN12_P
HT_CADIN12_N
HT_CADIN11_P
HT_CADIN11_N
HT_CADIN10_P
HT_CADIN10_N
HT_CADIN9_P
HT_CADIN9_N
HT_CADIN8_P
HT_CADIN8_N
HT_CADIN7_P
HT_CADIN7_N
HT_CADIN6_P
HT_CADIN6_N
HT_CADIN5_P
HT_CADIN5_N
HT_CADIN4_P
HT_CADIN4_N
HT_CADIN3_P
HT_CADIN3_N
HT_CADIN2_P
HT_CADIN2_N
HT_CADIN1_P
HT_CADIN1_N
HT_CADIN0_P
HT_CADIN0_N
HyperTransport
CPUA
CPUA
N6
P6
N3
N2
V4
V5
U1
V1
U6
V6
T4
T5
R6
T6
P4
P5
M4
M5
L6
M6
K4
K5
J6
K6
U3
U2
R1
T1
R3
R2
N1
P1
L1
M1
L3
L2
J1
K1
J3
J2
L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKIN_H0
L0_CLKIN_L0
L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLIN_H0
L0_CTLIN_L0
L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0
ZIF-941P-S
ZIF-941P-S
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
HT LINK
HT LINK
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
AD5
AD4
AD1
AC1
Y6
W6
W2
W3
Y5
Y4
AB6
AA6
AB5
AB4
AD6
AC6
AF6
AE6
AF5
AF4
AH6
AG6
AH5
AH4
Y1
W1
AA2
AA3
AB1
AA1
AC2
AC3
AE2
AE3
AF1
AE1
AG2
AG3
AH1
AG1
HT_CLKOUT1_P
HT_CLKOUT1_N
HT_CLKOUT0_P
HT_CLKOUT0_N
HT_CTLOUT1_P
HT_CTLOUT1_N
HT_CTLOUT0_P
HT_CTLOUT0_N
HT_CADOUT15_P
HT_CADOUT15_N
HT_CADOUT14_P
HT_CADOUT14_N
HT_CADOUT13_P
HT_CADOUT13_N
HT_CADOUT12_P
HT_CADOUT12_N
HT_CADOUT11_P
HT_CADOUT11_N
HT_CADOUT10_P
HT_CADOUT10_N
HT_CADOUT9_P
HT_CADOUT9_N
HT_CADOUT8_P
HT_CADOUT8_N
HT_CADOUT7_P
HT_CADOUT7_N
HT_CADOUT6_P
HT_CADOUT6_N
HT_CADOUT5_P
HT_CADOUT5_N
HT_CADOUT4_P
HT_CADOUT4_N
HT_CADOUT3_P
HT_CADOUT3_N
HT_CADOUT2_P
HT_CADOUT2_N
HT_CADOUT1_P
HT_CADOUT1_N
HT_CADOUT0_P
HT_CADOUT0_N
HT_CLKOUT1_P 16
HT_CLKOUT1_N 16
HT_CLKOUT0_P 16
HT_CLKOUT0_N 16
HT_CTLOUT1_P 16
HT_CTLOUT1_N 16
HT_CTLOUT0_P 16
HT_CTLOUT0_N 16
HT_CADOUT15_P 16
HT_CADOUT15_N 16
HT_CADOUT14_P 16
HT_CADOUT14_N 16
HT_CADOUT13_P 16
HT_CADOUT13_N 16
HT_CADOUT12_P 16
HT_CADOUT12_N 16
HT_CADOUT11_P 16
HT_CADOUT11_N 16
HT_CADOUT10_P 16
HT_CADOUT10_N 16
HT_CADOUT9_P 16
HT_CADOUT9_N 16
HT_CADOUT8_P 16
HT_CADOUT8_N 16
HT_CADOUT7_P 16
HT_CADOUT7_N 16
HT_CADOUT6_P 16
HT_CADOUT6_N 16
HT_CADOUT5_P 16
HT_CADOUT5_N 16
HT_CADOUT4_P 16
HT_CADOUT4_N 16
HT_CADOUT3_P 16
HT_CADOUT3_N 16
HT_CADOUT2_P 16
HT_CADOUT2_N 16
HT_CADOUT1_P 16
HT_CADOUT1_N 16
HT_CADOUT0_P 16
HT_CADOUT0_N 16
Please use 1mm pad size,
place all ELT test pads
on bottom side only.
A1
AL1
CPU1
CPU1
RETENTION
RETENTION
AM3
Top View
A31
AL31
Over Clocking
VCC1.8
2N3904-S
2N3904-S
QN15
QN15
RN9
RN9
4.7K-8P4R
4.7K-8P4R
B
E C
NB_PWRGD 19,26
V_DIMM
RN8
RN8
4.7K-8P4R
4.7K-8P4R
R214
R214
0-04-O
0-04-O
DNI
1 2
3 4
5 6
DNI
7 8
1 2
3 4
5 6
7 8
VCC1.8
R220
R220
10K-04
10K-04
B
QN8
QN8
E C
2N3904-S
2N3904-S
3
HDT Connector
1
3
5
7
9
11
13
15
17
19
21
23
KEY
KEY
ASP-68200-07-O
ASP-68200-07-O
Use buffered reset
R212 0-04-ODNIR212 0-04-ODNI
VCC3
10K-04
10K-04
R222
R222
IMC_DBREQ_ 26
J1
J1
10K-04
10K-04
VCC1.8
R232
R232
E C
2N3904-S
2N3904-S
QN10
QN10
2
4
6
8
10
12
14
16
18
20
22
24
26
B
4.7K-04
4.7K-04
VCC3
R228
R228
R240
R240
10K-04
10K-04
VCC3
V_DIMM
R203
R203
10K-04
10K-04
E C
2N3904-S
2N3904-S
QN6
QN6
IMC_DBRDY 26
B
LDT_RST- 5,19,27
IMC_CRST_ 26
VCC1.8
VCC3
R233
R233
10K-04
10K-04
2
B
2N3904-S
2N3904-S
QN11
QN11
10K-04
10K-04
R234
R234
E C
IMC_TCK 26 IMC_TMS 26
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
AM3 CPU HT&OVERCLOCK
AM3 CPU HT&OVERCLOCK
AM3 CPU HT&OVERCLOCK
A790GXM-AD3
A790GXM-AD3
A790GXM-AD3
1
33 9 Tuesday, February 24, 2009
33 9 Tuesday, February 24, 2009
33 9 Tuesday, February 24, 2009
of
of
of
1.0
1.0
1.0
B B
VCC3
10K-04
10K-04
R252
R252
VCC1.8
R247
R247
VCC3
10K-04
10K-04
B
E C
2N3904-S
2N3904-S
QN12
QN12
IMC_TDO 26
10K-04
10K-04
R248
A A
R248
5
VCC3
R250
R250
10K-04
10K-04
10K-04
10K-04
VCC1.8
R249
R249
E C
2N3904-S
2N3904-S
QN13
QN13
IMC_TRST_ 26
B
VCC1.8
R227 0-04-SHR227 0-04-SH
CPU_DBREQ_ 5
CPU_DBRDY 5
CPU_TCK 5
CPU_TMS 5
CPU_TDI 5
CPU_TRST- 5
CPU_TDO 5
R253
R253
VCC3
10K-04
VCC1.8
R251
R251
10K-04
10K-04
IMC_TDI 26
B
E C
2N3904-S
2N3904-S
QN14
QN14
4
10K-04
10K-04
10K-04
R235
R235
A
B
C
D
E
CPU Memory
DDR3 Memory Interface A DDR3 Memory Interface B
Pin naming for memory pins indicate
"DDR3"/"DDR2" connections.
4 4
MEM_VDDIO_SUS V_DIMM
1.5V
3 3
MEM_MA_ADD[15..0] 7
2 2
MEM_MA_DM[7..0] 7
STP31 STP31
STP29 STP29
STP28 STP28
STP27 STP27
MEM_MA1_CLK1_P 7
MEM_MA1_CLK1_N 7
MEM_MA0_CLK0_P 7
MEM_MA0_CLK0_N 7
MEM_MA1_CLK0_P 7
MEM_MA1_CLK0_N 7
MEM_MA0_CLK1_P 7
MEM_MA0_CLK1_N 7
STP26 STP26
STP30 STP30
STP33 STP33
MEM_MA0_CS_L1 7
MEM_MA0_CS_L0 7
MEM_MA0_ODT1 7
MEM_MA0_ODT0 7
MEM_MA1_CS_L1 7
MEM_MA1_CS_L0 7
MEM_MA_RESET- 7 MEM_MB_RESET- 8
MEM_MA_CAS- 7
MEM_MA_WE- 7
MEM_MA_RAS- 7
MEM_MA_BANK2 7
MEM_MA_BANK1 7
MEM_MA_BANK0 7
MEM_MA_CKE0 7
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_DQS_H7 7
MEM_MA_DQS_L7 7
MEM_MA_DQS_H6 7
MEM_MA_DQS_L6 7
MEM_MA_DQS_H5 7
MEM_MA_DQS_L5 7
MEM_MA_DQS_H4 7
MEM_MA_DQS_L4 7
MEM_MA_DQS_H3 7
MEM_MA_DQS_L3 7
MEM_MA_DQS_H2 7
MEM_MA_DQS_L2 7
MEM_MA_DQS_H1 7
MEM_MA_DQS_L1 7
MEM_MA_DQS_H0 7
MEM_MA_DQS_L0 7
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_L0
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
AG21
AG20
AE20
AE19
AC25
AA24
AE28
AC28
AD27
AA25
AE27
AC27
AB25
AB27
AA26
AA27
AC26
AD15
AE15
AG18
AG19
AG24
AG25
AG27
AG28
AF15
AF19
AH29
U27
U26
V27
W27
W26
W25
U24
V24
G19
H19
G20
G21
E20
N25
Y27
L27
M25
M27
N24
N26
P25
Y25
N27
R24
P27
R25
R26
R27
T25
U25
T27
W24
D29
C29
C25
D25
E19
F19
F15
G15
AJ25
B29
E24
E18
H15
CPUB
CPUB
MA_CLK_H7
MA_CLK_L7
MA_CLK_H6
MA_CLK_L6
MA_CLK_H5
MA_CLK_L5
MA_CLK_H4
MA_CLK_L4
MA_CLK_H3
MA_CLK_L3
MA_CLK_H2
MA_CLK_L2
MA_CLK_H1
MA_CLK_L1
MA_CLK_H0
MA_CLK_L0
MA0_CS_L1
MA0_CS_L0
MA0_ODT1
MA0_ODT0
MA1_CS_L1
MA1_CS_L0
MA1_ODT1
MA1_ODT0
MA_RESET_L
MA_CAS_L
MA_WE_L
MA_RAS_L
MA_BANK2
MA_BANK1
MA_BANK0
MA_CKE1
MA_CKE0
MA_ADD15
MA_ADD14
MA_ADD13
MA_ADD12
MA_ADD11
MA_ADD10
MA_ADD9
MA_ADD8
MA_ADD7
MA_ADD6
MA_ADD5
MA_ADD4
MA_ADD3
MA_ADD2
MA_ADD1
MA_ADD0
MA_DQS_H7
MA_DQS_L7
MA_DQS_H6
MA_DQS_L6
MA_DQS_H5
MA_DQS_L5
MA_DQS_H4
MA_DQS_L4
MA_DQS_H3
MA_DQS_L3
MA_DQS_H2
MA_DQS_L2
MA_DQS_H1
MA_DQS_L1
MA_DQS_H0
MA_DQS_L0
MA_DM7
MA_DM6
MA_DM5
MA_DM4
MA_DM3
MA_DM2
MA_DM1
MA_DM0
ZIP-941P-S
ZIP-941P-S
MA_DATA63
MA_DATA62
MA_DATA61
MA_DATA60
MA_DATA59
MA_DATA58
MA_DATA57
MA_DATA56
MA_DATA55
MA_DATA54
MA_DATA53
MA_DATA52
MA_DATA51
MA_DATA50
MA_DATA49
MA_DATA48
MA_DATA47
MA_DATA46
MA_DATA45
MA_DATA44
MA_DATA43
MA_DATA42
MA_DATA41
MA_DATA40
MA_DATA39
MA_DATA38
MA_DATA37
MA_DATA36
MA_DATA35
MA_DATA34
MA_DATA33
MA_DATA32
MA_DATA31
MA_DATA30
MA_DATA29
MA_DATA28
MA_DATA27
MA_DATA26
MA_DATA25
MA_DATA24
MA_DATA23
MA_DATA22
MA_DATA21
MA_DATA20
MA_DATA19
MA_DATA18
MA_DATA17
MA_DATA16
MA_DATA15
MA_DATA14
MA_DATA13
MA_DATA12
MEM CHA
MEM CHA
MA_DATA11
MA_DATA10
MA_DATA9
MA_DATA8
MA_DATA7
MA_DATA6
MA_DATA5
MA_DATA4
MA_DATA3
MA_DATA2
MA_DATA1
MA_DATA0
MA_DQS_H8
MA_DQS_L8
MA_DM8
MA_CHECK7
MA_CHECK6
MA_CHECK5
MA_CHECK4
MA_CHECK3
MA_CHECK2
MA_CHECK1
MA_CHECK0
MA_EVENT_L
MEM_MA_DATA63
AE14
MEM_MA_DATA62
AG14
MEM_MA_DATA61
AG16
MEM_MA_DATA60
AD17
MEM_MA_DATA59
AD13
MEM_MA_DATA58
AE13
MEM_MA_DATA57
AG15
MEM_MA_DATA56
AE16
MEM_MA_DATA55
AG17
MEM_MA_DATA54
AE18
MEM_MA_DATA53
AD21
MEM_MA_DATA52
AG22
MEM_MA_DATA51
AE17
MEM_MA_DATA50
AF17
MEM_MA_DATA49
AF21
MEM_MA_DATA48
AE21
MEM_MA_DATA47
AF23
MEM_MA_DATA46
AE23
MEM_MA_DATA45
AJ26
MEM_MA_DATA44
AG26
MEM_MA_DATA43
AE22
MEM_MA_DATA42
AG23
MEM_MA_DATA41
AH25
MEM_MA_DATA40
AF25
MEM_MA_DATA39
AJ28
MEM_MA_DATA38
AJ29
MEM_MA_DATA37
AF29
MEM_MA_DATA36
AE26
MEM_MA_DATA35
AJ27
MEM_MA_DATA34
AH27
MEM_MA_DATA33
AG29
MEM_MA_DATA32
AF27
MEM_MA_DATA31
E29
MEM_MA_DATA30
E28
MEM_MA_DATA29
D27
MEM_MA_DATA28
C27
MEM_MA_DATA27
G26
MEM_MA_DATA26
F27
MEM_MA_DATA25
C28
MEM_MA_DATA24
E27
MEM_MA_DATA23
F25
MEM_MA_DATA22
E25
MEM_MA_DATA21
E23
MEM_MA_DATA20
D23
MEM_MA_DATA19
E26
MEM_MA_DATA18
C26
MEM_MA_DATA17
G23
MEM_MA_DATA16
F23
MEM_MA_DATA15
E22
MEM_MA_DATA14
E21
MEM_MA_DATA13
F17
MEM_MA_DATA12
G17
MEM_MA_DATA11
G22
MEM_MA_DATA10
F21
MEM_MA_DATA9
G18
MEM_MA_DATA8
E17
MEM_MA_DATA7
G16
MEM_MA_DATA6
E15
MEM_MA_DATA5
G13
MEM_MA_DATA4
H13
MEM_MA_DATA3
H17
MEM_MA_DATA2
E16
MEM_MA_DATA1
E14
MEM_MA_DATA0
G14
MEM_MA_DQS_H8
J28
MEM_MA_DQS_L8
J27
J25
MEM_MA_CHECK7
K25
MEM_MA_CHECK6
J26
MEM_MA_CHECK5
G28
MEM_MA_CHECK4
G27
MEM_MA_CHECK3
L24
MEM_MA_CHECK2
K27
MEM_MA_CHECK1 MEM_MA_DQS_H0
H29
MEM_MA_CHECK0
H27
W30
EVENT pins are for future AM3r2
1 2
R332 300-04 R332 300-04
MEM_MA_DATA[63..0] 7 MEM_MB_DATA[63..0] 8
MEM_MB_DQS_H[8..0] 8
MEM_MB_DQS_L[8..0] 8
MEM_MA_DQS_H8 7
MEM_MA_DQS_L8 7
MEM_MA_DM8 7
MEM_MA_CHECK[7..0] 7 MEM_MB_CHECK[7..0] 8
Layout: Route as 60 ohms
with 5/10 W/S from CPU pins.
MEM_MA_EVENT_L 7
Pin naming for memory pins indicate
"DDR3"/"DDR2" connections.
MEM_MB1_CLK1_P 8
MEM_MB1_CLK1_N 8
MEM_MB0_CLK0_P 8
MEM_MB0_CLK0_N 8
MEM_MB1_CLK0_P 8
MEM_MB1_CLK0_N 8
MEM_MB0_CLK1_P 8
MEM_MB0_CLK1_N 8
MEM_MB0_CS_L1 8
MEM_MB0_CS_L0 8
MEM_MB0_ODT1 8
MEM_MB0_ODT0 8
MEM_MB1_CS_L1 8
MEM_MB1_CS_L0 8
MEM_MB1_ODT1 8 MEM_MA1_ODT1 7
MEM_MB1_ODT0 8 MEM_MA1_ODT0 7
MEM_MB_CAS- 8
MEM_MB_WE- 8
MEM_MB_RAS- 8
MEM_MB_BANK2 8
MEM_MB_BANK1 8
MEM_MB_BANK0 8
MEM_MB_CKE1 8 MEM_MA_CKE1 7
MEM_MB_CKE0 8
MEM_MB_ADD[15..0] 8
MEM_MB_DQS_H[8..0]
MEM_MB_DQS_L[8..0]
MEM_MB_DQS_H7 8
MEM_MB_DQS_L7 8
MEM_MB_DQS_H6 8
MEM_MB_DQS_L6 8
MEM_MB_DQS_H5 8
MEM_MB_DQS_L5 8
MEM_MB_DQS_H4 8
MEM_MB_DQS_L4 8
MEM_MB_DQS_H3 8
MEM_MB_DQS_L3 8
MEM_MB_DQS_H2 8
MEM_MB_DQS_L2 8
MEM_MB_DQS_H1 8
MEM_MB_DQS_L1 8
MEM_MB_DQS_H0 8
MEM_MB_DQS_L0 8
MEM_MB_DM[7..0] 8
TP50TP50
TP54TP54
TP55TP55
TP57TP57
TP56TP56
TP53TP53
TP49TP49 STP32 STP32
TP48TP48
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
AJ19
AK19
AL19
AL18
AE30
AC31
AF31
AD29
AE29
AB31
AG31
AD31
AC29
AC30
AB29
AA31
AA28
AE31
AA29
AA30
AK13
AJ13
AK17
AJ17
AK23
AL23
AL28
AL29
AJ14
AH17
AJ23
AK29
W29
W28
W31
M31
M29
U31
U30
Y31
Y30
V31
A18
A19
C19
D19
B19
N31
N28
N29
N30
P29
P31
R29
R28
R31
R30
T31
T29
U29
U28
D31
C31
C24
C23
D17
C17
C14
C13
C30
A23
B17
B13
CPUC
CPUC
MB_CLK_H7
MB_CLK_L7
MB_CLK_H6
MB_CLK_L6
MB_CLK_H5
MB_CLK_L5
MB_CLK_H4
MB_CLK_L4
MB_CLK_H3
MB_CLK_L3
MB_CLK_H2
MB_CLK_L2
MB_CLK_H1
MB_CLK_L1
MB_CLK_H0
MB_CLK_L0
MB0_CS_L1
MB0_CS_L0
MB0_ODT1
MB0_ODT0
MB1_CS_L1
MB1_CS_L0
MB1_ODT1
MB1_ODT0
MB_RESET_L
MB_CAS_L
MB_WE_L
MB_RAS_L
MB_BANK2
MB_BANK1
MB_BANK0
MB_CKE1
MB_CKE0
MB_ADD15
MB_ADD14
MB_ADD13
MB_ADD12
MB_ADD11
MB_ADD10
MB_ADD9
MB_ADD8
MB_ADD7
MB_ADD6
MB_ADD5
MB_ADD4
MB_ADD3
MB_ADD2
MB_ADD1
MB_ADD0
MB_DQS_H7
MB_DQS_L7
MB_DQS_H6
MB_DQS_L6
MB_DQS_H5
MB_DQS_L5
MB_DQS_H4
MB_DQS_L4
MB_DQS_H3
MB_DQS_L3
MB_DQS_H2
MB_DQS_L2
MB_DQS_H1
MB_DQS_L1
MB_DQS_H0
MB_DQS_L0
MB_DM7
MB_DM6
MB_DM5
MB_DM4
MB_DM3
MB_DM2
MB_DM1
MB_DM0
ZIP-941P-S
ZIP-941P-S
MB_DATA63
MB_DATA62
MB_DATA61
MB_DATA60
MB_DATA59
MB_DATA58
MB_DATA57
MB_DATA56
MB_DATA55
MB_DATA54
MB_DATA53
MB_DATA52
MB_DATA51
MB_DATA50
MB_DATA49
MB_DATA48
MB_DATA47
MB_DATA46
MB_DATA45
MB_DATA44
MB_DATA43
MB_DATA42
MB_DATA41
MB_DATA40
MB_DATA39
MB_DATA38
MB_DATA37
MB_DATA36
MB_DATA35
MB_DATA34
MB_DATA33
MB_DATA32
MB_DATA31
MB_DATA30
MB_DATA29
MB_DATA28
MB_DATA27
MB_DATA26
MB_DATA25
MB_DATA24
MB_DATA23
MB_DATA22
MB_DATA21
MB_DATA20
MB_DATA19
MB_DATA18
MB_DATA17
MB_DATA16
MB_DATA15
MB_DATA14
MB_DATA13
MB_DATA12
MEM CHB
MEM CHB
MB_DATA11
MB_DATA10
MB_DATA9
MB_DATA8
MB_DATA7
MB_DATA6
MB_DATA5
MB_DATA4
MB_DATA3
MB_DATA2
MB_DATA1
MB_DATA0
MB_DQS_H8
MB_DQS_L8
MB_DM8
MB_CHECK7
MB_CHECK6
MB_CHECK5
MB_CHECK4
MB_CHECK3
MB_CHECK2
MB_CHECK1
MB_CHECK0
MB_EVENT_L
MEM_MB_DATA63
AH13
MEM_MB_DATA62
AL13
MEM_MB_DATA61
AL15
MEM_MB_DATA60
AJ15
MEM_MB_DATA59
AF13
MEM_MB_DATA58
AG13
MEM_MB_DATA57
AL14
MEM_MB_DATA56
AK15
MEM_MB_DATA55
AL16
MEM_MB_DATA54
AL17
MEM_MB_DATA53
AK21
MEM_MB_DATA52
AL21
MEM_MB_DATA51
AH15
MEM_MB_DATA50
AJ16
MEM_MB_DATA49
AH19
MEM_MB_DATA48
AL20
MEM_MB_DATA47
AJ22
MEM_MB_DATA46
AL22
MEM_MB_DATA45
AL24
MEM_MB_DATA44
AK25
MEM_MB_DATA43
AJ21
MEM_MB_DATA42
AH21
MEM_MB_DATA41
AH23
MEM_MB_DATA40
AJ24
MEM_MB_DATA39
AL27
MEM_MB_DATA38
AK27
MEM_MB_DATA37
AH31
MEM_MB_DATA36
AG30
MEM_MB_DATA35
AL25
MEM_MB_DATA34
AL26
MEM_MB_DATA33
AJ30
MEM_MB_DATA32
AJ31
MEM_MB_DATA31
E31
MEM_MB_DATA30
E30
MEM_MB_DATA29
B27
MEM_MB_DATA28
A27
MEM_MB_DATA27
F29
MEM_MB_DATA26
F31
MEM_MB_DATA25
A29
MEM_MB_DATA24
A28
MEM_MB_DATA23
A25
MEM_MB_DATA22
A24
MEM_MB_DATA21
C22
MEM_MB_DATA20
D21
MEM_MB_DATA19
A26
MEM_MB_DATA18
B25
MEM_MB_DATA17
B23
MEM_MB_DATA16
A22
MEM_MB_DATA15
B21
MEM_MB_DATA14
A20
MEM_MB_DATA13
C16
MEM_MB_DATA12
D15
MEM_MB_DATA11
C21
MEM_MB_DATA10
A21
MEM_MB_DATA9
A17
MEM_MB_DATA8
A16
MEM_MB_DATA7
B15
MEM_MB_DATA6
A14
MEM_MB_DATA5
E13
MEM_MB_DATA4
F13
MEM_MB_DATA3
C15
MEM_MB_DATA2
A15
MEM_MB_DATA1
A13
MEM_MB_DATA0
D13
J31
J30
J29
MEM_MB_CHECK7
K29
MEM_MB_CHECK6
K31
MEM_MB_CHECK5
G30
MEM_MB_CHECK4
G29
MEM_MB_CHECK3
L29
MEM_MB_CHECK2
L28
MEM_MB_CHECK1
H31
MEM_MB_CHECK0
G31
V29
EVENT pins are for future AM3r2
1 2
R352 300-04 R352 300-04
MEM_MB_DQS_H8 8
MEM_MB_DQS_L8 8
MEM_MB_DM8 8
Layout: Route as 60 ohms
with 5/10 W/S from CPU pins.
MEM_MB_EVENT_L 8
CPU_VDDIO_SUS CPU_VDDIO_SUS
MEMORY CLOCK TRANSLATION
DIMM
MEM CHA
1 1
CPU
TO DIMMA0 & DIMMA1
A
A0 A1
B
DDR3 Memory Signal CPU Signal
DIMM A0
MEM_MA0_CLK1 MA_CLK2
MEM_MA0_CLK0 MA_CLK4
DIMM A1
MEM_MA1_CLK1 MA_CLK5
MEM_MA1_CLK0 MA_CLK3
DIMM B0
MEM_MB0_CLK1 MB_CLK2
MEM_MB0_CLK0 MB_CLK4
DIMM B1
MEM_MB1_CLK1 MB_CLK5
MEM_MB1_CLK0 MB_CLK3
MEM CHB
24 13
CPU
TO DIMMB0 & DIMMB1
B0 B1
C
D
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
AM3 CPU MEMORY
AM3 CPU MEMORY
AM3 CPU MEMORY
A790GXM-AD3
A790GXM-AD3
A790GXM-AD3
E
43 9 Tuesday, February 24, 2009
43 9 Tuesday, February 24, 2009
43 9 Tuesday, February 24, 2009
of
of
of
1.0
1.0
1.0
5
4
3
2
1
CPU Control and Miscellaneous
SB_CPUPWRGD 11,27
LDT_RST_CPU- 3,19,27
CPU_THERMDC 19,31
CPU_THERMDA 31
CPU_CORE_FB 11
CPU_CORE_FB- 11
CPU_VDDNB_FB 11
CPU_VDDNB_FB- 11
VCCNS_REF
CPU_CLKIN_H 10
CPU_CLKIN_L 10
LDT_STOP- 19,27
VRD_VID1 11
VRD_VID2 11
VRD_VID3 11
PROCHOT_L 27
EN_VDDA 31
V_DIMM
VCC1.2
+12V
2.5VREF
CPU_CLKP
CPU_CLKN
CPU_PWRGD
LDT_STOPLDT_RST-
CPU_CORE_TYPE_L
CPU_PVEN
CPU_SVD
CPU_SVC
CPU_THERMDC
CPU_THERMDA
CPU_THERMTRIP_L
CPU_PROCHOT_L_15
CPU_VDDIO_PWRGD
CPU_VDD_FB_H
CPU_VDD_FB_L
CPU_VDDNB_FB_H
CPU_VDDNB_FB_L
VDDA_EN
D D
CPU_CORE_TYPE 11
C C
B B
A A
-CPU_THERMTRIP 26
CPU_VDDIO_PWRGD 12
1.5V
1.2V
+12V
VCCNS_REF
CPU_VDDIO_SUS
CPU_VDDHT
STP21 STP21
TP21TP21
TP20TP20
TP14TP14
TP16TP16
TP15TP15
TP17TP17
STP22 STP22
STP23 STP23
TP38TP38
TP12TP12
TP11TP11
STP9STP9
STP8STP8
VCCNS_REF
R282 10K-04 R282 10K-04
VCC25A
FB34
FB34
FB120-08
FB120-08
1 2
CPU_VDDIO_SUS
1 2
R216
R216
CPU_M_VREF_SUS CPU_VDDIO_SUS
100-1
100-1
0.25W
1 2
C216
C216
C215
R215
R215
100-1
100-1
C215
.1U-04
.1U-04
1000P-04
1000P-04
2 1
2 1
VCC25A for CPU PLL
VDDA_EN
1 2
+12V
8 4
3
+
+
2
-
-
R283 0-04-SHR283 0-04-SH
1 2
1 2
R284
R284
10K-04-O
10K-04-O
U23A
U23A
1
OP358-S
OP358-S
2.5V / 0.2A
CPU_VDDA_RUN
C218
C218
C217
C217
C222
.22U-06
.22U-06
1 2
1 2
1 2
1 2
C222
3300P-04-O
3300P-04-O
2 1
TP43TP43
2 1
1 2
R196
R196
169-1-04
169-1-04
2 1
LDT_RST- 3,19,27
CPU_TDI 3
CPU_TRST- 3
CPU_TCK 3
CPU_TMS 3
CPU_DBREQ_ 3
TP29TP29
TP27TP27
TP19TP19
STP17 STP17
TP25TP25
TP18TP18
TP35TP35
STP13 STP13
STP12 STP12
STP16 STP16
STP14 STP14
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
CPU_PWRGD
LDT_STOPLDT_RST-
CPU_PRESENT_L_15
CPU_SIC
CPU_SID
CPU_SA0
TP22TP22
CPU_ALERT_
STP11 STP11
CPU_VDD_FB_H
CPU_VDD_FB_L
CPU_VDDIO_PWRGD
CPU_VTT_SUS_SENSE
STP25 STP25
CPU_M_ZN
CPU_M_ZP
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST25_H_BYPASSCLK_L
CPU_TEST19_PLLTEST0
CPU_TEST18_PLLTEST1
CPU_TEST17_BP3
CPU_TEST16_BP2
CPU_TEST15_BP1
CPU_TEST14_BP0
CPU_TEST12_SCANSHIFTENB
CPU_TEST7_ANALOG_T
CPU_TEST6_DIECRACKMON
CPU_TEST3_GATE0
CPU_TEST2_DRAIN0
CPUD
CPUD
C10
VDDA_1
D10
VDDA_2
MISC.
CLKIN_H
CLKIN_L
PWROK
LDTSTOP_L
RESET_L
CPU_PRESENT_L
SIC
SID
SA0
ALERT_L
TDI
TRST_L
TCK
TMS
DBREQ_L
VDD_FB_H
VDD_FB_L
M_VDDIO_PWRGD
VDDR_SENSE
M_VREF
M_ZN
M_ZP
TEST25_H
TEST25_L
TEST19
TEST18
TEST13
TEST9
TEST17
TEST16
TEST15
TEST14
TEST12
TEST7
TEST6
TEST3
TEST2
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
INT. MISC.
INT. MISC.
RSVD6
RSVD7
RSVD8
ZIP-941P-S
ZIP-941P-S
MISC.
A8
B8
C9
D8
C7
AL3
AL6
AK6
AK4
AL4
AL10
AJ10
AH10
AL9
A5
G2
G1
F3
E12
F12
AH11
AJ11
A10
B10
F10
E9
AJ7
F6
D6
E7
F8
C5
AH9
E5
AJ5
AH7
AJ6
C18
C20
F2
G24
G25
H25
L25
L26
CPU_TEST24_SCANCLK1
CPU_TEST22_SCANSHIFTEN
CPU_TEST21_SCANEN
CPU_TEST20_SCANCLK2
CPU_TEST19_PLLTEST0
CPU_TEST18_PLLTEST1
CPU_TEST15_BP1
CPU_TEST14_BP0
CPU_TEST12_SCANSHIFTENB
CPU_PRESENT_L_15
CPU_SA0
CPU_PWRGD
LDT_STOP-
LDT_RST-
CORE_TYPE
SVC/VID3
SVD/VID2
PVIEN/VID1
THERMDC
THERMDA
THERMTRIP_L
PROCHOT_L
DBRDY
VDDIO_FB_H
VDDIO_FB_L
VDDNB_FB_H
VDDNB_FB_L
PSI_L
HTREF1
HTREF0
TEST29_H
TEST29_L
TEST24
TEST23
TEST22
TEST21
TEST20
TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
300-04
300-04
1 2
R206
R206
300-04
300-04
1 2
R213
R213
300-04
300-04
1 2
R207
R207
300-04
300-04
1 2
R199
R199
300-04
300-04
1 2
R202
R202
300-04
300-04
1 2
R205
R205
300-04
300-04
1 2
R201
R201
300-04
300-04
1 2
R190
R190
300-04
300-04
1 2
R211
R211
1 2
R193 0-04-OR193 0-04-O
1 2
R191 0-04R191 0-04
2 1
C275 180P-04-O C275 180P-04-O
2 1
C273 180P-04-O C273 180P-04-O
2 1
C274 180P-04-O C274 180P-04-O
G5
D2
VID5
D1
VID4
C1
E3
E2
E1
VID0
AG9
AG8
AK7
AL7
AK10
TDO
B6
AK11
AL11
G4
G3
F1
V8
V7
C11
D11
AK8
AH8
AJ9
AL8
AJ8
J10
H9
AK9
AK5
G7
D4
L30
L31
AD25
AE24
AE25
AJ18
AJ20
AK3
10U-08
10U-08
2 1
2 1
C202 3900P-04 C202 3900P-04
CPU_CLKP
C204 3900P-04 C204 3900P-04
CPU_CLKN CPU_SVD
SMBCK 7,8,10,12,23,26,29,30,36
SMBDT 7,8,10,12,23,26,29,30,36
R217 39.2-1-04 R217 39.2-1-04
R219 39.2-1-04 R219 39.2-1-04
R208 510-1-04 R208 510-1-04
R209 510-1-04 R209 510-1-04
VCC3
D S
Q17
Q17
2N7002-S
2N7002-S
G
VCC25A
1 2
EC52
EC52
100U-16DE
100U-16DE
CPU_CORE_TYPE_L
CPU_SVC
CPU_PVEN
CPU_THERMDC
CPU_THERMDA
CPU_THERMTRIP_L_15
CPU_PROCHOT_L_15
CPU_TDO
CPU_DBRDY
CPU_VDDIO_FB_H
CPU_VDDIO_FB_L
CPU_VDDNB_FB_H
CPU_VDDNB_FB_L
CPU_PSI-
CPU_HTREF1 CPU_M_VREF
CPU_HTREF0
TP9TP9
CPU_TEST29_H_FBCLKOUT_H
CPU_TEST29_L_FBCLKOUT_L
CPU_TEST24_SCANCLK1
CPU_TEST23_TSTUPD
CPU_TEST22_SCANSHIFTEN
CPU_TEST21_SCANEN
CPU_TEST20_SCANCLK2
CPU_TEST28_H_PLLCHRZ_H
CPU_TEST28_L_PLLCHRZ_L
CPU_TEST27_SINGLECHAIN
CPU_TEST26_BURNIN_L
CPU_TEST10_ANALOGOUT
CPU_TEST8_DIG_T
TP42TP42
R183 1K-04 R183 1K-04
R189 1K-04 R189 1K-04
R184 1K-04 R184 1K-04
CPU_TDO 3
CPU_DBRDY 3
TP44TP44
TP45TP45
TP13TP13
R180 44.2-1 R180 44.2-1
TP10TP10
R179 44.2-1 R179 44.2-1
R218 80.6-1 R218 80.6-1
TP31TP31
STP18 STP18
TP40TP40
TP33TP33
TP23TP23
STP24 STP24
STP20 STP20
TP39TP39
STP15 STP15
STP19 STP19
STP10 STP10
CPU_VDDIO_SUS
1 2
1 2
1 2
CPU_THERMTRIP_L_15 CPU_THERMTRIP_L
CPU_VDDHT
1 2
1 2
1 2
Layout: Route as 80 ohms diff impedance.
Keep trace to resistor < 1" from CPU pins.
CPU_PWRGD
LDT_RSTLDT_STOP-
CPU_PRESENT_L_15
CPU_SIC
CPU_SID
CPU_PROCHOT_L_15
CPU_THERMTRIP_L_15
TP46TP46
CPU_VDDIO_SUS
RN13 300-8P4R RN13 300-8P4R
1
3
5
7
R192 10K-04R192 10K-04
1 2
R198 300K-04R198 300K-04
1 2
R195 300K-04R195 300K-04
1 2
R200 300-04R200 300-04
1 2
R204 300-04R204 300-04
1 2
CPU_VDDIO_SUS
1 2
B
E C
QN7 2N3904-S QN7 2N3904-S
2
4
6
8
R210
R210
10K-04
10K-04
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
AM3 CPU CONTROL&MISC
AM3 CPU CONTROL&MISC
AM3 CPU CONTROL&MISC
A790GXM-AD3
A790GXM-AD3
A790GXM-AD3
1
53 9 Tuesday, February 24, 2009
53 9 Tuesday, February 24, 2009
53 9 Tuesday, February 24, 2009
of
of
of
1.0
1.0
1.0
5
4
3
2
1
CPU_VDD_RUN CPU_VDD_RUN
D D
VCC_CORE
V_DIMM
CPU_VDDNB
VCC1.2
VCC1.2
C C
B B
1.5V
1.2V
CPU_VDD_RUN
CPU_VDDIO_SUS
CPU_VDDNB_RUN
CPU_VDDR
CPU_VDDHT
CPUE
CPUE
B3
VDD_1
C2
VDD_2
C4
VDD_3
D3
VDD_4
D5
VDD_5
E4
VDD_6
E6
VDD_7
F5
VDD_8
F7
VDD_9
G6
VDD_10
G8
VDD_11
H7
VDD_12
H11
VDD_13
H23
VDD_14
J8
VDD_15
J12
VDD_16
J14
VDD_17
J16
VDD_18
J18
VDD_19
J20
VDD_20
J22
VDD_21
J24
VDD_22
K7
VDD_23
K9
VDD_24
K11
VDD_25
K13
VDD_26
K15
VDD_27
K17
VDD_28
K19
VDD_29
K21
VDD_30
K23
VDD_31
L4
VDD_32
L5
VDD_33
L8
VDD_34
L10
VDD_35
L12
VDD_36
L14
VDD_37
L16
VDD_38
L18
VDD_39
L20
VDD_40
L22
VDD_41
M2
VDD_42
M3
VDD_43
M7
VDD_44
M9
VDD_45
M11
VDD_46
M13
VDD_47
M15
VDD_48
M17
VDD_49
M19
VDD_50
M21
VDD_51
M23
VDD_52
N8
VDD_53
N10
VDD_54
N12
VDD_55
N14
VDD_56
N16
VDD_57
N18
VDD_58
N20
VDD_59
N22
VDD_60
P7
VDD_61
P9
VDD_62
P11
VDD_63
P13
VDD_64
P15
VDD_65
P17
VDD_66
P19
VDD_67
P21
VDD_68
P23
VDD_69
R4
VDD_70
R5
VDD_71
R8
VDD_72
R10
VDD_73
R12
VDD_74
R14
VDD_75
R16
VDD_76
R18
VDD_77
R20
VDD_78
R22
VDD_79
T2
VDD_80
T3
VDD_81
T7
VDD_82
T9
VDD_83
T11
VDD_84
T13
VDD_85
ZIP-941P-S
ZIP-941P-S
A3
VSS_1
A7
VSS_2
A9
VSS_3
A11
VSS_4
B4
VSS_5
B9
VSS_6
B11
VSS_7
B14
VSS_8
B16
VSS_9
B18
VSS_10
B20
VSS_11
B22
VSS_12
B24
VSS_13
B26
VSS_14
B28
VSS_15
B30
VSS_16
C3
VSS_17
D14
VSS_18
D16
VSS_19
D18
VSS_20
D20
VSS_21
D22
VSS_22
D24
VSS_23
D26
VSS_24
D28
VSS_25
D30
VSS_26
E11
VSS_27
F4
VSS_28
F14
VSS_29
F16
VSS_30
F18
VSS_31
F20
VSS_32
F22
VSS_33
F24
VSS_34
F26
VSS_35
F28
VSS_36
F30
VSS_37
G9
VSS_38
G11
VSS_39
H8
VSS_40
H10
VSS_41
H12
VSS_42
H14
VSS_43
H16
VSS_44
H18
VSS_45
H24
VSS_46
H26
VSS_47
H28
VSS_48
H30
VSS_49
J4
VSS_50
POWER/GND1
POWER/GND1
J5
VSS_51
J7
VSS_52
J9
VSS_53
J11
VSS_54
J13
VSS_55
J15
VSS_56
J17
VSS_57
J19
VSS_58
J21
VSS_59
J23
VSS_60
K2
VSS_61
K3
VSS_62
K8
VSS_63
K10
VSS_64
K12
VSS_65
K14
VSS_66
K16
VSS_67
K18
VSS_68
K20
VSS_69
K22
VSS_70
K24
VSS_71
K26
VSS_72
K28
VSS_73
K30
VSS_74
L7
VSS_75
L9
VSS_76
L11
VSS_77
L13
VSS_78
L15
VSS_79
L17
VSS_80
L19
VSS_81
L21
VSS_82
L23
VSS_83
M8
VSS_84
M10
VSS_85
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AC10
AC12
AC14
AC16
AC18
AC20
AC22
AD11
AD23
AE10
AE12
AF11
CPUF
CPUF
T15
VDD_86
T17
VDD_87
T19
VDD_88
T21
VDD_89
T23
VDD_90
U8
VDD_91
U10
VDD_92
U12
VDD_93
U14
VDD_94
U16
VDD_95
U18
VDD_96
U20
VDD_97
U22
VDD_98
V9
VDD_99
V11
VDD_100
V13
VDD_101
V15
VDD_102
V17
VDD_103
V19
VDD_104
V21
VDD_105
V23
VDD_106
W4
VDD_107
W5
VDD_108
W8
VDD_109
W10
VDD_110
W12
VDD_111
W14
VDD_112
W16
VDD_113
W18
VDD_114
W20
VDD_115
W22
VDD_116
Y2
VDD_117
Y3
VDD_118
Y7
VDD_119
Y9
VDD_120
Y11
VDD_121
Y13
VDD_122
Y15
VDD_123
Y17
VDD_124
Y19
VDD_125
Y21
VDD_126
Y23
VDD_127
AA8
VDD_128
VDD_129
VDD_130
VDD_131
VDD_132
VDD_133
VDD_134
POWER/GND2
POWER/GND2
VDD_135
AB7
VDD_136
AB9
VDD_137
VDD_138
VDD_139
VDD_140
VDD_141
VDD_142
VDD_143
VDD_144
AC4
VDD_145
AC5
VDD_146
AC8
VDD_147
VDD_148
VDD_149
VDD_150
VDD_151
VDD_152
VDD_153
VDD_154
AD2
VDD_155
AD3
VDD_156
AD7
VDD_157
AD9
VDD_158
VDD_159
VDD_160
VDD_161
VDD_162
AF7
VDD_163
AF9
VDD_164
VDD_165
AG4
VDD_166
AG5
VDD_167
AG7
VDD_168
AH2
VDD_169
AH3
VDD_170
ZIP-941P-S
ZIP-941P-S
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
M12
M14
M16
M18
M20
M22
N4
N5
N7
N9
N11
N13
N15
N17
N19
N21
N23
P2
P3
P8
P10
P12
P14
P16
P18
P20
P22
R7
R9
R11
R13
R15
R17
R19
R21
R23
T8
T10
T12
T14
T16
T18
T20
T22
U4
U5
U7
U9
U11
U13
U15
U17
U19
U21
U23
V2
V3
V10
V12
V14
V16
V18
V20
V22
W7
W9
W11
W13
W15
W17
W19
W21
W23
Y8
Y10
Y12
Y14
Y16
Y18
Y20
Y22
AA4
AA5
AA7
AA9
CPU_VDDNB_RUN CPU_VDDHT
A4
A6
B5
B7
C6
C8
D7
D9
E8
E10
F9
F11
G10
G12
B2
H20
AE7
CPU_VDDNB_RUN
C206
C206
10U-X5-08
10U-X5-08
2 1
Processor Power and Ground
CPUG
CPUG
VDDNB_1
VDDNB_2
VDDNB_3
VDDNB_4
VDDNB_5
VDDNB_6
VDDNB_7
VDDNB_8
VDDNB_9
VDDNB_10
VDDNB_11
VDDNB_12
VDDNB_13
VDDNB_14
NP/RSVD
NP/VSS1
NP/VSS2
ZIP-941P-S
ZIP-941P-S
CPU_VDDHT
C209
C209
10U-X5-08
10U-X5-08
2 1
C230
C230
10U-X5-08
10U-X5-08
2 1
POWER/GND3
POWER/GND3
C190
C190
10U-X5-08
10U-X5-08
2 1
C182
C182
.22U-06
.22U-06
2 1
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
C196
C196
.22U-06
.22U-06
2 1
C186
C186
180P-04
180P-04
2 1
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AB2
AB3
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC7
AC9
AC11
AC13
AC15
AC17
AC19
AC21
AC23
AD8
AD10
AD12
AD14
AD16
AD20
AD22
AD24
AE4
AE5
AE11
AF2
AF3
AF8
AF10
AF12
AF14
AF16
2 1
2 1
C198
C198
.22U-06
.22U-06
C184
C184
180P-04
180P-04
ELT1ELT1
VDDR_HT3
CPU_VDDIO_SUS
C195
C195
.01U-04
.01U-04
2 1
CPUH
CPUH
AJ1
VLDT_A_1
AJ2
VLDT_A_2
AJ3
VLDT_A_3
AJ4
VLDT_A_4
A12
VDDR_1
B12
VDDR_2
C12
VDDR_3
D12
VDDR_4
M24
VDDIO_1
M26
VDDIO_2
M28
VDDIO_3
M30
VDDIO_4
P24
VDDIO_5
P26
VDDIO_6
P28
VDDIO_7
P30
VDDIO_8
T24
VDDIO_9
T26
VDDIO_10
T28
VDDIO_11
T30
VDDIO_12
V25
VDDIO_13
V26
VDDIO_14
V28
VDDIO_15
V30
VDDIO_16
Y24
VDDIO_17
Y26
VDDIO_18
Y28
VDDIO_19
Y29
VDDIO_20
AB24
VDDIO_21
AB26
VDDIO_22
AB28
VDDIO_23
AB30
VDDIO_24
AC24
VDDIO_25
AD26
VDDIO_26
AD28
VDDIO_27
AD30
VDDIO_28
AF30
VDDIO_29
ZIP-941P-S
ZIP-941P-S
CPU_VDDR
C183
C183
10U-X5-08
10U-X5-08
2 1
CPU_VDDR
C231
C231
10U-X5-08
10U-X5-08
2 1
CPU_VDDIO_SUS
C289
C289
10U-X5-08
10U-X5-08
2 1
C185
C185
10U-X5-08
10U-X5-08
2 1
C288
C288
10U-X5-08
10U-X5-08
2 1
VLDT_B_1
VLDT_B_2
VLDT_B_3
VLDT_B_4
VDDR_5
VDDR_6
VDDR_7
VDDR_8
VDDR_9
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
POWER/GND4
POWER/GND4
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
C225
C225
C232
C232
.01U-04
.01U-04
.22U-06
.22U-06
2 1
2 1
SC62
SC62
SC57
SC57
10U-X5-08-X
10U-X5-08-X
10U-X5-08-X
10U-X5-08-X
2 1
2 1
H1
H2
H5
H6
AG12
AH12
AJ12
AK12
AL12
AF18
AF20
AF22
AF24
AF26
AF28
AG10
AG11
AH14
AH16
AH18
AH20
AH22
AH24
AH26
AH28
AH30
AK2
AK14
AK16
AK18
AK20
AK22
AK24
AK26
AK28
AK30
AL5
VDDR_HT3
2 1
SC55
SC55
180P-04-X
180P-04-X
VLDT_HT3_RUN_B
CPU_VDDR
C2261UC226
1U
2 1
SC56
SC56
180P-04-X
180P-04-X
2 1
2 1
C229
C229
10U-X5-08
10U-X5-08
2 1
C178
C178
10U-X5-08
10U-X5-08
Bottom Side Decoupling
CPU_VDDIO_SUS VDDR_HT3 CPU_VDD_RUN CPU_VDDNB_RUN
C189
C189
C176
C350
C350
SC61
SC61
SC60
SC60
SC59
22U-12-O
22U-12-O
10U-X5-08-X
10U-X5-08-X
2 1
2 1
CPU_VDD_RUN
A A
2 1
SC33
SC33
22U-12-O
22U-12-O
2 1
5
SC46
SC46
22U-12-O
22U-12-O
10U-X5-08-X
10U-X5-08-X
2 1
SC54
SC54
10U-X5-08-X
10U-X5-08-X
2 1
SC59
10U-X5-08-X
10U-X5-08-X
2 1
SC53
SC53
10U-X5-08-X
10U-X5-08-X
2 1
SC58
SC58
10U-X5-08-X
10U-X5-08-X
2 1
SC48
SC48
10U-X5-08-X
10U-X5-08-X
2 1
C284
C284
.01U-04
.01U-04
2 1
SC41
SC41
10U-X5-08-X
10U-X5-08-X
2 1
C316
C316
.01U-04
.01U-04
2 1
SC34
SC34
10U-X5-08-X
10U-X5-08-X
2 1
C278
C278
.22U-06
.22U-06
2 1
SC47
SC47
10U-X5-08-X
10U-X5-08-X
2 1
4
C277
C277
.22U-06
.22U-06
2 1
SC52
SC52
10U-X5-08-X
10U-X5-08-X
2 1
C283
C283
180P-04
180P-04
2 1
SC45
SC45
10U-X5-08-X
10U-X5-08-X
2 1
C162
C162
10U-X5-08
10U-X5-08
2 1
2 1
C163
C163
10U-X5-08
10U-X5-08
SC40
SC40
10U-X5-08-X
10U-X5-08-X
2 1
SC42
SC42
10U-X5-08-X
10U-X5-08-X
2 1
2 1
C191
C191
10U-X5-08
10U-X5-08
SC49
SC49
10U-X5-08-X
10U-X5-08-X
2 1
3
2 1
2 1
C175
C175
.22U-06
.22U-06
SC39
SC39
10U-X5-08-X
10U-X5-08-X
2 1
C176
.01U-04
.01U-04
2 1
SC38
SC38
10U-X5-08-X
10U-X5-08-X
2 1
.01U-04
.01U-04
SC44
SC44
10U-X5-08-X
10U-X5-08-X
2 1
SC50
SC50
10U-X5-08-X
10U-X5-08-X
2 1
SC51
SC51
10U-X5-08-X
10U-X5-08-X
2 1
C228 .22U-06 C228 .22U-06
2 1
C227 .22U-06 C227 .22U-06
2 1
SC37
SC37
10U-X5-08-X
10U-X5-08-X
2 1
C172 .22U-06 C172 .22U-06
2 1
EMC
SC43
SC43
SC36
SC36
.22U-X
.22U-X
.22U-X
.22U-X
2 1
2 1
2
2 1
SC35
SC35
.01U-04-X
.01U-04-X
SC32
SC32
.01U-04-X
.01U-04-X
2 1
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
CPU_VDDNB_RUN
C197
C197
.1U-04
.1U-04
2 1
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
AM3 CPU PWR&GND
AM3 CPU PWR&GND
AM3 CPU PWR&GND
A790GXM-AD3
A790GXM-AD3
A790GXM-AD3
1
63 9 Tuesday, February 24, 2009
63 9 Tuesday, February 24, 2009
63 9 Tuesday, February 24, 2009
of
of
of
1.0
1.0
1.0
5
4
3
2
1
A Chanel
DIMM3A
DIMM1A
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
D D
C C
B B
VCC3 VCC3
SMBCK 5,8,10,12,23,26,29,30,36
SMBDT 5,8,10,12,23,26,29,30,36
MEM_MA_DATA[63..0] 4
MEM_MA_CHECK[7..0] 4
MEM_MA_ADD[15..0] 4
MEM_MA_BANK0 4
MEM_MA_BANK1 4
MEM_MA_BANK2 4
MEM_MA_DM[7..0] 4
MEM_MA_DM8 4
MEM_MA_DQS_H[8..0] 4
MEM_MA_DQS_L[8..0] 4
MEM_MA_RAS- 4
MEM_MA_CAS- 4
MEM_MA_WE- 4
MEM_MA_CKE0 4
MEM_MA_CKE1 4
MEM_MA_EVENT_L 4
MEM_MA_RESET- 4
MEM_MA0_CS_L0 4
MEM_MA0_CS_L1 4
MEM_MA0_ODT0 4
MEM_MA0_ODT1 4
MEM_MA0_CLK0_P 4
MEM_MA0_CLK0_N 4
MEM_MA0_CLK1_P 4
MEM_MA0_CLK1_N 4
MEM_MA1_CS_L0 4
MEM_MA1_CS_L1 4
MEM_MA1_ODT0 4
MEM_MA1_ODT1 4
MEM_MA1_CLK0_P 4
MEM_MA1_CLK0_N 4
MEM_MA1_CLK1_P 4
MEM_MA1_CLK1_N 4
MEM_MA_DATA[63..0]
MEM_MA_CHECK[7..0]
MEM_MA_ADD[15..0]
MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2
MEM_MA_DM[7..0]
MEM_MA_DM8
MEM_MA_DQS_H[8..0]
MEM_MA_DQS_L[8..0]
MEM_MA_RASMEM_MA_CASMEM_MA_WE-
MEM_MA_CKE0
MEM_MA_CKE1
MEM_MA_EVENT_L
MEM_MA_RESET-
MEM_MA0_CS_L0
MEM_MA0_CS_L1
MEM_MA0_ODT0
MEM_MA0_ODT1
MEM_MA0_CLK0_P
MEM_MA0_CLK0_N
MEM_MA0_CLK1_P
MEM_MA0_CLK1_N
MEM_MA1_CS_L0
MEM_MA1_CS_L1
MEM_MA1_ODT0
MEM_MA1_ODT1
MEM_MA1_CLK0_P
MEM_MA1_CLK0_N
MEM_MA1_CLK1_P
MEM_MA1_CLK1_N
SCLK0
SDATA0
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
MEM_MA_DM8
MEM_MA_DQS_L0
MEM_MA_DQS_H0
MEM_MA_DQS_L1
MEM_MA_DQS_H1
MEM_MA_DQS_L2
MEM_MA_DQS_H2
MEM_MA_DQS_L3
MEM_MA_DQS_H3
MEM_MA_DQS_L4
MEM_MA_DQS_H4
MEM_MA_DQS_L5
MEM_MA_DQS_H5
MEM_MA_DQS_L6
MEM_MA_DQS_H6
MEM_MA_DQS_L7
MEM_MA_DQS_H7
MEM_MA_DQS_L8 MEM_MA_DATA43
MEM_MA_DQS_H8
MEM_MA_RASMEM_MA_CASMEM_MA_WE-
MEM_MA0_CS_L0
MEM_MA0_CS_L1
MEM_MA_CKE0
MEM_MA_CKE1
MEM_MA0_ODT0
MEM_MA0_ODT1
MEM_MA0_CLK0_P
MEM_MA0_CLK0_N
MEM_MA0_CLK1_P
MEM_MA0_CLK1_N
SCLK0
SDATA0
VCC3
MEM_MA_EVENT_L MEM_MA_EVENT_L
MEM_MA_RESET-
SMBus Addressing
A A
Device
DIMMA0
DIMMB0
DIMMA1
DIMMB1
SMBus 0
8-bit Address (hex)
5
A0
A2
A4
A6
4
188
181
61
180
59
58
178
56
177
175
70
55
174
196
172
171
71
190
52
125
134
143
152
203
212
221
230
161
6
7
15
16
24
25
33
34
84
85
93
94
102
103
111
112
42
43
192
74
73
193
76
50
169
195
77
184
185
63
64
117
237
118
238
236
167
48
49
187
198
168
53
68
79
DIMM1A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
BA0
BA1
BA2
DM0/DQS9
DM1/DQS10
DM2/DQS11
DM3/DQS12
DM4/DQS13
DM5/DQS14
DM6/DQS15
DM7/DQS16
DM8/DQS17
DQS0
DQS0
DQS1
DQS1
DQS2
DQS2
DQS3
DQS3
DQS4
DQS4
DQS5
DQS5
DQS6
DQS6
DQS7
DQS7
DQS8
DQS8
RAS
CAS
WE
S0
S1
CKE0
CKE1
ODT
RSVD/ODT1
CK0
CK0
CK1
CK1
SA0
SA1
SCL
SDA
VDDSPD
TEST
FREE1
FREE2
FREE3
FREE4
RESET
ERR_OUT
PAR_IN
RSVD/SPD
DDR3-240-OR
DDR3-240-OR
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQS9
DQS10
DQS11
DQS12
DQS13
DQS14
DQS15
DQS16
DQS17
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
3
4
9
10
122
123
128
129
12
13
18
19
131
132
137
138
21
22
27
28
140
141
146
147
30
31
36
37
149
150
155
156
81
82
87
88
200
201
206
207
90
91
96
97
209
210
215
216
99
100
105
106
218
219
224
225
108
109
114
115
227
228
233
234
39
40
45
46
158
159
164
165
126
135
144
153
204
213
222
231
162
3
MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63
MEM_MA_CHECK0
MEM_MA_CHECK1
MEM_MA_CHECK2
MEM_MA_CHECK3
MEM_MA_CHECK4
MEM_MA_CHECK5
MEM_MA_CHECK6
MEM_MA_CHECK7
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
MEM_MA_DM8
MEM_MA_DQS_L0
MEM_MA_DQS_H0
MEM_MA_DQS_L1
MEM_MA_DQS_H1
MEM_MA_DQS_L2
MEM_MA_DQS_H2
MEM_MA_DQS_L3
MEM_MA_DQS_H3
MEM_MA_DQS_L4
MEM_MA_DQS_H4
MEM_MA_DQS_L5
MEM_MA_DQS_H5
MEM_MA_DQS_L6
MEM_MA_DQS_H6
MEM_MA_DQS_L7
MEM_MA_DQS_H7
MEM_MA_DQS_L8
MEM_MA_DQS_H8
MEM_MA_RASMEM_MA_CASMEM_MA_WE-
MEM_MA1_CS_L0
MEM_MA1_CS_L1
MEM_MA_CKE0
MEM_MA_CKE1
MEM_MA1_ODT0
MEM_MA1_ODT1
MEM_MA1_CLK0_P
MEM_MA1_CLK0_N
MEM_MA1_CLK1_P
MEM_MA1_CLK1_N
VCC3
SCLK0
SDATA0
VCC3
MEM_MA_RESET-
DIMM3A
188
A0
181
A1
61
A2
180
A3
59
A4
58
A5
178
A6
56
A7
177
A8
175
A9
70
A10
55
A11
174
A12
196
A13
172
A14
171
A15
71
BA0
190
BA1
52
BA2
125
DM0/DQS9
134
DM1/DQS10
143
DM2/DQS11
152
DM3/DQS12
203
DM4/DQS13
212
DM5/DQS14
221
DM6/DQS15
230
DM7/DQS16
161
DM8/DQS17
6
DQS0
7
DQS0
15
DQS1
16
DQS1
24
DQS2
25
DQS2
33
DQS3
34
DQS3
84
DQS4
85
DQS4
93
DQS5
94
DQS5
102
DQS6
103
DQS6
111
DQS7
112
DQS7
42
DQS8
43
DQS8
192
RAS
74
CAS
73
WE
193
S0
76
S1
50
CKE0
169
CKE1
195
ODT
77
RSVD/ODT1
184
CK0
185
CK0
63
CK1
64
CK1
117
SA0
237
SA1
118
SCL
238
SDA
236
VDDSPD
167
TEST
48
FREE1
49
FREE2
187
FREE3
198
FREE4
168
RESET
53
ERR_OUT
68
PAR_IN
79
RSVD/SPD
DDR3-240-Y
DDR3-240-Y
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
DQS10
DQS11
DQS12
DQS13
DQS14
DQS15
DQS16
DQS17
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
DDR3 DIMM A CH
DDR3 DIMM A CH
DDR3 DIMM A CH
MEM_MA_DATA0
3
DQ0
MEM_MA_DATA1
4
DQ1
MEM_MA_DATA2
9
DQ2
MEM_MA_DATA3
10
DQ3
MEM_MA_DATA4
122
DQ4
MEM_MA_DATA5
123
DQ5
MEM_MA_DATA6
128
DQ6
MEM_MA_DATA7
129
DQ7
MEM_MA_DATA8
12
DQ8
MEM_MA_DATA9
13
DQ9
MEM_MA_DATA10
18
DQ10
MEM_MA_DATA11
19
DQ11
MEM_MA_DATA12
131
DQ12
MEM_MA_DATA13
132
DQ13
MEM_MA_DATA14
137
DQ14
MEM_MA_DATA15
138
DQ15
MEM_MA_DATA16
21
DQ16
MEM_MA_DATA17
22
DQ17
MEM_MA_DATA18
27
DQ18
MEM_MA_DATA19
28
DQ19
MEM_MA_DATA20
140
DQ20
MEM_MA_DATA21
141
DQ21
MEM_MA_DATA22
146
DQ22
MEM_MA_DATA23
147
DQ23
MEM_MA_DATA24
30
DQ24
MEM_MA_DATA25
31
DQ25
MEM_MA_DATA26
36
DQ26
MEM_MA_DATA27
37
DQ27
MEM_MA_DATA28
149
DQ28
MEM_MA_DATA29
150
DQ29
MEM_MA_DATA30
155
DQ30
MEM_MA_DATA31
156
DQ31
MEM_MA_DATA32
81
DQ32
MEM_MA_DATA33
82
DQ33
MEM_MA_DATA34
87
DQ34
MEM_MA_DATA35
88
DQ35
MEM_MA_DATA36
200
DQ36
MEM_MA_DATA37
201
DQ37
MEM_MA_DATA38
206
DQ38
MEM_MA_DATA39
207
DQ39
MEM_MA_DATA40
90
DQ40
MEM_MA_DATA41
91
DQ41
MEM_MA_DATA42
96
DQ42
97
DQ43
MEM_MA_DATA44
209
DQ44
MEM_MA_DATA45
210
DQ45
MEM_MA_DATA46
215
DQ46
MEM_MA_DATA47
216
DQ47
MEM_MA_DATA48
99
DQ48
MEM_MA_DATA49
100
DQ49
MEM_MA_DATA50
105
DQ50
MEM_MA_DATA51
106
DQ51
MEM_MA_DATA52
218
DQ52
MEM_MA_DATA53
219
DQ53
MEM_MA_DATA54
224
DQ54
MEM_MA_DATA55
225
DQ55
MEM_MA_DATA56
108
DQ56
MEM_MA_DATA57
109
DQ57
MEM_MA_DATA58
114
DQ58
MEM_MA_DATA59
115
DQ59
MEM_MA_DATA60
227
DQ60
MEM_MA_DATA61
228
DQ61
MEM_MA_DATA62
233
DQ62
MEM_MA_DATA63
234
DQ63
MEM_MA_CHECK0
39
CB0
MEM_MA_CHECK1
40
CB1
MEM_MA_CHECK2
45
CB2
MEM_MA_CHECK3
46
CB3
MEM_MA_CHECK4
158
CB4
MEM_MA_CHECK5
159
CB5
MEM_MA_CHECK6
164
CB6
MEM_MA_CHECK7
165
CB7
126
DQS9
135
144
153
204
213
222
231
162
A790GXM-AD3
A790GXM-AD3
A790GXM-AD3
1
1.0
1.0
73 9 Tuesday, February 24, 2009
73 9 Tuesday, February 24, 2009
73 9 Tuesday, February 24, 2009
1.0
of
of
of
5
4
3
2
1
B Chanel
DIMM2A
MEM_MB_ADD0
MEM_MB_ADD1
VCC3 VCC3
D D
MEM_MB_DATA[63..0] 4
MEM_MB_CHECK[7..0] 4
MEM_MB_ADD[15..0] 4
MEM_MB_BANK0 4
MEM_MB_BANK1 4
MEM_MB_BANK2 4
MEM_MB_DM[7..0] 4
C C
B B
MEM_MB_DM8 4
MEM_MB_DQS_H[8..0] 4
MEM_MB_DQS_L[8..0] 4
MEM_MB_RAS- 4
MEM_MB_CAS- 4
MEM_MB_WE- 4
MEM_MB_CKE0 4
MEM_MB_CKE1 4
MEM_MB_EVENT_L 4
MEM_MB_RESET- 4
MEM_MB0_CS_L0 4
MEM_MB0_CS_L1 4
MEM_MB0_ODT0 4
MEM_MB0_ODT1 4
MEM_MB0_CLK0_P 4
MEM_MB0_CLK0_N 4
MEM_MB0_CLK1_P 4
MEM_MB0_CLK1_N 4
MEM_MB1_CS_L0 4
MEM_MB1_CS_L1 4
MEM_MB1_ODT0 4
MEM_MB1_ODT1 4
MEM_MB1_CLK0_P 4
MEM_MB1_CLK0_N 4
MEM_MB1_CLK1_P 4
MEM_MB1_CLK1_N 4
SMBCK 5,7,10,12,23,26,29,30,36
SMBDT 5,7,10,12,23,26,29,30,36
SCLK0
SDATA0
MEM_MB_DATA[63..0]
MEM_MB_CHECK[7..0]
MEM_MB_ADD[15..0]
MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2
MEM_MB_DM[7..0]
MEM_MB_DM8
MEM_MB_DQS_H[8..0]
MEM_MB_DQS_L[8..0]
MEM_MB_RASMEM_MB_CASMEM_MB_WE-
MEM_MB_CKE0
MEM_MB_CKE1
MEM_MB_EVENT_L
MEM_MB_RESET-
MEM_MB0_CS_L0
MEM_MB0_CS_L1
MEM_MB0_ODT0
MEM_MB0_ODT1
MEM_MB0_CLK0_P
MEM_MB0_CLK0_N
MEM_MB0_CLK1_P
MEM_MB0_CLK1_N
MEM_MB1_CS_L0
MEM_MB1_CS_L1
MEM_MB1_ODT0
MEM_MB1_ODT1
MEM_MB1_CLK0_P
MEM_MB1_CLK0_N
MEM_MB1_CLK1_P
MEM_MB1_CLK1_N
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
MEM_MB_DM8
MEM_MB_DQS_L0
MEM_MB_DQS_H0
MEM_MB_DQS_L1
MEM_MB_DQS_H1
MEM_MB_DQS_L2
MEM_MB_DQS_H2
MEM_MB_DQS_L3
MEM_MB_DQS_H3
MEM_MB_DQS_L4
MEM_MB_DQS_H4
MEM_MB_DQS_L5
MEM_MB_DQS_H5
MEM_MB_DQS_L6
MEM_MB_DQS_H6
MEM_MB_DQS_L7
MEM_MB_DQS_H7
MEM_MB_DQS_L8
MEM_MB_DQS_H8
MEM_MB_RASMEM_MB_CASMEM_MB_WE-
MEM_MB0_CS_L0
MEM_MB0_CS_L1
MEM_MB_CKE0
MEM_MB_CKE1
MEM_MB0_ODT0
MEM_MB0_ODT1
MEM_MB0_CLK0_P
MEM_MB0_CLK0_N
MEM_MB0_CLK1_P
MEM_MB0_CLK1_N
VCC3
SCLK0
SDATA0
VCC3
MEM_MB_EVENT_L
MEM_MB_RESET-
188
181
61
180
59
58
178
56
177
175
70
55
174
196
172
171
71
190
52
125
134
143
152
203
212
221
230
161
6
7
15
16
24
25
33
34
84
85
93
94
102
103
111
112
42
43
192
74
73
193
76
50
169
195
77
184
185
63
64
117
237
118
238
236
167
48
49
187
198
168
53
68
79
DIMM2A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
BA0
BA1
BA2
DM0/DQS9
DM1/DQS10
DM2/DQS11
DM3/DQS12
DM4/DQS13
DM5/DQS14
DM6/DQS15
DM7/DQS16
DM8/DQS17
DQS0
DQS0
DQS1
DQS1
DQS2
DQS2
DQS3
DQS3
DQS4
DQS4
DQS5
DQS5
DQS6
DQS6
DQS7
DQS7
DQS8
DQS8
RAS
CAS
WE
S0
S1
CKE0
CKE1
ODT
RSVD/ODT1
CK0
CK0
CK1
CK1
SA0
SA1
SCL
SDA
VDDSPD
TEST
FREE1
FREE2
FREE3
FREE4
RESET
ERR_OUT
PAR_IN
RSVD/SPD
DDR3-240-OR
DDR3-240-OR
DQS10
DQS11
DQS12
DQS13
DQS14
DQS15
DQS16
DQS17
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
DQS9
MEM_MB_DATA0
3
MEM_MB_DATA1
4
MEM_MB_DATA2
9
MEM_MB_DATA3
10
MEM_MB_DATA4
122
MEM_MB_DATA5
123
MEM_MB_DATA6
128
MEM_MB_DATA7
129
MEM_MB_DATA8
12
MEM_MB_DATA9
13
MEM_MB_DATA10
18
MEM_MB_DATA11
19
MEM_MB_DATA12
131
MEM_MB_DATA13
132
MEM_MB_DATA14
137
MEM_MB_DATA15
138
MEM_MB_DATA16
21
MEM_MB_DATA17
22
MEM_MB_DATA18
27
MEM_MB_DATA19
28
MEM_MB_DATA20
140
MEM_MB_DATA21
141
MEM_MB_DATA22
146
MEM_MB_DATA23
147
MEM_MB_DATA24
30
MEM_MB_DATA25
31
MEM_MB_DATA26
36
MEM_MB_DATA27
37
MEM_MB_DATA28
149
MEM_MB_DATA29
150
MEM_MB_DATA30
155
MEM_MB_DATA31
156
MEM_MB_DATA32
81
MEM_MB_DATA33
82
MEM_MB_DATA34
87
MEM_MB_DATA35
88
MEM_MB_DATA36
200
MEM_MB_DATA37
201
MEM_MB_DATA38
206
MEM_MB_DATA39
207
MEM_MB_DATA40
90
MEM_MB_DATA41
91
MEM_MB_DATA42
96
MEM_MB_DATA43
97
MEM_MB_DATA44
209
MEM_MB_DATA45
210
MEM_MB_DATA46
215
MEM_MB_DATA47
216
MEM_MB_DATA48
99
MEM_MB_DATA49
100
MEM_MB_DATA50
105
MEM_MB_DATA51
106
MEM_MB_DATA52
218
MEM_MB_DATA53
219
MEM_MB_DATA54
224
MEM_MB_DATA55
225
MEM_MB_DATA56
108
MEM_MB_DATA57
109
MEM_MB_DATA58
114
MEM_MB_DATA59
115
MEM_MB_DATA60
227
MEM_MB_DATA61
228
MEM_MB_DATA62
233
MEM_MB_DATA63
234
MEM_MB_CHECK0
39
MEM_MB_CHECK1
40
MEM_MB_CHECK2
45
MEM_MB_CHECK3
46
MEM_MB_CHECK4
158
MEM_MB_CHECK5
159
MEM_MB_CHECK6
164
MEM_MB_CHECK7
165
126
135
144
153
204
213
222
231
162
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
MEM_MB_DM8
MEM_MB_DQS_L0
MEM_MB_DQS_H0
MEM_MB_DQS_L1
MEM_MB_DQS_H1
MEM_MB_DQS_L2
MEM_MB_DQS_H2
MEM_MB_DQS_L3
MEM_MB_DQS_H3
MEM_MB_DQS_L4
MEM_MB_DQS_H4
MEM_MB_DQS_L5
MEM_MB_DQS_H5
MEM_MB_DQS_L6
MEM_MB_DQS_H6
MEM_MB_DQS_L7
MEM_MB_DQS_H7
MEM_MB_DQS_L8
MEM_MB_DQS_H8
MEM_MB_RASMEM_MB_CASMEM_MB_WE-
MEM_MB1_CS_L0
MEM_MB1_CS_L1
MEM_MB_CKE0
MEM_MB_CKE1
MEM_MB1_ODT0
MEM_MB1_ODT1
MEM_MB1_CLK0_P
MEM_MB1_CLK0_N
MEM_MB1_CLK1_P
MEM_MB1_CLK1_N
VCC3
SCLK0
SDATA0
VCC3
MEM_MB_EVENT_L
MEM_MB_RESET-
188
181
61
180
59
58
178
56
177
175
70
55
174
196
172
171
71
190
52
125
134
143
152
203
212
221
230
161
6
7
15
16
24
25
33
34
84
85
93
94
102
103
111
112
42
43
192
74
73
193
76
50
169
195
77
184
185
63
64
117
237
118
238
236
167
48
49
187
198
168
53
68
79
DIMM4A
DIMM4A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
BA0
BA1
BA2
DM0/DQS9
DM1/DQS10
DM2/DQS11
DM3/DQS12
DM4/DQS13
DM5/DQS14
DM6/DQS15
DM7/DQS16
DM8/DQS17
DQS0
DQS0
DQS1
DQS1
DQS2
DQS2
DQS3
DQS3
DQS4
DQS4
DQS5
DQS5
DQS6
DQS6
DQS7
DQS7
DQS8
DQS8
RAS
CAS
WE
S0
S1
CKE0
CKE1
ODT
RSVD/ODT1
CK0
CK0
CK1
CK1
SA0
SA1
SCL
SDA
VDDSPD
TEST
FREE1
FREE2
FREE3
FREE4
RESET
ERR_OUT
PAR_IN
RSVD/SPD
DDR3-240-Y
DDR3-240-Y
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
DQS9
DQS10
DQS11
DQS12
DQS13
DQS14
DQS15
DQS16
DQS17
MEM_MB_DATA0
3
MEM_MB_DATA1
4
MEM_MB_DATA2
9
MEM_MB_DATA3
10
MEM_MB_DATA4
122
MEM_MB_DATA5
123
MEM_MB_DATA6
128
MEM_MB_DATA7
129
MEM_MB_DATA8
12
MEM_MB_DATA9
13
MEM_MB_DATA10
18
MEM_MB_DATA11
19
MEM_MB_DATA12
131
MEM_MB_DATA13
132
MEM_MB_DATA14
137
MEM_MB_DATA15
138
MEM_MB_DATA16
21
MEM_MB_DATA17
22
MEM_MB_DATA18
27
MEM_MB_DATA19
28
MEM_MB_DATA20
140
MEM_MB_DATA21
141
MEM_MB_DATA22
146
MEM_MB_DATA23
147
MEM_MB_DATA24
30
MEM_MB_DATA25
31
MEM_MB_DATA26
36
MEM_MB_DATA27
37
MEM_MB_DATA28
149
MEM_MB_DATA29
150
MEM_MB_DATA30
155
MEM_MB_DATA31
156
MEM_MB_DATA32
81
MEM_MB_DATA33
82
MEM_MB_DATA34
87
MEM_MB_DATA35
88
MEM_MB_DATA36
200
MEM_MB_DATA37
201
MEM_MB_DATA38
206
MEM_MB_DATA39
207
MEM_MB_DATA40
90
MEM_MB_DATA41
91
MEM_MB_DATA42
96
MEM_MB_DATA43
97
MEM_MB_DATA44
209
MEM_MB_DATA45
210
MEM_MB_DATA46
215
MEM_MB_DATA47
216
MEM_MB_DATA48
99
MEM_MB_DATA49
100
MEM_MB_DATA50
105
MEM_MB_DATA51
106
MEM_MB_DATA52
218
MEM_MB_DATA53
219
MEM_MB_DATA54
224
MEM_MB_DATA55
225
MEM_MB_DATA56
108
MEM_MB_DATA57
109
MEM_MB_DATA58
114
MEM_MB_DATA59
115
MEM_MB_DATA60
227
MEM_MB_DATA61
228
MEM_MB_DATA62
233
MEM_MB_DATA63
234
MEM_MB_CHECK0
39
MEM_MB_CHECK1
40
MEM_MB_CHECK2
45
MEM_MB_CHECK3
46
MEM_MB_CHECK4
158
MEM_MB_CHECK5
159
MEM_MB_CHECK6
164
MEM_MB_CHECK7
165
126
135
144
153
204
213
222
231
162
A A
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
DDR3 DIMM B CH
DDR3 DIMM B CH
DDR3 DIMM B CH
A790GXM-AD3
A790GXM-AD3
A790GXM-AD3
1
83 9 Tuesday, February 24, 2009
83 9 Tuesday, February 24, 2009
83 9 Tuesday, February 24, 2009
of
of
of
1.0
1.0
1.0
5
4
3
2
1
DE-COUPLING CAP FOR DIMMs
1.5V
MEM_VDDIO_SUS V_DIMM
D D
0.75V
DDR3_VTT DDR_VTT
MEM_VDDIO_SUS DDR3_VTT
1 2
EC65
EC65
1000U-6.3DL
1000U-6.3DL
C308
C309
C309
C311
C311
.1U-04
.1U-04
.1U-04
2 1
.1U-04
2 1
2 1
C315
C315
.1U-04
.1U-04
2 1
C308
.1U-04
.1U-04
C302
C302
C310
C310
.1U-04
.1U-04
.1U-04
2 1
.1U-04
2 1
2 1
C299
C299
.1U-04
.1U-04
C312
C312
.1U-04
.1U-04
2 1
C292
C292
.1U-04
.1U-04
2 1
2 1
C318
.1U-04
.1U-04
.1U-04
.1U-04
2 1
C319
C319
C318
DIMM1B
DIMM1B
2
VSS1
5
VSS2
8
VSS3
11
VSS4
14
VSS5
17
VSS6
20
VSS7
23
VSS8
26
VSS9
29
VSS10
32
C C
B B
35
38
41
44
47
80
83
86
89
92
95
98
101
104
107
110
113
116
119
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
199
166
202
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
DDR3-240-OR
DDR3-240-OR
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VTT1
VTT2
VREFDQ
VREFCA
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
MEM_VDDIO_SUS
51
54
57
60
62
65
66
69
72
75
78
170
173
176
179
182
183
186
189
191
194
DDR3_VTT
197
120
240
1
67
205
208
211
214
217
220
223
226
229
232
235
239
MEM_VREFDQ_SUS
MEM_VREFCA_SUS
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
80
83
86
89
92
95
98
101
104
107
110
113
116
119
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
199
166
202
DIMM3B
DIMM3B
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
DDR3-240-Y
DDR3-240-Y
MEM_VREFDQ_SUS
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VTT1
VTT2
VREFDQ
VREFCA
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
MEM_VDDIO_SUS
51
54
57
60
62
65
66
69
72
75
78
170
173
176
179
182
183
186
189
191
194
DDR3_VTT
197
120
240
1
67
205
208
211
214
217
220
223
226
229
232
235
239
DIMM2B
DIMM2B
2
VSS1
5
VSS2
8
VSS3
11
VSS4
14
VSS5
17
VSS6
20
VSS7
23
VSS8
26
VSS9
29
VSS10
32
VSS11
35
VSS12
38
VSS13
41
VSS14
44
VSS15
47
VSS16
80
VSS17
83
VSS18
86
VSS19
89
VSS20
92
VSS21
95
VSS22
98
VSS23
101
VSS24
104
VSS25
107
VSS26
110
VSS27
113
VSS28
MEM_VREFDQ_SUS
MEM_VREFCA_SUS
116
119
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
199
166
202
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
DDR3-240-OR
DDR3-240-OR
MEM_VREFCA_SUS
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VTT1
VTT2
VREFDQ
VREFCA
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
MEM_VDDIO_SUS
51
54
57
60
62
65
66
69
72
75
78
170
173
176
179
182
183
186
189
191
194
DDR3_VTT
197
120
240
1
67
205
208
211
214
217
220
223
226
229
232
235
239
MEM_VREFDQ_SUS
MEM_VREFCA_SUS
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
80
83
86
89
92
95
98
101
104
107
110
113
116
119
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
199
166
202
DIMM4B
DIMM4B
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
DDR3-240-Y
DDR3-240-Y
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VTT1
VTT2
VREFDQ
VREFCA
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
MEM_VDDIO_SUS
51
54
57
60
62
65
66
69
72
75
78
170
173
176
179
182
183
186
189
191
194
DDR3_VTT
197
120
240
1
67
205
208
211
214
217
220
223
226
229
232
235
239
MEM_VREFDQ_SUS
MEM_VREFCA_SUS
MEM_VDDIO_SUS MEM_VREFDQ_SUS
1 2
A A
5
1 2
R362
R362
100-1
100-1
R359
R359
100-1
100-1
C301
C301
.1U-04-O
.1U-04-O
2 1
C300
C300
.1U-04
.1U-04
2 1
C293
C293
1000P-04
1000P-04
2 1
ELT2 ELT2
Layout: Place within 500
mils of the DIMMB1(4) socket.
4
MEM_VDDIO_SUS MEM_VREFCA_SUS
1 2
R373
R373
C307
C307
100-1
100-1
.1U-04-O
.1U-04-O
2 1
1 2
R372
R372
100-1
100-1
2 1
3
C314
C314
.1U-04
.1U-04
2 1
C313
C313
1000P-04
1000P-04
ELT3 ELT3
Layout: Place within 500
mils of the DIMMB1(4) socket.
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
DDR3 DIMM PWR
DDR3 DIMM PWR
DDR3 DIMM PWR
A790GXM-AD3
A790GXM-AD3
A790GXM-AD3
1
93 9 Tuesday, February 24, 2009
93 9 Tuesday, February 24, 2009
93 9 Tuesday, February 24, 2009
of
of
of
1.0
1.0
1.0
5
4
3
2
1
VCC3 CLK_VDD
FB31
FB31
FB600P-08
FB600P-08
1 2
BC33
BC33
BC35
.1U-04-O
.1U-04-O
CLK_VDD48
MC281UMC28
1U
1 2
CLK_VDD
R160
R160
1M-04-O
1M-04-O
1 2
R163 0-04R163 0-04
R313 0-04 R313 0-04
1 2
1 2
1 2
BC35
.1U-04
.1U-04
2 1
CLK_VDDA
1 2
MC291UMC29
1U
1 2
1 2
OSC_14M_NB_R
OSC_14M_NB
3.3V 33R serial
1.8V 75R/100R
1.1V 150R(R165)
/75R(R162)
2 1
BC36
BC36
.1U-04
.1U-04
CLKA
CLKA
44
VDDA
43
GNDA
60
VDDREF
61
GNDREF
39
VDDSATA
42
GNDSATA
64
VDD48
3
GND48
48
VDDCPU
47
GNDCPU
56
VDDHTT
53
GNDHTT
34
VDDATIG
11
VDDSRC1
16
VDDSRC2
25
VDDSB_SRC
28
GNDATIG1
33
GNDATIG2
10
GNDSRC1
17
GNDSRC2
24
GNDSB_SRC
62
X1
63
X2
52
RESTORE#
4
SMBCLK
5
SMBDAT
51
PD#
59
REF0/SEL_HTT66
58
REF1/SEL_SATA
57
REF2
ICS9LPRS471CS
ICS9LPRS471CS
CPUKG0T_LPRS
CPUKG0C_LPRS
CPUKG1T_LPRS
CPUKG1C_LPRS
ATIG0T_LPRS
ATIG0C_LPRS
ATIG1T_LPRS
ATIG1C_LPRS
ATIG2T_LPRS
ATIG2C_LPRS
ATIG3T_LPRS
ATIG3C_LPRS
SB_SRC0T_LPRS
SB_SRC0C_LPRS
SB_SRC1T_LPRS
SB_SRC1C_LPRS
SRC0T_LPRS
SRC0C_LPRS
SRC1T_LPRS
SRC1C_LPRS
SRC2T_LPRS
SRC2C_LPRS
SRC3T_LPRS
SRC3C_LPRS
SRC4T_LPRS
SRC4C_LPRS
SRC5T_LPRS
SRC5C_LPRS
SRC6T/SATAT_LPRS
SRC6C/SATAC_LPRS
HTT0T/66M_LPRS
HTT0C/66M_LPRS
48MHz_0
48MHz_1
Place R164 less than 100 mils away from Clk. Gen. and
route CPU clock as 100ohm impedence with differential pair
R164 261-04-O R164 261-04-O
1 2
1 2
OSC_14M_SB
OSC_14M_NB
CLK_48M_USB
CLK_48M_SIO
1 2
CC13 22P-04-OCC13 22P-04-O
CC3 22P-04-O CC3 22P-04-O
CC4 10P-04-OCC4 10P-04-O
CC5 22P-04-O CC5 22P-04-O
50
49
46
45
38
37
36
35
32
31
30
29
27
26
23
22
21
20
19
18
15
14
13
12
9
8
7
6
41
40
55
54
2
1
SIO_CLOCK_R
R171 33-04 R171 33-04
R170 33-04 R170 33-04
CPU_CLKIN_H 5
CPU_CLKIN_L 5
NBGFX_CLKP 19
NBGFX_CLKN 19
KG_GFX_S0_CLKP 23
KG_GFX_S0_CLKN 23
KG_GFX_S1_CLKP 23
KG_GFX_S1_CLKN 23
NBSLINK_CLKP 19
NBSLINK_CLKN 19
SBSRC_CLKP 27
SBSRC_CLKN 27
TP8TP8
TP7TP7
GPP_CLK0P 29
GPP_CLK0N 29
GB_CLKP 34
GB_CLKN 34
GB_CLK2P 36
GB_CLK2N 36
GPP_CLK1P 29
GPP_CLK1N 29
NBHTREF_CLKP 19
NBHTREF_CLKN 19
CLK_48M_SIO
CLK_48M_USB 48M_USB_R
2 1
2 1
2 1
2 1
CLK_48M_SIO 31
CLK_48M_USB 26
2 1
D D
1- PLACE ALL THE SERIES TERMINATION
RESISTORS AS CLOSE TO CLK. GEN. AS POSSIBLE
2- ROUTE ALL SRCCLKTx AND SRCCLKCx
AS DIFFERENT PAIR RULE
2 1
2 1
BC34
BC34
MC30
MC30
.1U-04
.1U-04
10U-08
10U-08
3- PUT DECOUPLING CAPS CLOSE TO CLK. GEN. POWER PIN
FB32 FB120-06 FB32 FB120-06
VCC3
VCC3
.1U-04
.1U-04
C149
C149
C91
C91
+12V
C95
C95
+12V
OSC_14M_SB
R161 Open
R161 Add &
New BIOS
1 2
.1U-04
.1U-04
1 2
.1U-04
.1U-04
1 2
OSC_14M_NB 19
C146 56P-04C146 56P-04
1 2
C145 56P-04C145 56P-04
1 2
-HW_RST 14,26
-PCI_RST 14,26
SMBCK 5,7,8,12,23,26,29,30,36
SMBDT 5,7,8,12,23,26,29,30,36
VDRAM_PWRGD 12
CLK_VDD
OSC_14M_SB 27
OSC_14M_NB
3
VCC3
C C
B B
SB750-A12
SB750-A14
1 2
FB30 FB120-06 FB30 FB120-06
1 2
/ FOR NB-A14 use 82P or New Bios
X3
X3
X-14.318M
X-14.318M
1 2
/ FOR NB-A14 use 82P or New Bios
-PCI_RST
R172 0-SH R172 0-SH
R173 0-SH R173 0-SH
VDRAM_PWRGD
R167 8.2K-04-O R167 8.2K-04-O
1 2
R166 8.2K-04 R166 8.2K-04
OSC_14M_SB
1 2
R161 0-04-OR161 0-04-O
R168 8.2K-04R168 8.2K-04
R165 150-1-04 R165 150-1-04
1 2
R162
R162
75-1-04
75-1-04
RS740
RX780
RS780
(Single-ended)
NB CLOCK INPUT TABLE
NB CLOCKS
HT_REFCLKP
HT_REFCLKN
REFCLK_P
REFCLK_N
GFX_REFCLK
GPP_REFCLK
GPPSB_REFCLK 100M DIFF 100M DIFF
RS740 RX780 RS780
66M SE(SE)
NC
14M SE (3.3V) 14M SE (1.8V) 14M SE (1.1V)
NC NC vref
100M DIFF
NC
100M DIFF
* RS780 can be used as clock buffer to output two PCIE referecence clocks
By deault, chip will configured as input mode, BIOS can program it to output mode.
REF1/SEL_SATA
0
1
100M DIFF
100M DIFF
100M DIFF
100M DIFF
REF0/SEL_HTT66
0
1
100M DIFF
100M DIFF
100M DIFF(IN/OUT)*
100M DIFF(OUT)
HTT CLOCK
100.00 DIFFERENTIAL
66.66 SINGLE END
SRC6/SATA
100.00 DIFFERENTIAL SPREADING SRC CLOCK
100.00 NON-SPREADING DIFFERENTIAL SATA CLOCK
100M DIFF
100M DIFF
CLKB
CLKB
THERMAL GND
65
A A
5
4
THERMAL GND
eGND65
ICS9LPRS471CS
ICS9LPRS471CS
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
3
2
Date: Sheet
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
CLK GEN ICS9LPRS471
CLK GEN ICS9LPRS471
CLK GEN ICS9LPRS471
A790GXM-AD3
A790GXM-AD3
A790GXM-AD3
10 39 Tuesday, February 24, 2009
10 39 Tuesday, February 24, 2009
10 39 Tuesday, February 24, 2009
of
of
1
of
1.0
1.0
1.0
5
+12V_4P
1 2
R223
R223
10K-04
10K-04
EN_VCORE 31
D D
CPU_VDDNB_FB 5
CPU_VDDNB_FB- 5
C C
CPU_CORE_FB 5
CPU_CORE_FB- 5
B B
A A
CPU_CORE_TYPE 5
EN_VCORE EN_6323
SB_CPUPWRGD 5,27
VDDPWRGD 31
CPU_VDDNB
VCC_CORE
I_VCORE 12
VCORE_REG
VRD_VID1 5
VRD_VID2 5
VRD_VID3 5
1 2
R225
R225
1K-04
1K-04
1 2
R271
R271
100-04
100-04
1 2
R264
R264
100-04
100-04
1 2
R265
R265
100-04
100-04
ER35 402-1-04 ER35 402-1-04
1 2
R269
R269
100-04
100-04
VRD_VID1
VRD_VID2
VRD_VID3
3VSB
1 2
D S
G
5
1 2
VCC3
MC31
MC31
1U-06-O
1U-06-O
1 2
R237
R237
10K-04
10K-04
R414 0-O R414 0-O
1 2
1 2
R262
R262
6323_VCC
1 2
R259
R259
56K-04
56K-04
1 2
V_DIMM
G
R274 0-04-SHR274 0-04-SH
1 2
C263 680P-04 C263 680P-04
1 2
C242 680P-04 C242 680P-04
1 2
C258 .1U-04-O C258 .1U-04-O
C262 .1U-04-O C262 .1U-04-O
R276
R276
300-04
300-04
1 2
R273
R273
27-04-O
27-04-O
1 2
D S
MN30
MN30
2N7002-S-O
2N7002-S-O
ER36 49.9-1-04 ER36 49.9-1-04
1 2
R267 360-1-04 R267 360-1-04
C261
C261
.1U-04-O
.1U-04-O
1 2
R255 470-04 R255 470-04
1 2
C259
C259
.1U-04-O
.1U-04-O
1 2
1 2
R261
R261
56K-04-O
56K-04-O
R272
R272
10K-04-O
10K-04-O
MN31
MN31
2N7002-S-O
2N7002-S-O
NB_1V8
E C
1 2
360-04
C264
C264
.1U-04-O
.1U-04-O
1 2
C256
C256
.1U-04-O
.1U-04-O
1 2
715-1-04
715-1-04
700-04
1 2
1 2
68.1K-1-04
68.1K-1-04
6323_VCC
6323_VCC
VRD_VID1
1 2
R226
R226
4.7K-04
4.7K-04
B
QN9
QN9
2N3904-S
2N3904-S
ER33 2K-1-04 ER33 2K-1-04
1 2
ISEN_NB_A
ER29 1.5K-1-04 ER29 1.5K-1-04
1 2
1 2
R257 1.74K-1-04 R257 1.74K-1-04
3.77K-04
R245
R245
2K-04
2K-04
ER30
ER30
1 2
ER32
ER32
100K-1-04-O
100K-1-04-O
VCC3
R229
R229
1K-04
1K-04
1 2
EN_6323
ISL_PWROK
C260 8200P C260 8200P
1 2
1 2
C255 100P-04 C255 100P-04
1 2
R266 1.2k-1-04 R266 1.2k-1-04
1 2
R268 0-04-O R268 0-04-O
C244 .01U-04 C244 .01U-04
1 2
1 2
C240 220P-04C240 220P-04
C253 8200P C253 8200P
1 2
1 2
C243
C243
.1U-04
.1U-04
1 2
C249 1000P-04 C249 1000P-04
1 2
1 2
+12V_4P
DPHASE3_BOOT
1 2
R141
R141
2.2-08
2.2-08
1 2
MC23
MC23
1U-16V-08
1U-16V-08
BOOT
PWM3
4
VCC5
C265
C265
.1U-04
.1U-04
1 2
PWM3 ISL6323CRZ PWM3 ISL6323CRZ
24
EN
34
PWROK
37
VDDPWRGD
48
COMP_NB
1
FB_NB
2
VSEN_NB
3
RGND_NB
18
COMP
17
FB
15
RCOMP
13
VSEN
12
RGND
19
APA
14
OFS
16
RSET
4
VID0/VFIXEN
5
VID1/SEL
6
VID2/SVD
7
VID3/SVC
8
VID4
9
VID5
11
FS
ER34
ER34
100K-1-04
100K-1-04
1 2
BOTTOM PAD
CONNECT TO GND
Through 8 VIAs
C115 .1U-X7R-04 C115 .1U-X7R-04
1 2
R144
R144
2.2
2.2
PWM1
PWM1
2
BOOT
7
PVCC
6
VCC
3
PWM
4
GND
ISL6612ACBZS
ISL6612ACBZS
4
VCC5
GND
49
1 2
1 2
R270
R270
2.2
2.2
6323_VCC
10
VCC
UGATE_NB
UGATE
PHASE
LGATE
7X7 QFN
PVCC1_2
BOOT1
UGATE1
PHASE1
LGATE1
ISEN1+
ISEN1-
BOOT2
UGATE2
PHASE2
LGATE2
ISEN2+
ISEN2-
PWM3
PWM4
ISEN3+
ISEN3-
ISEN4+
ISEN4-
PVCC_NB
BOOT_NB
PHASE_NB
LGATE_NB
ISEN_NB
3
+12V_4P
1 2
R224
R224
2.2
2.2
1 2
1
8
5
1 2
MC32
MC341UMC34
1U
29
31
32
33
30
20
21
27
26
25
28
22
23
35
36
44
43
46
45
42
40
39
38
41
47
MC32
1U-16V-08
1U-16V-08
R230 2.2 R230 2.2
C233 .1U-X7R-04 C233 .1U-X7R-04
1 2
1 2
402-1
402-1
ISEN1
R244
R244
1 2
1 2
1 2
C235 .1U-X7R-04 C235 .1U-X7R-04
1 2
R236 8.2K R236 8.2K
+12V_4P
1 2
R241
R241
2.2
2.2
1 2
1 2
C234 .1U-X7R-04 C234 .1U-X7R-04
1 2
R260 10K R260 10K
C128 .1U-X7R-04 C128 .1U-X7R-04
1 2
R150
R150
2.2
2.2
2
7
6
3
4
UGATE_NB
PHASE_NB
LGATE_NB
1 2
R239 402-1R239 402-1
1 2
1 2
PWM2
PWM2
BOOT
PVCC
VCC
PWM
GND
ISL6612ACBZS
ISL6612ACBZS
PHASE1
R242 8.2K R242 8.2K
R231 2.2 R231 2.2
PHASE2
PWM3
PWM4
ISEN3+
ISEN3-
ISEN4+
ISEN4-
1 2
MC33
MC33
1U-16V-08
1U-16V-08
R238 2.2 R238 2.2
UGATE_NB
PHASE_NB
LGATE_NB
PHASE_NB_A ISEN_NB_A
+12V_4P
DPHASE4_RC
1 2
R149
R149
2.2-08
2.2-08
DPHASE4_BOOT
PWM4
1 2
MC25
MC25
1U-16V-08
1U-16V-08
DPHASE3
DUGATE3
DPHASE3
DLGATE3
ISEN1
1 2
C238.1U-X7R-04 C238.1U-X7R-04
ISEN2
1 2
C236 .1U-X7R-04 C236 .1U-X7R-04
PHASE_NB
R263 6.2K-04-O R263 6.2K-04-O
1 2
1 2
C254 .1U-X7R-04 C254 .1U-X7R-04
UGATE
PHASE
LGATE
R146 2.2-08 R146 2.2-08
R147 10K-04 R147 10K-04
D S
G
3
C239
C239
.1U-04
.1U-04
1 2
C237
C237
.1U-04
.1U-04
1 2
DPHASE4
DUGATE4
1
DPHASE4
8
DLGATE4
5
1 2
G
1 2
UGATE_NB_TRANS
MN26
MN26
MN252-6MS
MN252-6MS
G
DUGATE1
DPHASE1
DUGATE3
DPHASE3
DLGATE3
+12V_MOS
MN16
MN16
MN252-9MS
MN252-9MS
D S
D S
MN27
MN27
MN252-6MS
MN252-6MS
DLGATE1
DUGATE2
DPHASE2
DLGATE2
1 2
DUGATE4
DPHASE4
DLGATE4
G
R132 2.2-08 R132 2.2-08
R133 10K-04 R133 10K-04
G
R130 2.2-08 R130 2.2-08
R13110K-04 R13110K-04
G
R128 2.2-08 R128 2.2-08
G
C257
C257
.1U-04
.1U-04
D S
1 2
PHNB_R
1 2
1 2
D S
MN25
MN25
MN252-6MS
MN252-6MS
D S
1 2
R12910K-04 R12910K-04
D S
MN23
MN23
MN252-6MS
MN252-6MS
R134 2.2-08 R134 2.2-08
R13510K-04 R13510K-04
G
MN17
MN17
MN252-9MS
MN252-9MS
R148
R148
2.2
2.2
C122
C122
1000P-04
1000P-04
1 2
1 2
1 2
MN20
MN20
MN252-6MS
MN252-6MS
+12V_MOS
MN14
MN14
MN252-9MS
MN252-9MS
D S
D S
MN21
MN21
MN252-6MS
MN252-6MS
+12V_MOS
MN12
MN12
MN252-9MS
MN252-9MS
D S
D S
MN24
MN24
MN252-6MS
MN252-6MS
+12V_MOS
MN10
MN10
MN252-9MS
MN252-9MS
D S
D S
MN19
MN19
MN252-6MS
MN252-6MS
+12V_MOS
D S
G
1 2
DUGATE4_TRANS
D S
G
MC8
MC8
4.7U-16V-08
4.7U-16V-08
2 1
SU11
SU11
Short PAD
Short PAD
G
G
G
MN8
MN8
MN252-9MS
MN252-9MS
MN22
MN22
MN252-6MS
MN252-6MS
G
DUGATE1_TRANS
G
G
DUGATE2_TRANS
G
G
1 2
DUGATE3_TRANS
G
1 2
D S
MN18
MN18
MN252-6MS
MN252-6MS
1 2
L13 PIND1.5UD L13 PIND1.5UD
PHASE_NB_A
ISEN_NB_A
2
D S
MN15
MN15
MN252-9MS
MN252-9MS
1 2
R139
R139
2.2
2.2
DPH1_R
C108
C108
1000P-04
1000P-04
2 1
MN13
MN13
MN252-9MS
MN252-9MS
D S
1 2
R138
R138
2.2
2.2
DPH2_R
C105
C105
1000P-04
1000P-04
2 1
D S
MN11
MN11
MN252-9MS
MN252-9MS
1 2
R137
R137
2.2
2.2
DPH3_R
C107
C107
1000P-04
1000P-04
2 1
G
SU12
SU12
Short PAD
Short PAD
2
D S
MN9
MN9
MN252-9MS
MN252-9MS
1 2
R136
R136
2.2
2.2
DPH4_R
C106
C106
1000P-04
1000P-04
2 1
EC44
EC44
1 2
820U-2.5D-OS-J
820U-2.5D-OS-J
ATX12V
ATX12V
GND
+12V
GND
+12V
GND
+12V
atx_pwr_8p
atx_pwr_8p
I178
I178
2 1
SU10
SU10
Short PAD
Short PAD
MC13
MC13
4.7U-16V-08
4.7U-16V-08
2 1
SU8
SU8
Short PAD
Short PAD
1 2
MC10
MC10
4.7U-16V-08
4.7U-16V-08
2 1
SU9
SU9
Short PAD
Short PAD
1 2
MC12
MC12
4.7U-16V-08
4.7U-16V-08
2 1
SU3
SU3
PHASE4
ISEN4
1 2
EC45
EC45
820U-2.5D-OS-J
820U-2.5D-OS-J
GND
+12V
1 2
MC11
MC11
4.7U-16V-08
4.7U-16V-08
L12 PIND-0.6UD L12 PIND-0.6UD
SU6
SU6
Short PAD
Short PAD
PHASE1
ISEN1
1 2
L11 PIND-0.6UD L11 PIND-0.6UD
SU4
SU4
Short PAD
Short PAD
PHASE2
ISEN2
L10 PIND-0.6UD L10 PIND-0.6UD
SU5
SU5
Short PAD
Short PAD
PHASE3
ISEN3
L9 PIND-0.6UD L9 PIND-0.6UD
Short PAD
Short PAD
CPU_VDDNB
270U-16D-OS
270U-16D-OS
1 2
1 2
1 2
1 2
R246 8.2K R246 8.2K
1 2
R256 8.2K R256 8.2K
1 2
EC37
EC37
820U-2.5D-OS-J
820U-2.5D-OS-J
1
EC25
EC25
270U-16D-OS
270U-16D-OS
EC34
EC34
820U-2.5D-OS-J
820U-2.5D-OS-J
EC43
EC43
820U-2.5D-OS-J
820U-2.5D-OS-J
EC41
EC41
820U-2.5D-OS-J
820U-2.5D-OS-J
R254 402-1R254 402-1
1 2
1 2
C241 .1U-X7R-04 C241 .1U-X7R-04
R258 402-1R258 402-1
1 2
1 2
C247 .1U-X7R-04 C247 .1U-X7R-04
1
+12V_MOS
EC24
EC24
270U-16D-OS
270U-16D-OS
ISEN3
ISEN4
11 39 Tuesday, February 24, 2009
11 39 Tuesday, February 24, 2009
11 39 Tuesday, February 24, 2009
EC22
EC22
270U-16D-OS
270U-16D-OS
VCC_CORE
1 2
1 2
of
of
of
C246
C246
.1U-04
.1U-04
C250
C250
.1U-04
.1U-04
+12V_4P
1
5
2
6
3
7
4
8
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
L8 RCK-0.9UD L8 RCK-0.9UD
EC26
EC26
C87
C87
.1U-04
.1U-04
1 2
EC39
EC39
820U-2.5D-OS-J
820U-2.5D-OS-J
1 2
EC38
EC38
820U-2.5D-OS-J
820U-2.5D-OS-J
1 2
EC35
EC35
820U-2.5D-OS-J
820U-2.5D-OS-J
ISEN3+
ISEN3-
PHASE3
ISEN4+
ISEN4-
PHASE4
1 2
SU7
SU7
EC33
EC33
Short PAD
Short PAD
820U-2.5D-OS-J
820U-2.5D-OS-J
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
VCORE ISL6326
VCORE ISL6326
VCORE ISL6326
A790GXM-AD3
A790GXM-AD3
A790GXM-AD3
EC23
EC23
270U-16D-OS
270U-16D-OS
1.0
1.0
1.0
5
4
3
2
1
VCC5
1 2
R30510R305
10
1
2
D9
3
1 2
UG1_VCC
VCC12_EN
LG1_VCC
8
7
6
5
02-344-173541
+1.5V
MC56
MC56
10U-08
10U-08
D9
BAT54C-S
BAT54C-S
BC48
BC48
.1U-04
.1U-04
R293 2.2 R293 2.2
R307 30K-1-04 R307 30K-1-04
R292 2.2 R292 2.2
UG1_VCC12
1 2
PHASE1_VCC12
1 2
LG1_VCC12
1 2
1.512
1.602V
1.705V
V_DIMM
1 2
EC54
EC54
1000U-6.3DL
1000U-6.3DL
1K-1-04
1K-1-04
R188
R188
1K-04
1K-04
5
V_DIMM
BC52
BC52
.1U-04-O
.1U-04-O
1 2
1 2
1 2
R185
R185
1K-04
1K-04
D
MN35
MN35
MN252-20MS
MN252-20MS
G
ER37 0-04-O ER37 0-04-O
S
ER42 120-1-04ER42 120-1-04
ER41 220-1-04ER41 220-1-04
GP26
0 0
1
0
1
1 2
D S
G
R312
R312
1K-04-O
1K-04-O
I_NBVCORE
EN_VLDT 31
R187
R187
24.9K-1-04
24.9K-1-04
G
MN29
MN29
2N7002-S
2N7002-S
1 2
1 2
BC50 .1U-04 BC50 .1U-04
VDRAM_PWRGD
1 2
1 2
1 2
ER43
ER43
1.62K-1-04
1.62K-1-04
1 2
5VSB
VCCNS_REF
1 2
R186
R186
1 2
62K-04
62K-04
D S
MN28
MN28
2N7002-S
2N7002-S
1 2
PWM4
PWM4
11
VCC
10
PGOOD
5
DRV
9
FBL
6
NC
7
NC
8
NC
12
FB
RT9218PSS
RT9218PSS
1 2
ER44 680-1-04ER44 680-1-04
R320
R320
1K-04-O
1K-04-O
1 2
VCC12_EN
VCC3 VCC3
ER27
ER27
10K-1-04
10K-1-04
C170
C170
.1U-04-O
.1U-04-O
2 1
ER26
ER26
15.4K-1-04
15.4K-1-04
BOOT
UGATE
PHASE
OPS
LGATE
GND
DDR3@1A
U15
U15
1
VIN
2
GND
3
REFEN
4
VOUT
EC42
EC42
+
+
100U-16DE
100U-16DE
4
9173P-S
9173P-S
1
2
14
13
4
3
Vcntl
Vcntl
Vcntl
Vcntl
D D
CPU_VDDR@4A
VCC_SB
GP27 31
C C
B B
A A
GP26 31
1.35V
1.3V
1.25V
SIDEPORT_S0 31
SIDEPORT_S1 31
VCC1.2
1 2
ER40
ER40
ER39 1.3K-1-04ER39 1.3K-1-04
GP27
0
1
1 1.2V
VCC VCC
1 2
G
G
CPU_VDDIO_PWRGD 5
SIDEPORT_S1
0
1
1 1.763V
VCC3
1 2
D
S
D
S
LL1
LL1
FB-D
FB-D
5VIN_VDDQ
MN33
MN33
MN252-9MS
MN252-9MS
MN32
MN32
MN252-20MS
MN252-20MS
3
1 2
EC53
EC53
1000U-6.3DL
1000U-6.3DL
1 2
PHASE1_VCCR
1 2
1 2
EC51
EC51
1000U-6.3DL
1000U-6.3DL
R113 150-04 R113 150-04
1 2
BC21
BC21
.1U-04-O
.1U-04-O
2 1
SIDEPORT_S0
0 0
1
0
1
R2861R286
1
BC46
BC46
.01U-04
.01U-04
V_DIMM
1 2
1 2
L14
L14
PIND1.5UD
PIND1.5UD
1 2
D6
431-SD6431-S
R
A C
R181
R181
1K-04
1K-04
QN5
QN5
2N3904-S
2N3904-S
MC40
MC40
10U-08
10U-08
2 1
EC48
EC48
1000U-6.3DL
1000U-6.3DL
VCCNS_REF VCC3
VCC3
1 2
R182
R182
360-1-04
360-1-04
B
E C
NB_VDDC
2009/2/24 for on-off issue
VDRAM_PWRGD
uP6262的電流輸出與Δ Vout的關系如下 :
選取從uP6262輸出的方向為正,
則VCORE,CPUVTT及V_DIMM的ΔVout 為:
Δ Vout = -Ic * RFB;
SMBDT 5,7,8,10,23,26,29,30,36
VCCNS_REF
VDRAM_PWRGD 10
2
R324
R324
1 2
16.9K-04-O
16.9K-04-O
1 2
ER16
ER16
562-1-04
562-1-04
NB_1V8_REF
1 2
ER15
ER15
1.5K-1-04
1.5K-1-04
5VSB
R327
R327
10K-04
10K-04
1 2
I=1.2mA@2.5V
576-1-04
Chip Address: 0x60
Address 4 Voltage Range = 77~100%VCC
U24
1
2
3
4
U24
VCC
BUS_SEL
GND
SDA
UP6262
UP6262
+12V
5
+
+
6
-
-
NB_1V8
R115 1K-04-O R115 1K-04-O
8 4
OUT1
OUT2
OUT3
SCL
U10B
U10B
7
OP358-S
OP358-S
I_VCORE
8
7
6
5
VCC1.8
VCC3
1 2
G
I_VCORE 11
I_NBVCORE
I_VDIMM
I_VDIMM 13
SMBCK 5,7,8,10,23,26,29,30,36
D S
MN4
MN4
MN252-70MS
MN252-70MS
NB_1V8
1.8V@2.5A
1 2
EC17
EC17
1000U-6.3DL
1000U-6.3DL
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Elitegroup Computer Systems
Elitegroup Computer Systems
Elitegroup Computer Systems
NB CORE PWR
NB CORE PWR
NB CORE PWR
A790GXM-AD3
A790GXM-AD3
A790GXM-AD3
12 39 Tuesday, February 24, 2009
12 39 Tuesday, February 24, 2009
12 39 Tuesday, February 24, 2009
of
of
1
of
1.0
1.0
1.0