dresden elektronik ingenieurtechnik MEGA23M12 Users Manual
User Manual
Radio Modules
deRFmega128-22M00 deRFmega256-23M00
deRFmega128-22M10 deRFmega256-23M10
deRFmega128-22M12 deRFmega256-23M12
Document Version V1.3
2013-06-10
User Manual
Version 1.3
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OEM radio modules deRFmega
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Page 2 of 69
Table of contents
1. Overview ......................................................................................................................... 6
2. Applications ................................................................ ..................................................... 6
3. Features .......................................................................................................................... 7
3.1. deRFmega128-22M00 ............................................................................................ 7
3.2. deRFmega128-22M10 ............................................................................................ 8
3.3. deRFmega128-22M12 ............................................................................................ 9
3.4. deRFmega256-23M00 .......................................................................................... 10
3.5. deRFmega256-23M10 .......................................................................................... 11
3.6. deRFmega256-23M12 .......................................................................................... 12
4. Technical data ............................................................................................................... 13
4.1. TX Power register settings for deRFmega128-22M00 and 22M10 ........................ 19
4.2. TX Power register settings for deRFmega128-22M12 .......................................... 20
4.3. TX Power register settings for deRFmega256-23M00 and 23M10 ........................ 21
4.4. TX Power register settings for deRFmega256-23M12 .......................................... 22
4.5. Output power and duty cycle settings for power amplified radio modules ............. 23
5. Mechanical size ............................................................................................................. 24
5.1. deRFmega128-22M00 and deRFmega256-23M00 .............................................. 24
5.2. deRFmega128-22M10 and deRFmega256-23M10 .............................................. 25
5.3. deRFmega128-22M12 and deRFmega256-23M12 .............................................. 26
6. Soldering profile............................................................................................................. 27
7. Pin assignment .............................................................................................................. 28
7.1. Signals of deRFmega128-22M00 and deRFmega256-23M00 .............................. 28
7.2. Signals of deRFmega128-22M10 and deRFmega256-23M10 .............................. 31
7.2.1. External front-end and antenna diversity control ....................................... 34
7.3. Signals of deRFmega128-22M12 and deRFmega256-23M12 .............................. 35
7.3.1. Internal front-end control ........................................................................... 38
7.4. Signal description ................................................................................................. 39
8. PCB design ................................................................................................................... 41
8.1. Technology ........................................................................................................... 41
8.2. Base board footprint ............................................................................................. 41
8.2.1. Footprint of deRFmega128-22M00 and deRFmega256-23M00 ................ 42
8.2.2. Footprint of deRFmega128-22M10 and deRfmega256-23M10 ................. 43
8.2.3. Footprint of deRFmega128-22M12 and deRFmega256-23M12 ................ 44
8.3. Ground plane........................................................................................................ 44
8.4. Layers .................................................................................................................. 45
8.5. Traces .................................................................................................................. 46
8.6. Placement on the PCB ......................................................................................... 47
8.7. Reference Design for deRFmega256-23M12 ....................................................... 48
8.7.1. Overview ................................................................................................... 48
8.7.2. PCB design ............................................................................................... 49
8.7.3. RF trace design ......................................................................................... 49
8.7.4. Chip-antenna ............................................................................................ 51
8.7.5. Coaxial connector layout ........................................................................... 52
8.7.6. Ground area and vias ................................................................................ 53
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9. Clock ............................................................................................................................. 54
10. Application circuits ......................................................................................................... 55
10.1. UART ................................................................................................................... 55
10.2. ISP ....................................................................................................................... 55
10.3. JTAG .................................................................................................................... 55
10.4. TWI ...................................................................................................................... 56
10.5. External front-end and antenna diversity .............................................................. 57
11. Programming ................................................................................................................. 59
12. Pre-flashed firmware ..................................................................................................... 59
13. Adapter boards .............................................................................................................. 59
14. Radio certification .......................................................................................................... 61
14.1. United States (FCC) ............................................................................................. 61
14.2. European Union (ETSI) ........................................................................................ 62
14.3. Approved antennas .............................................................................................. 62
15. Ordering information ...................................................................................................... 64
16. Related products ................................................................ ........................................... 65
17. Packaging dimension .................................................................................................... 66
18. Revision notes ............................................................................................................... 66
19. References .................................................................................................................... 67
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Date
Version
Description
2012-10-15
1.0
Initial version
2012-11-30
1.1
Update technical data
TX_PWR register settings
Sensitivity
Update signal description
2013-01-22
1.2
RFOUT pin description on deRFmega128-22M12
more precisely specified
Update duty cycle limit
Addition of deRFmega256-23M00, -23M10, -23M12
2013-06-10
1.3
Update duty cycle requirements
Addition of reference design for deRFmega256-23M12
Update FCC section
Document history
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Abbreviation
Description
IEEE 802.15.4
IEEE 802.15.4 standard, applicable to low-rate Wireless Personal Area
Networks (WPAN)
6LoWPAN
IPv6 over Low Power Wireless Personal Area Networks
ADC
Analog to Digital Converter
CE
Consumer Electronics
EMI
Electromagnetic Interference
ETSI
European Telecommunications Standards Institute
FCC
Federal Communications Commission
GPIO
Generals Purpose Input Output
JTAG
Joint Test Action Group, digital interface for debugging of embedded
devices, also known as IEEE 1149.1 standard interface
ISA SP100
International Society of Automation, the Committee establishes standards
and related technical information for implementing wireless systems.
ISP
In-System-Programming
LGA
Land Grid Array, a type of surface-mount packaging for integrated circuits
LNA
Low Noise Amplifier
MAC
Medium (Media) Access Control
MCU, µC
Microcontroller Unit
PA
Power Amplifier
PCB
Printed Circuit Board
PWM
Pulse Width Modulation
RF
Radio Frequency
R&TTE
Radio and Telecommunications Terminal Equipment
(Directive of the European Union)
SPI
Serial Peripheral Interface
TWI
Two-Wire Serial Interface
U[S]ART
Universal [Synchronous/]Asynchronous Receiver Transmitter
USB
Universal Serial Bus
ZigBee
Low-cost, low-power wireless mesh network standard. The ZigBee Alliance
is a group of companies that maintain and publish the ZigBee standard.
Abbreviations
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1. Overview
The tiny radio module series by dresden elektronik combines Atmel’s 8-bit AVR single chip
ATmega128RFA1 and ATmega256RFR2 with a small footprint. Six different module types
are available providing different features for the custom application.
The deRFmega128-22M00 and deRFmega256-23M00 have an onboard chip antenna to
establish a ready-to-use device. No additional and expensive RF designs are necessary.
This module is full compliant to all EU and US regulatory requirements.
The deRFmega128-22M10 and deRFmega256-23M10 have the smallest form factor of all
module types. The customer is free to design his own antenna, coaxial output or front-end;
but it is also possible to use one of the dresden elektronik’s certified and documented RF
designs.
The deRFmega128-22M12 and deRFmega256-23M12 have an onboard front-end feature
including LNA and PA with 20 dB gain. Furthermore it supports antenna diversity by a direct
connection of two antennas or coaxial connectors. All necessary RF parts and switches are
integrated. This module type combined with the small form factor is the optimal solution
between range extension and space for mounting on PCB.
2. Applications
The main applications for the radio modules are:
2.4 GHz IEEE 802.15.4
ZigBee PRO
ZigBee RF4CE
ZigBee IP
6LoWPAN
ISA SP100
Wireless Sensor Networks
Industrial and home controlling/monitoring
Smart Metering
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Tiny size: 23.6 x 13.2 x 3.0 mm
51 LGA pads 0.6 x 0.6 mm
Supply voltage 1.8 V to 3.6 V
RF shielding
Onboard 32.768 kHz crystal
(Deep-Sleep clock) and
16 MHz crystal
Application interfaces:
2x UART, 1x TWI, 1x ADC
GPIO interface
Debug/Programming interfaces:
1x SPI, 1x JTAG, 1x ISP
Onboard 2.4 GHz chip antenna
Certification: CE, FCC
ATmega128RFA1
Transceiver crystal
16MHz [+/-10ppm]
JTAG
UART
VCC
1.8V to 3.6V
Watch crystal
32.768kHz
SPI
TWI
ADC
GPIO
2.4GHz antenna
3. Features
3.1. deRFmega128-22M00
The radio module deRFmega128-22M00 offers the following features:
Figure 1 shows the block diagram of the radio module deRFmega128-22M00.
Figure 1: Block diagram deRFmega128-22M00
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Tiny size: 19.0 x 13.2 x 3.0 mm
55 LGA pads 0.6 x 0.6 mm
Supply voltage 1.8 V to 3.6 V
RF shielding
Onboard 32.768 kHz crystal
(Deep-Sleep clock) and
16 MHz crystal
Application interfaces:
2x UART, 1x TWI, 1x ADC
GPIO interface
Debug/Programming interfaces:
1x SPI, 1x JTAG, 1x ISP
Solderable 2.4 GHz RF output pads
(1x RFOUT, 3x RFGND)
Certification: CE, FCC pending
ATmega128RFA1
Transceiver crystal
16MHz [+/-10ppm]
JTAG
UART
VCC
1.8V to 3.6V
Watch crystal
32.768kHz
SPI
TWI
ADC
GPIO
RFout
3.2. deRFmega128-22M10
The radio module deRFmega128-22M10 offers the following features:
Figure 2 shows the block diagram of the radio module deRFmega128-22M10.
Figure 2: Block diagram deRFmega128-22M10
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Tiny size: 21.5 x 13.2 x 3.0 mm
59 LGA pads 0.6 x 0.6 mm
Supply voltage 2.0 V to 3.6 V
Antenna diversity support
RF shielding
Onboard 32.768 kHz crystal
(Deep-Sleep clock) and
16 MHz crystal
Application interfaces:
2x UART, 1x TWI
GPIO interface
Debug/Programming interfaces:
1x SPI, 1x JTAG, 1x ISP
2.4 GHz front-end module with
internal 20 dB PA and LNA
Solderable 2.4 GHz RF output pad
(2x RFOUT, 6x RFGND)
Certification: CE, FCC pending
ATmega128RFA1
Transceiver crystal
16MHz [+/-10ppm]
JTAG
UART
VCC
2.0V to 3.6V
Watch crystal
32.768kHz
SPI
TWI
ADC
GPIO
2.4GHz Front-End
RFout 1
RFout 2
RF
Control
3.3. deRFmega128-22M12
The radio module deRFmega128-22M12 offers the following features:
Figure 3 shows the block diagram of the radio module deRFmega128-22M12.
Figure 3: Block diagram deRFmega128-22M12
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Tiny size: 23.6 x 13.2 x 3.0 mm
51 LGA pads 0.6 x 0.6 mm
Supply voltage 1.8 V to 3.6 V
RF shielding
Onboard 32.768 kHz crystal
(Deep-Sleep clock) and
16 MHz crystal
Application interfaces:
2x UART, 1x TWI, 1x ADC
GPIO interface
Debug/Programming interfaces:
1x SPI, 1x JTAG, 1x ISP
Onboard 2.4 GHz chip antenna
Certification: CE, FCC pending
ATmega256RFR2
Transceiver crystal
16MHz [+/-10ppm]
JTAG
UART
VCC
1.8V to 3.6V
Watch crystal
32.768kHz
SPI
TWI
ADC
GPIO
2.4GHz antenna
3.4. deRFmega256-23M00
The radio module deRFmega256-23M00 offers the following features:
Figure 4 shows the block diagram of the radio module deRFmega256-23M00.
Figure 4: Block diagram deRFmega256-23M00
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Tiny size: 19.0 x 13.2 x 3.0 mm
55 LGA pads 0.6 x 0.6 mm
Supply voltage 1.8 V to 3.6 V
RF shielding
Onboard 32.768 kHz crystal
(Deep-Sleep clock) and
16 MHz crystal
Application interfaces:
2x UART, 1x TWI, 1x ADC
GPIO interface
Debug/Programming interfaces:
1x SPI, 1x JTAG, 1x ISP
Solderable 2.4 GHz RF output pads
(1x RFOUT, 3x RFGND)
Certification: CE, FCC pending
ATmega256RFR2
Transceiver crystal
16MHz [+/-10ppm]
JTAG
UART
VCC
1.8V to 3.6V
Watch crystal
32.768kHz
SPI
TWI
ADC
GPIO
RFout
3.5. deRFmega256-23M10
The radio module deRFmega256-23M10 offers the following features:
Figure 5 shows the block diagram of the radio module deRFmega256-23M10.
Figure 5: Block diagram deRFmega256-23M10
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Tiny size: 21.5 x 13.2 x 3.0 mm
59 LGA pads 0.6 x 0.6 mm
Supply voltage 2.0 V to 3.6 V
Antenna diversity support
RF shielding
Onboard 32.768 kHz crystal
(Deep-Sleep clock) and
16 MHz crystal
Application interfaces:
2x UART, 1x TWI
GPIO interface
Debug/Programming interfaces:
1x SPI, 1x JTAG, 1x ISP
2.4 GHz front-end module with
internal 20 dB PA and LNA
Solderable 2.4 GHz RF output pad
(2x RFOUT, 6x RFGND)
Certification: CE, FCC pending
ATmega256RFR2
Transceiver crystal
16MHz [+/-10ppm]
JTAG
UART
VCC
2.0V to 3.6V
Watch crystal
32.768kHz
SPI
TWI
ADC
GPIO
2.4GHz Front-End
RFout 1
RFout 2
RF
Control
3.6. deRFmega256-23M12
The radio module deRFmega256-23M12 offers the following features:
Figure 6 shows the block diagram of the radio module deRFmega256-23M12.
Figure 6: Block diagram deRFmega256-23M12
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Mechanical
Radio modules
Size (L x W x H)
23.6 x 13.2 x 3.0 mm (for 22M00 and 23M00)
19.0 x 13.2 x 3.0 mm (for 22M10 and 23M10)
21.5 x 13.2 x 3.0 mm (for 22M12 and 23M12)
Pads
Type
LGA
Pitch
1.60 mm
Pad size
0.6 x 0.6 mm
Temperature range
Parameter
Min
Typ
Max
Unit
Operating
temperature range
T
work
-40 +85
°C
Humidity
25 80
% r.H.
Storage
temperature range
T
storage
-40 +125
°C
Electrical characteristics
deRFmega128-22M00 and deRFmega128-22M10
Parameter
Min
Typ
Max
Unit
Supply Voltage
VCC
1.8
3.3
3.6
V
Current
consumption
I
TXon
(TX_PWR = +3 dBm)
17.8
18.1
18.2
mA
I
Txon
(TX_PWR = 0 dBm)
16.2
16.4
16.5
mA
I
Txon
(TX_PWR = -17 dBm)
12.5
12.7
12.7
mA
I
RXon
17.5
17.6
17.7
mA
I
Idle
(Txoff, MCK = 8MHz)
4.7
4.8
4.8
mA
I
Sleep
(depends on Sleep Mode)
<1
µA
4. Technical data
Table 4-1: Mechanical data
Table 4-2: Temperature range
Table 4-3: Electrical characteristics for deRFmega128 series
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deRFmega128-22M12
Parameter
Min
Typ
Max
Unit
Supply Voltage
VCC
2.0
3.3
3.6
V
Current
consumption
I
TXon
(TX_PWR = +20 dBm)
119.4
197.7
205.2
mA
I
TXon
(TX_PWR = +4 dBm)
27.0
46.1
46.7
mA
I
RXon
19.8
22.5
22.8
mA
I
Idle
(Txoff, MCK = 8 MHz)
5.2
5.4
5.6
mA
I
Sleep
(depends on Sleep Mode)
<1
µA
Electrical
deRFmega256-23M00 and deRFmega256-23M10
Parameter
Min
Typ
Max
Unit
Supply Voltage
VCC
1.8
3.3
3.6
V
Current
consumption
I
TXon
(TX_PWR = +3.5 dBm)
18.2
18.8
19.1
mA
I
TXon
(TX_PWR = +0.5 dBm)
16.3
16.5
16.7
mA
I
TXon
(TX_PWR = -16.5 dBm)
11.2
11.8
12.1
mA
I
RXon
15.9
16.3
16.5
mA
I
RXon
(RPC mode)
10.4
10.7
11.0
mA
I
Idle
(Txoff, MCK = 8MHz)
4.3
4.8
5.1
mA
I
Sleep
(depends on Sleep Mode)
<2
µA
deRFmega256-23M12
Parameter
Min
Typ
Max
Unit
Supply Voltage
VCC
2.0
3.3
3.6
V
Current
consumption
I
TXon
(TX_PWR = +20 dBm)
139.6
232.5
243.5
mA
I
TXon
(TX_PWR = +4 dBm)
27.7
48.8
49.7
mA
I
RXon
19.0
22.4
22.3
mA
I
RXon
(RPC mode)
13.5
16.7
18.0
mA
I
Idle
(Txoff, MCK = 8 MHz)
4.6
5.1
5.4
mA
I
Sleep
(depends on Sleep Mode)
<2
µA
Table 4-4: Electrical characteristics for deRFmega256 series
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Quartz crystal
Parameter
Min
Typ
Max
Unit
Watch crystal
Frequency
32.768
kHz
Frequency tolerance
+/-20
ppm
Transceiver crystal
Frequency
16.000
MHz
Frequency tolerance
+/-10
ppm
Radio 2.4 GHz (Supply voltage VCC = 3.3V)
Parameter / feature
Min
Typ
Max
Unit
Antenna
Type
Chip ceramic
Gain -0.7
dBi
Diversity
No
RF Pad
Impedance
50
Ω
Range
Line of sight
TBD
m
Frequency range1
PHY_CC_CCA = 0x0B...0x1A
2405
2480
MHz
Channels
PHY_CC_CCA = 0x0B...0x1A
16
Transmitting
power conducted
TX_PWR = 0x00
VCC = 3.3V
2.3 2.9
dBm
Receiver sensitivity
Data Rate = 250 kBit/s
Data Rate = 500 kBit/s
Data Rate = 1000 kBit/s
Data Rate = 2000 kBit/s
-98
-94
-91
>-80
dBm
dBm
dBm
dBm
Data rate (gross)
TRX_CTRL_2 = 0x00
TRX_CTRL_2 = 0x01
TRX_CTRL_2 = 0x02
TRX_CTRL_2 = 0x03
250
500
1000
2000
kBit/s
kBit/s
kBit/s
kBit/s
EVM
conducted
6.5
7.5
10.5
%
1
Table 4-5: Quartz crystal properties
Table 4-6: Radio data of deRFmega128-22M00 and deRFmega128-22M10
Operating the transmitter at channel 11 to 25 requires a duty cycle ≤35% and channel 26 requires a
duty cycle ≤15% to fulfil all requirements according to FCC Part 15 Subpart C § 15.209.
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Radio (Supply voltage VCC = 3.3V)
Parameter / feature
Min
Typ
Max
Unit
RF pad
Impedance
50
Ω
Diversity
Yes
Range
TBD
m
Frequency range
2405
2480
MHz
Channels 16
Transmitting
power conducted
2,3
TX_PWR = 0x00
VCC = 3.3V
21.4
21.9
22.4
dBm
Receiver sensitivity
Data Rate = 250 kBit/s
Data Rate = 500 kBit/s
Data Rate = 1000 kBit/s
Data Rate = 2000 kBit/s
-105
-100
-98
-91
dBm
dBm
dBm
dBm
Data rate (gross)
TRX_CTRL_2 = 0x00
TRX_CTRL_2 = 0x01
TRX_CTRL_2 = 0x02
TRX_CTRL_2 = 0x03
250
500
1000
2000
kBit/s
kBit/s
kBit/s
kBit/s
EVM
conducted
6.5
7.5
9.5
%
Radio 2.4 GHz (Supply voltage VCC = 3.3V)4
Parameter / feature
Min
Typ
Max
Unit
Antenna
Type
Chip ceramic
Gain -0.7
dBi
Diversity
No
RF Pad
Impedance
50
Ω
Range
Line of sight
TBD
m
Frequency range5
PHY_CC_CCA = 0x0B...0x1A
2405
2480
MHz
2
3
4
Table 4-7: Radio data of deRFmega128-22M12
Table 4-8: Radio data of deRFmega256-23M00 and deRFmega256-23M10
Only applicable for EU: The maximum allowed TX_PWR register setting of deRFmega128-22M12 is
TX_PWR = 0x0E. According to EN 300 328 clause 4.3.1 the maximum transmit power is restricted to
a limit of +10dBm.
Only applicable for US: Operating the transmitter at channel 11, 12, 13, 23, 24, 25 and 26 requires to
ensure a reduced output power and/or duty cycle limit to fulfil all requirements according to FCC Part
15 Subpart C § 15.209. See chapter 4.3.
Values are not validated.
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Parameter / feature
Min
Typ
Max
Unit
Channels
PHY_CC_CCA = 0x0B...0x1A
16
Transmitting
power conducted
TX_PWR = 0x00
VCC = 3.3V
3.6
3.7
3.8
dBm
Receiver sensitivity
Data Rate = 250 kBit/s
Data Rate = 500 kBit/s
Data Rate = 1000 kBit/s
Data Rate = 2000 kBit/s
-99
-95
-93
-87
dBm
dBm
dBm
dBm
Data rate (gross)
TRX_CTRL_2 = 0x00
TRX_CTRL_2 = 0x01
TRX_CTRL_2 = 0x02
TRX_CTRL_2 = 0x03
250
500
1000
2000
kBit/s
kBit/s
kBit/s
kBit/s
EVM
conducted
~8
%
Radio (Supply voltage VCC = 3.3V)6
Parameter / feature
Min
Typ
Max
Unit
RF pad
Impedance
50
Ω
Diversity
Yes
Range
TBD
m
Frequency range
2405
2480
MHz
Channels 16
Transmitting
power conducted
7,8
TX_PWR = 0x00
VCC = 3.3V
22.2
22.5
22.8
dBm
Receiver sensitivity
Data Rate = 250 kBit/s
Data Rate = 500 kBit/s
Data Rate = 1000 kBit/s
Data Rate = 2000 kBit/s
-105
-101
-99
-94
dBm
dBm
dBm
dBm
5
6
7
8
Table 4-9: Radio data of deRFmega256-23M12
Operating the transmitter at channel 26 requires a duty cycle ≤25% to fulfil all requirements
according to FCC Part 15 Subpart C § 15.209.
Values are not validated.
Only applicable for EU: The maximum allowed TX_PWR register setting of deRFmega128-22M12 is
TX_PWR = 0x0E. According to EN 300 328 clause 4.3.1 the maximum transmit power is restricted to
a limit of +10dBm.
Only applicable for US: Operating the transmitter at channel 11, 12, 13, 23, 24, 25 and 26 requires to
ensure a reduced output power and/or duty cycle limit to fulfil all requirements according to FCC Part
15 Subpart C § 15.209. See chapter 4.3.
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Data rate (gross)
TRX_CTRL_2 = 0x00
TRX_CTRL_2 = 0x01
TRX_CTRL_2 = 0x02
TRX_CTRL_2 = 0x03
250
500
1000
2000
kBit/s
kBit/s
kBit/s
kBit/s
EVM
conducted
~7
%
User Manual
Version 1.3
2013-06-10
OEM radio modules deRFmega
www.dresden-elektronik.de
Page 19 of 69
4.1. TX Power register settings for deRFmega128-22M00 and 22M10
The diagrams in Figure 7 and Figure 8 are showing the current consumption and conducted
output power during transmission depending on the TX_PWR register setting. The values are
valid for deRFmega128-22M00 and 22M10.
Figure 7: TX Idd vs. TX_PWR for deRFmega128-22M00 / 22M10
Figure 8: TX Pout vs. TX_PWR for deRFmega128-22M00 / 22M10
User Manual
Version 1.3
2013-06-10
OEM radio modules deRFmega
www.dresden-elektronik.de
Page 20 of 69
4.2. TX Power register settings for deRFmega128-22M12
The diagrams in Figure 9 and Figure 10 showing the current consumption and conducted
output power during transmission depending on the TX_PWR register setting. The values are
valid for deRFmega128-22M12.
Figure 9: TX Idd vs. TX_PWR for deRFmega128-22M12
Figure 10: TX Pout vs. TX_PWR for deRFmega128-22M12
User Manual
Version 1.3
2013-06-10
OEM radio modules deRFmega
www.dresden-elektronik.de
Page 21 of 69
4.3. TX Power register settings for deRFmega256-23M00 and 23M10
The diagrams in Figure 11 and Figure 12 are showing the current consumption and
conducted output power during transmission depending on the TX_PWR register setting. The
values are valid for deRFmega256-23M00 and 23M10.
Figure 11: TX Idd vs. TX_PWR for deRFmega256-23M00 / 23M10
Figure 12: TX Pout vs. TX_PWR for deRFmega256-23M00 / 23M10
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