dresden elektronik ingenieurtechnik MEGA22M00 Users Manual
User Manual
Radio Modules
deRFmega128-22M00
deRFmega128-22M10
deRFmega128-22M12
Document Version V1.1c
2013-07-01
User Manual
Version 1.1c
2013-07-01
OEM radio modules deRFmega
www.dresden-elektronik.de
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Table of contents
1. Overview ......................................................................................................................... 6
2. Applications ................................................................ ..................................................... 6
3. Features .......................................................................................................................... 7
3.1. deRFmega128-22M00 ............................................................................................ 7
3.2. deRFmega128-22M10 ............................................................................................ 8
3.3. deRFmega128-22M12 ............................................................................................ 9
4. Technical data ............................................................................................................... 10
4.1. TX Power register settings for deRFmega128-22M00 and 22M10 ........................ 13
4.2. TX Power register settings for deRFmega128-22M12 .......................................... 14
4.3. Output power and duty cycle settings for deRFmega128-22M00 .......................... 15
4.4. Output power and duty cycle settings for deRFmega128-22M12 .......................... 16
5. Mechanical size ............................................................................................................. 17
5.1. deRFmega128-22M00 .......................................................................................... 17
5.2. deRFmega128-22M10 .......................................................................................... 18
5.3. deRFmega128-22M12 .......................................................................................... 19
6. Soldering profile............................................................................................................. 20
7. Pin assignment .............................................................................................................. 21
7.1. Signals of deRFmega128-22M00 ......................................................................... 21
7.2. Signals of deRFmega128-22M10 ......................................................................... 24
7.2.1. External front-end and antenna diversity control ....................................... 27
7.3. Signals of deRFmega128-22M12 ......................................................................... 28
7.3.1. Internal front-end control ........................................................................... 31
7.4. Signal description ................................................................................................. 32
8. PCB design ................................................................................................................... 34
8.1. Technology ........................................................................................................... 34
8.2. Base board footprint ............................................................................................. 34
8.2.1. Footprint of deRFmega128-22M00 ........................................................... 35
8.2.2. Footprint of deRFmega128-22M10 ........................................................... 36
8.2.3. Footprint of deRFmega128-22M12 ........................................................... 37
8.3. Ground plane........................................................................................................ 37
8.4. Layers .................................................................................................................. 38
8.5. Traces .................................................................................................................. 39
8.6. Placement on the PCB ......................................................................................... 40
9. Clock ............................................................................................................................. 41
10. Application circuits ......................................................................................................... 42
10.1. UART ................................................................................................................... 42
10.2. ISP ....................................................................................................................... 42
10.3. JTAG .................................................................................................................... 42
10.4. TWI ...................................................................................................................... 43
10.5. External front-end and antenna diversity .............................................................. 44
11. Programming ................................................................................................................. 46
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12. Pre-flashed firmware ..................................................................................................... 46
13. Adapter boards .............................................................................................................. 46
14. Radio certification .......................................................................................................... 47
14.1. United States (FCC) ............................................................................................. 47
14.2. European Union (ETSI) ........................................................................................ 48
14.3. Approved antennas .............................................................................................. 48
15. Ordering information ...................................................................................................... 49
16. Packaging dimension .................................................................................................... 50
17. Revision notes ............................................................................................................... 50
18. References .................................................................................................................... 51
User Manual
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Page 4 of 52
Date
Version
Description
2012-10-15
1.0
Initial version
2012-11-30
1.1
Update technical data
TX_PWR register settings
Sensitivity
Update signal description
2013-02-25
1.1a
RFOUT pin description on deRFmega128-22M12
more precisely specified
Update FCC section
2013-07-01
1.1c
Update Duty Cycle
Document history
User Manual
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Abbreviation
Description
IEEE 802.15.4
IEEE 802.15.4 standard, applicable to low-rate Wireless Personal Area
Networks (WPAN)
6LoWPAN
IPv6 over Low Power Wireless Personal Area Networks
ADC
Analog to Digital Converter
CE
Consumer Electronics
EMI
Electromagnetic Interference
ETSI
European Telecommunications Standards Institute
FCC
Federal Communications Commission
GPIO
Generals Purpose Input Output
JTAG
Joint Test Action Group, digital interface for debugging of embedded
devices, also known as IEEE 1149.1 standard interface
ISA SP100
International Society of Automation, the Committee establishes standards
and related technical information for implementing wireless systems.
ISP
In-System-Programming
LGA
Land Grid Array, a type of surface-mount packaging for integrated circuits
LNA
Low Noise Amplifier
MAC
Medium (Media) Access Control
MCU, µC
Microcontroller Unit
PA
Power Amplifier
PCB
Printed Circuit Board
PWM
Pulse Width Modulation
RF
Radio Frequency
R&TTE
Radio and Telecommunications Terminal Equipment
(Directive of the European Union)
SPI
Serial Peripheral Interface
TWI
Two-Wire Serial Interface
U[S]ART
Universal [Synchronous/]Asynchronous Receiver Transmitter
USB
Universal Serial Bus
ZigBee
Low-cost, low-power wireless mesh network standard. The ZigBee Alliance
is a group of companies that maintain and publish the ZigBee standard.
Abbreviations
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1. Overview
The tiny radio module series by dresden elektronik combines Atmel’s 8-bit AVR single chip
ATmega128RFA1 with a small footprint. Three different module types are available providing
different features for the custom application.
The deRFmega22M00 has an onboard chip antenna to establish a ready-to-use device. No
additional and expensive RF designs are necessary. This module is full compliant to all EU
and US regulatory requirements.
The deRFmega128-22M10 has the smallest form factor of all module types. The customer is
free to design his own antenna, coaxial output or front-end; but it is also possible to use one
of the dresden elektronik’s certified and documented RF designs.
The deRFmega128-22M12 has an onboard front-end feature including LNA and PA with
20 dB gain. Furthermore it supports antenna diversity by a direct connection of two antennas
or coaxial connectors. All necessary RF parts and switches are integrated. This module type
combined with the small form factor is the optimal solution between range extension and
space for mounting on PCB.
2. Applications
The main applications for the radio modules are:
2.4 GHz IEEE 802.15.4
ZigBee PRO
ZigBee RF4CE
ZigBee IP
6LoWPAN
ISA SP100
Wireless Sensor Networks
Industrial and home controlling/monitoring
Smart Metering
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Tiny size: 23.6 x 13.2 x 3.0 mm
51 LGA pads 0.6 x 0.6 mm
Supply voltage 1.8 V to 3.6 V
RF shielding
Onboard 32.768 kHz crystal
(Deep-Sleep clock) and
16 MHz crystal
Application interfaces:
2x UART, 1x TWI, 1x ADC
GPIO interface
Debug/Programming interfaces:
1x SPI, 1x JTAG, 1x ISP
Onboard 2.4 GHz chip antenna
Certification: CE, FCC
ATmega128RFA1
Transceiver crystal
16MHz [+/-10ppm]
JTAG
UART
VCC
1.8V to 3.6V
Watch crystal
32.768kHz
SPI
TWI
ADC
GPIO
2.4GHz antenna
3. Features
3.1. deRFmega128-22M00
The radio module deRFmega128-22M00 offers the following features:
Figure 1 shows the block diagram of the radio module deRFmega128-22M00.
Figure 1: Block diagram deRFmega128-22M00
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Tiny size: 19.0 x 13.2 x 3.0 mm
55 LGA pads 0.6 x 0.6 mm
Supply voltage 1.8 V to 3.6 V
RF shielding
Onboard 32.768 kHz crystal
(Deep-Sleep clock) and
16 MHz crystal
Application interfaces:
2x UART, 1x TWI, 1x ADC
GPIO interface
Debug/Programming interfaces:
1x SPI, 1x JTAG, 1x ISP
Solderable 2.4 GHz RF output pads
(1x RFOUT, 3x RFGND)
Certification: CE, FCC pending
ATmega128RFA1
Transceiver crystal
16MHz [+/-10ppm]
JTAG
UART
VCC
1.8V to 3.6V
Watch crystal
32.768kHz
SPI
TWI
ADC
GPIO
RFout
3.2. deRFmega128-22M10
The radio module deRFmega128-22M10 offers the following features:
Figure 2 shows the block diagram of the radio module deRFmega128-22M10.
Figure 2: Block diagram deRFmega128-22M10
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Tiny size: 21.5 x 13.2 x 3.0 mm
59 LGA pads 0.6 x 0.6 mm
Supply voltage 2.0 V to 3.6 V
Antenna diversity support
RF shielding
Onboard 32.768 kHz crystal
(Deep-Sleep clock) and
16 MHz crystal
Application interfaces:
2x UART, 1x TWI
GPIO interface
Debug/Programming interfaces:
1x SPI, 1x JTAG, 1x ISP
2.4 GHz front-end module with
internal 20 dB PA and LNA
Solderable 2.4 GHz RF output pad
(2x RFOUT, 6x RFGND)
Certification: CE, FCC pending
ATmega128RFA1
Transceiver crystal
16MHz [+/-10ppm]
JTAG
UART
VCC
2.0V to 3.6V
Watch crystal
32.768kHz
SPI
TWI
ADC
GPIO
2.4GHz Front-End
RFout 1
RFout 2
RF
Control
3.3. deRFmega128-22M12
The radio module deRFmega128-22M12 offers the following features:
Figure 3 shows the block diagram of the radio module deRFmega128-22M12.
Figure 3: Block diagram deRFmega128-22M12
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Mechanical
Radio modules
Size (L x W x H)
23.6 x 13.2 x 3.0 mm (for 22M00)
19.0 x 13.2 x 3.0 mm (for 22M10)
21.5 x 13.2 x 3.0 mm (for 22M12)
Pads
Type
LGA
Pitch
1.60 mm
Pad size
0.6 x 0.6 mm
Temperature range
Parameter
Min
Typ
Max
Unit
Operating
temperature range
T
work
-40 +85
°C
Humidity
25 80
% r.H.
Storage
temperature range
T
storage
-40 +125
°C
Electrical
deRFmega128-22M00 and deRFmega128-22M10
Parameter
Min
Typ
Max
Unit
Supply Voltage
VCC
1.8
3.3
3.6
V
Current
consumption
I
TXon
(TX_PWR = +3 dBm)
17.8
18.1
18.2
mA
I
TXon
(TX_PWR = 0 dBm)
16.2
16.4
16.5
mA
I
TXon
(TX_PWR = -17 dBm)
12.5
12.7
12.7
mA
I
RXon
17.5
17.6
17.7
mA
I
Idle
(Txoff, MCK = 8MHz)
4.7
4.8
4.8
mA
I
Sleep
(depends on Sleep Mode)
<1
µA
deRFmega128-22M12
Parameter
Min
Typ
Max
Unit
Supply Voltage
VCC
2.0
3.3
3.6
V
4. Technical data
Table 4-1: Mechanical data
Table 4-2: Temperature range
Table 4-3: Electrical data
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Current
consumption
I
TXon
(TX_PWR = +20 dBm)
119.4
197.7
205.2
mA
I
TXon
(TX_PWR = +4 dBm)
27.0
46.1
46.7
mA
I
RXon
19.8
22.5
22.8
mA
I
Idle
(Txoff, MCK = 8 MHz)
5.2
5.4
5.6
mA
I
Sleep
(depends on Sleep Mode)
<1
µA
Quartz crystal
Parameter
Min
Typ
Max
Unit
Watch crystal
Frequency
32.768
kHz
Frequency tolerance
+/-20
ppm
Transceiver crystal
Frequency
16.000
MHz
Frequency tolerance
+/-10
ppm
Radio 2.4 GHz (Supply voltage VCC = 3.3V)
Parameter / feature
Min
Typ
Max
Unit
Antenna
Type
Chip ceramic
Gain -0.7
dBi
Diversity
No
RF Pad
Impedance
50
Ω
Range
Line of sight
TBD
m
Frequency range1
PHY_CC_CCA = 0x0B...0x1A
2405
2480
MHz
Channels
PHY_CC_CCA = 0x0B...0x1A
16
Transmitting
power conducted
TX_PWR = 0x00
VCC = 3.3V
2.3 2.9
dBm
Receiver sensitivity
Data Rate = 250 kBit/s
Data Rate = 500 kBit/s
Data Rate = 1000 kBit/s
Data Rate = 2000 kBit/s
-98
-94
-91
>-80
dBm
dBm
dBm
dBm
1
Table 4-4: Quartz crystal properties
Table 4-5: Radio data of deRFmega128-22M00 and deRFmega128-22M10
Operating the transmitter at channel 11 to 25 requires a duty cycle ≤35% and channel 26 requires a
duty cycle ≤15% to fulfil all requirements according to FCC Part 15 Subpart C § 15.209. See chapter
4.3 for further information.
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Data rate (gross)
TRX_CTRL_2 = 0x00
TRX_CTRL_2 = 0x01
TRX_CTRL_2 = 0x02
TRX_CTRL_2 = 0x03
250
500
1000
2000
kBit/s
kBit/s
kBit/s
kBit/s
EVM
conducted
6.5
7.5
10.5
%
Radio (Supply voltage VCC = 3.3V)
Parameter / feature
Min
Typ
Max
Unit
RF pad
Impedance
50
Ω
Diversity
Yes
Range
TBD
m
Frequency range
2405
2480
MHz
Channels 16
Transmitting
power conducted
2,3
TX_PWR = 0x00
VCC = 3.3V
21.4
21.9
22.4
dBm
Receiver sensitivity
Data Rate = 250 kBit/s
Data Rate = 500 kBit/s
Data Rate = 1000 kBit/s
Data Rate = 2000 kBit/s
-105
-100
-98
-91
dBm
dBm
dBm
dBm
Data rate (gross)
TRX_CTRL_2 = 0x00
TRX_CTRL_2 = 0x01
TRX_CTRL_2 = 0x02
TRX_CTRL_2 = 0x03
250
500
1000
2000
kBit/s
kBit/s
kBit/s
kBit/s
EVM
conducted
6.5
7.5
9.5
%
2
3
Table 4-6: Radio data of deRFmega128-22M12
Only applicable for EU: The maximum allowed TX_PWR register setting of deRFmega128-22M12 is
TX_PWR = 0x0E. According to EN 300 328 clause 4.3.1 the maximum transmit power is restricted to
a limit of +10dBm.
Only applicable for US: Operating the transmitter at channel 11, 12, 13, 23, 24, 25 and 26 requires to
ensure a reduced output power and/or duty cycle limit to fulfil all requirements according to FCC Part
15 Subpart C § 15.209. See chapter 4.3.
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4.1. TX Power register settings for deRFmega128-22M00 and 22M10
The diagrams in Figure 4 and Figure 5 are showing the current consumption and conducted
output power during transmission depending on the TX_PWR register setting. The values are
valid for deRFmega128-22M00 and 22M10.
Figure 4: TX Idd vs. TX_PWR for deRFmega128-22M00 / 22M10
Figure 5: TX Pout vs. TX_PWR for deRFmega128-22M00 / 22M10
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4.2. TX Power register settings for deRFmega128-22M12
The diagrams in Figure 6 and Figure 7 showing the current consumption and conducted
output power during transmission depending on the TX_PWR register setting. The values are
valid for deRFmega128-22M12.
Figure 6: TX Idd vs. TX_PWR for deRFmega128-22M12
Figure 7: TX Pout vs. TX_PWR for deRFmega128-22M12
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Data transmission timeline
Operation
State
buffer
input
data
transmit
data
buffer
input
data
transmit
data
buffer
input
data
transmit
data
buffer
input
data
TX State
OFF
ON
OFF
ON
OFF
ON
OFF
…
Duration [ms]
30 4 30 4 30 4 30
…
Time [ms]
0..
30
30..
34
34..
64
64..
68
68..
98
98..
102
102..
132
…
4.3. Output power and duty cycle settings for deRFmega128-22M00
The radio module deRFmega128-22M00 must observe the duty cycle settings to be
compliant with all FCC regulatory requirements.
The requirements are a duty cycle which is ≤15% for channel 26 operation and ≤36% for the
remaining channels. The duty cycle is related to a period of 100ms, where the given value
defines the TX-ON time. That means, the maximum allowed TX-ON time is 15ms within a
period of 100ms for channel 26 and 36ms for all other channels respectively.
The available default firmware for the radio modules is a ‘Wireless UART’ (WUART) that
transmits wireless data inputs from one node to another. The WUART packets length
including overhead ranges between of 12 and 127 bytes. All radio protective systems like
automated acknowledgement, CSMA-CA and frame-retry are activated. Therefore sending a
packet with maximum length takes approximately 4ms to from start to end of transmission.
Before each transmission, a fixed delay time of 30ms is defined, to ensure that the available
maximum packet length is used. This optimizes the energy performance of the radio module,
because not every single data input will be transmitted separately. The fixed delay time
cannot be changed by software. By default, the WUART firmware operates at channel 20
which also cannot be changed by the user.
Table 4-7 shows a worst case scenario of data transmission with maximum packet length of
127 bytes. The data input will be buffered within the 30ms delay and then transmitted. The
CSMA-CA wait time is assumed to be zero. Here, the RX-ON time of receiving the
automated acknowledgement after each transmission is ignored. The transition will be
continued until all data inputs are successfully transmitted. Therefore, the resulting duty cycle
is ≤ 12% and fulfills the FCC requirements for all channels.
Table 4-7: Timeline
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Channel
ETSI
FCC
TX_PWR
[hex]
Duty Cycle
[%]
TX_PWR
[hex]
Duty Cycle
[%]
11
0x0E
100
0x0B
100
12
0x0E
100
0x02
100
13
0x0E
100
0x01
100
14
0x0E
100
0x00
100
15
0x0E
100
0x00
100
16
0x0E
100
0x00
100
17
0x0E
100
0x00
100
18
0x0E
100
0x00
100
19
0x0E
100
0x00
100
20
0x0E
100
0x00
100
21
0x0E
100
0x00
100
22
0x0E
100
0x00
100
23
0x0E
100
0x06
100
24
0x0E
100
0x0D
100
25
0x0E
100
0x0F
100
26
0x0E
100
0x0F
30
4.4. Output power and duty cycle settings for deRFmega128-22M12
The radio module deRFmega128-22M12 is able to provide an output power greater than
20dBm. Table 4-8 defines the necessary power settings of the TX_PWR register [1], which
must be set to fulfill all national requirements of Europe (EN 300 328) and USA (CFR 47
Ch. I FCC Part 15). The duty cycle defines the relationship between the radio-on time and
the period of 100ms.
Table 4-8: power table for deRFmega128-22M12
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