DEM 16216 SYH-LYSTN Yellow GreenTransflective Positive Mode
l Viewing Direction: 6 O’clock
l Driving Scheme: 1/16 Duty Cycle, 1/5 Bias
l Power Supply Voltage: 2.7 to 5.5V (typ. 5V)
l Backlight Color : Yellow Green (lightbox)
l V
l Display Format: 16 x 2 Characters (5 x 8 dots, Formal : 192 Kinds )
l Internal Memory : CGROM (8,320 bits )
: DDRAM (80 x 8 bits for 80 Digits)
l Interface: Easy Interface with a 4-bit or 8-bit MPU
2. MECHANICAL SPECIFICATIONS
l Character Pitch : 3.55 (W) x 5.95 (H) mm
l Character Size : 2.95 (W) x 5.55 (H) mm
l Character Font : 5 x 8 dots
l Dot Size : 0.55 (W) x 0.65 (H) mm
l Dot Pitch : 0.60 (W) x 0.70 (H) mm
3. BLOCK DIAGRAM
(adjustable for best contrast): 4.5V (typ.)
LCD
: CGRAM (64 x 8 bits)
DB0~DB7
E
R/W
RS
V
0
VDD
VSS
K
LCD
Controller
LSI
KS0070B
BACKLIGHT
LCD PANEL
2 Line x 16 Characters
2
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DEM 16216 SYH-LYProduct Specification
4. EXTERNAL DIMENSIONS
Figure 2.0 External Dimensions For DEM 16216 SYH-LY
5. PIN ASSIGNMENT
Pin No.SymbolFunction
1VSSGround terminal of module.
2VDDPower terminal of module 2.7V to 5.5V.
3V0Power Supply for liquid crystal drive.
4RS
5R/W
6ERead/Write Enable Signal
7DB0
8DB1
9DB2
10DB3
11DB4
12DB5
13DB6
14DB7
15LED – (K)Please also refer to 6.1 PCB drawing and description.
16LED + (A)Please also refer to 6.1 PCB drawing and description.
Bi-directional data bus, data transfer is performed once, thru
DB0 to DB7, in the case of interface data. Length is 8-bits; and
twice, thru DB4 to DB7 in the case of interface data length is 4bits. Upper four bits first then lower four bits.
6-1-2. The metal-bezel should be on ground when the J1 is solder-Bridge.
6-1-3.The LED resistor should be bridged when the J6 is solder-Bridge.
6-1-4.The R7 and the R8 are the LED resistor. (R7=10 Ohm, R8=OPEN)
state
J3,J5J2, J4
LED Polarity
15 Pin16 Pin
4
Page 7
DEM 16216 SYH-LYProduct Specification
J6R8R7J2J2
J1J3J5J4J5J4J3
6.2 Example application
6-2-1. The LED resistor should be bridged as following.
6-2-2. The 15 pin is the anode and the 16 pin is the cathode as following.
6-2-3.The 15 pin is the cathode and the 16 pin is the anode as following.
To overcome the speed difference between the internal clock of KS0070B and the MPU clock, KS0070B performs
internal operations by storing control information to IR or DR. The internal operation is determined according to the
signal from MPU, composed of read/write and data bus (refer to table 5.)
Instruction can be divided largely into four kinds:
(1) KS0070B function set instructions (set display methods, set data length, etc.)
(2) Address set instructions to internal RAM.
(3) Data transfer instructions with internal RAM.
(4) Others.
The address of the internal RAM is automatically increased or decreased by 1.
*NOTE: During internal operation, busy flag (DB7) is read”1”. Busy flag check must be preceded by the next
instruction.
When you make an MPU program with checking the busy flag (DB7), it must be necessary 1/2 fosc for executing the
next instruction by falling E signal after the busy flag (DB7) goes to “0”.
Contents
1) Clear display
RSR/WDB7DB6DB5DB4DB3DB2DB1DB0
0000000001
Clear all the display data by writing “20H”(space code) to all DDRAM address, and set the DDRAM addresses to
“00H” in the AC (address counter). Return cursor to original status, namely, bring the cursor to the left edge on first
line of the display. Make entry mode increment (I/D=“1”).
2) Return home
RSR/WDB7DB6DB5DB4DB3DB2DB1DB0
000000001x
Return home is the cursor return home instruction.
Set DDRAM address to “00H” in the address counter. Return cursor to its original site and return display to its
original status, if shifted. Contents of DDRAM does not change.
3) Entry mode set
RSR/WDB7DB6DB5DB4DB3DB2DB1DB0
00000001I/DSH
Set the moving direction of cursor and display.
I/D: increment/decrement of DDRAM address is increased by 1.
When I/D=”1”, cursor/blink moves to right and DDRAM address is increased by 1.
When I/D=”0”, cursor/blink moves to left and DDRAM address is increased by 1.
CGRAM operates the same as DDRAM, when reading from or writing to CGRAM.
SH: shift of entire display
When DDRAM is in read (CGRAM read/write) operation or SH=”0”, shift of entire display is not performed.
If SH=”1” and in DDRAM write operation, shift of entire display is performed according to I/D value (I/D=”1”:
shift left, I/D=”0”: shift right).
7
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DEM 16216 SYH-LYProduct Specification
4) Display ON/OFF control
RSR/WDB7DB6DB5DB4DB3DB2DB1DB0
0000001DCB
Control display/cursor/blink ON/OFF 1-bit register.
D: Display ON/OFF control bit
When D=”1”, entire display is turned on.
When D=”0’, display is turned off, but display data remains in DDRAM.
C: cursor or ON/OFF control bit
When C=”1”, cursor is turned on.
When C=”0”, cursor disappears in current display, but I/D register retains its dat.
B: cursor blink ON/OFF control bit
When B=”1”, cursor blink is on, which performs alternately between all the “1” data and display characters at the
cursor position.
When B=”0”, blink is off
5) Cursor or display shift
RSR/WDB7DB6DB5DB4DB3DB2DB1DB0
000001S/CR/LXX
Without writing or reading the display data, shift right/left cursor position or display.
This instruction is used to correct or search display data. (refer to table 40
During 2-line mode display, cursor moves to the 2nd line after the 40st digit of the 1st line.
Note tat display shift is performed simultaneously in all the lines.
When displayed data is shifted repeatedly, each line shifts individually.
When display shift is performed, the contents of the address counter are not changed.
Table 4. shift patterns according to S/C and R/L bits
S/CR/Loperation
00Shift cursor to the left, AC is decreased by 1
01Shift cursor to the right, AC is decreased by 1
10Shift all the display to the left, cursor moves according to the display
11Shift all the display to the right, cursor moves according to the display
8
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DEM 16216 SYH-LYProduct Specification
6) Function set
RSR/WDB7DB6DB5DB4DB3DB2DB1DB0
00000DLNFXX
DL: Interface data length control bit
When DL=”1”, it means 8-bit bus mode with MPU.
When DL=”0”, it means 4-bit bus mode with MPU. So to speak, DL is a signal to select 8-bit or 4-bit bus mode.
When 4- bit bus mode, it needs to transfer 4-bit data in two parts.
N: display line number control bit
When N=”0”, it means 1-line display mode.
When N=”1”, it means 2-line display mode.
F: display font type control bit
When F=”0”, 5 x 7 dots format display mode.
When F=”1”, 5 x 10 dots format display mode.
7) Set CGRAM address
RSR/WDB7DB6DB5DB4DB3DB2DB1DB0
0001AC5AC4AC3AC2AC1AC0
Set CGRAM address to AC.
THIS INSTRUCTION MAKES CGRAM data available from MPU.
8) Set DDRAM address
RSR/WDB7DB6DB5DB4DB3DB2DB1DB0
001AC6AC5AC4AC3AC2AC1AC0
Set DDRAM address to AC
This instruction makes DDRAM data available from MPU.
When in 1-line display mode (N=0), DDRAM address is from “00H” to “4FH”.
In 2-line display mode (N=1), DDRAM address in the 1st line is from “00H” to “27H”, and DDRAM address in the
2nd line is from “40H” to “67H”.
9) Read busy flab & address
RSR/WDB7DB6DB5DB4DB3DB2DB1DB0
00BFAC6AC5AC4AC3AC2AC1AC0
This instruction shows whether KS0070B is in internal operation or not. If the resultant BF is “1”, it means the
internal operation is in progress and your have to wait until BF is low. Then the next instruction can be performed. In
this instruction your can also read the value of the address counter.
10) Write data to RAM
RSR/WDB7DB6DB5DB4DB3DB2DB1DB0
10D7D6D5D4D3D2D1D0
Write binary 8-bit data to DDRAM / CGRAM
The selection of RAM from DDRAM, and CGRAM, is set by the previous address set instruction: DDRAM address
set, and CGRAM address set. RAM set instruction can also determine the AC direction to RAM.
After write operation, the address is automatically increased/decreased by 1, according to the entry mode.
9
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DEM 16216 SYH-LYProduct Specification
11) Read data to RAM
RSR/WDB7DB6DB5DB4DB3DB2DB1DB0
11D7D6D5D4D3D2D1D0
Read binary 8-bit data from DDRAM/CGRAM.
The selection of RAM is set by the previous address set instruction. If the address set instruction of RAM is not
performed before this instruction, the data that is read first is invalid, because the direction of AC is not determined.
If you read RAM data several times without RAM address set instruction before read operation, you can get correct
RAM data. In the case of DDRAM read operation, cursor shift instruction plays the same role as DDRAM address
set instruction; it also transfers RAM data to the output data register.
After read operation the address counter is automatically increased/decreased by 1 according to the entry mode. After
CGRAM read operation, display shift may not be executed correctly.
In the case of RAM write operation, after this AC is increased/decreased by 1 like read operation. At his time, AC
indicates the next address position, but your can read only the previous data by the read instruction.
Table 5.instruction table
Instruction Code
Instruction
Clear
Display
Return
Home
Entry Mode
set
Display
ON/OFF
Control
Cursor or
Display shift
Function set00001DLNFXX
Set
CGRAM
address
Set
CGRAM
address
Read busy
flag and
address
Write data
to RAM
Read data to
RAM
RSR/WDB7DB6DB5DB4DB3DB2
0000000001
000000001x
00000001I/DSH
0000001DCB
000001S/CR/LXX
0001AC5AC4AC3AC2
001AC6AC5AC4AC3AC2
01BFAC6AC5AC4AC3AC2
10D7D6D5D4D3D2D1D0
11D7D6D5D4D3D2D1D0
DB
AC
AC
AC
DB0
1
AC0
1
AC0
1
AC0
1
Description
Write “20H” to DDRAM and set
DDRAM address to “00H” from
AC.
Set DDRAM address to “00H”from
AC and return cursor to its original
position if shifted.
Assign cursor moving direction and
enable the shift of entire display.
Set display (D), cursor(C), and
blinking of cursor (B) on/off control
bit.
Set cursor moving and display shift
control bit, and the direction without
changing of DDRAM data.
Set interface data length (DL:4bit/8-bit), numbers of display line
(N:1-line/2-line, display font type
(F:0…)
Set CGRAM address in address
counter.
Set DDRAM address in address
counter.
Whether during internal operation or
not can be known by reading BF.
The contents of address counter can
also be read.
Write data into internal RAM
(DDRAM/CGRAM).
Read data into internal RAM
(DDRAM/CGRAM).
Execution
time
(fosc=
270kHz)
1.53 ms
1.53ms
39us
39us
39us
39us
39us
39us
0us
43us
43us
NOTE: when you make an MPU program with checking the busy flag (DB7), it must be necessary 1/2 Fosc for
executing the next instruction by falling E signal after the busy flag (DB7) goes to “0”.
10
Page 13
DEM 16216 SYH-LYProduct Specification
Figure 6.0 Example of 8-bit bus mode timing diagram
Figure 7.0 Example of 4-bit bus mode timing
10. INTERFACE WITH MPU IN BUS MODE
1) Interface with 8-bit MPU
When interfacing data length are 8-bit, transfer is performed all at once through 8-ports, from DB0 to DB7.
An example of the timing sequence is shown below.
RS
R/W
E
internal Singnal
DB7
Data
instruction
internal Operation
BusyBusy
Busy Flag
check
Busy Flag
check
No
Busy
Busy Flag
check
Data
instruction
2) Interface with 4-bit MPU
When interfacing data length are 4-bit, only 4 ports, from DB4 to DB7, are used as data bus.
At first, higher 4-bit (in case of 8-bit bus mode, the contents of DB4 to DB7) are transferred, and then the lower 4-bit
(in case of 8-bit bus mode, the contents of DB0 to DB3) are transferred. So transfer is performed in two parts. Busy
flag outputs”1”after the second transfer are ended.
Example of timing sequence is shown below.
RS
R/W
E
internal Singnal
DB7
instruction
internal Operation
Busy
Busy Flag check
11
No
Busy
Busy Flag Check
instruction
Page 14
DEM 16216 SYH-LYProduct Specification
11. INITIALIZING BY INSTRUCTION
11-1. 8-bit interface mode
Power on
Wait for more than 30ms
after VDD rises to 4.5V
Function set
RSRW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
000011NFXX05 x 7 dots
Wait for more than 39us
Display on/off control
RSRW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0000001DCB0cursor off
Wait for more than 39us0blink off
Display clear
RSRW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0000000001
Condition : fosc=270khz
01-line mode
N
F
D
C
B
12-line mode
15 x 10 dots
0display off
1display on
1cursor on
1blink on
Wait for more than 1.53ms
Entry mode set
RSRW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
00000001I/DSH
Initialization end
I/D
SH
0decrement mode
1increment mode
0entire shift off
1entire shift on
12
Page 15
DEM 16216 SYH-LYProduct Specification
11-2. 4-bit interface mode
Power on
Wait for more than 30ms
after VDD rises to 4.5v
Function set
RSRWDB7 DB6 DB5 DB4 DB3 DB2 DB1 DB001-line mode
000010XXXX
000010XXXX05 x 7 dots
00NFXXXFXX
Wait for more than 39us
Display on/off control0display off
RSRWDB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
000000XXXX0cursor off
001DCBXXXX
Wait for more than 39us
Condition : fosc=270khz
N
F
D
C
B
12-line mode
15 x 10 dots
1Display on
1cursor on
0blink off
1blink on
Display clear
RSRWDB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
000000XXXX
000001XXXX
Wait for more than 1.53ms
Entry mode set0decrement mode
RSRWDB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
000000XXXX0entire shift off
0001I/DSHXXXX
Initialization end
I/D
SH
1increment mode
1entire shift on
13
Page 16
DEM 16216 SYH-LYProduct Specification
12. MAXIMUM ABSOLUTE POWER RATINGS
ItemSymbolStandard value
Power supply voltage (1)V
Power supply voltage (2)V
Input voltage
Volt. For BL
VLED14 ~ 4.5
V
DD
LCD
IN
-0.3 ~ +7.0
VDD-15.0 ~ VDD+0.3
-0.3 ~ VDD+0.3
Unit
V
V
V
V
Operating temperatureTopr -20 ~ +70
Storage temperature
Tstg
-25 ~ +75°C
13. ELECTRICAL CHARACTERISTICS
13-1-1 DC Characteristics (VDD = 4.5V ~ 5.5V, Ta = -25 ~ +75°C)
ItemSymbol
Operating VoltageV
I
Supply Current
I
Input Voltage(1)
(except OSC1)
Input Voltage(2)
( OSC1)
V
V
V
V
DD
DD1
DD2
IL1
IH1
IL2
IH2
Standard Value
MINTYPMAX
4.5---5.5
----0.71.0
----0.40.6
-0.3--0.6
2.2--V
-0.2--1.0
VDD-1.0--V
Resistor oscillation external
DD
DD
°C
Test
Condition
-------
Ceramic oscillation
fosc=250kHz
clock operation
fosc=270kHz
--------
---------
----------
----------
Unit
V
mA
V
V
V
Output Voltage (1)
(DB0 to DB7)
Output Voltage (2)
(except DB0 to DB7)
Voltage Drop
Input Leakage CurrentI
Input Low CurrentI
Internal Clock
(external Rf)
External Clock
OL1
V
OH1
V
OL2
V
OH2
Vd
COM
Vd
SEG
IL
IN
f
IC
f
EC
Duty455055
tR,t
LCD Driving VoltageVLCD
-------0.4
2.4-------
---------0.1VDD
0.9VDD--------
--------1
---------1
-1---1VIN=0 V to VDDuA
-50-125-250
190270350
150250350
F
------0.2
4.6
---10.0VDD-V5 (1/5,1/4 Bias)V
IOL=1.2uA
IOH=-0.205mA
IOL=40uA
IOH=-40uA
IO=±0.1 mA
VIN=0V,VDD=5V(pull up)
Rf = 91kΩ ± 2%
(VDD=5V)
----
----
----
V
V
V
uA
kHz
kHz
%
us
14
Page 17
DEM 16216 SYH-LYProduct Specification
(CONTINUED)
(VDD = 2.7V ~ 4.5V, Ta = -25 ~ +75°C)
ItemSymbol
Standard Value
MINTYPMAX
Test
Condition
Unit
Operating VoltageV
Supply Current
Input Voltage(1)
(except OSC1)
Input Voltage(2)
( OSC1)
Output Voltage (1)
(DB0 to DB7)
Output Voltage (2)
(except DB0 to DB7)
Voltage Drop
I
I
V
V
V
V
V
V
V
V
Vd
Vd
DD
DD1
DD2
IL1
IH1
IL2
IH2
OL1
OH1
OL2
OH2
COM
SEG
2.7---4.5
----0.30.5
----0.170.3
-0.3--0.4
0.7V
DD
--V
DD
--0.2V
0.7V
DD
--V
DD
-------0.4
2.0-------
---------0.2VDD
0.8VDD--------
--------1
---------1.5
-------
Ceramic oscillation
fosc=250kHz
Resistor oscillation
external clock operation
fosc=270kHz
--------
---------
DD
----------
----------
IOL=0.1mA
IOH=-0.1mA
IOL=40uA
IOH=-40uA
IO=±0.1 mA
V
mA
V
V
V
V
V
Input Leakage CurrentI
Input Low CurrentI
Internal Clock
(external Rf)
External Clock
IL
IN
f
IC
f
EC
Duty455055
tR,t
LCD Driving VoltageVLCD
-1---1VIN=0 V to VDDuA
-10-50-120
190250350
125270350
F
------0.2
3.0
---10.0VDD-V5 (1/5,1/4 Bias)V
VIN=0V,VDD=3V(pull up)
Rf = 75kΩ ± 2%
(VDD=3V)
----
----
----
uA
kHz
kHz
%
us
15
Page 18
DEM 16216 SYH-LYProduct Specification
DD
DD
13-2-1 AC Characteristics
(V
= 4.5V ~ 5.5V, Ta = -25 ~ +75°C)
ModeItemSymbol MinTypMax
(1) Write Mode
(refer to 13-2-2
write mode )
(2) Read Mode
(refer to 13-2-3
read mode )
E Cycle Timet
E Rise/Fall TimetR,t
E Pulse Width (High, Low)t
R/W and RS Setup Timet
su1
R/W and RS Hold Timet
Data Setup Timet
su2
Data Hold Timet
E Cycle Timet
E Rise/Fall TimetR,t
E Pulse Width (High, Low)t
R/W and RS Setup Timet
R/W and RS Hold Timet
Data Out Delay Timet
Data Hold Timet
DH
C
w
H1
H2
C
w
su
H
D
500------
F
------25
220------
40-----10------
60-----10------
500------
F
------25
220------
40-----10------
------120
20------
Unit
ns
ns
(V
= 2.7V ~ 4.5V, Ta = -20 ~ +70°C)
ModeItemSymbol MinTypMax
(3) Write Mode
(refer to 13-2-2
write mode )
(4) Read Mode
(refer to 13-2-3
read mode )
E Cycle Timet
E Rise/Fall TimetR,t
E Pulse Width (High, Low)t
R/W and RS Setup Timet
su1
R/W and RS Hold Timet
Data Setup Timet
su2
Data Hold Timet
E Cycle Timet
E Rise/Fall TimetR,t
E Pulse Width (High, Low)t
n The display panel is made of glass. Do not subject it to a mechanical shock by dropping it from a
high place, etc.
n If the display panel is damaged and the liquid crystal substance inside it leaks out, do not get any
in your mouth. If the substance come into contact with your skin or clothes promptly wash it off
using soap and water.
n Do not apply excessive force to the display surface or the adjoining areas since this may cause the
color tone to vary.
n The polarizer covering the display surface of the LCD module is soft and easily scratched. Handle
this polarize carefully.
n To prevent destruction of the elements by static electricity, be careful to maintain an optimum
work environment.
-Be sure to ground the body when handling the LCD module.
-Tools required for assembly, such as soldering irons, must be properly grounded.
-To reduce the amount of static electricity generated, do not conduct assembly and other work
under dry conditions.
-The LCD module is coated with a film to protect the display surface. Exercise care when peeling
off this protective film since static electricity may be generated.
n Storage precautions
When storing the LCD modules, avoid exposure to direct sunlight or to the light of fluorescent
lamps. Keep the modules in bags designed to prevent static electricity charging under low
temperature / normal humidity conditions (avoid high temperature / high humidity and low
temperatures below 0°C).Whenever possible, the LCD modules should be stored in the same
conditions in which they were shipped from our company.
17. Others
n Liquid crystals solidify at low temperature (below the storage temperature range) leading to
defective orientation of liquid crystal or the generation of air bubbles (black or white). Air bubbles
may also be generated if the module is subjected to a strong shock at a low temperature.
n If the LCD modules have been operating for a long time showing the same display patterns may
remain on the screen as ghost images and a slight contrast irregularity may also appear. Abnormal
operating status can be resumed to be normal condition by suspending use for some time. It should
be noted that this phenomena does not adversely affect performance reliability.
n To minimize the performance degradation of the LCD modules resulting from caused by static
electricity, etc. exercise care to avoid holding the following sections when handling the modules:
- Exposed area of the printed circuit board
- Terminal electrode sections
20
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