ZXMC3F31DN8
30V SO8 Complementary dual enhancement mode
MOSFET
Summary
Device
Q1 30 12.9
Q2 -30 12.7
V
Description
This new generation Trench MOSFET from Zetex has been designed to
minimize the on-state resistance (R
switching performance making it ideal for power management and
battery charging functions.
Features
• Low on-resistance
• 4.5V gate drive capability
• Low profile SOIC package
(BR)DSS
(V)
QG
(nC)
I
(Ω)
R
DS(on)
0.024 @ VGS= 10V 7.3
0.039 @ V
0.045 @ VGS= -10V 5.3
0.080 @ V
= 4.5V 5.7
GS
= -4.5V 4
GS
(A)
D
) and yet maintain superior
DS(on)
D1
D2
Applications
• DC-DC Converters
• SMPS
• Load switching switches
• Motor control
G1
S1
Q1 N-Channel Q2 P-Channel
• Backlighting
Ordering information
Device Reel size
(inches)
ZXMC3F31DN8TA 7 12 500
Tape width
(mm)
Quantity
per reel
Device marking
ZXMC
3F31
Issue 1 - September 2008 1
© Diodes Incorporated 2008
G1
S2
G2
N
Top view
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G2
S2
D1S1
D1
D2
P
D2
Absolute maximum ratings
ZXMC3F31DN8
Parameter Symbol N-
channel
Q1
Drain-Source voltage
Gate-Source voltage
Continuous Drain current @ VGS= 10V; TA=25°C
@ V
@ V
= 10V; TA=70°C
GS
= 10V; TA=25°C
GS
@ VGS= 10V; TA=25°C
@ V
Pulsed Drain current
(c)
Continuous Source current (Body diode)
Pulsed Source current (Body diode)
Power dissipation at TA =25°C
= 10V; TL=25°C
GS
(b)(d)
(c)(d)
(a)(d)
(b)(d)
(b)(d)
(a)(d)
(a)(e)
(f)(d)
DSS
V
GS
I
D
I
DM
I
S
I
SM
P
D
30 -30 V
±20 ±20
7.3
5.9
5.7
6.8
7.8
33 23 A
3.5 3.2 A
33 23 A
V
Linear derating factor
Power dissipation at TA =25°C
(a)(e)
P
D
Linear derating factor
Power dissipation at TA =25°C
(b)(d)
P
D
Linear derating factor
Power dissipation at TL =25°C
(f) (d)
P
D
Linear derating factor
, T
Operating and storage temperature range
T
j
stg
channel
1.25
10
1.8
14
2.1
17
2.35
19
-55 to 150
P-
Q2
5.3
4.3
4.1
4.9
5.7
Unit
V
A
W
mW/°C
W
mW/°C
W
mW/°C
W
mW/°C
°C
Thermal resistance
Parameter Symbol Value Unit
(f) (d)
(a)(d)
(a)(e)
(b)(d)
Junction to ambient
Junction to ambient
Junction to ambient
Junction to lead
NOTES:
(a) For a device surface mounted on 25mm x 25mm x 1.6mm FR4 PCB with high coverage of single sided 2oz copper, in still
air conditions.
(b) Mounted on FR4 PCB measured at t ≤ 10 sec.
(c) Repetitive rating on 25mm x 25mm FR4 PCB, D=0.02, pulse width 300us – pulse width limited by maximum junction
temperature.
(d) For a device with one active die.
(e) For a device with two active die running at equal power.
(f) Thermal resistance from junction to solder-point (at the end of the drain lead).
R
R
R
R
θJA
θJA
θJA
θJL
100
70
60
53
°C/W
°C/W
°C/W
°C/W
Issue 1 - September 2008 2
© Diodes Incorporated 2008
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Thermal characteristics
ZXMC3F31DN8
R
DS(ON)
Limited
10
DC
1
100m
Drain Current (A)
D
10m
I
0.1 1 10
1s
100ms
Note (a)(d)
NPN @ Single Pulse, T
10ms
amb
1ms
=25°C
100us
VDS Drain-Source Voltage (V)
N-channel Safe Operating Area
100
80
D=0.5
60
40
D=0.2
20
Thermal Resistance (°C/W)
0
100µ 1m 10m 100m 1 10 100 1k
Single Pulse
D=0.05
D=0.1
Pulse Width (s)
Transient Thermal Impedance
R
DS(ON)
Limited
10
DC
1
100m
Drain Current (A)
D
10m
-I
0.1 1 10
1s
100ms
10ms
Note (a)(d)
PNP @ Single Pulse, T
amb
1ms
100us
=25°C
-VDS Drain-Source Voltage (V)
P-channel Safe O p erating A rea
2.0
1.5
1.0
0.5
0.0
0 25 50 75 100 125 150
Max Power Dissipation (W)
Temperature (°C)
Two active die
One active die
Derating Curve
Single Pulse
T
100
10
amb
=25°C
Maximum Power (W)
1
100µ 1m 10m 100m 1 10 100 1k
Pulse Width (s)
Pulse Power Dissipation
Issue 1 - September 2008 3
© Diodes Incorporated 2008
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ZXMC3F31DN8
Q1 N-channel electrical characteristics (at T
= 25°C unless otherwise stated)
amb
Parameter Symbol Min. Typ. Max. Unit Conditions
Static
Drain-Source breakdown
V
(BR)DSS
30 V
I
= 250μA, VGS=0V
D
voltage
Zero Gate voltage Drain
current
Gate-Body leakage
Gate-Source threshold
voltage
Static Drain-Source
on-state resistance
Forward
Transconductance
Dynamic
(†)
(*)
(*) (†)
Input capacitance
Output capacitance
Reverse transfer
I
DSS
I
GSS
V
GS(th)
R
DS(on)
g
fs
C
iss
C
oss
C
rss
0.5 µA
100 nA
1.0 3.0 V
0.024
Ω
0.039
16.5
S
608
pF
132 pF
72 pF
V
=30V, VGS=0V
DS
V
=±20V, V
GS
I
= 250μA, VDS=VGS
D
V
= 10V, ID= 7.0A
GS
V
= 4.5, ID= 6.0A
GS
V
= 15V, ID= 7.0A
DS
DS
= 15V, VGS=0V
V
DS
f=1MHz
=0V
capacitance
Switching
Turn-on-delay time
Rise time
Turn-off delay time
Fall time
Total Gate charge
Gate-Source charge
Gate-Drain charge
(‡) (†)
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
2.9 ns
3.3 ns
16 ns
8 ns
g
gs
gd
12.9 nC
2.5 nC
2.52 nC
= 15V, VGS=10V
V
DD
= 1A
I
D
≅ 6.0Ω,
R
G
= 15V, VGS= 10V
V
DS
I
= 7A
D
Source–Drain diode
Diode forward voltage
Reverse recovery time
(*)
(‡)
Reverse recovery charge
(‡)
0.82 1.2 V
V
SD
t
rr
Q
rr
12 ns
4.8 nC
I
= 1.7A,VGS=0V
S
IS= 2.2A,di/dt=100A/μs
NOTES:
(*) Measured under pulsed conditions. Pulse width ≤ 300μs; duty cycle ≤ 2%.
(†)Switching characteristics are independent of operating junction temperature.
(‡)For design aid only, not subject to production testing
Issue 1 - September 2008 4
© Diodes Incorporated 2008
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