Page 1
30V P-CHANNEL ENHANCEMENT MODE MOSFET
SUMMARY
(BR)DSS
=-30V; R
V
DESCRIPTION
This new generation of high density MOSFETs from Zetex utilizes a unique
structure that combines the benefits of low on-resistance with fast switching
speed. This makes them ideal for high efficiency, low voltage, power
management applications.
FEATURES
Low on-resistance
•
Fast switching speed
•
Low threshold
•
Low gate drive
•
SOT23 package
•
APPLICATIONS
•
DC - DC converters
=0.35⍀; ID=-1.1A
DS(ON)
ZXM61P03F
SOT23
•
Power management functions
•
Disconnect switches
•
Motor control
ORDERING INFORMATION
DEVICE REEL SIZE
(inches)
ZXM61P03FTA 7 8 embossed 3,000
ZXM61P03FTC 13 8 embossed 10,000
TAPE WIDTH
(mm)
QUANTITY
PER REEL
DEVICE MARKING
P03
ISSUE 1 - OCTOBER 2005
1
Pin out
Top view
SEMICONDUCTORS
Page 2
ZXM61P03F
ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL LIMIT UNIT
Drain-Source Voltage V
Gate- Source Voltage V
DSS
GS
Continuous Drain Current
(V
=-10V; TA=25°C)(b)
GS
(V
=-10V; TA=70°C)(b)
GS
Pulsed Drain Current (c) I
Continuous Source Current (Body Diode)(b) I
Pulsed Source Current (Body Diode)(c) I
Power Dissipation at T
Linear Derating Factor
Power Dissipation at T
Linear Derating Factor
=25°C (a)
A
=25°C (b)
A
Operating and Storage Temperature Range T
I
P
P
D
DM
S
SM
D
D
j:Tstg
THERMAL RESISTANCE
PARAMETER SYMBOL VALUE UNIT
Junction to Ambient (a) R
Junction to Ambient (b) R
NOTES:
(a) For a device surface mounted on 25mm x 25mm FR4 PCB with high coverage of single sided 1oz copper, in still air conditions
(b) For a device surface mounted on FR4 PCB measured at t⭐5 secs.
(c) Repetitive rating - pulse width limited by maximum junction temperature. Refer to Transient Thermal Impedance graph.
θJA
θJA
-30 V
⫾20 V
-1.1
-0.9
-4.3 A
-0.88 A
-4.3 A
625
5
806
6.4
mW
mW/°C
mW
mW/°C
-55 to +150 °C
200 °C/W
155 °C/W
A
ISSUE 1 - OCTOBER 2005
2
SEMICONDUCTORS
Page 3
CHARACTERISTICS
ZXM61P03F
ISSUE 1 - OCTOBER 2005
3
SEMICONDUCTORS
Page 4
ZXM61P03F
ELECTRICAL CHARACTERISTICS (at T
= 25°C unless otherwise stated).
amb
PARAMETER SYMBOL MIN. TYP. MAX. UNIT CONDITIONS.
STATIC
Drain-Source Breakdown Voltage V
Zero Gate Voltage Drain Current I
Gate-Body Leakage I
Gate-Source Threshold Voltage V
Static Drain-Source On-State Resistance (1) R
Forward Transconductance (3) g
(BR)DSS
DSS
GSS
GS(th)
DS(on)
fs
-30 V
-1
⫾100
-1.0 V
0.35
0.55
I
=-250µA, VGS=0V
D
VDS=-30V, VGS=0V
µA
nA V
Ω
Ω
GS
I
=-250µA, VDS=V
D
VGS=-10V, ID=-0.6A
V
=-4.5V, ID=-0.3A
GS
=⫾ 20V, VDS=0V
0.44 S VDS=-10V,ID=-0.3A
DYNAMIC (3)
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
iss
oss
rss
140 pF
45 pF
20 pF
V
=-25 V, VGS=0V,
DS
f=1MHz
SWITCHING(2) (3)
Turn-On Delay Time t
Rise Time t
Turn-Off Delay Time t
Fall Time t
Total Gate Charge Q
Gate-Source Charge Q
Gate Drain Charge Q
d(on)
r
d(off)
f
g
gs
gd
1.9 ns
2.9 ns
8.9 ns
5.0 ns
4.8 nC
0.62 nC
1.3 nC
=-15V, ID=-0.6A
V
DD
R
=6.2Ω,RD=25Ω
G
(Refer to test circuit)
V
=-24V,VGS=-10V,
DS
I
=-0.6A
D
(Refer to test circuit)
SOURCE-DRAIN DIODE
Diode Forward Voltage (1) V
Reverse Recovery Time (3) t
Reverse Recovery Charge(3) Q
NOTES:
(1) Measured under pulsed conditions. Width=300µs. Duty cycle ⱕ2%.
(2) Switching characteristics are independent of operating junction temperature.
(3) For design aid only, not subject to production testing.
SD
rr
rr
14.8 ns Tj=25°C, IF=-0.6A,
-0.95 V Tj=25°C, IS=-0.6A,
V
7.7 nC
di/dt= 100A/µs
GS
=0V
GS
ISSUE 1 - OCTOBER 2005
4
SEMICONDUCTORS
Page 5
TYPICAL CHARACTERISTICS
ZXM61P03F
ISSUE 1 - OCTOBER 2005
5
SEMICONDUCTORS
Page 6
300
)Fp( ecnaticapaC - C
250
200
150
100
50
0
0.1 10 100 0 3
-V
1
- Drain Source Voltage (V)
DS
Capacitance v Drain-Source Voltage
Q
G
Q
GS
V
G
Q
GD
TYPICAL CHARACTERISTICS
)V(
Vgs=0V
f=1MHz
Ciss
Coss
Crss
14
eg
12
at
lo
10
V
e
8
c
r
uoS-etaG
6
4
-
2
SG
V
0
-
Gate-Source Voltage v Gate Charge
ZXM61P03F
ID=-0.6A
VDS=-24V
VDS=-15V
0.5 1 1.5 2 2.5
12V
Q -Charge (nC)
Current
regulator
50k
I
G
V
GS
Same as
D.U.T
D.U.T
3.5 4 4.5
V
DS
I
D
Basic gate charge waveform
trt
d(off)
t
(on)
Switching time waveforms
ISSUE 1 - OCTOBER 2005
Charge
Gate charge test circuit
V
DS
90%
V
GS
R
10%
V
GS
t
t
d(on)
r
t
(on)
G
R
D
V
DS
V
CC
Switching time test circuit
6
SEMICONDUCTORS
Page 7
ZXM61P03F
PACKAGE DETAILS
L
D
3 leads
M
B
K
H
N
G
A
C
F
PAD LAYOUT DETAILS
0.9
0.035
PACKAGE DIMENSIONS
DIM
Min Max Min Max Min Max Max Max
DIM
A 2.67 3.05 0.105 0.120 H 0.33 0.51 0.013 0.020
B 1.20 1.40 0.047 0.055 K 0.01 0.10 0.0004 0.004
C ᎏ 1.10 ᎏ 0.043 L 2.10 2.50 0.083 0.0985
D 0.37 0.53 0.015 0.021 M 0.45 0.64 0.018 0.025
F 0.085 0.15 0.0034 0.0059 N 0.95 NOM 0.0375 NOM
G 1.90 NOM 0.075 NOM ᎏᎏ ᎏ
Millimeters Inches
Millimeters Inches
0.8
0.031
0.95
0.037
2.0
0.079
mm
inches
© Zetex Semiconductors plc 2005
Europe
Zetex GmbH
Streitfeldstraße 19
D-81673 München
Germany
Telefon: (49) 89 45 49 49 0
Fax: (49) 89 45 49 49 49
europe.sales@zetex.com
These offices are supported by agents and distributors in major countries world-wide.
This publicationis issued toprovide outline informationonly which (unless agreed by the Company inwriting) may notbe used, appliedor reproduced
for any purposeor form part of any order or contract or be regarded as a representation relating to the productsor services concerned. The Company
reserves the right to alter without notice the specification, design, price or conditions of supply of any product or service.
For the latest product information, log on to www.zetex.com
Americas
Zetex Inc
700 Veterans Memorial Hwy
Hauppauge, NY 11788
USA
Telephone: (1) 631 360 2222
Fax: (1) 631 360 8222
usa.sales@zetex.com
Asia Pacific
Zetex (Asia) Ltd
3701-04 Metroplaza Tower 1
Hing Fong Road, Kwai Fong
Hong Kong
Telephone: (852) 26100 611
Fax: (852) 24250 494
asia.sales@zetex.com
Corporate Headquarters
Zetex Semiconductors plc
Zetex Technology Park
Chadderton, Oldham, OL9 9LL
United Kingdom
Telephone (44) 161 622 4444
Fax: (44) 161 622 4446
hq@zetex.com
ISSUE 1 - OCTOBER 2005
7
SEMICONDUCTORS
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