Diodes ZXLD1615 User Manual
ZXLD1615
ADJUSTABLE DC-DC BOOST CONVERTER WITH INTERNAL SWITCH IN
TSOT23-5
DESCRIPTION
The ZXLD1615 is a PFM inductive boost converter
designed to provide output voltages of up to 28V
from a 2.5V to 5.5V input supply.
The ZXLD1615 includes the output switch and peak
current sense resistor, and can provide up to 10mA
output current at maximum output voltage. Higher
current is available at lower output voltages.
Quiescent current is typically 60A and a shutdown
function is provided to reduce this current to less
than 100nA in the 'off' state.
ADVANCED FEATURES
Internal 30V NDMOS switch
•
True analog output voltage control via PWM
•
with internal filter
FEATURES
Low profile TSOT23-5 pin package
•
•
Internal PWM filter for adjustable output
•
High efficiency (85% typ)
•
Wide input voltage range: 2.5V to 5.5V
•
Up to 250mA output current at 5V
Nominal output voltage can be set up to a maximum
of 28V by two external resistors and can be adjusted
to lower values by a PWM control signal applied to
the 'Enable' pin. Depending upon the control
frequency, the PWM signal will provide either
continuous (low ripple) or gated control. The PWM
filter components are contained within the chip.
Minimum output voltage is determined by the input
supply.
The device is assembled in a low profile TSOT23-5
pin package.
APPLICATIONS
LCD and OLED bias
•
Cellular / mobile phones
•
Digital cameras
•
• PDAs
•
LCD modules
•
Varactor and PIN diode bias
•
Palmtop computers
•
Low quiescent current: (60A typ)
•
100nA maximum shutdown current
•
Up to 1MHz switching frequency
•
Low external component count
PINOUT
TOP VIEW
ISSUE 3 - AUGUST 2004
TYPICAL APPLICATION CIRCUIT
1
SEMICONDUCTORS
ZXLD1615
ABSOLUTE MAXIMUM RATINGS
(Voltages to GND unless otherwise stated)
Input voltage (V
LX output voltage (V
Switch output current (I
Power dissipation (PD) 300mW
Operating temperature (T
Storage temperature (T
Junction temperature (Tj
ELECTRICAL CHARACTERISTICS: (Test conditions: V
Symbol Parameter Conditions Min Typ Max Units
V
IN
I
IN
V
FB
f
LX
T
OFF
(2)
T
ON
I
LXpk
R
LX
I
LX(leak)
V
ENH
V
ENL
I
ENL
I
ENH
(3)
T
EN(hold)
⌬T/T PWM duty cycle range at
f
LPF
A
LPF
)7V
IN
) 30V
LX
) 500mA
LX
) -40 to 85°C
OP
) -55 to 150°C
ST
) 125°C
MAX
IN=VEN
=3V, T
=25°C unless otherwise stated
AMB
(1)
Input voltage 2.5 5.5 V
Supply current
60
<10
100
100µAnA
Quiescent
Shutdown
V
EN=VIN,ILX
=0V
V
EN
= 0,Output not switching
FB pin control voltage 0.98 1.07 V
Operating frequency L=10H, V
=28V, 5mA load 600 kHz
OUT
LX output ‘OFF’ time 350 500 ns
LX output ‘ON’ time 5µs
Switch peak current limit L=10H, V
=28V, 5mA load 320 mA
OUT
Switch 'On' resistance 1.75 ⍀
Switch leakage current VLX=20V 1 µA
EN pin high level Input voltage Device active 1.5 V
IN
EN pin low level Input voltage Device in shutdown 0.4 V
EN pin low level input current VEN=0V -100 nA
EN pin high level input current VEN=V
IN
1 A
EN pin turn off delay VENswitched from high to low 120 µs
‘EN’ input for dc output
10kHz<f<100kHz, V
ENH=VIN
20 100 %
voltage control
Internal PWM low pass filter
4 kHz
cut-off frequency
Filter attenuation f=30kHz 52.5 dB
)
V
NOTES:
1 Production testing of the device is performed at 25°C. Functional operation of the device over a –40°C to +85°C temperature range is
guaranteed by design, characterization and process control.
2 Nominal ‘on’ time (TONnom ) is defined by the input voltage (V
T
= {I
ONnom
3 This is the time for which the device remains active after the EN pin has been asserted low. This delay is necessary to allow the output to be
maintained during dc PWM mode operation.
4 The maximum PWM signal frequency during this mode of operation should be kept as low as possible to minimize errors due to the turn-off
delay
LX(pkdc)
x L/VIN} +200ns
), coil inductance (L) and peak current (I
IN
) according to the expression:
LXpkdc
ISSUE 3 - AUGUST 2004
SEMICONDUCTORS
2
PIN DESCRIPTION
Pin No. Name Description
LX Output of NDMOS switch
1
GND Ground (0V)
2
FB Feedback pin for voltage control loop
3
Nominal voltage 1.025V
EN Enable input (active high to turn on device)
4
Also used to adjust output current by PWM signal.
Connect to V
V
5
IN
Input voltage (2.5V to 5.5V). Decouple with capacitor close to device.
BLOCK DIAGRAM
for permanent operation.
in
ZXLD1615
ISSUE 3 - AUGUST 2004
3
SEMICONDUCTORS
ZXLD1615
Device Description
The device is a PFM flyback dc-dc boost converter,
working in discontinuous mode.
With reference to the chip block diagram and typical
application circuit, the operation of the device is as
follows:
Control loop
When 'EN' is high, the control circuits become active
and the low side of the coil (L1) is switched to ground
via NDMOS transistor (MN). The current in L1 is
allowed to build up to an internally defined level
(nominally 320mA) before MN is turned off. The
energy stored in L1 is then transferred to the output
capacitor (C2) via schottky diode (D1). The output
voltage is sensed at pin 'FB' by external resistors R1
and R2 and compared to a reference voltage V
(1.025V nominal). A comparator senses when the
output voltage is above that set by the reference and
its output is used to control the 'off' time of the
output switch. The control loop is self-oscillating,
producing pulses of up to 5s maximum duration
(switch 'on'), at a frequency that varies in proportion
to the output current. The feedback loop maintains a
voltage of V
maximum output voltage equal to V
The minimum 'off' time of the output switch is fixed
at 0.5s nominal, to allow time for the coil's energy
to be dissipated before the switch is turned on again.
This maintains stable and efficient operation in
discontinuous mode.
at the FB pin and therefore defines a
REF
REF
REF
*(R1+R2)/R1.
Filtered PWM operation
The input of an internal low pass filter is switched to
V
when the EN pin is high and switched to ground
REF
when the EN pin is low. The output of this filter
drives the comparator within the control loop. A
continuous high state on EN therefore provides a
filtered voltage of value Vref to the comparator.
However, by varying the duty cycle of the EN signal
at a suitably high frequency (f>10kHz), the control
loop will see a voltage, that has an average value
equal to the duty cycle multiplied by V
provides a means of adjusting the output voltage to a
lower value. It also allows the device to be both
turned on and adjusted with a single signal at the
‘EN’ pin. The output during this mode of operation
will be a dc voltage equal to V
cycle.
*(R1+R2)/R1 x duty
REF
REF
. This
Gated PWM operation
The internal circuitry of the ZXLD1615 is turned off
when no signal is present on the 'EN' pin for more
than 120s (nominal). A low frequency signal applied
to the EN pin will therefore gate the device 'on' and
'off' at the gating frequency and the duty cycle of this
signal can be varied to provide an average output
equal to V
accuracy, the gating frequency should be made as
low as possible (e.g. below 1kHz), such that the turn
off delay of the chip is only a small proportion of the
gating period
Further details of setting output current are given in
the application notes.
*(R1+R2)/R1 x duty cycle. For best
REF
SEMICONDUCTORS
ISSUE 3 - AUGUST 2004
4
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