Diodes TL072 User Manual
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TL072
LOW NOISE JFET INPUT OPERATIONAL
AMPLIFIERS
Features
• Low Power Consumption
• Wide Common-Mode and Differential Voltage Ranges
• Low Input Bias and Offset Currents
• Output Short-Circuit Protection
• Low Total Harmonic Distortion…0.003% Typ
• Low Noise Vn=
• High Input Impedance…JFET-Input Stage
• Internal Frequency Compensation
• Latch-Up-Free Operation
• High Slew Rate…13V/μs Typ
• Common-Mode Input Voltage Range Includes V
• SOP-8L: Available in “Green” Molding Compound
(No Br, Sb)
• Lead Free Finish/ RoHS Compliant (Note 1)
ΗΖ18nV Typ at f=1kHz
Applications
• Active filters
• Audio pre-amps
Ordering Information
TL 072 S G - 13
General Description
The JFET-input operational amplifiers in the TL072 are similar to
the TL082, with low input bias and offset currents and fast slew
rate. The low harmonic distortion and low noise make the TL072
ideally suited for high-fidelity and audio preamplifier applications.
Each amplifier features JFET inputs (for high input impedance)
coupled with bipolar output stages integrated on a single
monolithic chip.
+
CC
Package Packing
S : SOP-8L
Green
G : Green
13 : Tape & Reel
Device
Package
Code
Packaging
(Note 2)
13” Tape and Reel
Quantity Part Number Suffix
TL072SG-13 S SOP-8L 2500/Tape & Reel -13
Notes: 1. EU Directive 2002/95/EC (RoHS). All applicable RoHS exemptions applied. Please visit our website at
http://www.diodes.com/datasheets/ap02001.pdf.
http://www.diodes.com/products/lead_free.html
2. Pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which can be found on our website at
TL072 Rev. 1 1 of 11 MAY 2009
www.diodes.com © Diode s Incorporated
Pin Assignments
(1) Dual channel SOP-8L
TL072
LOW NOISE JFET INPUT OPERATIONAL
AMPLIFIERS
( Top View )
OUTPUT1
INVERTING INPUT1
NON-INVERTING INPUT1
V
CC
1
2
TL072
3
-
45
V
8
CC+
7
OUTPUT2
6
INVERTING INPUT2
NON-INVERTING INPUT2
SOP-8L
Pin Descriptions
Pin Name Pin No. Description
OUTPUT1 1 Channel 1 Output
INVERTING INPUT1 2 Channel 1 Inverting Input
NON-INVERTING INPUT1 3 Channel 1 Non-inverting Input
VCC- 4 Supply Voltage
NON-INVERTING INPUT2 5 Channel 2 Non-inverting Input
INVERTING INPUT2 6 Channel 2 Inverting Input
OUTPUT2 7 Channel 2 Ouput
VCC+ 8 Supply Voltage
Block Diagram
TL072 Rev. 1 2 of 11 JULY 2009
www.diodes.com © Diodes Incorporated
TL072
LOW NOISE JFET INPUT OPERATIONAL
AMPLIFIERS
Absolute Maximum Ratings (Note 8)
Symbol Parameter Rating Unit
ESD HBM Human Body Model ESD Protection 1 KV
ESD MM Machine Model ESD Protection 200 V
VCC+ Supply Voltage + (Note 3) +18 V
VCC- Supply Voltage - (Note 3) -18 V
VI Input voltage (Notes 3 and 5) ±15 V
VID Differential input Voltage, V
Duration of output short circuit (Note 6) Unlimited
PD Power Dis sipation (Note 7) 860 mW
TJ Operating Junction Temperature Range 150
TST Storage Temperature Range -65 to +150
Notes: 3. ALL voltage values, except differential voltages, are with respect to the midpoint between V
4. Differential voltage are at the non-inverting input terminal with respect to the inverting input terminal.
5. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15V, whichever is less.
6. The output may be shorted to ground or either supply. Temperature and/or supply voltage must be limited to ensure that the dissipation rating is
not exceeded.
7. Maximum power dissipation is a function of T
temperature is P
=(TJ(max)-TA)/ θJA . Operating at the absolute maximum TJ of 150℃ can affect reliability
D
Recommended Operating Conditions (Note 8)
Symbol Description Rating Unit
VCC± Supply Voltage
TA Operating Ambient Temperature Range
Notes: 8. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Recommended Operating Conditions indicate
conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the
test conditions, see the Electrical Characteristics.
(Note 4)
ID
+ and V
CC
CC
(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient
J
±30
-.
±15
-40 to +85
V
o
C
o
C
V
°C
TL072 Rev. 1 3 of 11 JULY 2009
www.diodes.com © Diodes Incorporated
TL072
LOW NOISE JFET INPUT OPERATIONAL
AMPLIFIERS
Electrical Characteristics (V
= ±15V, TA = 25
CC±
Symbol Parameter Test Conditions Min Typ. Max Unit
=25oC 3 6
V
VIO Input Offset Voltage
α
vIO
Temperature Coefficient
of Input Offset Voltage
O
R
S
VO=0, RS=50Ω, TA= full range 18 μV/ oC
IIO Input Offset Current VO=0
IIB Input Bias Current VO=0
V
VOM
AVD
Common Mode
ICR
Input Voltage Range
Maximum Peak
Output Voltage Swing
Large Signal Di f ferential
Voltage Amplification
±11 -12~+15 V
R
L
RL≧10kΩ,
RL≧2kΩ
V
O
R
L
=0,
=50Ω
=10kΩ, TA=25oC ±12 ±13.5
=±10V,
≧2kΩ
T
A
TA= full range 8
=25oC 5 100 pA
T
A
TA= full range 2 n A
=25oC 65 200 pA
T
A
TA= full range 20 nA
T
= full range
A
=25oC 50 200
T
A
TA= full range 25
B1 Unity Gain Bandwidth 3 MHz
ri Input Resistance TA=25oC
CMRR
k
SVR
ICC
Common Mode
Rejection Rati o
Supply Voltage
Rejection Rati o
±/ΔVIO)
(ΔV
CC
Supply Current
(each amplifier)
V
IC=VICRmin
=50Ω, TA=25 oC
R
S
V
CC
V
=0
O
=50Ω, TA=25 oC
R
S
V
=0, TA=25oC
O
No load
, VO=0
=±9 to ±15V
VO1/VO2 Crosstalk Attenuation AVD=100, TA=25oC 120 dB
=10V, CL=100pF, RL=2kΩ
V
SR Slew Rate at Unity Gain
tr Rise Time
Overshoot Factor 20 %
Vn
In
THD
θ
θ
Notes: 9. Test condition for SOP-8L: Devices mounted on FR-4 substrate PC board, with minimum recommended pad layout.
Equivalent Input Noise
Voltage
Equivalent Input Noise
Current
Total Harmonic
Distortion
Thermal Resistance
JA
Junction-to-Ambient
Thermal Resistance
JC
Junction-to-Case
I
(See Figure 1)
=20mV, RL=2kΩ, CL=100pF
V
I
(See Figure 1)
RS=20Ω
f=1kHz 18
f=10 Hz to 10kHz 4 μV
RS=20Ω, f=1kHz 0.01
=6V, AVD=1,
V
Irms
R
≧2kΩ, RS≦1kΩ,
L
f=1kHz
SOP-8L (Note 9) 145 oC/W
SOP-8L (Note 9) 35
TL072 Rev. 1 4 of 11 JULY 2009
www.diodes.com © Diodes Incorporated
o
C; unless otherwise noted)
±12
±10
12
10
75 100 dB
80 100 dB
1.4 2.5 mA
8 13 V/μs
0.1 μs
0.003 %
mV
V
V/mV
Ω
o
C/W
HZnV
HZpA
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