Diodes DMN65D8LW User Manual

Product Summary

I

V

R

(BR)DSS

60V

3Ω @ V

4Ω @ VGS = 5V

Package

DS(ON)

= 10V

GS

SOT323

D

TA = +25°C

300mA

260mA

Description

This new generation MOSFET has been designed to minimize the on­state resistance (R
performance, making it ideal for high efficiency power management

applications.

) and yet maintain superior switching

DS(on)

Applications

• DC-DC Converters

• Power Management Functions

• Battery Operated Systems and Solid-State Relays

• Drivers: Relays, Solenoids, Lamps, Hammers, Displays,

Memories, Transistors, etc

ESD PROTECTED TO 1kV

SOT323

Top View

DMN65D8LW

N-CHANNEL ENHANCEMENT MODE MOSFET

Features

• Low On-Resistance

• Low Gate Threshold Voltage

• Low Input Capacitance

• Fast Switching Speed

• Small Surface Mount Package

• ESD Protected Gate, 1KV (HBM)

• Lead-Free Finish; RoHS Compliant (Notes 1 & 2)

• Halogen and Antimony Free. “Green” Device (Note 3)

• Qualified to AEC-Q101 Standards for High Reliability

Mechanical Data

• Case: SOT323

• Case Material: Molded Plastic. UL Flammability Classification

Rating 94V-0

• Moisture Sensitivity: Level 1 per J-STD-020

• Terminals: Matte Tin Finish annealed over Alloy 42 leadframe

(Lead Free Plating). Solderable per MIL-STD-202, Method 208

• Terminal Connections: See Diagram

• Weight: 0.006 grams (approximate)

D

G

Top View

Pin Configuration

Gate

S

Gate
Protection
Diode

Equivalent Circuit

Drain

Source

Ordering Information (Note 4)

Part Number Case Packaging

DMN65D8LW-7 SOT323 3000/Tape & Reel

Notes: 1. EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant. All applicable RoHS exemptions applied.

2. See http://www.diodes.com for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free.

3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.

4. For packaging details, go to our website at http://www.diodes.com.

Marking Information

Date Code Key

Year 2011 2012 2013 2014 2015 2016 2017

Code Y Z A B C D E

Month Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec

Code 1 2 3 4 5 6 7 8 9 O N D

MM3

DMN65D8LW

Document number: DS35639 Rev. 4 - 2

MM3 = Product Type Marking Code
YM = Date Code Marking

YM

Y = Year (ex: Y = 2011)
M = Month (ex: 9 = September)

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© Diodes Incorporated

July 2012

θ

)

g

g

)

r

)

Maximum Ratings (@T

= +25°C, unless otherwise specified.)

A

Characteristic Symbol Value Units

Drain-Source Voltage
Gate-Source Voltage

Continuous Drain Current (Note 6) VGS = 10V

Continuous Drain Current (Note 6) VGS = 5V
Pulsed Drain Current (10µs pulse, duty cycle = 1%)

Maximum Body Diode Continuous Current (Note 6)

Thermal Characteristics

Characteristic Symbol Value Units

Total Power Dissipation

Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Case

Operating and Storage Temperature Range

Steady

State

Steady

State

V

DSS

V

GSS

T

= +25°C

A

T

= +70°C

A

T

= +25°C

A

= +70°C

T

A

(Note 5)
(Note 6) 432
(Note 5)
(Note 6) 290
(Note 5)

P

R
R

T

J, TSTG

I

D

I

D

I

DM

I

S

D

JA

θ

JC

300

398

142

-55 to +150 °C

DMN65D8LW

60 V
±20 V
300

230
260

210
800 mA

1 A

mA

mA

mW

°C/W

Electrical Characteristics (@T

= +25°C, unless otherwise specified.)

A

Characteristic Symbol Min Typ Max Unit Test Condition

OFF CHARACTERISTICS (Note 7)

Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate-Body Leakage

BV

DSS

I

⎯ ⎯

DSS

I

⎯ ⎯

GSS

60

⎯ ⎯

1.0 µA

±5.0 µA

V

V

= 0V, ID = 250µA

GS

V
V

DS
GS =

= 60V, V

±20V, V

GS

DS

= 0V

= 0V

ON CHARACTERISTICS (Note 7)

Gate Threshold Voltage
Static Drain-Source On-Resistance
Forward Transconductance

Diode Forward Voltage

V

GS(th

R

DS (ON)

g

V

FS
SD

1.2

⎯

⎯

80 290

- 0.8

2.0 V

⎯

2 3

2.5 4
⎯

1.2

V

Ω V
Ω V

mS

V

V

V

= VGS, ID = 250µA

DS

= 10V, ID = 0.115A

GS

= 5V, ID = 0.115A

GS

= 10V, ID = 0.115A

DS

= 0V, IS = 115mA

GS

DYNAMIC CHARACTERISTICS (Note 8)

Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance

C

⎯

iss

C

⎯

oss

C

⎯

rss

R

⎯

G

Total Gate Charge VGS = 10V Qg ⎯
Total Gate Charge VGS = 4.5V Qg ⎯
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time

Notes: 5. Device mounted on FR-4 PC board, with minimum recommended pad layout, single sided.

8. Guaranteed by design. Not subject to production testing.

6. Device mounted on FR-4 substrate PC board, 2oz copper, with 1inch square copper pad layout.
7 .Short duration pulse test used to minimize self-heating effect.

DMN65D8LW

Document number: DS35639 Rev. 4 - 2

Q

⎯

s

Q

d

t

D(on

t

t

D(off

t

f

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⎯
⎯
⎯

⎯

⎯

22.0

3.2

2.0

79.9

0.87

0.43

0.11

0.11

2.7

2.8

12.6

7.3

⎯
⎯

pF

= 25V, VGS = 0V, f = 1.0MHz

V

DS

⎯
⎯ Ω VDS = 0V, VGS = 0V, f = 1.0MHz
⎯

⎯

⎯

nC

= 10V, VDS = 30V,

V

GS

= 150mA

I

D

⎯
⎯
⎯

⎯

nS

V

= 30V, ID = 0.115A, V

DD

R

= 25Ω

GEN

GEN

= 10V

⎯

July 2012

© Diodes Incorporated

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