Diodes DMN6069SE User Manual

60V N-CHANNEL ENHANCEMENT MODE MOSFET
Product Summary
I
V
R
(BR)DSS
60V
69m @ V
100m @ VGS = 4.5V
DS(ON)
max
= 10V
GS
D
TA = +25°C
4.3A
3.5A
Description
This new generation MOSFET has been designed to minimize the on­state resistance (R performance, making it ideal for high efficiency power management applications.
) and yet maintain superior switching
DS(on)
Applications
Motor control Transformer driving switch
ADVANCE INFORMATION
 DC-DC Converters  Power management functions  Uninterrupted power supply
SOT223
Top View
Features
100% Unclamped Inductive Switch (UIS) test in production
Fast switching speed
Low on-resistance
Lead-Free Finish; RoHS compliant (Notes 1 & 2)
Halogen and Antimony Free. “Green” Device (Note 3)
Qualified to AEC-Q101 Standards for High Reliability
Mechanical Data
Case: SOT223
Case Material: Molded Plastic, “Green” Molding Compound.
Moisture Sensitivity: Level 1 per J-STD-020
Terminals Connections: See diagram below
Terminals: Finish - Matte Tin annealed over Copper lead frame.
Weight: 0.112 grams (approximate)
Pin Out - Top View
UL Flammability Classification Rating 94V-0 (Note 1)
Solderable per MIL-STD-202, Method 208
D
G
S
Equivalent Circuit
Ordering Information (Note 4)
Part Number Qualification Case Packaging
DMN6069SE-13 Standard SOT223 2,500 / Tape & Reel
Notes: 1. EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant. All applicable RoHS exemptions applied.
2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds.
4. For packaging details, go to our website at http://www.diodes.com/products/packages.html.
Marking Information
YWW
N6069
DMN6069SE
D
atasheet number: DS36474 Rev. 2 - 2
YWW
N6069
= Manufacturer’s Marking N6069 = Marking Code YWW = Date Code Marking for SAT (Shanghai Assembly/ Test site) YWW = Date Code Marking for CAT (Chengdu Assembly/ Test site) Y or Y= Year (ex: 3 = 2013) WW = Week (01 - 53)
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)
g
g
)
r
)
Maximum Ratings (@T
= +25°C, unless otherwise specified.)
A
Characteristic Symbol Value Units
Drain-Source Voltage Gate-Source Voltage
Continuous Drain Current (Note 6) VGS = 10V
Pulsed Drain Current (10µs pulse, duty cycle = 1%) Maximum Body Diode Continuous Current
T
= +25°C
A
T
= +70°C
A
TC = +25°C
= +70°C
T
C
V
DSS
V
GSS
I
D
I
D
I
DM
I
S
60 V
±20 V
4.3
3.3
10
8
A
A
25 A
3.2 A
Thermal Characteristics (@T
= +25°C, unless otherwise specified.)
A
Characteristic Symbol Value Units
T
Total Power Dissipation (Note 5)
ADVANCE INFORMATION
Thermal Resistance, Junction to Ambient (Note 5) Total Power Dissipation (Note 5) Thermal Resistance, Junction to Case (Note 5) Operating and Storage Temperature Range
A = +25°C
TA = +70°C 1.4
P
R
P
R
T
J, TSTG
θJA
θJC
D
D
2.2 W
58 °C/W 11 W
8.9 °C/W
-55 to +150 °C
Electrical Characteristics (@T
= +25°C, unless otherwise specified.)
A
Characteristic Symbol Min Typ Max Unit Test Condition
OFF CHARACTERISTICS (Note 7)
Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate-Source Leakage
BV
I
I
DSS
DSS
GSS
60
 
1 μA
100
V
VGS = 0V, ID = 250μA VDS = 60V, VGS = 0V
nA
VGS = 20V, VDS = 0V
ON CHARACTERISTICS (Note 7)
Gate Threshold Voltage
Static Drain-Source On-Resistance
Diode Forward Voltage
V
GS(th
R
DS (ON)
V
SD
1
  
47 69
54 100
0.8 1.1 V
3 V
VDS = VGS, ID = 250μA V
m
GS
V
GS
VGS = 0V, IS = 2.5A
DYNAMIC CHARACTERISTICS (Note 8)
Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance
C
iss
C
oss
C
rss
R
G
Total Gate Charge (VGS = 4.5V) Qg Total Gate Charge (VGS = 10V) Qg Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time
Notes: 5. Device mounted on FR-4 substrate PC board, 2oz copper, with minimum recommended pad layout.
6. Device mounted on FR-4 substrate PC board, 2oz copper, with thermal vias to bottom layer 1inch square copper plate
7. Short duration pulse test used to minimize self-heating effect.
8. Guaranteed by design. Not subject to product testing.
Q
s
Q
d
t
D(on
t
t
D(off
t

f
  
 

825
40
29
2.3
7.2 16
3.2
2.8
3.8
6.7 16
5.3
  
 
     

V
pF
nC
nS
DS
f = 1MHz
VDS = 0V, VGS = 0V, f = 1.0MHz
V
DS
V
DD
R
G
= 10V, ID = 3A = 4.5V, ID = 2.4A
= 30V, VGS = 0V
= 30V, ID = 12A
= 30V, VGS = 10V,
= 6Ω, ID = 12A
DMN6069SE
D
atasheet number: DS36474 Rev. 2 - 2
2 of 6
www.diodes.com
January 2014
© Diodes Incorporated
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