Diodes AP2152A User Manual

AP2142A/ AP2152A

0.5A DUAL CHANNEL CURRENT-LIMITED

POWER SWITCH WITH OUTPUT DISCHARGE

Description

The AP2142A and AP2152A are dual channel current-limited
integrated high-side power switches optimized for Universal Serial
Bus (USB) and other hot-swap applications. The family of devices
complies with USB standards and available with both polarities of
enable input.

The devices have fast short-circuit response time for improved overall
system robustness, and have integrated output discharge function to
ensure completely controlled discharging of the output voltage
capacitor. They provide a complete protection solution for application
subject to heavy capacitive loads and the prospect of short circuit,
and offer reverse current blocking, over-current, over-temperature
and short-circuit protection, as well as controlled rise time and under­voltage lockout functionality. A 7ms deglitch capability on the open­drain flag output prevents false over-current reporting and does not
require any external components.

All devices are available in SO-8, MSOP-8EP and U-DFN3030-8
packages.

Features

 Dual Channel Current-Limited Power Switch with Output

Discharge

 Fast Short-Circuit Response Time: 2µs
 0.7A Accurate Current Limiting
 Reverse Current Blocking
 85m On-Resistance
 Input Voltage Range: 2.7V – 5.5V
 Built-In Soft-Start with 0.6ms Typical Rise Time
 Short Circuit and Thermal Protection
 Fault Report (FLG) with Blanking Time (7ms typ)
 ESD protection: 2kV HBM, 300V MM
 Active High (AP2152A) or Active Low (AP2142A) Enable
 Ambient Temperature Range: -40°C to +85°C
 SO-8, MSOP-8EP and DFN3030E-8 (Exposed Pad): Available

in “Green” Molding Compound (No Br, Sb)

 Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
 Halogen and Antimony Free. “Green” Device (Note 3)

 UL Recognized, File Number E322375
 IEC60950-1 CB Scheme Certified

Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.

2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green"
and Lead-free.

3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.

AP2142A/ AP2152A

Document number: DS32191 Rev. 3 - 2

Pin Assignments

Applications

 LCD TVs & Monitors
 Set-Top-Boxes, Residential Gateways
 Laptops, Desktops, Servers,
 Printers, Docking Stations, HUBs

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GND

IN

EN1
EN2

GND

EN1

EN2

GND

IN

EN1
EN2

IN

1

2

3

4

1
2
3

4

1

2

3

4

( Top View )

SO-8

( Top View )

MSOP-8EP

( Top View )

U-DFN3030-8

8

7

6

5

OUT1

OUT2

FLG2

8
7
6
5

8

7

6

5

FLG1

FLG1
OUT1
OUT2

FLG1
OUT1
OUT2
FLG2

FLG2

March 2013

© Diodes Incorporated

Typical Applications Circuit



AP2152 A Enabl e Active Hi gh

AP2142A/ AP2152A

Power Supply

2.7V to 5.5V
10 k

10 k

ON

OFF

1uF

IN

FLG 1
FLG 2

EN1
EN2

GND

OUT 1

OUT 2

1uF

1uF

4.7uF*

4.7uF*

Note: * USB 2.0 r equire s 120uF per hub

Available Options

Part Number Channel

AP2142A 2 Active Low 0.7A 0.5A
AP2152A 2 Active High 0.7A 0.5A

Enable Pin

(EN)

Current Limit

(typ)

Recommended Maximum

Continuous Load Current

Pin Descriptions

Pin Number

Pin Name

GND 1 1 Ground

IN
EN1 3 3 Switch 1 enable input, active low (AP2142A) or a ctive high (AP2152 A)
EN2 4 4 Switch 2 enable input, active low (AP2142A) or a ctive high (AP2152 A)

FLG2 5 5 Switch 2 over-current and over-temperature fault re port; open-dra in flag is act ive low w hen triggered
OUT2
OUT1
FLG1 8 8 Switch 1 over-current and over-temperature fault re port; open-dra in flag is act ive low w hen triggered

Exposed Pad - Exposed Pad

SO-8

2 2 Voltage input pin

6 6 Switch 2 voltage output pin
7 7 Switch 1 voltage output pin

AP2142A/ AP2152A

Document number: DS32191 Rev. 3 - 2

MSOP-8EP

U-DFN3030-8

Exposed Pad:
It should be connected to GND and thermal mass for enhanced thermal impedance.
It should not be used as electrical ground conduction path.

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Function

Load

Load

March 2013

© Diodes Incorporated

Functional Block Diagram

AP2142A , AP2152A

EN1

UVLO

Thermal

Sense

Driver

Current

Limit

AP2142A/ AP2152A

FLG1

Deglitch

GND

Current

Sense

Discharge

Control

Discharge

Control

Deglitch

GND

EN2

IN

Current

Sense

UVLO

Driver

Thermal

Sense

Current

Limit

Absolute Maximum Ratings (@T

= +25°C, unless otherwise specified.)

A

Symbol Parameter Ratings Unit

ESD HBM Human Body Model ESD Protection 2 kV

ESD MM Machine Model ESD Protection 300 V

VIN

V

OUT

V

EN , VFLG

T

I

LOAD
J(MAX)

TST

Note: 4. UL Recognized Rating from -30°C to +70°C (Diodes qualified TST from -65°C to +150°C)

Input Voltage 6.5 V
Output Voltage

VIN +0.3
Enable Voltage 6.5 V
Maximum Continuous Load Current Internal Limited A
Maximum Junction Temperature 150 °C
Storage Temperature Range (Note 4) -65 to +150 °C

Recommended Operating Conditions (@T

= +25°C, unless otherwise specified.)

A

Symbol Parameter Min Max Unit

VIN

I

OUT

VIH

VIL
TA

Input Voltage 2.7 5.5 V
Output Current 0 500 mA
High-Level Input Voltage on EN or

Low-Level Input Voltage on EN or

EN

EN

2
0 0.8 V

V

IN

Operating Ambient Temperature Range -40 +85 °C

AP2142A/ AP2152A

Document number: DS32191 Rev. 3 - 2

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OUT1

OUT2

FLG2

© Diodes Incorporated

V

V

March 2013

AP2142A/ AP2152A

Electrical Characteristics (@T

= +25°C, VIN = +5.0V, unless otherwise specified.)

A

Symbol Parameter Test Conditions (Note 5) Min Typ Max Unit

Input UVLO 1.6 2.0 2.4 V

UVLO

Input Shutdown Current
Input Quiescent Current, Dual

I

Q

Disabled, I
Enabled, I

OUT

OUT

= 0

= 0

0.1 1 µA

115 180 µA
Input Leakage Current Disabled, OUT grounded 1 µA
Reverse Leakage Current

REV

Switch On-Resistance

Over-Load Current Limit
Ganged Over-Load Current Limit
Current Limiting Trigger Threshold

Trig

Ganged Current Limiting Trigger
Threshold

Short-Circuit Current per Channel

IOS

Ganged Short-Circuit Current
Short-Circuit Response Time

EN Input Logic Low Voltage

V

IL

EN Input Logic High Voltage

V

IH

EN Input Leakage
Output Leakage Current
Output Turn-On Rise Time

TR

Output Turn-Off Fall Time

TF

Output Turn-On Delay Time
Output Turn-Off Delay Time
FLG Output FET On-Resistance

FLG

FLG Off Current

FOH

FLG Blanking Time

Blank

Discharge Resistance (Note 6)

DIS

Thermal Shutdown Threshold
Thermal Shutdown Hysteresis 25

HYS

Disabled, VIN = 0V, V
V

= 5V, I

IN

= +25°C

T

A

VIN = 5V, I
VIN = 3.3V, I

= +25°C

T

A

= 3.3V, I

V

IN

VIN = 5V, V

= 5V, V

V

IN

= 0.5A,

OUT

= 0.5A, -40°C  TA  +85°C

OUT

= 0.5A,

OUT

= 0.5A, -40°C  TA  +85°C

OUT

= 4V, CL = 4.7µF -40°C  TA  +85°C

OUT

= 4V, OUT1 &

OUT

OUT2 tied together, C

= 5V, I

OUT

= 4.7µF

L

at VIN

REV

SO-8 90 110
MSOP-8EP,

U-DFN3030-8

SO-8 110 130
MSOP-8EP,

U-DFN3030-8

-40°C  T

 +85°C

A

Output Current Slew rate (<100A/s), CL = 4.7µF
OUT1 & OUT2 tied together, Output Current Slew rate

(<100A/s), C

= 4.7µF

L

OUTx connected to ground, device enabled into short
circuit, C

= 4.7µF

L

OUT1 & OUT2 connected to ground, device enabled into
short-circuit, C

V

= 0V to I

OUT

= 2.7V to 5.5V

V

IN

V

= 2.7V to 5.5V

IN

= 0V to 5.5V

V

EN

Disabled, V
CL = 1µF, R
CL = 1µF, R
CL = 100µF, R
CL = 100µF, R
I

= 10mA

FLG

= 5V

V

FLG

OUT

LOAD
LOAD

= 4.7µF

L

= I

OUT

= 0V

= 10
= 10

LOAD
LOAD

(output shorted to ground)

LIMIT

= 10
= 10

CL =4.7µF
V

= 5V, disabled, I

IN

Enabled, R

LOAD

=1k

OUT

=1mA

0.01 0.1 µA

85 105

135

105 125

170

0.55 0.7 0.85 A

1.1 1.4 1.7 A

1.0 A

1.0 A

0.7 A

1.1 1.4 1.7 A
2 µs

0.8 V

2 V

1 µA

0.5 1 µA

0.6 1.5 ms

0.05 0.3 ms

0.2 0.5 ms

0.1 0.3 ms
20 40 

0.01 1 µA

4 7 15 ms

100 
140

V

I

SHDN

I

LEAK

I

R

DS(ON)

I

LIMIT

I

LIMIT_G

I

I

Trig_G

I

OS_G

T

SHORT

I

SINK

I

LEAK-O

T

D(ON)

T

D(OFF)

R

I

T

R

T

SHDN

T

SO-8 (Note 7) 115

Thermal Resistance Junction-to-Ambient



JA

MSOP-8EP (Note 8) 75

°C/W

U-DFN3030-8 (Note 8) 60

Notes: 5. Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.

6. The discharge function is active when the device is disabled (when enable is de-asserted or during power-up / power-down when V
discharge function offers a resistive discharge path for the external storage capacitor for limited time.

7. Test condition for SO-8: Device mounted on FR-4 substrate PCB with minimum recommended pad layout.

8. Test condition for MSOP-8EP and U-DFN3030-8: Device mounted on 2” x 2” FR-4 substrate PCB, 2oz copper, with minimum recommended pad on top
layer and thermal vias to bottom layer ground plane.

< V

). The

IN

UVLO

AP2142A/ AP2152A

Document number: DS32191 Rev. 3 - 2

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March 2013

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m

C
C

Typical Performance Characteristics

AP2142A/ AP2152A

V

EN

V

OUT

50%

T

D(ON)

T

10%

50%

T

R

90%

D(OFF)

90%

10%

T

F

V

EN

50%

T

T

D(ON)

V

OUT

10%

50%

T

R

90%

D(OFF)

90%

10%

T

F

Figure 1 Voltage Waveforms: AP2142A (left), AP2152A (right)

Figure 2 Response Time to Short Circuit Waveform

All Enable Plots are for AP2152A Active High

Turn-On Delay and Rise Time

Turn-Off Delay and Fall Time

EN
5V/div

Iin
500mA/div

Vout
2V/div

AP2142A/ AP2152A

Document number: DS32191 Rev. 3 - 2

500µs/div

CL=1µF
TA= +25°C
RL=10

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EN
5V/div

Iin
500mA/div

Vout
2V/div

500µs/div

CL=1µF
TA= +25°C
R

=10

L

March 2013

© Diodes Incorporated

Typical Performance Characteristics (cont.)

Turn-On Delay and Rise Time

AP2142A/ AP2152A

Turn-Off Delay and Fall Time

EN
5V/div

Vout
2V/div

EN
5V/div

Iout
500mA/div

Iin
500mA/div

500µs/div

Short Circuit Current,

Device Enabled Into Short

CL=100

F

TA= +25°C
RL=10

VIN=5V
TA= +25°C
C

=1F

L

EN
5V/div

Iin
500mA/div

Vout
2V/div

EN
5V/div

Iin
500mA/div

500µs/div

Inrush Current with

Different Load Capacitance

CL=100F

CL=220F

CL=470F

CL=100F
TA= +25°C
RL=10

VIN=5V
TA= +25°C
R

=10

L

3 Ω Load Connected to Enabled Device

FLG
2V/div

Iout
500mA/div

AP2142A/ AP2152A

Document number: DS32191 Rev. 3 - 2

500µs/div

1ms/div

2 Ω Load Connected to Enabled Device

2ms/div

VIN=5V
TA= +25°C
CL=1

F

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FLG
2V/div

Iout
500mA/div

2ms/div

VIN=5V
TA= +25°C
C

=1F

L

March 2013

© Diodes Incorporated

Typical Performance Characteristics (cont.)

Short Circuit with Blanking Time and Recovery

AP2142A/ AP2152A

Power On

Vout
5V/div

FLG
5V/div

Iout
1A/div

FLG
5V/div

Iout
200mA/div

Vin
5V/div

Vout
5V/div

FLG
5V/div

FLG
5V/div

Iout
200mA/div

VIN=5V
TA= +25°C
CL=1F

20ms/div

Vin
5V/div

Vout
5V/div

1ms/div

Power Off Device Enabled

10ms/div

TA= +25°C
CL=1F
R

=10

L

FLG
5V/div

Iout
200mA/div

EN
5V/div

Vout
5V/div

1ms/div

Device Disabled UVLO Increasing

TA= +25°C

F

CL=1
RL=10

TA= +25°C
CL=1F
R

=10

L

Iout
200mA/div

EN
5V/div

Vout
5V/div

AP2142A/ AP2152A

Document number: DS32191 Rev. 3 - 2

1ms/div

TA= +25°C
CL=1F
RL=10

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Vin
2V/div

Vout
5V/div

Iout
200mA/div

1ms/div

TA= +25°C

F

CL=1
RL=10

March 2013

© Diodes Incorporated

Typical Performance Characteristics (cont.)

Vin
2V/div

Vout
5V/div

Iout
200mA/div

Vin
2V/div

UVLO Decreasing UVLO Increasing (No Load)

TA= +25°C
CL=1F
RL=10

20ms/div

UVLO Decreasing (No Load)

TA= +25°C
CL=1F
R

=0

L

AP2142A/ AP2152A

Vin
2V/div

Vout
5V/div

TA= +25°C

F

CL=1
R

=0

1ms/div

Channel 1 Enabled and Shorted

with Channel 2 Enabled

Vout1
5V/div

L

VIN=5V
TA= +25°C
CL=1F

FLG1
5V/div

Vout
5V/div

20ms/div

Vout2
5V/div

FLG2
5V/div

5ms/div

Vout1
5V/div

FLG1
5V/div

Vout2
5V/div

FLG2
5V/div

Channel 2 Enabled and Shorted

with Channel 1 Enabled

5ms/div

VIN=5V
TA=25°C
CL=1F

Channels 1 and 2 Enabled and Shorted

Vout1
5V/div

FLG1
5V/div

Vout2
5V/div

FLG2
5V/div

5ms/div

AP2142A/ AP2152A

Document number: DS32191 Rev. 3 - 2

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Typical Performance Characteristics (cont.)

AP2142A/ AP2152A

CL=100uF
RL=10
TA= +25°C

CL=100uF
RL=10
TA= +25°C

CL=1µF
RL=10
TA= +25°C

CL=1µF
RL=10
TA= +25°C

Vin=5.0V

Vin=5.5V

AP2142A/ AP2152A

Document number: DS32191 Rev. 3 - 2

Vin=2.7V

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Vin=5.5V

Vin=5.0V

Vin=2.7V

March 2013

© Diodes Incorporated

Typical Performance Characteristics (cont.)

AP2142A/ AP2152A

Vin=3.3V

Vin=5V

Vin=3.3V

Vin=5V

CL=1uF

UVLO Rising

UVLO Falling

VIN=5V
V

=4V

OUT

C

=1µF

L

AP2142A/ AP2152A

Document number: DS32191 Rev. 3 - 2

VIN=5V
TA= +25°C
CL=1µF

TA= +25°C
C

=1µF

L

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March 2013

© Diodes Incorporated

AP2142A/ AP2152A

Application Information

Power Supply Considerations

A 0.1F to 1F X7R or X5R ceramic bypass capacitor between IN and GND, close to the device, is recommended. Placing a high-value electrolytic
capacitor on the input and output pin(s) is recommended when the output load is heavy. This precaution reduces power-supply transients that may
cause ringing on the input. Additionally, bypassing the output with a 1F ceramic capacitor improves the immunity of the device to short-circuit
transients.

Over-Current and Short Circuit Protection

An internal sensing FET is employed to check for over-current conditions. Unlike current-sense resistors, sense FETs do not increase the series
resistance of the current path. When an overcurrent condition is detected, the device maintains a constant output current and reduces the output
voltage accordingly. Complete shutdown occurs only if the fault stays long enough to activate thermal limiting.

Three possible overload conditions can occur. In the first condition, the output has been shorted to GND before the device is enabled or before VIN
has been applied. The AP2142A/AP2152A senses the short circuit and immediately clamps output current to a certain safe level namely I

LIMIT

.

In the second condition, an output short or an overload occurs while the device is enabled. At the instance the overload occurs, higher inrush
current may flow for a very short period of time before the current limit function can react. The input capacitor(s) rapidly discharge through the
device, activating current limit circuitry. Protection is achieved by momentarily opening the P-MOS high-side power switch and then gradually
turning it on. After the current limit function has tripped (reached the over-current trip threshold), the device switches into current limiting mode a nd
the current is clamped at I

. The threshold for activating current limiting is 0.7A typical per channel.

LIMIT

In the third condition, the load has been gradually increased beyond the recommended operating current. The current is permitted to rise until the
current-limit threshold (I
up to the current-limit threshold without damaging the device. Once the threshold has been reached, the device switches into its current limiting
mode and is set at I

FLG Response

When an over-current or over-temperature shutdown condition is encountered, the FLG open-drain output goes a ctive low after a nominal 7-ms
deglitch timeout. The FLG output remains low until both over-current and over-temperature conditions are removed. Connecting a heavy capacitive
load to the output of the device can cause a momentary over-current condition, which does not trigger the FLG due to the 7-ms deglitch timeout.
The AP2142A/AP2152A is designed to eliminate false over-current reporting without the need of external components to remove unwanted pulses.

Power Dissipation and Junction Temperature

The low on-resistance of the internal MOSFET allows the small surface-mount packages to pass large current. Using the maximum operating
ambient temperature (T

= R

P

D

DS(ON)

Finally, calculate the junction temperature:

T

= PD x R

J

JA



Where:

T

= Ambient temperature C

A

= Thermal resistance

R

JA



P

= Total power dissipation

D

Thermal Protection

Thermal protection prevents the IC from damage when heavy-overload or short-circuit faults are present for extended periods of time. The
AP2142A/AP2152A implements a thermal sensing to monitor the operating junction temperature of the power distribution switch. Once the die
temperature rises to approximately 140°C due to excessive power dissipation in an over-current or short-circuit condition the internal thermal sense
circuitry turns the power switch off, thus preventing the power switch from damage. Hysteresis is built into the thermal sense circuit allowing the
device to cool down approximately 25°C before the switch turns back on. The switch continues to cycle in this manner until the load fault or input
power is removed. The FLG open-drain output is asserted when an over-temperature shutdown or over-current occurs with 7-ms deglitch.

AP2142A/ AP2152A

Document number: DS32191 Rev. 3 - 2

) is reached or until the thermal limit of the device is exceeded. The AP2142A/AP2152A is capable of delivering current

TRIG

.

LIMIT

) and R

A

, the power dissipation can be calculated by:

DS(ON)

× I2

+ TA

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AP2142A/ AP2152A

Application Information (cont.)

Under-Voltage Lockout (UVLO)

Under-voltage lockout function (UVLO) keeps the internal power switch from being turned on until the power supply has reached at least 2V, even if
the switch is enabled. Whenever the input voltage falls below approximately 2V, the power switch is quickly turned off. This facilitates the design of
hot-insertion systems where it is not possible to turn off the power switch before input power is removed.

Discharge Function

The discharge function of the device is active when enable is disabled or de-asserted. The discharge function with the N-MOS power switch
implementation is activated and offers a resistive discharge path for the external storage capacitor. This is designed for discharging any residue of
the output voltage when either no external output resistance or load resistance is present at the output.

Host/Self-Powered HUBs

Hosts and self-powered hubs (SPH) have a local power supply that powers the embedded functions and the downs tream ports. This power suppl y
must provide from 5.25V to 4.75V to the board side of the downstream connection under both full-load and no-load conditions. Ho sts and SPHs a re
required to have current-limit protection and must report over-current conditions to the USB controller. Typical SPHs are desktop PCs, monitors,
printers, and stand-alone hubs.

Generic Hot-Plug Applications

In many applications it may be necessary to remove modules or pc boards while the main unit is still operating. These are considered hot-plug
applications. Such implementations require the control of current surges seen by the main power supply and the card being inserted. The most
effective way to control these surges is to limit and slowly ramp the current and voltage being applied to the card, similar to the way in which a
power supply normally turns on. Due to the controlled rise times and fall times of the AP2142A/AP2152A, these devices can be used to provide a
softer start-up to devices being hot-plugged into a powered system. The UVLO feature of the AP2142A/AP2152A also ensures that the switch is off
after the card has been removed, and that the switch is off during the next insertion.

By placing the AP2142A/AP2152A between the VCC input and the rest of the circuitry, the input po wer reaches these devices first after insertion.
The typical rise time of the switch is approximately 1ms, providing a slow voltage ramp at the output of the device. This implementation controls
system surge current and provides a hot-plugging mechanism for any device.

Ordering Information

Part Number

AP21X2ASG-13 S SO-8 250/Tape & Reel -13
AP21X2AMPG-13 MP MSOP-8EP 2500/Tape & Reel -13
AP21X2AFGEG-7 FGE U-DFN3030-8 3000/Tape & Reel -7

AP2142A/ AP2152A

Document number: DS32191 Rev. 3 - 2

Package

Code

Packaging

Quantity Part Number Suffix

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7”/13” Tape and Reel

March 2013

© Diodes Incorporated

Marking Information

(1) SO-8

AP2142A/ AP2152A

( Top view )

8765

Part Number

4 : Active Low
5 : Active High

(2) MSOP-8EP

(3) U-DFN3030-8

AP2142A/ AP2152A

Document number: DS32191 Rev. 3 - 2

Logo

AP21X X A

YY WW X X

2 : 2 Channel

: Year : 08, 09,10~

YY
WW

: Week : 01~52; 52

represents 52 and 53 week

: Internal Code

X

G : Green

2

1

34

( Top View )

XX : Identification Code

: Year : 0~9

X X

W

XY

Y

: Week : A~Z : 1~26 week;

W

a~z : 27~52 week; z represents

52 and 53 week

X

: A~Z : Green

Part Number Package Identification Code

AP2142AFGEG-7 U-DFN3030-8 AA
AP2152AFGEG-7 U-DFN3030-8 AB

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Package Outline Dimensions (All dimensions in mm.)

Please see AP02002 at http://www.diodes.com/datasheets/ap02002.pdf for latest version.

Package Type: SO-8

(1)

e

b

D

E1

A2

E

A1

Detail ‘A’

h

°

45

A3

A

L

0.254

Gaug e Plane
Seating Plane

7°~9

°

Detail ‘A’

Dim Min Max

A - 1.75
A1 0.10 0.20
A2 1.30 1.50
A3 0.15 0.25

b 0.3 0.5

D 4.85 4.95

E 5.90 6.10
E1 3.85 3.95

e 1.27 Typ

h - 0.35

L 0.62 0.82



All Dimensions in mm

(2) Package Type: MSOP-8EP

D

x

E

E2

y

1

A

(3) Package Type: U-DFN3030-8

e

A1

D

AP2142A/ AP2152A

Document number: DS32191 Rev. 3 - 2

8Xb

A3

A2

A

A1

E

E2

Z (x4)

D2

4

X

1

0

D1

E3

E1

Gauge Plane
Seating Plane

0.25

4

X

1

0

°

c

°

a

L

Detail C

See Detail C

A3

D

L (x8)

e

b (x8)

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MSOP-8EP

Dim Min Max Typ

A - 1.10 -

A1 0.05 0.15 0.10
A2 0.75 0.95 0.86
A3 0.29 0.49 0.39

b 0.22 0.38 0.30
c 0.08 0.23 0.15
D 2.90 3.10 3.00

D1 1.60 2.00 1.80

E 4.70 5.10 4.90

E1 2.90 3.10 3.00
E2 1.30 1.70 1.50
E3 2.85 3.05 2.95

e - - 0.65
L 0.40 0.80 0.60
a 0° 8° 4°
x - - 0.750
y - - 0.750

All Dimensions in mm

U-DFN3030-8

Dim Min Max Typ

A 0.57 0.63 0.60

A1 0 0.05 0.02
A3

 

b 0.20 0.30 0.25
D 2.95 3.05 3.00

D2 2.15 2.35 2.25

E 2.95 3.05 3.00
e

 

E2 1.40 1.60 1.50

L 0.30 0.60 0.45
Z

 

All Dimensions in mm

AP2142A/ AP2152A

SO-8

0 8

Type E

0.15

0.65

0.40

© Diodes Incorporated

March 2013

Suggested Pad Layout

Please see AP02001 at http://www.diodes.com/datasheets/ap02001.pdf for the latest version.

(1) Package Type: SO-8

X

C1

C2

Dimensions Value (in mm)

X 0.60

Y 1.55
C1 5.4
C2 1.27

Y

(2) Package Type: MSOP-8EP

X C

(3) Package Type: U-DFN3030-8

G

Y2

X1

Y

Y1

Dimensions

C 0.650
G 0.450
X 0.450

X1 2.000

Y 1.350
Y1 1.700
Y2 5.300

AP2142A/ AP2152A

Document number: DS32191 Rev. 3 - 2

Y

(x8)

X (x8) C

C1

Y1

Y2

Dimensions Value (in mm)

C 0.65

C1 2.35

X 0.30

Y 0.65
Y1 1.60
Y2 2.75

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Value

(in mm)

AP2142A/ AP2152A

March 2013

© Diodes Incorporated

AP2142A/ AP2152A

DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
(AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).

Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes
without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the
application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or
trademark rights, nor the rights of others. Any Customer or user of this document or products described herein in such applications shall assume
all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diodes Incorporated
website, harmless against all damages.

Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel.
Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorize d application, Customers shall indemnify and
hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising out of, directly or
indirectly, any claim of personal injury or death associated with such unintended or unauthorized application.

Products described herein may be covered by one or more United States, international or foreign patents pending. Product names and markings
noted herein may also be covered by one or more United States, international or foreign trademarks.

This document is written in English but may be translated into multiple languages for reference. Onl y the English version of this document is the
final and determinative format released by Diodes Incorporated.

Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express
written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:

A. Life support devices or systems are devices or systems which:

1. are intended to implant into the body, or

2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the

labeling can be reasonably expected to result in significant injury to the user.
B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the

failure of the life support device or to affect its safety or effectiveness.
Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and

acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any
use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related
information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its
representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems.

Copyright © 2013, Diodes Incorporated

www.diodes.com

IMPORTANT NOTICE

LIFE SUPPORT

AP2142A/ AP2152A

Document number: DS32191 Rev. 3 - 2

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March 2013

© Diodes Incorporated