Diodes AP2141, AP2151 User Manual

AP2141/ AP2151

0.5A SINGLE CHANNEL CURRENT-LIMITED POWER SWITCH

Description

The AP2141 and AP2151 are integrated high-side power switches
optimized for Universal Serial Bus (USB) and other hot-swap
applications. The family of devices complies with USB 2.0 and
available with both polarities of Enable input. They offer current and
thermal limiting and short circuit protection as well as controlled rise
time and under-voltage lockout functionality. A 7ms deglitch capability
on the open-drain Flag output prevents false over-current reporting
and does not require any external components.

All devices are available in SO-8, MSOP-8EP, SOT25, and
U-DFN2018-6 packages

Pin Assignments

Features

 Single USB Port Power Switches
 Over-Current and Thermal Protection
 0.8A Accurate Current Limiting
 Reverse Current Blocking
 95m On-Resistance
 Input Voltage Range: 2.7V - 5.5V
 0.6ms Typical Rise Time
 Very Low Shutdown Current: 1µA (max)
 Fault Report (FLG) with Blanking Time (7ms typ)
 ESD Protection: 4kV HBM, 400V MM
 Active High (AP2151) or Active Low (AP2141) Enable
 Ambient Temperature Range -40°C to +85°C
 SOT25, SO-8, MSOP-8EP (Exposed Pad), and U-DFN2018-6:

Available in “Green” Molding Compound (No Br, Sb)

 Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
 Halogen and Antimony Free. “Green” Device (Note 3)

 UL Recognized, File Number E322375
 IEC60950-1 CB Scheme Certified

Applications

 Consumer Electronics – LCD TV & Monitor, Game Machines
 Communications – Set-Top-Box, GPS, Smartphone
 Computing – Laptop, Desktop, Servers, Printers, Docking

Station, HUB

Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.

2. See http://www.diodes.com for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free.

3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br +
Cl) and <1000ppm antimony compounds.

AP2141/ AP2151

Document number: DS31562 Rev. 7 - 2

www.diodes.com

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OUT

GND

FLG

( Top View )

1

2

3

SOT25

5

4

IN

EN

© Diodes Incorporated

March 2013

Typical Applications Circuit

AP2151 Enable Active High

Power Supply

2.7V to 5.5V

10k

10uF

ON

0.1uF

IN

FLG

EN

GND

OUT

0.1uF

AP2141/ AP2151

Load

120uF

OFF

Available Options

Part Number Channel Enable Pin (EN) Current Limit (typical) Recommended Maximum Continuous Load Current

AP2141 1 Active Low 0.8A 0.5A
AP2151 1 Active High 0.8A 0.5A

Pin Descriptions

Pin

Name

GND 1 1 2 1 Ground

IN 2, 3 2, 3 5 2 Voltage Input Pin (all IN pins must be tied together externally).

EN 4 4 4 3 Enable Input. Active Low (AP2141) or Active High (AP2151).

FLG 5 5 3 4

OUT 6, 7 6, 7 1 5, 6 Voltage Output Pin (all OUT pins must be tied together externally).

NC 8 8 N/A N/A No internal connection; recommend tie to OUT pins

Exposed

Pad

SO-8 MSOP-8EP SOT25 U-DFN2018-6

—

AP2141/ AP2151

Document number: DS31562 Rev. 7 - 2

Pin Number

Exposed

Pad

—

Exposed

Pad

Function

Over-Current and Over-Temperature Fault Report.
Open-Drain Flag is Active Low When Triggered

Exposed Pad.
It should be externally connected to GND plane and thermal mass for

enhanced thermal impedance.
It should not be used as electrical ground conduction path.

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Functional Block Diagram

AP2141/ AP2151

AP2141, AP2151

Current

Sense

Current

Limit

Deglitch

GND

EN

IN

UVLO

Driver

Thermal

Sense

OUT

FLG

Absolute Maximum Ratings (@T

= +25°C, unless otherwise specified.)

A

Symbol Parameter Ratings Units

ESD HBM Human Body Model ESD Protection 4 kV

Machine Model ESD Protection

ESD MM

for SO-8,MSOP-8EP, SOT25 packages
Machine Model ESD Protection

for U-DFN2018-6, SO-8 packages

VIN

V

OUT

V

EN , VFLG

I

LOAD

T

J(MAX)

TST

Caution: Stresses greater than the 'Absolute Maximum Ratings' specified above, may cause permanent damage to the device. These are stress ratings only;

Semiconductor devices are ESD sensitive and may be damaged by exposure to ESD events. Suitable ESD precautions should be taken when handling
and transporting these devices

Note: 4. UL Recognized Rating from -30°C to +70°C (Diodes qualified

functional operation of the device at these or any other conditions exceeding those indicated in this specification is not implied. Device reliability may be
affected by exposure to absolute maximum rating conditions for extended periods of time.

Input Voltage 6.5 V
Output Voltage
Enable Voltage 6.5 V
Maximum Continuous Load Current Internal Limited A
Maximum Junction Temperature 150 °C
Storage Temperature Range (Note 4) -65 to +150 °C

T

from -65°C to +150°C)

ST

400 V

300 V

VIN +0.3

V

Recommended Operating Conditions (@T

= +25°C, unless otherwise specified.)

A

Symbol Parameter Min Max Units

V

I

OUT

T

V

V

IN

A
IL

IH

Input voltage 2.7 5.5 V
Output Current 0 500 mA
Operating Ambient Temperature -40 +85

C
EN Input Logic Low Voltage 0 0.8 V
EN Input Logic High Voltage 2

V

IN

V

AP2141/ AP2151

Document number: DS31562 Rev. 7 - 2

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AP2141/ AP2151

Electrical Characteristics (@T

Symbol Parameter Conditions Min Typ Max Unit

V

R

I

t

t
T

Notes: 5. Test condition for SO-8: Device mounted on FR-4, 2oz copper, with minimum recommended pad layout.

6. Test condition for SO-8, MSOP-8EP: Device mounted on 2” x 2” FR-4 substrate PC board, 2oz copper, with minimum recommended pad on top layer
and thermal vias to bottom layer ground plane.

7. Test condition for SOT25: Device mounted on FR-4, 2oz copper, with minimum recommended pad layout.

8. Test condition for U-DFN2018-6: Device mounted on FR-4 2-layer board, 2oz copper, with minimum recommended pad on top layer and 3 vias to bottom
layer 1.0”x1.4” ground plane.

Input UVLO

UVLO

Input Shutdown Current

I

SHDN

Input Quiescent Current

I

Q

Input Leakage Current Disabled, OUT grounded 1 µA

I

LEAK

Reverse Leakage Current

I

REV

Switch On-Resistance

DS(ON)

Short-Circuit Current Limit

SHORT

Over-Load Current Limit

I

LIMIT

Current Limiting Trigger Threshold

I

TRIG

EN Input Leakage

I

SINK

Output Turn-On Delay Time

t

D(ON)

Output Turn-On Rise Time

tR

Output Turn-Off delay Time

D(OFF)

Output Turn-Off Fall Time

tF

FLG Output FET On-Resistance

R

FLG

FLG Blanking Time

BLANK

Thermal Shutdown Threshold

SHDN

Thermal Shutdown Hysteresis 25

T

HYS

Thermal Resistance Junction-to-

θ

JA

Ambient

= +25°C, VIN = +5.0V, unless otherwise specified.)

A

R

= 1k

LOAD

Disabled, I
Enabled, I

Disabled, VIN = 0V, V
V

= 5V,

IN

I

= 0.5A

OUT

VIN = 3.3V,
I

= 0.5A

OUT

= 0

OUT

= 0

OUT

OUT

T

= +25°C

A

-40°C  TA  +85°C
T

= +25°C

A

-40°C  TA  +85°C

= 5V, I

REV

at VIN
SOT25, SO-8, MSOP-8EP 95 115
U-DFN2018-6 90 110

Enabled into short circuit, CL = 22µF
VIN = 5V, V

= 4.8V, CL = 22µF, -40C  TA  +85°C

OUT

Output Current Slew rate (<100A/s) , CL = 22µF
V

= 5V

EN

CL = 1µF, R
CL = 1µF, R
CL = 1µF, R
CL = 1µF, R

=10mA

I

FLG

LOAD
LOAD
LOAD
LOAD

= 10
= 10
= 10
= 10

CIN = 10µF, CL = 22µF
Enabled, R

LOAD

= 1k

1.6 1.9 2.5 V

0.5 1 µA
45 70 µA

1 µA

140
120 140
170

0.6 A

0.6 0.8 1.0 A

1.0 A
1 µA

0.05 ms

0.6 1.5 ms

0.01 ms

0.05 0.1 ms
20 40 

4 7 15 ms

140

SO-8 (Note 5) 110
MSOP-8EP (Note 6) 60
SOT25 (Note 7) 157
U-DFN2018-6 (Note 8) 70

m

C
C

o

C/W

o

C/W

o

C/W

o

C/W

AP2141/ AP2151

Document number: DS31562 Rev. 7 - 2

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Typical Performance Characteristics

AP2141/ AP2151

V

EN

V

OUT

50%

T

D(ON)

T

10%

50%

T

R

90%

D(OFF)

90%

10%

T

F

V

EN

50%

T

T

D(ON)

V

OUT

10%

50%

T

R

90%

D(OFF)

90%

10%

T

F

Figure 1. Voltage Waveforms: AP2141 (left), AP2151 (right)

All Enable Plots are for AP2151 Active High

V

EN

5V/div

V

OUT

2V/div

Turn-On Delay and Rise Time

V

EN

5V/div

V

C

= 1µF

L

T

= +25°C

A

=10

R

L

500µs/div

OUT

2V/div

Turn-Off Delay and Fall Time

500µs/div

= 1µF

C

L

= +25°C

T

A

R

=10

L

Turn-On Delay and Rise Time

V

EN

5V/div

V

OUT

2V/div

AP2141/ AP2151

Document number: DS31562 Rev. 7 - 2

500µs/div

= 1µF

C

L

= +25°C

T

A

R

=10

L

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V

EN

5V/div

V

OUT

2V/div

Turn-Off Delay and Fall Time

C

= 1µF

L

T

= +25°C

A

=10

R

L

500µs/div

March 2013

© Diodes Incorporated

Typical Performance Characteristics (cont.)

Short Circuit Current,

Device Enabled Into Short

AP2141/ AP2151

Inrush Current

VEN
5V/div

I

OUT

200mA/div

V

FLAG

2V/div

I

OUT

500mA/div

V

= 5V

IN

= +25°C

T

A

= 22µF

C

L

500µs/div

3Ω Load Connected to Enabled Device

VIN = 5V
T

= +25°C

A

= 22µF

C

L

2ms/div

VEN
5V/div

I

OUT

200mA/div

V

FLAG

2V/div

I

OUT

500mA/div

C

= 100µF

L

CL = 470µF

= 220µF

C

L

1ms/div

2Ω Load Connected to Enabled Device

= 5V

V

2ms/div

IN

T

= +25°C

A

= 22µF

C

L

V

= 5V

IN

T

= +25°C

A

= 10

R

L

Short Circuit with Blanking Time and Recovery

V

OUT

5V/div

V

FLAG

5V/div

I

OUT

1A/div

AP2141/ AP2151

Document number: DS31562 Rev. 7 - 2

20ms/div

V

= 5V

IN

= +25°C

T

A

C

= 22µF

L

V

FLAG

5V/div

I

OUT

200mA/div

V

EN

5V/div

V

IN

5V/div

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Power On

= +25°C

T

A

= 22µF

C

L

R

= 10

L

1ms/div

March 2013

© Diodes Incorporated

Typical Performance Characteristics (cont.)

UVLO Increasing

= +25°C

T

V

IN

2V/div

I

OUT

200mA/div

1ms/div

A

C

= 22µF

L

R

= 10

L

V

IN

2V/div

I

OUT

200mA/div

AP2141/ AP2151

UVLO Decreasing

10ms/div

= +25°C

T

A

C

= 22µF

L

R

= 10

L

Turn-On Time vs Input Vol t age

800

700

600

500

400

300

Turn-On Time (us)

200

100

0

1.522.533.544.555.56

Input Vo ltage (V)

Rise Time vs I nput Voltage

600

500

400

300

200

Rise Time (us)

100

0

1.522.533.544.555.56

Input Vo ltage (V)

CL = 1µF
R

= 10

L

= +25°C

T

A

CL = 1µF

= 10

R

L

T

= +25°C

A

Turn-O f f Ti m e vs I nput Voltage

31

31

30

30

29

29

Turn-Off Time (us)

28

28

1.5 2 2.5 3 3.5 4 4.5 5 5.5 6

Input Vo l tage (V)

Fall Time vs Input Volt a ge

25

24

23

22

Fall Time (us)

21

20

19

1.5 2 2.5 3 3.5 4 4.5 5 5.5 6

Input Vo l tage (V)

CL = 1µF
R

= 10

L

= +25°C

T

A

CL = 1µF
R

= 10

L

= +25°C

T

A

AP2141/ AP2151

Document number: DS31562 Rev. 7 - 2

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Typical Performance Characteristics (cont.)

Supply Current , Output Enabled vs Am bient Tempe r at ur e

65

60

V

= 5.0V

55

V

IN

50

45

40

35

Supply Current, Output Enab led (uA)

30

-60 -40 -20 0 20 40 60 80 100

= 5.5V

IN

V

IN

Ambient Temperature (°C)

= 3.3V

V

IN

= 2.7V

AP2141/ AP2151

Supply Current, Out put Di sable d vs A mbi ent Temperat ur e

1.60

1.40

1.20

1.00

V

= 3.3V

0.80

0.60

0.40

0.20

Supply Current, Output Disabled (uA)

0.00

IN

= 2.7V

V

IN

-45 -25 -5 15 35 55 75 95

V

IN

Ambient Temperature (°C)

VIN = 5.5V

= 5.0V

Static Drain- Source On- St ate Resi stance vs A m bi ent

200
190
180
170
160
150
140
130

Resistance (mΩ)

120

Static Drain-Source On-State

110
100

-60 -40 -20 0 20 40 60 80 100

Undervoltage Lockout vs A mbient Temperat ur e

2.05

2.04

2.03

2.02

2.01

2.00

1.99

1.98

1.97

Undervoltage Lockout (V)

1.96

1.95

-60 -40 -20 0 20 40 60 80 100

Temperature

= 3.3V VIN = 2.7V

V

IN

Ambient Tem perature (°C)

UVLO Rising

UVLO Falling

Ambient Temperature (°C)

V

IN

= 5.0V

Short-Circuit Output Curr ent vs A m bi ent Tem per at ur e

710

V

= 5.0V

700

690

680

670

660

650

640

Short-Circuit Output Current (mA)

630

-60 -40 -20 0 20 40 60 80 100

= 3.3V VIN = 2.7V

V

IN

Ambient Temperature (°C)

Threshold Tri p Cur r ent vs Input Volt age

1.15

1.14

1.13

1.12

1.11

Threshold Trip Current (A)

1.10

2.8 3.3 3.8 4.3 4.8 5.3

IN

Input Voltage (V)

= 5.5V

V

IN

TA = +25°C
C

= 22µF

L

AP2141/ AP2151

Document number: DS31562 Rev. 7 - 2

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Typical Performance Characteristics (cont.)

Current Lim i t Response vs Peak Current

45
40
35
30
25
20
15
10

Current Limit Response (us)

5
0

2345678910

Peak Current (A )

CL = 22µF

= 5V

V

IN

T

= +25°C

A

AP2141/ AP2151

Document number: DS31562 Rev. 7 - 2

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AP2141/ AP2151

March 2013

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AP2141/ AP2151

Application Information

Power Supply Considerations

A 0.01-F to 0.1-F X7R or X5R ceramic bypass capacitor between IN and GND, close to the device, is recommended. Placing a high-value
electrolytic capacitor on the input (10-F minimum) and output pin(s) is recommended when the output load is heavy. This precaution reduces
power-supply transients that may cause ringing on the input. Additionally, bypassing the output with a 0.01-F to 0.1-F ceramic capacitor improves
the immunity of the device to short-circuit transients.

Over-current and Short Circuit Protection

An internal sensing FET is employed to check for over-current conditions. Unlike current-sense resistors, sense FETs do not increase the series
resistance of the current path. When an overcurrent condition is detected, the device maintains a constant output current and reduces the output
voltage accordingly. Complete shutdown occurs only if the fault stays long enough to activate thermal limiting.

Three possible overload conditions can occur. In the first condition, the output has been shorted to GND before the device is enabled or before V
has been applied. The AP2141/AP2151 senses the short circuit and immediately clamps output current to a certain safe level namely I

LIMIT

IN

.

In the second condition, an output short or an overload occurs while the device is enabled. At the instance the overload occurs, higher current may
flow for a very short period of time before the current limit function can react. After the current limit function has tripped (reached the over-current
trip threshold), the device switches into current limiting mode and the current is clamped at I

LIMIT

.

In the third condition, the load has been gradually increased beyond the recommended operating current. The current is permitted to rise until the
current-limit threshold (I

) is reached or until the thermal limit of the device is exceeded. The AP2141/AP2151 is capable of delivering current up

TRIG

to the current-limit threshold without damaging the device. Once the threshold has been reached, the device switches into its current limiting mode
and is set at I

LIMIT

.

Note that when the output has been shorted to GND at extremely low temperature (< -30°C ), a minimum 120-F electrolytic capacitor on the output
pin is recommended. A correct capacitor type with capacitor voltage rating and temperature characteristics must be properly chosen so that
capacitance value does not drop too low at the extremely low temperature operation. A recommended capacitor should have temperature
characteristics of less than 10% variation of capacitance change when operated at extremely low temp. Our recommended aluminum electrolytic
capacitor type is Panasonic FC series.

FLG Response

When an over-current or over-temperature shutdown condition is encountered, the FLG open-drain output goes active low after a nominal 7-ms
deglitch timeout. The FLG output remains low until both over-current and over-temp e rature conditions are removed. C onnecting a he avy capacitive
load to the output of the device can cause a momentary over-current condition, which does not trigger the FLG due to the 7-ms deglitch timeout.
The AP2141/AP2151 is designed to eliminate false over-current reporting without the need of external components to remove unwanted pulses.

Power Dissipation and Junction Temperature

The low on-resistance of the internal MOSFET allows the small surface-mount packages to pass large current. Using the maximum operating
ambient temperature (T

= R

P

D

DS(ON)

Finally, calculate the junction temperature:

T

= PD x R

J

Where:

T

= Ambient temperature °C

A

= Thermal resistance

R

JA

= Total power dissipation

P

D

AP2141/ AP2151

Document number: DS31562 Rev. 7 - 2

JA

× I2

+ TA

) and R

A

, the power dissipation can be calculated by:

DS(ON)

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AP2141/ AP2151

Application Information (cont.)

Thermal Protection

Thermal protection prevents the IC from damage when heavy-overload or short-circuit faults are present for extended periods of time. The
AP2141/AP2151 implements a thermal sensing to monitor the operating junction temperature of the power distribution switch. Once the die
temperature rises to approximately 140°C due to excessive power dissipation in an over-current or short-circuit condition the internal thermal sense
circuitry turns the power switch off, thus preventing the power switch from damage. Hysteresis is built into the thermal sense circuit allowing the
device to cool down approximately 25°C before the switch turns back on. The switch continues to cycle in this manner until the load fault or input
power is removed. The FLG open-drain output is asserted when an over-temperature shutdown or over-current occurs with 7-ms deglitch.

Under-Voltage Lockout (UVLO)

Under-voltage lockout function (UVLO) keeps the internal power switch from being turned on until the power supply has reached at least 1.9V, even
if the switch is enabled. Whenever the input voltage falls below approximately 1.9V, the power switch is quickly turned off. This facilitates the design
of hot-insertion systems where it is not possible to turn off the power switch before input power is removed.

Host/Self-Powered HUBs

Hosts and self-powered hubs (SPH) have a local power supply that powers the embedded functions and the downstream ports (see F igure 2). This
power supply must provide from 5.25V to 4.75V to the board side of the downstream connection unde r both full-load and no-load conditions. Hosts
and SPHs are required to have current-limit protection and must report over-current conditions to the USB controller. Typical SPHs are desktop
PCs, monitors, printers, and stand-alone hubs.

Figure 2. Typical One-Port USB Host / Self-Powered Hub

Generic Hot-Plug Applications

In many applications it may be necessary to remove modules or pc boards while the main unit is still operating. These are considered hot-plug
applications. Such implementations require the control of current surges seen by the main power supply and the card being inserted. The most
effective way to control these surges is to limit and slowly ramp the current and voltage being applied to the card, similar to the way in which a
power supply normally turns on. Due to the controlled rise times and fall times of the AP2141/AP2151, these devices can be used to provide a
softer start-up to devices being hot-plugged into a powered system. The UVLO feature of the AP2141/AP2151 also ensures that the switch is off
after the card has been removed, and that the switch is off during the next insertion.

By placing the AP2141/AP2151 between the V
typical rise time of the switch is approximately 1ms, providing a slow voltage ramp at the output of the device. This implementation controls system
surge current and provides a hot-plugging mechanism for any device.

AP2141/ AP2151

Document number: DS31562 Rev. 7 - 2

input and the rest of the circuitry, the input power reaches these devices first after insertion. The

CC

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Ordering Information

AP2141/ AP2151

Part Number Package Code Packaging

AP21X1WG-7 W SOT25 3000/Tape & Reel -7
AP21X1SG-13 S SO-8 2500/Tape & Reel -13

AP21X1MPG-13 MP MSOP-8EP 2500/Tape & Reel -13

AP21X1FMG-7 FM U-DFN2018-6 3000/Tape & Reel -7

.

Quantity Part Number Suffix

7”/13” Tape and Reel

Marking Information

(1) SO-8

( Top view )

8765

(2) MSOP-8EP

Logo

Part Number

4 : Active Low
5 : Active High

AP21X X

YY WW X X

2

1

34

1 : 1 Channel
G : Green

: Year : 08, 09,10~

YY

: Week : 01~52; 52

WW

represents 52 and 53 week
X

: Internal Code

AP2141/ AP2151

Document number: DS31562 Rev. 7 - 2

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Marking Information (cont.)

(3) SOT25

AP2141/ AP2151

( Top View )

(4) U-DFN2018-6

AP2141/ AP2151

Document number: DS31562 Rev. 7 - 2

5

7

4

XX : Identification code

Y

: Year 0~9

W X

Y

XX

: Week : A~Z : 1~26 week;

W

a~z : 27~52 week; z represents
52 and 53 week

X

1 2 3

Device Package type Identification Code

AP2141W SOT25 HR
AP2151W SOT25 HS

: A~Z : Green

(Top View)

XX

: Identification Code

Y : Year : 0~9

: Week : A~Z : 1~26 week;

W

a~z : 27~52 week; z represents

Y

XX

W X

52 and 53 week

: A~Z : Green

X

Device Package type Identification Code

AP2141FM U-DFN2018-6 HR
AP2151FM U-DFN2018-6 HS

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March 2013

© Diodes Incorporated

Package Outline Dimensions (All dimensions in mm.)

Please see AP02002 at http://www.diodes.com/datasheets/ap02002.pdf for latest version.

(1) SO-8

E1

E

A1

Detail ‘A’

L

0.254

Gaug e Plan e
Seating Plane

7°~9

(2) MSOP-8EP

e

D

D

h

°

45

A2

A3

A

b

°

Detail ‘A’

AP2141/ AP2151

Document number: DS31562 Rev. 7 - 2

x

y

1

e

A1

A

D

E

8Xb

A2

E2

A3

D1

E3

E1

Gauge Plane
Seating Plane

c

See Detail C

0.25

4

X

1

www.diodes.com

0

°

4

X

Detail C

14 of 17

1

0

°

a

L

AP2141/ AP2151

Dim Min Max

Dim Min Max Typ

A - 1.10 ­A1 0.05 0.15 0.10
A2 0.75 0.95 0.86
A3 0.29 0.49 0.39

b 0.22 0.38 0.30

c 0.08 0.23 0.15

D 2.90 3.10 3.00
D1 1.60 2.00 1.80

E 4.70 5.10 4.90
E1 2.90 3.10 3.00
E2 1.30 1.70 1.50
E3 2.85 3.05 2.95

e - - 0.65

L 0.40 0.80 0.60

a 0° 8° 4°
x - - 0.750
y - - 0.750

All Dimensions in mm

SO-8

A - 1.75
A1 0.10 0.20
A2 1.30 1.50
A3 0.15 0.25

b 0.3 0.5

D 4.85 4.95

E 5.90 6.10
E1 3.85 3.95

e 1.27 Typ

h - 0.35

L 0.62 0.82

0 8



All Dimensions in mm

MSOP-8EP

March 2013

© Diodes Incorporated

Package Outline Dimensions (All dimensions in mm.)

Please see AP02002 at http://www.diodes.com/datasheets/ap02002.pdf for latest version.

(3) SOT25

A

B C

H

K

J

D

N

L

M

(4) U-DFN2018-6

A

Pin#1 ID

A1

D

D2

A3

SEATING PLANE

L

E

E2

e

z

b

AP2141/ AP2151

Document number: DS31562 Rev. 7 - 2

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AP2141/ AP2151

Dim Min Max Typ

SOT25

A 0.35 0.50 0.38
B 1.50 1.70 1.60
C 2.70 3.00 2.80
D

 

0.95

H 2.90 3.10 3.00

J 0.013 0.10 0.05

K 1.00 1.30 1.10

L 0.35 0.55 0.40
M 0.10 0.20 0.15
N 0.70 0.80 0.75

0° 8°





All Dimensions in mm

U-DFN2018-6

Dim Min Max Typ

A 0.545 0.605 0.575

A1 0 0.05 0.02
A3

 

0.13

b 0.15 0.25 0.20
D 1.750 1.875 1.80

D2 1.30 1.50 1.40

e

 

0.50

E 1.95 2.075 2.00

E2 0.90 1.10 1.00

L 0.20 0.30 0.25

z

 

0.30

All Dimensions in mm

March 2013

© Diodes Incorporated

Suggested Pad Layout

Please see AP02001 at http://www.diodes.com/datasheets/ap02001.pdf for the latest version.

(1) SO-8

X

(2) MSOP-8EP

(3) SOT25

Y2

C2

Y

X C

G

X1

(4) U-DFN2018-6

AP2141/ AP2151

Document number: DS31562 Rev. 7 - 2

Y1

G

Z

Y

X

XC

Y

X1

C1

Y

Y1

C2C2

C1

G

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Dimensions Value (in mm)

Dimensions

Dimensions Value (in mm)

Z 3.20

G 1.60

X 0.55

Y 0.80
C1 2.40
C2 0.95

Dimensions Value (in mm)

C 0.50
G 0.20
X 0.25

X1 1.60

Y 0.35

Y1 1.20

X 0.60

Y 1.55
C1 5.4
C2 1.27

Value

(in mm)

C 0.650
G 0.450

X 0.450

X1 2.000

Y 1.350
Y1 1.700
Y2 5.300

AP2141/ AP2151

March 2013

© Diodes Incorporated

AP2141/ AP2151

DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
(AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).

Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes
without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the
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website, harmless against all damages.

Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel.
Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorize d application, Customers shall indemnify and
hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising out of, directly or
indirectly, any claim of personal injury or death associated with such unintended or unauthorized application.

Products described herein may be covered by one or more United States, international or foreign patents pending. Product names and markings
noted herein may also be covered by one or more United States, international or foreign trademarks.

This document is written in English but may be translated into multiple languages for reference. Onl y the English version of this document is the
final and determinative format released by Diodes Incorporated.

Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express
written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:

A. Life support devices or systems are devices or systems which:

1. are intended to implant into the body, or

2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the

labeling can be reasonably expected to result in significant injury to the user.
B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the

failure of the life support device or to affect its safety or effectiveness.
Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and

acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any
use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related
information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its
representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems.

Copyright © 2013, Diodes Incorporated

www.diodes.com

IMPORTANT NOTICE

LIFE SUPPORT

AP2141/ AP2151

Document number: DS31562 Rev. 7 - 2

17 of 17

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March 2013

© Diodes Incorporated