Diodes 74AHC138 User Manual
74AHC138
3-TO-8 LINE DECODER DEMULTIPLEXER
Description
The 74AHC138 is an advanced high speed CMOS device.
The device accepts a three bit binary weighted address on input
pins A0, A1 and A2 and when enabled will produce one active low
output with the remaining seven being high.
There are two active LOW enable inputs E
HIGH enable input E3. The disabled device state results in all
outputs being high. The enable state occurs with E
asserted low and E3 asserted high.
The multiple enable lines allow for the parallel expansion of
decoders to create 4-to-16 line versions with no additional parts and
Preliminary
5-to-32 versions with the addition of a single inverter.
Features
1 and E2, and one active
1 and E 2
Pin Assignments
Applications
• Wide Supply Voltage Range from 2.0 V to 5.5 V
• Sinks or sources 8mA at Vcc = 4.5V
• CMOS low power consumption
• Schmitt Trigger Action at All Inputs
• Inputs accept up to 5.5 V
• ESD Protection Tested per JESD 22
Exceeds 200-V Machine Model (A115-A)
Exceeds 2000-V Human Body Model (A114-A)
Exceeds 1000-V Charged Device Model (C101C)
• Latch-Up Exceeds 250mA per JESD 78, Class II
• SO16 Available in “Green” Molding Compound
(no Br, Sb)
• Memory chip select decoding
• Demultiplexing
• Single line peripheral control
• Allow simple serial bit streams from a microcontroller to control
as many peripheral lines as needed.
• Lead-Free Finish; RoHS Compliant (Notes 1 & 2)
Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.
2. See http://www.diodes.com for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl)
and < 1000 ppm antimony compounds.
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74AHC138
Document number: DS35482 Rev. 2 - 2
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Pin Descriptions
Pin Number
1
2
3
4
5
6
7
8
9
10
11
Preliminary
12
13
14
15
16
Pin Name Description
GND Ground
Function Table Diagram
Control Input Output
E1 E2 E3 A2 A1 A0 Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0
H X X X X X H H H H H H H H
X H X
X X L
L L H
74AHC138
Document number: DS35482 Rev. 2 - 2
A0 Address Input 0
A1 Address Input 1
A2 Address Input 2
E
1
E
2
E3 Enable Input 3 (active HIGH)
Y7 Output 7 (active LOW)
Y6 Output 6 (active LOW)
Y5 Output 5 (active LOW)
Y4 Output 4 (active LOW)
Y3 Output 3 (active LOW)
Y2 Output 2 (active LOW)
Y1 Output 1 (active LOW)
Y0 Output o (active LOW)
V
cc
Enable Input 1 (active LOW)
Enable Input 2 (active LOW)
Supply Voltage
L L L H H H H H H H L
L L H H H H H H H L H
L H L H H H H H L H H
L H H H H H H L H H H
H L L H H H L H H H H
H L H H H L H H H H H
H H L H L H H H H H H
H H H L H H H H H H H
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74AHC138
June 2013
© Diodes Incorporated
Logic Diagram
Preliminary
74AHC138
74AHC138
Document number: DS35482 Rev. 2 - 2
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June 2013
© Diodes Incorporated
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