DIGITAL-LOGIC Microspace MSM586SEN, Microspace MSM586SEV Technical User Manual
TECHNICAL USER'S MANUAL FOR:
PC/104
MSM586SEN/SEV
(optional SN/SV)
Nordstrasse 11/F
CH- 4542 Luterbach
Tel.: ++41 (0)32 681 58 00
Fax: ++41 (0)32 681 58 01
Email: support@digitallogic.com
Homepage:
http://www.digitallogic.com
DIGITAL-LOGIC AG MSM586SEN/SEV Manual V1.5E
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COPYRIGHT 1999- 2004 BY DIGITAL-LOGIC AG
No part of this document may be reproduced, transmitted, transcribed, stored in a retrieval system, in any
form or by any means, electronic, mechanical, optical, manual, or otherwise, without the prior written permission of DIGITAL-LOGIC AG.
The software described herein, together with this document, are furnished under a license agreement and
may be used or copied only in accordance with the terms of that agreement.
ATTENTION:
All information in this manual and about the product are subject to change without prior notice.
REVISION HISTORY:
Prod.-Serialnumber:
From: To:
Product
Version
BIOS
Version
Doc.
Version
Date/Vis:
Modification:
Remarks, News, Attention:
150xxx10000 150xxx1yyyy
V1.1 None 0.01 05.2000 FK Initial version, Development
V2.1 V1.20 V1.2 06.2001 STP Serial product
V2.1 V1.21 V1.3 08.2001 STP Remote, COM’s, jumper, memory
map, etc
V2.1 V1.21 V1.4 09.2001 STP Thermopicture, etc
V2.2 V1.23 V1.4 10.2001 KUF Current, Boottime, BAT-Lifetime
V2.3 V1.26 V1.5 08.2003 KUF
IrDA, Eratas
Kap 5.6.2. J58 always on 1-2
p76 contrast control removed
Kap 8.1. remark for J49/50 position of V2.1
Kap 11.1.3. remoteenabler DSUB-pins
J54 deleted in Kap 7.
V2.4 1.26 1.5A 01.2004 DAR RS485/422 description added
V2.4 1.26 1.5B 04.2004 DAR Int15 / minor corrections
V2.5 1.26 1.5C 08.2004 DAR Bios history corrected, minor correc-
tions
V2.5 1.26 1.5D 08.2004 DAR Bios download, front picture
V2.5 1.26 1.5E 11.2004 DAR LAN interface, RS485
ATTENTION
1. All information in this manual and the product are subject to change without prior notice.
2. Read this manual prior installation of the product.
3. Read the security information carefully prior installtion of the product.
Registration:
http://www.digitallogic.com -> SUPPORT -> embedded products -> register
After registration, you will receive driver & software updates, errata information, customer information and
news from DIGITAL-LOGIC AG products automatically.
DIGITAL-LOGIC AG MSM586SEN/SEV Manual V1.5E
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Table of Contents
1 Preface.............................................................................................................................6
1.1 Trademarks....................................................................................................................... 6
1.2 Disclaimer......................................................................................................................... 6
1.3 Environmental Protection Statement.............................................................................. 6
1.4 Explanation of Symbols................................................................................................... 7
1.5 For Your Safety ................................................................................................................ 9
1.6 Limited Two Year Warranty ........................................................................................... 10
2 Overview........................................................................................................................11
2.1 Standard Features.......................................................................................................... 11
2.2 Unique Features............................................................................................................. 11
2.3 MSM586SEN/SEV block diagram ................................................................................ 12
2.4 Specifications................................................................................................................. 13
2.5 BIOS History................................................................................................................... 16
2.6 This product is “YEAR 2000 CAPABLE” ........................................................ 16
2.7 Mechanical Dimensions................................................................................................. 17
2.7.1 Board version V2.2/2.3/2.4/2.5 .................................................................................................. 17
2.7.2 Board version V2.2/2.3/2.4/2.5 .................................................................................................. 18
2.8 Incompatibilities to a standard PC/AT.......................................................................... 19
2.9 Related application notes.............................................................................................. 19
2.10 Ordering codes ........................................................................................................... 19
2.11 Thermoscan ................................................................................................................ 20
2.12 High frequency radiation (to meet EN55022 & EN61000) ......................................... 21
3 PC/104 Bus Signals .....................................................................................................22
3.1 Bus levels ....................................................................................................................... 26
4 Detailed System Description .......................................................................................27
4.1 Power Requirements ..................................................................................................... 27
4.2 CPU, Boards and RAMs................................................................................................. 29
4.2.1 CPUs of this MICROSPACE Product ........................................................................................ 29
4.2.2 Numeric Coprocessor ................................................................................................................ 29
4.2.3 DRAM Memory .......................................................................................................................... 29
4.3 Interface.......................................................................................................................... 30
4.3.1 Keyboard AT compatible and PS/2 Mouse................................................................................ 30
4.3.2 Line Printer Port LPT1 ............................................................................................................... 30
4.3.3 Serial Ports COM1-COM4 ......................................................................................................... 30
4.3.4 Floppy Disk Interface ................................................................................................................. 33
4.3.5 Speaker interface....................................................................................................................... 34
4.3.6 LAN Interface: ............................................................................................................................ 34
4.4 Controllers...................................................................................................................... 35
4.4.1 Interrupt Controllers ................................................................................................................... 35
4.5 Timers and Counters ..................................................................................................... 35
4.5.1 Programmable Timers ............................................................................................................... 35
4.5.2 Internal Battery backed clock (RTC).......................................................................................... 36
4.5.3 External Battery assembling: ..................................................................................................... 36
4.5.4 Watchdog................................................................................................................................... 37
4.6 Boottime ......................................................................................................................... 38
5 BIOS ...............................................................................................................................39
5.1 ROM-BIOS sockets ........................................................................................................ 39
5.2 Standard BIOS ROM ...................................................................................................... 39
5.3 EEPROM Memory for Setup .......................................................................................... 39
5.3.1 BIOS CMOS Setup .................................................................................................................... 40
5.4 CMOS RAM Map............................................................................................................. 40
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5.5 EEPROM saved CMOS Setup........................................................................................ 46
5.6 CORE / VGA - BIOS download function........................................................................ 47
5.6.1 CORE BIOS download function ................................................................................................. 47
5.6.2 VGA BIOS download function.................................................................................................... 48
5.7 Memory ........................................................................................................................... 49
5.7.1 System Memory Map ................................................................................................................. 49
5.7.2 System I/O map ......................................................................................................................... 49
5.8 BIOS Data Area Definitions ........................................................................................... 64
5.8.1 Compatibility Service Table ....................................................................................................... 70
6 VGA, LCD.......................................................................................................................71
6.1 VGA / LCD controller 69000........................................................................................... 71
6.2 VGA / LCD BIOS for 69000........................................................................................... 71
6.3 Display modes supported ............................................................................................. 72
6.4 VGA/LCD BIOS support................................................................................................. 73
6.5 Memory 69000 CRT/TFT panels ................................................................................... 74
6.6 Memory 69000 color STN-DD panels ........................................................................... 75
6.7 Memory 69000 Mono STN-DD panels .......................................................................... 76
7 Description of the connectors .....................................................................................77
8 Jumper locations on the board....................................................................................90
8.1 Jumpers locations on the MSM586SEN/SEV V2.2/2.3/2.3a/2.4/2.5............................. 91
9 LED criterions: ..............................................................................................................93
10 Cable interface ............................................................................................................94
10.1 The harddisk cable 44pin ........................................................................................... 94
10.2 The COM 1/2/3/4 serial interface cable ...................................................................... 95
10.3 The printer interface cable (P1).................................................................................. 96
10.4 The Micro Floppy interface cable .............................................................................. 97
11 Remote Function.........................................................................................................98
11.1 Remote Features......................................................................................................... 98
11.1.1 The Remote Server REMHOST.EXE ........................................................................................ 98
11.1.2 Remote enabler ......................................................................................................................... 99
11.1.3 Cable Definition (DSUB-9pin-female)........................................................................................ 99
11.1.4 Restrictions .............................................................................................................................. 100
12 Software.....................................................................................................................100
13 100/10 Ethernet LAN ................................................................................................101
13.1 Intel 82559ER Ethernet chip..................................................................................... 101
13.1.1 Installation example for MSDOS Novell 4.11........................................................................... 101
13.1.2 Driver installation WINDOWS 95 ............................................................................................. 102
13.1.3 Driver installation WINDOWS 98SE ........................................................................................ 102
13.1.4 EEPROM update ..................................................................................................................... 102
13.2 Intel 82559 Ethernet chip.......................................................................................... 103
13.2.1 Installation example for MSDOS Novell 4.11........................................................................... 103
13.2.2 Driver installation WINDOWS 95 ............................................................................................. 103
13.2.3 Driver installation WINDOWS 98SE ........................................................................................ 103
13.2.4 EEPROM update ..................................................................................................................... 104
14 Installing the flashdisk DOC2000 ............................................................................105
14.1 Enabling and formatting of the DiskOnChip-module ............................................. 105
14.2 Compact Flash (CF).................................................................................................. 105
15 Special Peripherals, Configuration .........................................................................106
15.1 The special function interface for MICROSPACE ................................................... 106
16 Building a system .....................................................................................................109
16.1 Starting up the system ............................................................................................. 109
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17 Diagnostics ...............................................................................................................110
17.1 Failures and hints ..................................................................................................... 110
17.1.1 Other, so far not identified problems........................................................................................ 110
17.2 POST-CODE Description.......................................................................................... 111
17.2.1 Boot Loader.............................................................................................................................. 111
17.2.2 Error Beep codes ..................................................................................................................... 111
17.2.3 System BIOS in Shadow RAM................................................................................................. 111
17.2.4 Error Beep codes ..................................................................................................................... 112
18 Assemblings view.....................................................................................................113
18.1 MSM586SV/SN – SEV/SEN V2.3a/2.4/2.5 ................................................................. 113
19 INDEX.........................................................................................................................115
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1 P
REFACE
This document is for integrators and programmers of systems based on the MICROSPACE-Computer family.
It contains information on hardware requirements, interconnections, and details of how to program the system. The specifications given in this manual were correct at the time of printing; advances mean that some
may have changed in the meantime.
The information contained in this document is, to the best of our knowledge, entirely correct. However,
DIGITAL-LOGIC AG, cannot accept liability for any inaccuracies or the consequences thereof, of for any liability arising from the use or application of any circuit, product decribed herein, as seen fit by DIGITALLOGIC AG without further notice.
1.1 Trademarks
Digtial-Logic , Digital-Logic-Logo, MICROSPACE, smartModule are registered trademarks owned worldwide
by Digital-Logic AG Luterbach (Switzerland). In addition, this document may include names, company logos,
and trademarks which are registered trademarks and are therefore proprietary to their respective owners.
1.2 Disclaimer
DIGITAL-LOGIC AG makes no representations or warranties with respect to the contents of this manual and
specifically disclaims any implied warranty of merchantability or fitness for any particular purpose. DIGITALLOGIC AG shall under no circumstances be liable for incidental or consequential damages or related expenses resulting from the use of this product, even if it has been notified of the possibility of such damage.
DIGITAL-LOGIC AG reserves the right to revise this publication from time to time without obligation to notify
any person of such revisions
1.3 Environmental Protection Statement
This product has been manufactured to satisfy environmental protection requirements where possible. Many
of the components used (structural parts, printed circuit baords, connectors, batteries, etc.) are capable of
being recycled.
Final disposition of this product after its service life must be accomplished in accordance with applicable
country, state, or local laws or regulations.
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1.4 Explanation of Symbols
CE Conformity
This symbol indicates that the product described in this manual is in compliance with all applied CE
standards. Please refer also to the section “Applied Standards” in this manual.
Caution, Electric Shock!
This symbol and title warn of hazards due to electrical shocks (> 60V) when touching products or
parts of them. Failure to observe the precautions indicated and/or prescribed by the law may endanger your life/health and/or result in damage to your material. Please refer also to the section
“High Voltage Safety Instructions” on the following page.
Warning, ESD Sensitive Device!
This symbol and title inform that electronic boards and their components are sensitive to static electricity. Therefore, care must be taken during all handling operations and inspections of this product, in order to ensure product integrity at all times. Please read also the section “Special Handling and Unpacking Instructions” on the following page.
Warning!
This symbol and title emphasize points which, if not fully understood and taken into consideration
by the reader, may endanger your health and/or result in damage to your material.
Note...
This symbol and title emphasize aspects the reader should read through carefully for his or her
own advantage.
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This symbol and title warn of general hazards from mechanical, electrical, chemical failure. This may
Endager your life/health and/or result in damage to your material.
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1.5 For Your Safety
Your new Digital-Logic product was developed and tested carefully to provide all features
necessary to ensure its compliance with electrical safety requirements. It was also designed for a long fault-free life. However, the life expectancy of your product can be drastically reduced by improper treatment during unpacking and installation. Therefore, in the
interest of your own safety and of the correct operation of your new Digital-Logic product,
you are requested to conform with the following guidelines.
Warning!
All operations on this device must be carried out by sufficiently skilled personnel only.
Caution, Electric Shock!
Before installing your new Digital-Logic product, always ensure that your mains power is switched
off. This applies also to the installation of piggybacks or peripherials. Serious electrical shock hazards can exist during all installation, repair and maintenance operations with this product. Therefore, always unplug the power cable and any other cables which provide external voltages before
performing work.
ESD Sensitive Device!
Electronic boards and their components are sensitive to static electricity. Therefore, care must be
taken during all handling operations and inspections of this product, in order to ensure product integrity at all times.
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1.6 Limited Two Year Warranty
DIGITAL-LOGIC AG warrants the hardware and software products it manufactures and produces to be free
from defects in materials and workmanship for one year following the date of shipment from DIGITAL-LOGIC
AG, Switzerland. This warranty is limited to the original purchaser of product and is not transferable.
During the one year warranty period, DIGITAL-LOGIC AG will repair or replace, at its discretion, any defective product or part at no additional charge, provided that the product is returned, shipping prepaid, to
DIGITAL-LOGIC AG. All replaced parts and products become property of DIGITAL-LOGIC AG.
Before returning any product for repair, customers are required to contact the company or their distributor.
This limited warranty does not extend to any product which has been damaged as a result of accident, misuse, abuse (such as use of incorrect input voltages, wrong cabling, wrong polarity, improper or insufficient
ventilation, failure to follow the operating instructions that are provided by DIGITAL-LOGIC AG or other contingencies beyond the control of DIGITAL-LOGIC AG), wrong connection, wrong information or as a result of
service or modification by anyone other than DIGITAL-LOGIC AG. Neither, if the user has not enough
knowledge of these technologies or has not consulted the product manual or the technical support of
DIGITAL-LOGIC AG and therefore the product has been damaged.
Except, as expressly set forth above, no other warranties are expressed or implied, including, but not limited
to, any implied warranty of merchantability and fitness for a particular purpose, and DIGITAL-LOGIC AG expressly disclaims all warranties not stated herein. Under no circumstances will DIGITAL-LOGIC AG be liable
to the purchaser or any user for any damage, including any incidental or consequential damage, expenses,
lost profits, lost savings, or other damages arising out of the use or inability to use the product.
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2 O
VERVIEW
2.1 Standard Features
The MICROSPACE PC/104 is a miniaturized modular device incorporating the major elements of a PC/AT
compatible computer.
It includes standard PC/AT compatible elements, such as:
- Powerful ELAN520 133MHz
- BIOS ROM
- SODIMM 16 to 128 MBytes 70ns (32bit device, no ECC supported)
- Timers
- DMA
- Real-time clock with CMOS-RAM and battery buffer
- LPT1 parallel port
- COM1, COM2, COM3, COM4 serial port
- Speaker interface
- AT-keyboard interface or PS/2-keyboard interface
- PS/2 mouse interface
- Floppy disk interface
- AT-IDE harddisk interface
- VGA/LCD video interface
- PC/104 embedded BUS
2.2 Unique Features
The MICROSPACE includes all standard PC/AT functions plus unique DIGITAL-LOGIC AG enhancements,
such as:
- Single 5 volt supply
- LAN Ethernet 82559ER
- DOC2000
- Compact card. typ 1
- Watchdog
- Power-fail
- EEPROM for setup and configuration
- Core- and VGA BIOS downloadable
- JTAG for debugging with CADUL KIT
- (NO Power management functions yet)
- UL approved parts
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DRAM
BUS
2.3 MSM586SEN/SEV block diagram
ELAN520
CPU
SODIMM
up to 128 Mbyte
EIDE
&
CF
LCD/VGA
Controller 69000
PCI-BUS
LCD
CRT
BIOS
256kByte
Super I/O
37B787
PC/10
4
Bus
Ethernet
LAN
INTEL 82559ER
ISA-BUS
MAX2ll
FD
LPT1
MAX2ll
COM3 COM4
JTAG Port
RTC
LiBAT
EEPROM
2kByte
Watchdog
KB Mouse
100/10BASE-T
VRAM
2 MB
MAX2ll
MAX2ll
COM1 COM2
IrDA
DOC2000
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2.4 Specifications
CPU:
Specification
CPU
AMD ELAN520 – 133MHz
Compatibility: 8086 – Pentium
1. Level Cache: 16k data and 16k code
2. Level Cache: None
Socket: BGA
Clock 133MHz
FSB 33MHz
Powermanagement None
FPU: Integrated
Chipset:
Specification
Nordbridge AMD ELAN520
Southbridge AMD ELAN520
LAN 82C559 INTEL
Audio Not on board
Firewire IEEE1394 Not on board
Video CT69000 (2Mbyte)
Framegrabber/TV-Input Not on board
Memory
Specification
Main Memory SDRAM, 32Bit, up to 128Mbyte in two SODIMM144 socket
Flash-BIOS 256kByte Flash
Setup EEPROM 2kByte for CMOS-backup in batterless applications
Flash-VideoBIOS: Serial-Flash
Video RAM Separate 2Mbyte
Video controller
Specification
Controller CT69000
Videomemory 4Mbyte
Channel 1 CRT VGA up to 1248 x 1024 pixels
Channel 2 TFT
Bootup-Resolution 640 x 480 / 800 x 600 / 1024 x 768 VGA bios depending
2D-Grafic Integrated accelerator
3D-Grafic Not available
Direct-X Version Not available
PnP Not available
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External Interface
Specification
Videointerfaces CRT1, LCD for TFT and STN
USB V1.1 Not available
LPT1: Internal
COM1: RS232
COM2: RS232
COM3: RS232
COM4: RS232
Keyboard: PS/2
Mouse: PS/2
Floppy: 26pin FCC Interface for TEAC Minifloppy
Harddisk: 1 channel 44pin RM2.0mm ATAIDE-cable
Speaker: 0.1Watt Speaker
Powersupply:
Input: Nom. 5V Tolerance +/- 3%
Protection: Not integrated, EMI filtered must be added external
Spec.
Power Consumption
Specification
At 5V Typical 1.5 Amp.
Standby Not available
Poweroff 0mA
Physical Characteristics
Specification
PC/104
Dimensions: Length: 91mm
Depth: 96mm
Height: 25mm
Weight: 170gr
Operating Environment
Specification
Relative Humidity: 5 - 90% non condensing
IEC68-2-30 at -20° to +50°C operating
Vibration operating: IEC68-2-6 10-50Hz, 0.075mm and 55-500Hz, 1.0G
Vibration nonoperating: IEC68-2-6 10-50Hz, 0.15mm and 55-500Hz, 2.0G
Shock operating: IEC68-2-27 10G, 11ms ½ sine
Shock nonoperating: IEC68-2-27 50G, 11ms, ½ sine
Altitude IEC68-2-13 4571meter operating
Temperature operating IEC68-2-1,2,14: Standard -20°C to +60°C
Extended Temp. option MIL-810-501/502 Extended temperatur -40°C to +85°C
Temperature storage IEC68-2-1,2,14: -65°C to +125°C *)
*) The backupbattery is limited on –40°C to +85°C operating and storage temperature !
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EMI / EMC Tests
Specification
If all signals are externaly filtered and assembled into a closed metalic case !
EMC emission EN61000-6-2:2001
Conducted disturbance EN55022 Class B
Radiated disturbance EN55022 Class B
EMC immunity EN61000-6-2
Electrostatic discharge (ESD) EN61000-4-2
Voltage = 4kV contact / 8kV air
Criteria A
Radiated RF-Field EN61000-4-3
Level = 10V/m
Criteria A
Electrical fast transients (Burst) EN61000-4-4
Grade 2: DC-Powerlines = 1000V (5/50ns)
Grade 2: AC-Powerlines = 2000V (5/50ns)
Grade 2: Signallines = 500V (5/50ns)
Criteria B
Surge EN61000-4-5
Grade 2: DC-Powerlines = 1kV, (1.2/50us)
Grade 2: AC-Powerlines = 2kV, (1.2/50us)
Criteria B
Conducted disturbances EN61000-4-6
Voltage = 10V coupled by case
Criteria A
Security:
e1: Not planed
UL Not planed
ETS 301 Not planed
CE/SEV Yes
Safety AR385-16
Any information is subject to change without notice.
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2.5 BIOS History
Version: Date: Status: Modifications:
V1.00 Mai.2000 Development Test Initial prototyp BIOS
V1.11 06.2001 Development Test Initial standard BIOS
V1.20 06.2001 Beta Standard BIOS for boardversions >2.0
V1.21 08.2001 Beta DOC2000 support, IRQ15 enabled, FDD B off,
V1.22 09.2001 Released IN10 disabled, LPT en/disable, date 1.1.2000 battery less
V1.23 10.2001 Released INT10 in E- segment
V1.25 09.2002 Released INT15, HD autodetect, CD-Rom support, default settings, no
F1 stop if the floppy fails during boot up
V1.26 08.2003 Released IrDA, Download BIOS, FFS, DOC2000 >92MB working now
2.6 This product is “YEAR 2000 CAPABLE”
This DIGITAL-LOGIC product is “YEAR 2000 CAPABLE”. This means, that upon installation, it accurately
stores, displays, processes, provides and/or receives date data from, into, and between 1999 and 2000, and
the 20. and 21. centuries, including leap year calculations, provided that all other technology used in combination with said product properly exchanges date data with it. DIGITAL-LOGIC makes no representation
about individual components within the product should be used independently from the product as a whole.
You should understand that DIGITAL-LOGIC’s statement that an DIGITAL-LOGIC product is “YEAR 2000
CAPABLE” means only that DIGITAL-LOGIC has verified that the product as a whole meet this definition
when tested as a stand-alone product in a test lab, but dies not mean that DIGITAL-LOGIC has verified that
the product is “YEAR 2000 CAPABLE” as used in your particular situation or configuration. DIGITAL-LOGIC
makes no representation about individual components, including software, within the product should they be
used independently from the product as a whole.
DIGITAL-LOGIC customers use DIGITAL-LOGIC products in countless different configurations and in conjunction with many other components ans systems, and DIGITAL-LOGIC has no way to test wheter all those
configurations and systems will properly handle the transition to the year 2000. DIGITAL-LOGIC encourages
its customers and others to test whether their own computer systems and products will properly handle the
transition to the year 2000.
The only proper method of accessing the date in systems is indirectly from the Real-Time-Clock via the
BIOS. The BIOS in DIGITAL-LOGIC computerboards contain a century checking and maintenance feature
the checks the laest two significant digits of the year stored in the RTC during each BIOS request (INT 1A) to
read the date and, if less than ‘80’ (i.e. 1980 is the first year supported by the PC), updates the century byte
to ‘20’. This feature enables operating systems and applications using BIOS date/time services to reliably
manipulate the year as a four-digit value.
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2.7 Mechanical Dimensions
2.7.1 Board version V2.2/2.3/2.4/2.5
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2.7.2 Board version V2.2/2.3/2.4/2.5
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2.8 Incompatibilities to a standard PC/AT
A. Do not use internal COM1/2 of the ELAN520 in the FIFO-Mode. AMD Errata
Some bits are lost in certain configurations of FIFO-Mode an in extended temperature ranges.
Solution: Use the COM3/4 for FIFO Mode. Use a None-FIFO-Driver !
B. PRETEC Cflash with the Toshiba controller (ACT...) are not working, with
the HITACHI Controller ( ACH...) are aorking fine. A bug fixed by PRETEC.
C. LINUX need a BIOS without INT15 service, otherwise the DRAM-Capacity is not well reported.
Last observation was with BIOS V1.24.
2.9 Related application notes
# Description
84 Power consumption on Pentium / any other boards with
attached drives (HDD, CD)
96 MSM586SEN/SEV upgrades on V1.2
Application Notes are availble at http://www.digitallogic.com -> Support, or on any Application CD from
DIGITAL-LOGIC.
2.10 Ordering codes
To get the actual status of the partnumbers, customers are advised to ask for them
via our sales department or distributors.
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2.11 Thermoscan
With standard cooler:
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2.12 High frequency radiation (to meet EN55022 & EN61000)
Since the PC/104 CPU modules are very high integrated embedded computers, no peripheral lines are protected against the radiation of high frequency spectrum. To meet a typical EN55022 requirement, all peripherals, they are going outside of the computer case, must be filtered externaly.
Typical signals, they must be filtered:
Keyboard: KBCLK, KBDATA, VCC
Mouse: MSCLK, MSDATA, VCC
COM1/2/3/4: All serial signals must be filtered
LPT: All parallel signals must be filtered
CRT: red,blue,green, hsynch, vsynch must be filtered
Typical signals, they must not be filtered, since they are internaly used:
IDE: connected to the harddisk
Floppy: connected to the floppy
LCD: connected to the internal LCD
1. For peripheral cables:
Use for all DSUB connector a filtered version. Select carefully the filter specifications.
Place the filtered DSUB connector directly frontside and be shure that the shielding makes
a good contact with the case.
9pin DSUB connector from AMPHENOL: FCC17E09P 820pF
25pin DSUB connector from AMPHENOL: FCC17B25P 820pF
2. For stackthrough applications:
Place on each peripheral signal line, they are going outside, a serial inductivity and
after the inductivity a capacitor of 100pF to 1000pF to ground.
In this case, no filtered connectors are needed. Place the filter directly under or
behind the onboard connector.
Serial Inductivity: TDK HF50ACB321611-T 100Mhz, 500mA, 1206 Case
Ground capacitor: Ceramic Capacitor with 1000pF
Power supply:
Use a currentcompensated dualinductor on the 5V supply
SIEMENS B82721-K2362-N1 with 3.6A , 0.4mH
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3 PC/104 B
US SIGNALS
Please note, that may not all of the signals are available on this board
(check chapter “Description of the connectors”)
AEN, output
Address Enable is used to degate the microprocessor and other devices from the I/O channel to allow DMA
transfers to take place. low = CPU Cycle , high = DMA Cycle
BALE, output
Address Latch Enable is provided by the bus controller and is used on the system board to latch valid addresses and memory decodes from the microprocessor. This signal is used so that devices on the bus can
latch LA17..23. The SA0..19 address lines latched internally according to this signal. BALE is forced high
during DMA cycles.
/DACK[0..3, 5..7], output
DMA Acknowledge 0 to 3 and 5 to 7 are used to acknowledge DMA requests (DRQO through DRQ7). They
are active low. This signal indicates that the DMA operation can begin.
Not available on ELAN520 (DACK5...7)
DRQ[0..3, 5..7], input
DMA Requests 0 through 3 and 5 through 7 are asynchronous channel requests used by peripheral devices
and the I/O channel microprocessors to gain DMA service (or control of the system). A request is generated
by bringing a DRQ line to an active level. A DRQ line must be held high until the corresponding DMA Request Acknowledge (DACK/) line goes active. DRQO through DRQ3 will perform 8-Bit DMA transfers; DRQ57 are used for 16 accesses.
Not available on ELAN520 (DRQ5...7)
/IOCHCK, input
IOCHCK/ provides the system board with parity (error) information about memory or devices on the I/O
channel. low = parity error, high = normal operation
IOCHRDY, input
I/O Channel Ready is pulled low (not ready) by a memory or I/O device to lengthen I/O or memory cycles.
Any slow device using this line should drive it low immediately upon detecting its valid address and a Read
or Write command. Machine cycles are extended by an integral number of one clock cycle (67 nanoseconds). This signal should be held in the range of 125-15600nS. low = wait, high = normal operation
/IOCS16, input
I/O 16 Bit Chip Select signals the system board that the present data transfer is a 16-Bit, 1 wait-state, I/0 cycle. It is derived from an address decode. /IOCS16 is active low and should be driven with an open collector
(300 ohm pull-up) or tri-state driver capable of sinking 20mA. The signal is driven based only on SA15-SAO
(not /IOR or /IOW) when AEN is not asserted. In the 8 Bit I/O transfer, the default transfers a 4 wait-state cycle.
/IOR, input/output
I/O Read instructs an I/O device to drive its data onto the data bus. It may be driven by the system microprocessor or DMA controller, or by a microprocessor or DMA controller resident on the I/O channel. This signal is active low.
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/IOW, input/output
I/O Write instructs an I/O device to read the data on the data bus. It may be driven by any microprocessor or
DMA controller in the system. This signal is active low.
IRQ[ 3 - 7, 9 - 12, 14, 15], input
These signals are used to tell the microprocessor that an I/O device needs attention. An interrupt request is
generated when an IRQ line is raised from low to high. The line must be held high until the microprocessor
acknowledges the interrupt request.
/Master, input
This signal is used with a DRQ line to gain control of the system. A processor or DMA controller on the I/0
channel may issue a DRQ to a DMA channel in cascade mode and receive a /DACK.
Not available on ELAN520
/MEMCS16, input
MEMCS16 Chip Select signals the system board if the present data transfer is a 1 wait-state, 16-Bit, memory
cycle. It must be derived from the decode of LA17 through LA23. /MEMCS16 should be driven with an open
collector (300 ohm pull-up) or tri-state driver capable of sinking 20mA.
/MEMR input/output
These signals instruct the memory devices to drive data onto the data bus. /MEMR is active on all memory
read cycles. /MEMR may be driven by any microprocessor or DMA controller in the system. When a microprocessor on the I/0 channel wishes to drive /MEMR, it must have the address lines valid on the bus for one
system clock period before driving /MEMR active. These signals are active low.
/MEMW, input/output
These signals instruct the memory devices to store the data present on the data bus. /MEMW is active in all
memory read cycles. /MEMW may be driven by any microprocessor or DMA controller in the system. When a
microprocessor on the I/O channel wishes to drive /MEMW, it must have the address lines valid on the bus
for one system clock period before driving /MEMW active. Both signals are active low.
OSC, output
Oscillator (OSC) is a high-speed clock with a 70 nanosecond period (14.31818 MHz). This signal is not synchronous with the system clock. It has a 50% duty cycle. OSC starts 100µs after reset is inactive.
RESETDRV, output
Reset Drive is used to reset or initiate system logic at power-up time or during a low line-voltage outage. This
signal is active high. When the signal is active all adapters should turn off or tri-state all drivers connected to
the I/O channel. This signal is driven by the permanent Master.
/REFRESH, input/output
These signals are used to indicate a refresh cycle and can be driven by a microprocessor on the I/0 channel.
These signals are active low.
ELAN520 pullup this signal with 1k
ΩΩΩΩ
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SAO-SA19, LA17 - LA23 input/output
Address bits 0 through 19 are used to address memory and I/0 devices within the system. These 20 address
lines, allow access of up to 1MBytes of memory. SAO through SA19 are gated on the system bus when
BALE is high and are latched on the falling edge of BALE. LA17 to LA23 are not latched and addresses the
full 16 MBytes range. These signals are generated by the microprocessors or DMA controllers. They may
also be driven by other microprocessor or DMA controllers that reside on the I/0 channel. The SA17-SA23
are always LA17-LA23 address timings for use with the MSCS16 signal. This is advanced AT96 design. The
timing is selectable with jumpers LAxx or SAxx.
/SBHE, input/output
Bus High Enable (system) indicates a transfer of data on the upper byte of the data bus, XD8 through XD15.
Sixteen-Bit devices use /SBHE to condition data-bus buffers tied to XD8 through XD15.
SD[O..15], input/output
These signals provide bus bits 0 through 15 for the microprocessor, memory, and I/0 devices. DO is the
least-significant Bit and D15 is the most significant Bit. All 8-Bit devices on the I/O channel should use DO
through D7 for communications to the microprocessor. The 16-Bit devices will use DO through D15. To support 8-Bit device, the data on D8 through D15 will be gated to DO through D7 during 8-Bit transfers to these
devices; 16-Bit microprocessor transfers to 8-Bit devices will be converted to two 8-Bit transfers.
/SMEMR input/output
These signals instruct the memory devices to drive data onto the data bus for the first MByte. /SMEMR is
active on all memory read cycles. /SMEMR may be driven by any microprocessor or DMA controller in the
system. When a microprocessor on the I/0 channel wishes to drive /SMEMR, it must have the address lines
valid on the bus for one system clock period before driving /SMEMR active. The signal is active low.
/SMEMW, input/output
These signals instruct the memory devices to store the data present on the data bus for the first MByte.
/SMEMW is active in all memory read cycles. /SMEMW may be driven by any microprocessor or DMA controller in the system. When a microprocessor on the I/O channel wishes to drive /SMEMW, it must have the
address lines valid on the bus for one system clock period before driving /SMEMW active. Both signals are
active low.
SYSCLK, output
This is a 8.25 MHz system clock. It is a synchronous microprocessor cycle clock with a cycle time of 167
nanoseconds. The clock has a 66% duty cycle. This signal should only be used for synchronization.
Available on ELAN520, since boardversion V2.2
TC output
Terminal Count provides a pulse when the terminal count for any DMA channel is reached. The TC completes a DMA-Transfer. This signal is expected by the onboard floppy disk controller. Do not use this signal,
because it is internally connected to the floppy controller.
/0WS, input
The Zero Wait State (/0WS) signal tells the microprocessor that it can complete the present bus cycle without
inserting any additional wait cycles. In order to run a memory cycle to a 16-Bit device without wait cycles,
/0WS is derived from an address decode gated with a Read or Write command. In order to run a memory
cycle to an 8-Bit device with a minimum of one-wait states, /0WS should be driven active one system clock
after the Read or Write command is active, gated with the address decode for the device. Memory Read and
Write commands to an 8-Bit device are active on the falling edge of the system clock. /OWS is active low
and should be driven with an open collector or tri-state driver capable of sinking 20mA.
Not available on ELAN520
DIGITAL-LOGIC AG MSM586SEN/SEV Manual V1.5E
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12V +/- 5%
used only for the flatpanel supply.
GROUND = 0V
used for the entire system.
VCC, +5V +/- 0.25V
for logic and harddisk/floppy supply.
For further Informations about PC/104 and PC/104plus, please refer to the PC/104 specification
manual which is available on the internet. http://www.digitallogic.com (manuals)
DIGITAL-LOGIC AG MSM586SEN/SEV Manual V1.5E
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3.1 Bus levels
The bus currents are as follows:
Output Signals: IOH: IOL:
D0 - D16 8 mA 8 mA
A0 - A23 8 mA 8 mA
MR, MW, IOR, IOW, RES, ALE, AEN, C14 8 mA 8 mA
DACKx, DRQx, INTx, PSx, OPW 8 mA 8 mA
Output Signals: Logic Family: Voltage:
ABT-Logic ABT-Logic
Input Signals: ViH (min.) = 2.15 V Vil (max.) = 0.85 V
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4 D
ETAILED SYSTEM DESCRIPTION
This system has a system configuration based on the ISA architecture. Check the I/O and the memory map
in this chapter.
4.1 Power Requirements
The power is connected through the PC/104 power connector; or the separate power connector on the
board. The supply uses only the +5 Volts and ground connection.
Warning: Make sure that the power plug is wired correctly before supplying power to the
board! A built-in diode protects the board against reverse polarity.
Tolerance of 5V supply: 5 volts ± 5%; Power-fail signal starts at ± 10 % of 5 volt norm and generates a
reset status for the MICROSPACE PC.
ATTENTION: With the harddisk connected to the IDE 44pin interface, the power requirement
is high. The peak current must be enough to spin up the HD-motor. The typical
spin-up current of the harddisk is 0.8 - 1.5Amp at 5V. Too little current will drop
the voltage to under 5 volts for a short time. Due to this undervoltage, the system or the harddisk stops or falters. The VGA could also be "snowy".
The precise power requirements of the MICROSPACE MSM586SEV depend on a number of factors, including which functions are present on the board and which peripherals are connected to the board's I/0 port. For
example, AT-keyboards draw their power from the keyboard connector on the MICROSPACE MSM586SEV
board, and therefore add keyboard current to the total power drawn by the board from its power supply.
Testenvironment for the powerconsumption measurement:
Peripherie:
Harddisk Hitachi Mod-DK23AA-60 DLAG: 890005
Monitor Compaq Mod-460
CompactFlash ONT-0515-0006 64MB DLAG: 890013
DOC2000 16 MB DLAG:
PS/2-KB Logitech Mod-iTouch Keyboard
PS/2-MS Logitech Mod-M-CAA43
Floppy TEAC Mod-FD-05HF
Software:
MS-DOS v6.22
Win98SE
HCT for Win98 v8.1 PerformanceTesttool from MICROSOFT
DIGITAL-LOGIC AG MSM586SEN/SEV Manual V1.5E
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MSM586SEV
Current at +5Volt supply at
–30°C/+25°C/+85°C
Mode Memory
DLAG-Nr.
-30 °C
+25°C +85 °C
MSM586SEV (DLAG: 801360) [mA]
[mA]
[mA]
DOSv6.22: A:\
32MB/2 = 16 MB 890645 SDRAM
1290
1200 1200
32 MB 890655 SDRAM
1150
1160 1160
64 MB 890654 SDRAM
1180
1190 1200
DOSv6.22: EDIT running
32MB/2 = 16 MB 890645 SDRAM
1190
1200 1200
Autoexec.bat
32 MB 890655 SDRAM
1150
1170 1160
64 MB 890654 SDRAM
1180
1200 1200
Win98SE: Desktop
32MB/2 = 16 MB 890645 SDRAM
1170
1140 1160
32 MB 890655 SDRAM
1180
1160 1160
64 MB 890654 SDRAM
1170
1160 1170
Win98SE: HCT v8.1
32MB/2 = 16 MB 890645 SDRAM
1470
1490 1520
System\Stress\Disk (Stress) c:\
32 MB 890655 SDRAM
1460
1490 1460
64 MB 890654 SDRAM
1480
1470 1480
MSM586SEN
Current at +5Volt supply at
–30°C/+25°C/+85°C
Mode Memory
DLAG-Nr.
-30 °C
+25°C +85 °C
MSM586-SEN (DLAG: 801350) [mA]
[mA]
[mA]
DOSv6.22: A:\
32MB/2 = 16 MB 890645 SDRAM
970
880
870
32 MB 890655 SDRAM
950
860
850
64 MB 890654 SDRAM
970
880
850
DOSv6.22: EDIT running
32MB/2 = 16 MB 890645 SDRAM
970
880
880
Autoexec.bat
32 MB 890655 SDRAM
950
870
860
64 MB 890654 SDRAM
970
890
870
Win98SE: Desktop
32MB/2 = 16 MB 890645 SDRAM
940
860
860
32 MB 890655 SDRAM
950
860
850
64 MB 890654 SDRAM
960
880
880
Win98SE: HCT v8.1
32MB/2 = 16 MB 890645 SDRAM
1290
1190 1150
System\Stress\Disk (Stress) c:\
32 MB 890655 SDRAM
1240
1190 1160
64 MB 890654 SDRAM
1270
1200 1200
DIGITAL-LOGIC AG MSM586SEN/SEV Manual V1.5E
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4.2 CPU, Boards and RAMs
4.2.1 CPUs of this MICROSPACE Product
Processor: Type: Clock: Landmark MHz: Landmark Units:
ELAN520 AMD 133 MHz
4.2.2 Numeric Coprocessor
Is integrated into the ELAN520.
4.2.3 DRAM Memory
Speed:
70ns
Size:
SDRAM SODIMM144
Bits:
32 Bit
Capacity:
up to 128 MBytes
Bank:
1 - 4
Special 32Bit wide SODIMM Memory are needed !
DLAG Part.No.
SIZE
890655
32MB
890654
64MB
890656
128MB
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4.3 Interface
4.3.1 Keyboard AT compatible and PS/2 Mouse
Pin Signal
Pin 1 Speaker out
Pin 2 GND
Pin 3 Ext. reset input
Pin 4 VCC
Pin 5 Keyb. Data
Pin 6 Keyb. Clock
Pin 7 GND
Pin 8 External battery 3.0V
Pin 9 Mouse Clock (PS/2)
Pin 10 Mouse Data (PS/2)
4.3.2 Line Printer Port LPT1
A standard bi-directional LPT port is integrated into the MICROSPACE PC.
Further information about these signals is available in numerous publications, including the IBM technical
reference manuals for the PC and AT computers and from some other reference documents.
The current is: IOH = 12 mA IOL = 24mA
The SUPER I/O 37B787 may be programmed via software commands.
4.3.3 Serial Ports COM1-COM4
The serial channels are fully compatible with 16C550 UARTS. COM1 is the primary serial port, and is supported by the board's ROM-BIOS as the PC-DOS 'COM1' device. The secondary serial port is COM2; it is
supported as the 'COM2' device.
Standard: COM 1/2: ELAN520: 2 x 16C550 compatible serial interfaces
COM 3/4: 37B787: 2 x 16C550 compatible serial interfaces
Serial Port Connectors COM1, COM2, COM3, COM4
Pin Signal Name Function in/out DB25 Pin DB9 Pin
1 CD Data Carrier Detect in 8 1
2 DSR Data Set Ready in 6 6
3 RXD Receive Data in 3 2
4 RTS Request To Send out 4 7
5 TXD Transmit Data out 2 3
6 CTS Clear to Send in 5 8
7 DTR Data TerminalReady out 20 4
8 RI Ring Indicator in 22 9
9 GND Signal Ground 7 5
The serial port signals are compatible with the RS232C specifications.
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