Digilent Digilab 2 User Manual

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Overview

The Digilab 2 development board (the D2)
features the Xilinx Spartan 2 XC2S200 FPGA
circuit board and provides an inexpensive and
expandable platform on which to design and
implement digital circuits of all kinds. D2
board features include:

Power

jack

5-9VDC

Serial PortParallel Port

2.5VDC

regulator

3.3VDC

regulator

Serial

Port

RS-232

converter

EPP or SPP

parallel port

50MHz

CLK

Push

button

Xilinx Spartan2

XC2S200-PQ208

Status

LED

SPROM

• A Xilinx XC2S200 FPGA;

Buffer

JTAG

Port

Expansion C Expansion D

• Dual on-board 1.5A power regulators
(2.5V and 3.3V);

• A socketed 50MHz oscillator;

• An EPP-capable parallel port for JTAG-

based FPGA programming and user data
transfers;

• A 5-wire Rs-232 serial port;

• A status LED and pushbutton for basic

I/O;

Port/prog

control

switch

Expansion A Expansion B

Expansion E Expansion F

D2 circuit board block diagram

• Six 100-mil spaced, right-angle DIP
socket 40-pin expansion connectors.

The D2 board has been designed specifically to
work with Xilinx ISE CAD tools, including the
free WebPack tools available from the Xilinx
website. Like other Spartan 2 boards in the
Digilab family, the D2 board has been
partitioned so that only the hardware required
for a particular project need be purchased.
Several existing peripheral boards that mate

with the expansion connectors are currently
available (see www.digilentinc.com), and new
boards are frequently added. The low-cost,
standard expansion connectors allow new
peripheral boards, including wire-wrap or
manually soldered boards, to be quickly
designed and used. The D2 board ships with a
power supply and programming cable, so
designs can be implemented immediately
without the need for any additional hardware.

Functional description

The Digilab D2 board has been designed to offer an unembellished, low-cost system for designers who
need a flexible platform to gain exposure to the Spartan 2 device, or for those who need to rapidly
prototype FPGA-based designs. The D2 board provides only the essential supporting devices for the
Spartan 2, and routes all available FPGA signals to standard expansion connectors. Included on the
board are 2.5VDC and 3.3VDC regulators, a JTAG configuration circuit that uses a standard parallel

®

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Digilent Digilab 2 Reference Manual Digilent, Inc.

cable, basic communication ports including an enhanced parallel port and 5-wire serial port, a 50MHz
oscillator, and a pushbutton and LED for rudimentary I/O.

The D2 board has been designed
to serve as a host for various
peripheral boards. The expansion
connectors on the D2 board mate
with standard 40-pin, 100 mil
spaced DIP headers available
from any catalog distributor.
Expansion connectors provide the
unregulated supply voltage (VU),

3.3V, GND, and 37 FPGA
signals to peripheral boards, so
system designers can quickly
develop application-specific
peripheral boards. Digilent also
produces an assortment of other
expansion boards featuring
commonly used devices. Visit the
Digilent website for a listing of
currently available boards.
(www.digilentinc.com)

Table 1 shows all signals routed
on the D2 board. These signals,
and the circuits to which they
connect, are described in the
following sections.

Power Supplies
VU Unregulated power supply voltage – depends on power

supply used. Must be between 5VDC and 10VDC. Routed to
regulators and expansion connectors only.

VDD33 VCCO/VCC for all devices, routed on PCB plane. 1.5A can

be drawn with less than 20mV ripple (typical)
VDD25 FPGA VCCINT routed on PCB plane
GND System ground routed to all devices on PCB ground plane
Programming and parallel port
PWE EPP mode write enable sign al (in to FPGA)
PD0-PD7 Bi-directional data signals
PINT Interrupt signal (out from FPGA)
PWT EPP mode wait signal (out from FPGA)
PDS EPP mode data strobe (in to FPGA)
PRS Reset signal (in to FPGA)
PAS EPP mode address strobe (in to FPGA)
Serial port
RXD Serial port receive data (in to FPGA)
TXD Serial port send data (out from FPGA)
DSR Serial port data set ready (out from FPGA)
CTS Serial port clear to send (out from FPGA)
RST Serial port request to send (in to FPGA)
On board devices
BTN1 User-controllable pushbutton input
LED1 User-controllable status LED
CLK1 CMOS oscillator connected to GCLK0
Expansion Connectors
A4-A40 A bus signals connecting the A & E connectors to the FPGA
B4-B14 B bus signals connecting the B & F connectors to the FPGA
C4-C40 C bus signals connecting the C connector to the FPGA
D4-D40 D bus signals connecting the D connector to the FPGA

Table 1. D2 board signal definitions

Parallel port and FPGA configuration circuit

The Digilab 2 board uses a DB-25 parallel port connector to route JTAG programming signals from a
host computer to the FPGA. This same connector also routes the computer’s parallel port pins to the
FPGA following the EPP port definition contained in the IEEE 1284 standard. A three-state buffer,
controlled by a switch, determines whether the JTAG port or EPP port is enabled. With this circuit, the
FPGA can be configured using the JTAG protocol over the parallel cable. The same cable can then be
used (after the switch is repositioned) to move data between the board and the host computer using the
high-speed EPP protocol. A separate JTAG header is also provided so that a dedicated programming
cable (like the Xilinx Parallel III cable) can be used.

The JTAG programming circuit follows the JTAG schematic available from Xilinx, so that the Digilab
2 board is fully compatible with all Xilinx programming tools. The EPP parallel port circuit follows
IEEE 1284 specification guidelines, and data rates approaching 2Mbytes/second can be achieved.
JTAG and EPP connections are shown in the diagrams (Figure 1) below.

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Pin 13 Pin 1

Pin 25

DB25 parallel port connector

Front view

Pin 25

Top view of hole pattern, with

cable attaching from this side

Pin 14

Pin 1

Pin EPP signal EPP Function

1 Write Enable (O) Low for read, High for write
2-9 Data bus (B) Bi-directional data lines
10 Interrupt (I) Interrupt/acknowledge input
11 Wait (I) Bus handshake; low to ack
12 Spare NOT CONNECTED
13 Spare NOT CONNECTED
14 Data Strobe (O) Low when data valid
15 Spare NOT CONNECTED
16 Reset (O) Low to reset
17 Address strobe (O) Low when address valid
18-25 GND System ground

Figure 1. Parallel port connectors and signals

The D2 board directly supports JTAG and SPROM configuration. Hardware debugger configuration is
supported indirectly. To configure the board from a computer using the JTAG mode, set switch 1
(SW1) in the JTAG position, and attach a power supply and programming cable. The power supply
must be connected before the parallel cable or the board may hang in a non-communicating state. The
board will be auto-detected by the Xilinx JTAG programming software, and all normal JTAG
operations will be available.

To configure the FPGA from an SPROM, load the programmed SPROM into the 8-pin ROM socket
(labeled IC6), place SW1 in the PORT position, add jumpers to all mode pins, and apply power.

To configure the board using the hardware debugger protocol, a slight board modification is required –
a jumper wire must be soldered to the non-VCC side of R45. Insert wire-wrap posts into the SPROM
socket, attach the hardware debugger signals to the appropriate posts, and attach the PROG signal to
the jumper wire attached to R45. The hardware debugger programming software will now
automatically recognize the board and hardware debugger programming can proceed as normal.

Programming circuit detail is shown below (Figure 2). Note that all parallel port signals are routed to
the test header J12 for easy connection of test and measurement equipment.

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