Digilent D2XL User Manual

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June 9, 2004 215 E Main Suite D | Pullman, WA 99163

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Overview

The Digilent D2XL development board (the D2XL)
featuring the Xilinx Spartan 2 XC2S30 FPGA
provides an inexpensive and expandable platform
on which to design and implement digital circuits of
all kinds. D2XL board features include:

• A Xilinx XC2S30 FPGA;

• Dual on-board 1.5A power regulators (2.5V

and 3.3V);

• A socketed 50MHz oscillator;

• An EPP-capable parallel port for JTAG-based

FPGA programming and user data transfers;

• An SPROM socket for automatic FPGA
configuration at power-on;

• A status LED and pushbutton for basic I/O;

• Two 100-mil spaced, right-angle DIP socket

40-pin expansion connectors.

The D2XL board has been designed specifically to work with the Xilinx ISE CAD tools, including the
free WebPack tools available from the Xilinx website. Like other Spartan 2 boards in the Digilab
family, the D2XL board has been partitioned so that only the hardware required by a particular project
need be purchased. Several existing peripheral boards that mate with the expansion connectors are
available (see www.digilentinc.com), and new expansion boards are added often. The low-cost,
standard expansion connectors allow new peripheral boards, including wire-wrap or manually
soldered boards, to be quickly designed and used. The D2 board ships with a power supply and
programming cable, so designs can be implemented immediately without the need for any additional
hardware.

Functional description

The D2XL board has been designed to offer a low-cost and minimal system for designers who need a
flexible platform to gain exposure to the Spartan 2 device, or for those who need to prototype FPGA­based designs rapidly. The D2XL board provides only the essential supporting devices for the Spartan
2, and routes all available FPGA signals to standard expansion connectors. Included on the board are

2.5VDC and 3.3VDC regulators, a JTAG configuration circuit that uses a standard parallel cable,
basic communication ports including an enhanced parallel port, a 50MHz oscillator, and a pushbutton
and LED for rudimentary I/O.

Power

jack

5-9VDC

Parallel Port

2.5VDC

regulator

3.3VDC

regulator

EPP or SPP

parallel port

JTAG

Port

Buffer

Port/prog

control

switch

50MHz

CLK

Push

button

Status

LED

SPROM

Xilinx Spartan2

XC2S30-TQ144

Expansion E Expansion F

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Digilent D2XL Reference Manual Digilent, Inc.

The D2XL board has been
designed to serve as a host for
various peripheral boards. The
expansion connectors on the
board mate with standard 40-pin,
100 mil spaced DIP headers
available from any catalog
distributor. Expansion connectors
provide the unregulated supply
voltage (VU), 3.3V, GND, and 37
FPGA signals to peripheral
boards, so system designers can
quickly develop application­specific peripheral boards.
Digilent also produces a
collection of expansion boards
with commonly used devices.
See the Digilent website
(www.digilentinc.com) for a listing
of currently available boards.

Table 1 shows all signals routed
on the D2XL board. These
signals and their circuits are
described in the following
sections.

Parallel port and FPGA
configuration circuit

The D2XL board uses a DB-25
parallel port connector to route JTAG programming signals from a host computer to the FPGA. This
same connector also routes the computer’s parallel port pins to the FPGA following the EPP port
definition contained in the IEEE 1284 standard. A three-state buffer, controlled by a switch,
determines whether the JTAG port or EPP port is enabled. With this circuit, the FPGA can be
configured using the JTAG protocol over the parallel cable. The same cable can then be used (after
the switch is repositioned) to move data between the board and the host computer using the high­speed EPP protocol. A separate JTAG header is also provided so that a dedicated programming
cable (like the Xilinx Parallel III cable) can be used.

The JTAG programming circuit follows the JTAG schematic available from Xilinx, so that the D2XL
board is fully compatible with all Xilinx programming tools. The EPP parallel port circuit follows the
guidelines in the IEEE 1284 specification, and data rates approaching 2Mbytes/second can be
achieved. JTAG and EPP connections are shown in the diagrams below.

Power Supplies
VU Unregulated power supply voltage – depends on

power supply used. Must be between 5VDC and
10VDC. Routed to regulators and expansion
connectors only.

VDD33 VCCO/VCC for all devices, routed on PCB plane.

1.5A can be drawn with less than 20mV ripple

(typical)
VDD25 FPGA VCCINT routed on PCB plane
GND System ground routed to all devices on PCB

ground plane
Programming and parallel port
PWE EPP mode write enable signal (in to FPGA)
PD0-

Bi-directional data signals

PD7
PINT Interrupt signal (out from FPGA)
PWT EPP mode wait signal (out from FPGA)
PDS EPP mode data strobe (in to FPGA)
PRS Reset signal (in to FPGA)
PAS EPP mode address strobe (in to FPGA)
On board devices
BTN1 User-controllable pushbutton input
LED1 User-controllable status LED
CLK1 CMOS oscillator connected to GCLK0
Expansion Connectors
E4-E40 E bus signals connecting the E connector to the

FPGA

F4-F14 F bus signals connecting the F connectors to the

FPGA

Table 1. D2XL board signal definitions

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Digilent D2XL Reference Manual Digilent, Inc.

Pin 13 Pin 1

Pin 25

DB25 parallel port connector

Front view

Pin 25

Top view of hole pattern, with

cable attaching from this side

Pin 14

Pin 1

Pin EPP signal EPP Function

1 Write Enable (O) Low for read, High for write
2-9 Data bus (B) Bidirectional data lines
10 Interrupt (I) Interrupt/acknowledge input
11 Wait (I) Bus handshake; low to ack
12 Spare NOT CONNECTED
13 Spare NOT CONNECTED
14 Data Strobe (O) Low when data valid
15 Spare NOT CONNECTED
16 Reset (O) Low to reset
17 Address strobe (O) Low when address valid
18-25 GND System ground

Figure 1. Parallel port connectors and signals

The D2XL board directly supports JTAG and SPROM configuration. Hardware debugger configuration
is supported indirectly. To configure the board from a computer using the JTAG mode, set switch 1
(SW1) in the JTAG position, and attach a power supply and programming cable. The power supply
must be connected before the parallel cable, or the board may hang in a non-communicating state.
The board will be auto-detected by the Xilinx JTAG programming software, and all normal JTAG
operations will be available.

To configure the FPGA from an SPROM, load the programmed SPROM into the 8-pin ROM socket
(labeled IC6), place SW1 in the PORT position, add jumpers to all mode pins, and apply power.

To configure the board using the hardware debugger protocol, a slight board modification is required –
a jumper wire must be soldered to the non-VCC side of R44. Insert wire-wrap posts into the SPROM
socket, attach the hardware debugger signals to the appropriate posts, and attach the PROG signal to
the jumper wire attached to R44. The hardware debugger programming software will now
automatically recognize the board, and hardware debugger programming can proceed as normal.

Programming circuit detail is shown below. Note that all parallel port signals are routed to the test
header J12 for easy connection of test and measurement equipment.

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