Digilent Basys Board User Manual Rev.E

DDiiggiilleenntt BBaassyyss BBooaarrdd

l

RReeffeerreennccee MMaannuuaal

Revision: August 18, 2007 215 E Main Suite D | Pullman, WA 99163

www. d i g i l e n t i n c . c om

[phone] Voice and Fax

Introduction

The Basys board is a circuit design and
implementation platform that anyone can use
to gain experience building real digital circuits.

High Speed

USB2 Port

(JTAG and data transfers)

Data

20

port

Platform

Flash

(config ROM)

JTAG
port

Settable Clock

Source

(25 / 50 / 100 MHz)

Built around a Xilinx Spartan-3E Field
Programmable Gate Array and a Cypress EZ­USB controller, the Basys board provides

Xilinx Spartan3E-100 TQ144

complete, ready-to-use hardware suitable for
hosting circuits ranging from basic logic
devices to complex controllers. A large

232

8 bit

color

4444

collection of on-board I/O devices and all
required FPGA support circuits are included,

JA JB JC JD

so countless designs can be created without
the need for any other components.

Four standard expansion connectors allow
designs to grow beyond the Basys board
using breadboards, user-designed circuit
boards, or Pmods (Pmods are inexpensive
analog and digital I/O modules that offer A/D
& D/A conversion, motor drivers, sensor
inputs, and many other features). Signals on
the 6-pin connectors are protected against
ESD damage and short-circuits, ensuring a

I/O Devices

• 100,000-gate Xilinx Spartan 3E FPGA

• Cypress EZ-USB Hi-speed USB2 port providing board power

and programming/data transfer interface

• Xilinx Platform Flash ROM to store FPGA configurations

• 8 LEDs, 4-digit 7-segment display, 4 buttons, 8 slide switches

• PS/2 port and 8-bit VGA port

• User-settable clock (25/50/100MHz), plus socket for 2nd clock

• Four 6-pin header expansion connectors

• ESD and short-circuit protection on all I/O signals.

Figure 1. Basys board block diagram and features

PS/2

Port

VGA Port

Pmod Connectors

long operating life in any environment. The
Basys board works seamlessly with all
versions of the Xilinx ISE tools, including the free WebPack. It ships with a USB cable that provides
power and a programming interface, so no other power supplies or programming cables are required.

The Basys board can draw power and be programmed via its on-board USB2 port. Digilent’s freely
available PC-based Adept software automatically detects the Basys board, provides a programming
interface for the FPGA and Platform Flash ROM, and allows user data transfers at up to
400Mbytes/sec (see www.digilentinc.com for more information). The Basys board can also be
programmed from within the Xilinx ISE tool environment using a Digilent JTAG3 (or suitable Xilinx
cable) and a separate power supply.

The Basys board is designed to work with the free ISE WebPack CAD software from Xilinx. WebPack
can be used to define circuits using schematics or HDLs, to simulate and synthesize circuits, and to
create programming files. Webpack can be downloaded free of charge from www.xilinx.com/ise/.

The Basys board ships with a built-in self-test stored in its ROM that can be used to test all board
features. To run the test, set the Mode Jumper (see below) to ROM and apply board power. If the test
is erased from the ROM, it can be downloaded and reinstalled at any time. See

www.digilentinc.com/basys for the test project as well as further documentation, reference designs,

and tutorials.

®

Copyright Digilent, Inc. All rights reserved

12 pages Doc: 502-107

Basys Reference Manual

Digilent

www.digilentinc.com

Board Power

The Basys board is typically powered from a USB cable, but a
power jack and battery connector are also provided so that external
supplies can be used. To use USB power, set the power source
switch (SW8) to USB and attach the USB cable. To use an external
wall-plug power supply, set SW8 to EXT and attach a 5VDC to
9VDC supply to the center-positive, 2.1/5.5mm power jack. To use
battery power, set SW8 to EXT and attach a 4V-9V battery pack to
the 2-pin, 100-mil spaced battery connector (four AA cells in series
make a good 6+/- volt supply). Voltages higher than 9V on either
power connector may cause permanent damage. SW8 can also be
used to turn off main power by setting it to the unused power input
(e.g., if USB power is used, setting SW8 to EXT will shut off board
power without unplugging the USB cable).

Figure 2. Basys power circuits

Input power is routed through the power switch (SW8) to the four 6­pin expansion connectors and to a National Semiconductor LP8345 voltage regulator. The LP8345
produces the main 3.3V supply for the board, and it also drives secondary regulators to produce the

2.5V and 1.2V supply voltages required by the FPGA. Total board current is dependant on FPGA
configuration, clock frequency, and external connections. In test circuits with roughly 20K gates
routed, a 50MHz clock source, and all LEDs illuminated, about 100mA of current is drawn from the

1.2V supply, 50mA from the 2.5V supply, and 50mA from the 3.3V supply. Required current will
increase if larger circuits are configured in the FPGA, or if peripheral boards are attached.

The Basys board uses a four layer PCB, with the inner layers dedicated to VCC and GND planes. The
FPGA and the other ICs on the board have large complements of ceramic bypass capacitors placed
as close as possible to each VCC pin, resulting in a very clean, low-noise power supply.

Configuration

After power-on, the FPGA on the Basys board
must be configured before it can perform any

JTAG Header and

Mode jumper

useful functions. During configuration, a “bit” file
is transferred into memory cells within the
FPGA to define the logical functions and circuit
interconnects. The free ISE/WebPack CAD
software from Xilinx can be used to create bit
files from VHDL, Verilog, or schematic-based
source files.

USB Connector

and circuit

FPGA Reset button

and Done LED

Digilent’s PC-based program called Adept can
be used to configure the FPGA with any
suitable bit file stored on the computer. Adept
uses the USB cable to transfer a selected bit

Figure 3. Basys programming circuit locations

file from the PC to the FPGA (via the FPGA’s
JTAG programming port). Adept can also
program a bit file into an on-board non-volatile ROM called “Platform Flash”. Once programmed, the
Platform Flash can automatically transfer a stored bit file to the FPGA at a subsequent power-on or
reset event if the Mode Jumper is set to ROM. The FPGA will remain configured until it is reset by a

Copyright Digilent, Inc. Page 2/12 Doc: 502-107

Basys Reference Manual

Figure 4. Basys Programming Circuits

Digilent

www.digilentinc.com

power-cycle event or by the FPGA reset
button (BTNR) being pressed. The Platform
Flash ROM will retain a bit file until it is

Cypress
EZ-USB

JTAG
header

Mode

Jumper

reprogrammed, regardless of power-cycle
events.

To program the Basys board, attach the USB
cable to the board (if USB power will not be
used, attach a suitable power supply to the
power jack or battery connector on the board,
and set the power switch to VEXT). Start the
Adept software, and wait for the FPGA and
the Platform Flash ROM to be recognized.
Use the browse function to associate the
desired .bit file with the FPGA, and/or the
desired .mcs file with the Platform Flash

USB miniB

connector

XCF02

Platform

Flash

JTAG

Spartan 3E

FPGA

JTAG
port

Slave
serial
port

Vdd

PROG

DONE

(BTNR)

Done
LED
(LD-D)

ROM. Right-click on the device to be
programmed, and select the “program”
function. The configuration file will be sent to the FPGA or Platform Flash, and the software will
indicate whether programming was successful. The “configuration done” LED (LD_D) will also
illuminate after the FPGA has been successfully configured. For further information on using Adept,
please see the Adept documentation available at the Digilent website.

Oscillators

The Basys board includes a primary, user­settable silicon oscillator that produces 25MHz,
50MHz, or 100MHz based on the position of the
clock select jumper at JP4. A socket for a second
oscillator is provided at IC7 (the IC7 socket can
accommodate any 3.3V CMOS oscillator in a
half-size DIP package). The primary and
secondary oscillators are connected to global
clock input pins at pin 54 and pin 53 respectively.

Both clock inputs can drive the clock synthesizer
DLL on the Spartan 3E, allowing for a wide range
if internal frequencies, from 4 times the input
frequency to any integer divisor of the input
frequency.

The primary silicon oscillator is flexible and
inexpensive, but it lacks the frequency stability of
a crystal oscillator. Some circuits that drive a

Figure 5. Basys oscillator circuits

VGA monitor may realize a slight improvement in
image stability by using a crystal oscillator
installed in the IC7 socket. For these applications, a 25MHz (or 50MHz) crystal oscillator, available
from any catalog distributor, is recommended (see for example part number SG-8002JF-PCC at

www.digikey.com ).

FPGA

Reset

Button

Copyright Digilent, Inc. Page 3/12 Doc: 502-107

Basys Reference Manual

Digilent

www.digilentinc.com

User I/O

Four pushbuttons and eight slide switches
are provided for circuit inputs. Pushbutton
inputs are normally low and driven high
only when the pushbutton is pressed.
Slide switches generate constant high or
low inputs depending on position.
Pushbuttons and slide switches all have
series resistors for protection against
short circuits (a short circuit would occur if
an FPGA pin assigned to a pushbutton or
slide switch was inadvertently defined as
an output).

Eight LEDs and a four-digit seven­segment LED display are provided for
circuit outputs. LED anodes are driven
from the FPGA via current-limiting
resistors, so they will illuminate when a
logic ‘1’ is written to the corresponding
FPGA pin. A ninth LED is provided as a
power-indicator LED, and a tenth LED
(LD-D) illuminates any time the FPGA has
been successfully programmed.

Seven-segment display

Each of the four digits of the seven­segment LED display is composed of
seven LED segments arranged in a “figure
8” pattern. Segment LEDs can be

Figure 6. Basys I/O circuits

individually illuminated, so any one of 128
patterns can be displayed on a digit by illuminating certain LED segments and leaving the others dark.
Of these 128 possible patterns, the ten corresponding to the decimal digits are the most useful.

The anodes of the seven LEDs forming each digit are tied together into one common anode circuit
node, but the LED cathodes remain separate. The common anode signals are available as four “digit
enable” input signals to the 4-digit display. The cathodes of similar segments on all four displays are
connected into seven circuit nodes labeled CA through CG (so, for example, the four “D” cathodes
from the four digits are grouped together into a single circuit node called “CD”). These seven cathode
signals are available as inputs to the 4-digit display. This signal connection scheme creates a
multiplexed display, where the cathode signals are common to all digits but they can only illuminate
the segments of the digit whose corresponding anode signal is asserted.

A scanning display controller circuit can be used to show a four-digit number on this display. This
circuit drives the anode signals and corresponding cathode patterns of each digit in a repeating,
continuous succession, at an update rate that is faster than the human eye response. Each digit is

Copyright Digilent, Inc. Page 4/12 Doc: 502-107