Digilent 410-256P User Manual

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Revision: March 26, 2013 Note: This document applies to REV B of the board.
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23
DDR2
128MByte
SPI Flash (x4)
16Mbyte
FMC-HPC
Spartan-6
XC6SLX45T
CSG324C
Basic I/O
LEDs, Btns, Swts
45
6
127
USB-UART
2
Clock 100MHz
Adept USB2
Config & data
6
Overview
The FMC Carrier-S6 circuit board is a digital circuit development platform based on a Xilinx Spartan-6 LX45 FPGA. The large FPGA along with the high-pin count FMC socket, 128MByte DDR2 on-board memory, and compact PCB size make this an ideal FMC Host controller board for embedded processor designs based on Xilinx’s MicroBlaze.
FMC Carrier-S6 is compatible with all Xilinx CAD tools, including ChipScope, EDK, and the free ISE WebPack, so designs can be completed at no extra cost.
The Spartan-6 LX45 is optimized for high­performance logic and offers:
6,822 slices, each containing four 6-
input LUTs and eight flip-flops
2.1Mbits of fast block RAM four clock tiles (eight DCMs & four
PLLs)
58 DSP slices 500MHz+ clock speeds
The FMC Carrier-S6 board includes Digilent's Adept USB2 system, which offers device programming and user-data transfer facilities.
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FMC Carrier-S6 Reference Manual
M0 M1
JTAG Port
USB
Controller
Numonyx SPI
Flash (x4)
16Mbytes
SPI
Port
J2
Adept USB Port
Spartan-6
JP2
Done
Load to enable boot from ROM
FT232HQ
J3
UART Port
Serial Port
2
3V3
Features
Xilinx Spartan-6 LX45 FPGA, 324-pin BGA package 128Mbyte DDR2 with 16-bit wide data on-board USB2 port for programming and data transfer USB-UART 16Mbyte x4 SPI Flash for configuration and data storage 100MHz Oscillator Over 120 GPIO signals available through FMC HPC GPIO includes 2 LEDs, 2 buttons, and 2 slide switches ships with 12V power supply and USB cable
Configuration
After power-on, the FPGA on the FMC Carrier – S6 board must be configured (or programmed) before it can perform any functions. The FPGA can be configured in two ways: a USB­connected PC can configure the board using the JTAG port any time power is on and a configuration file stored in the SPI Flash ROM can be automatically transferred to the FPGA at power-on.
An on-board mode jumper (JP2) selects between JTAG/USB and ROM programming modes. If JP2 is loaded, the FPGA will automatically configure itself from the ROM. If JP2 is not loaded, the FPGA will remain idle after power-on until configured from the JTAG port.
Both Digilent and Xilinx freely distribute software that can be used to program the FPGA and the SPI ROM. Programming files are stored within the FPGA in SRAM-based memory cells. This data defines the FPGA’s logic functions and circuit connections, and it remains valid until it is erased by removing power or asserting the PROG_B input, or until it is overwritten by a new configuration file.
FPGA configuration files transferred via the JTAG port use the .bit or .svf file types. Xilinx’s ISE WebPack and EDK software can create .bit, .svf, .bin, or .mcs files from VHDL, Verilog, or schematic­based source files (EDK is used for MicroBlaze™ embedded processor-based designs).
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FMC Carrier-S6 Reference Manual
FMC Carrier - S6 VADJ Levels
SET_VADJ1
SET_VADJ0
VADJ Voltage
0 0 1.2V
0 1 1.8V
1 0 2.5V
1 1 3.3V
FMC Carrier - S6 Power Supplies
Supply
Circuits
Device
Amps (max)
12V
FMC VCC12V0
IC15: ADP1850
5A
3.3V
FPGA I/O, USB ports, clocks, ROM
IC15: ADP1850
4A
1.8V
FPGA aux, GPIO
IC15: ADP1850
1A
1.23V
FPGA core
IC23: LTC3546
3A
VADJ
1V2, 1V8, 2V5, 3V3
IC23: LTC3413
4.2A
Adept and iMPACT USB Port
The Adept port is compatible with Xilinx's iMPACT programming software if the Digilent Plug-In for Xilinx Tools is installed on the host PC (download it free from the Digilent website’s software section). The plug-in automatically translates iMPACT-generated JTAG commands into formats compatible with the Digilent USB port, providing a seamless programming experience without leaving the Xilinx tool environment. Once the plug-in is installed, the "third party" programming option can be selected from the iMPACT tools menu, and iMPACT will work as if a Xilinx programming cable were being used. All Xilinx tools (iMPACT, ChipScope, EDK, etc.) can work with the plug-in, and they can be used in conjunction with Adept tools.
Adept’s high-speed USB2 system can be used to program the FPGA and ROM and exchange register-based and file-based data with the FPGA. The Adept application, an SDK, and reference materials are freely downloadable from the Digilent website.
Power Supplies
The FMC Carrier - S6 board requires an external 12V, 5A or greater power source with a coax center­positive 2.1mm internal-diameter plug (a suitable supply is provided as a part of the FMC Carrier - S6 kit). Voltage regulator circuits from Analog Devices create the required 3.3V, 1.8V, 1.23V and VADJ supplies from the main 12V supply. The table below provides additional information, typical currents depend strongly on FGPA configuration, and the values provided are typical of medium-size/speed designs).
A power-good LED (LD3), driven by the wired-OR of all the power-good outputs on the supplies, indicates that all supplies are operating within 10% of nominal.
The VADJ rail has to be enabled by logic implemented in the FPGA. To do this, set the SET_VADJ0 and SET_VADJ1 pins to indicate the desired voltage and drive VADJ_EN high. It is important to note that FPGA banks 0 and 1 are unpowered whenever VADJ_EN is low. The table below outlines the different voltages that may be selected:
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