Digilent 410-155P User Manual

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Revision: November 11, 2010

Xilinx Spartan3E-100 CP132

VGA Port

Platform

Flash

(config ROM)

Settable Clock

Source

(25 / 50 / 100 MHz)

Full Speed
USB2 Port

(JTAG and data transfers)

20

JA JB JC JD

JTAG
port

I/O Devices

PS/2

Port

Pmod Connectors

4

4

4

4

8 bit

color

2

32

Data
port

Introduction

The Basys2 board is a circuit design and
implementation platform that anyone can use
to gain experience building real digital circuits.
Built around a Xilinx Spartan-3E Field
Programmable Gate Array and a Atmel
AT90USB2 USB controller, the Basys2 board
provides complete, ready-to-use hardware
suitable for hosting circuits ranging from basic
logic devices to complex controllers. A large
collection of on-board I/O devices and all
required FPGA support circuits are included,
so countless designs can be created without
the need for any other components.

Four standard expansion connectors allow
designs to grow beyond the Basys2 board
using breadboards, user-designed circuit
boards, or Pmods (Pmods are inexpensive
analog and digital I/O modules that offer A/D
& D/A conversion, motor drivers, sensor
inputs, and many other features). Signals on
the 6-pin connectors are protected against
ESD damage and short-circuits, ensuring a
long operating life in any environment. The
Basys2 board works seamlessly with all
versions of the Xilinx ISE tools, including the free WebPack. It ships with a USB cable that provides
power and a programming interface, so no other power supplies or programming cables are required.

The Basys2 board can draw power and be programmed via its on-board USB2 port. Digilent’s freely
available PC-based Adept software automatically detects the Basys2 board, provides a programming
interface for the FPGA and Platform Flash ROM, and allows user data transfers (see

www.digilentinc.com

for more information).

The Basys2 board is designed to work with the free ISE WebPack CAD software from Xilinx.
WebPack can be used to define circuits using schematics or HDLs, to simulate and synthesize
circuits, and to create programming files. Webpack can be downloaded free of charge from

www.xilinx.com/ise/

The Basys2 board ships with a built-in self-test/demo stored in its ROM that can be used to test all

.

board features. To run the test, set the Mode Jumper (see below) to ROM and apply board power. If
the test is erased from the ROM, it can be downloaded and reinstalled at any time. See

www.digilentinc.com/Basys2

for the test project as well as further documentation, reference designs,

and tutorials.

Doc: 502-155 page 1 of 12

Copyright Digilent, Inc. All rights reserved. Other product and company names mentioned may be trademarks of their respective owners.

1300 Henley Court | Pullman, WA 99163

[phone] Voice and Fax

• 100,000-gate Xilinx Spartan 3E FPGA

• Atmel AT90USB2 Full-speed USB2 port providing board pow er

and programming/data transfer interface

• Xilinx Platform Flash ROM to store FPGA configurations

• 8 LEDs, 4-digit 7-segment display, 4 buttons, 8 slide switches

• PS/2 port and 8-bit VGA port

• User-settable clock (25/50/100MHz), plus socket for 2nd clock

• Four 6-pin header expansion connectors

• ESD and short-circuit protection on all I/O signals.

Figure 1. Basys2 board block diagram and features

Basys2 Reference Manual

Digilent

www.digilentinc.com

Board Power
The Basys2 board is typically powered from a USB cable, but a

battery connector is also provided so that external supplies can be
used. To use USB power, simply attach the USB cable. To power
the Basys2 using a battery or other external source, attach a 3.5V-

5.5V battery pack (or other power source) to the 2-pin, 100-mil
spaced battery connector (three AA cells in series make a good

4.5+/- volt supply). Voltages higher than 5.5V on either power
connector may cause permanent damage.

Input power is routed through the power switch (SW8) to the four
6-pin expansion connectors and to a Linear Technology LTC3545
voltage regulator. The LTC3545 produces the main 3.3V supply
for the board, and it also produces 2.5V and 1.2V supply voltages

Figure 2. Basys2 power circuits

required by the FPGA. Total board current is dependent on FPGA
configuration, clock frequency, and external connections. In test circuits with roughly 20K gates
routed, a 50MHz clock source, and all LEDs illuminated, about 100mA of current is drawn from the

1.2V supply, 50mA from the 2.5V supply, and 50mA from the 3.3V supply. Required current will
increase if larger circuits are configured in the FPGA, or if peripheral boards are attached.

The Basys2 board uses a four layer PCB, with the inner layers dedicated to VCC and GND planes.
The FPGA and the other ICs on the board have large complements of ceramic bypass capacitors
placed as close as possible to each VCC pin, resulting in a very clean, low-noise power supply.

Configuration

After power-on, the FPGA on the Basys2 board must be configured before it can perform any useful
functions. During configuration, a “bit” file is transferred into memory cells within the FPGA to define
the logical functions and circuit interconnects. The free ISE/WebPack CAD software from Xilinx can
be used to create bit files from VHDL, Verilog, or schematic-based source files.

Digilent’s PC-based program called Adept can be used to configure the FPGA with any suitable bit file
stored on the computer. Adept uses the USB cable to transfer a selected bit file from the PC to the
FPGA (via the FPGA’s JTAG programming port). Adept can also program a bit file into an on-board
non-volatile ROM called “Platform Flash”. Once programmed, the Platform Flash can automatically
transfer a stored bit file to the FPGA at a subsequent power-on or reset event if the Mode Jumper
(JP3) is set to ROM. The FPGA will remain configured until it is reset by a power-cycle event. The
Platform Flash ROM will retain a bit file until it is reprogrammed, regardless of power-cycle events.

Doc: 502-138 page 2 of 12

Basys2 Reference Manual

Digilent

www.digilentinc.com

Spartan-

3E

FPGA

B

8

CLK_OUT

Linear Tech.

LTC

6905

Oscillator

Frequency
Select
Jumper

25MHz

50MHz

100MHz

Figure 5. Basys2 oscillator circuits

XCF

02

Platform

Flash

JTAG

Spartan 3E

FPGA

Mode

Jumper

PC ROM

USB miniB

connector

Atmel

AT90USB2

Slave
serial
port

JTAG
port

LD8

To program the Basys2 board, set the mode
jumper to PC and attach the USB cable to
the board. Start the Adept software, and
wait for the FPGA and the Platform Flash
ROM to be recognized. Use the browse
function to associate the desired .bit file with
the FPGA, and/or the desired .mcs file with
the Platform Flash ROM. Right-click o n the
device to be programmed, and select the
“program” function. The configuration file
will be sent to the FPGA or Platform Flash,
and the software will indicate whether
programming was successful. The “Status
LED” LED (LD_8) will also blink after the
FPGA has been successfully configured.
For further information on using Adept,
please see the Adept documentation
available at the Digilent website.

Oscillators

The Basys2 board includes a primary, user-settable silicon oscillator that produces 25MHz, 50MHz, or
100MHz based on the position of the clock select jumper at JP4. Initially, this jumper is not loaded
and must be soldered in place. A socket for a second oscillator is provided at IC6 (the IC6 socket can
accommodate any 3.3V CMOS oscillator in a half-size DIP package). The primary and secondary
oscillators are connected to global clock input
pins at pin B8 and pin M6 respectively.

Both clock inputs can drive the clock synthesizer
DLL on the Spartan 3E, allowing for a wide range
if internal frequencies, from 4 times the input
frequency to any integer divisor of the input
frequency.

The primary silicon oscillator is flexible and
inexpensive, but it lacks the frequency stability of
a crystal oscillator. Some circuits that drive a
VGA monitor may realize a slight improvement in
image stability by using a crystal oscillator
installed in the IC6 socket. For these applications,
a 25MHz (or 50MHz) crystal oscillator, available
from any catalog distributor, is recommended
(see for example part number SG-8002JF-PCC at

www.digikey.com

Doc: 502-138 page 3 of 12

).

Figure 4. Basys2 Programming Circuits

Basys2 Reference Manual

Digilent

www.digilentinc.com

3.3V

Push

buttons

Slide

switches

Spartan 3E

FPGA

M4

C11

G12

K3
B4
G3
F3
E2

A7

N3

BTN0

BTN1

BTN2

BTN3

SW0

SW1

SW2

SW3

SW4

SW5

SW6

SW7

3.3V

LD0
LD1
LD2
LD3
LD4
LD5
LD6
LD7

3.3V

LEDs

7seg
Display

AN0

AN1

AN2

AN3

L3

P11

M5

M11

P7
P6
N5
N4
P4

G1

F12

J12

M13

K14

L14
H12
N14
N11
P12

L13

M12

CA
CB
CC
CD
CE
CF
CG
DP

N13

User I/O

Four pushbuttons and eight slide switches
are provided for circuit inputs. Pushbutton
inputs are normally low and driven high
only when the pushbutton is pressed.
Slide switches generate constant high or
low inputs depending on position.
Pushbuttons and slide switches all have
series resistors for protection against
short circuits (a short circuit would occur if
an FPGA pin assigned to a pushbutton or
slide switch was inadvertently defined as
an output).

Eight LEDs and a four-digit seven­segment LED display are provided for
circuit outputs. LED anodes are driven
from the FPGA via current-limiting
resistors, so they will illuminate when a
logic ‘1’ is written to the corresponding
FPGA pin. A ninth LED is provided as a
power-indicator LED, and a tenth LED
(LD-D) illuminates any time the FPGA has
been successfully programmed.

Seven-segment display

Each of the four digits of the seven­segment LED display is composed of
seven LED segments arranged in a “figure
8” pattern. Segment LEDs can be
individually illuminated, so any one of 128 patterns can be displayed on a digit by illuminating certain
LED segments and leaving the others dark. Of these 128 possible patterns, the ten corresponding to
the decimal digits are the most usef ul.

The anodes of the seven LEDs forming each digit are tied together into one common anode circuit
node, but the LED cathodes remain separate. The common anode signals are available as four “digit
enable” input signals to the 4-digit display. The cathodes of similar segments on all four displays are
connected into seven circuit nodes labeled CA through CG (so, for example, the four “D” cathodes
from the four digits are grouped together into a single circuit node called “CD”). These seven cathode
signals are available as inputs to the 4-digit display. This signal connection scheme creates a
multiplexed display, where the cathode signals are common to all digits but they can only illuminate
the segments of the digit whose corresponding anode signal is asserted.

A scanning display controller circuit can be used to show a four-digit number on this display. This
circuit drives the anode signals and corresponding cathode patterns of each digit in a repeating,
continuous succession, at an update rate that is faster than the human eye response. Each digit is
illuminated just one-quarter of the time, but because the eye cannot perceive the darkening of a digit
before it is illuminated again, the digit appears continuously illuminated. If the update or “refresh” rate
is slowed to a given point (around 45 hertz), then most people will begin to see the display flicker.

Doc: 502-138 page 4 of 12

Figure 6. Basys2 I/O circuits