Digi NS9210 User Manual
NS9210 Processor Module
Hardware Reference
90001002_A
August 2008
©2008 Digi International Inc.
All rights reserved.
Digi, Digi International, the Digi logo, a Digi International Company, Digi JumpStart Kit, ConnectCore,
NET+, NET+OS and NET+Works are trademarks or registered trademarks of Digi International, Inc. in the
United States and other countries worldwide. All other trademarks are the property of their respective
owners.
Contents
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . .
Customer support .............................................................................. 7
Chapter 1: About the Module .............................. 9
Features and functionality ............................................................10
Module variant ................................................................................10
Module pinout ..........................................................................10
Pinout legend: Type ..........................................................................11
X1 pinout .......................................................................................11
X2 pinout .......................................................................................15
Configuration pins — CPU .............................................................23
Default module CPU configuration .........................................................23
Configuration pins — Module .........................................................24
Identification of the module ................................................................24
Module pin configuration ....................................................................24
Clock generation ........ ........ ....... ....... ........ ....... ........ ....... ....... ....25
Clock frequencies .............................................................................25
Changing the CPU speed .....................................................................26
Boot process ............................................................................26
Chip selects .............................................................................27
Chip select memory map ....................................................................27
SDRAM banks ............................................................................27
Multiplexed GPIO pins .................................................................27
GPIO multiplex table ...... ........ ....... ....... ........ ....... ........ ....... ...............28
External interrupts ............................................................................32
Interfaces ................................................................................ 33
10/100 Mbps Ethernet port ..................................................................33
UART ............................................................................................33
SPI ...............................................................................................33
I2C bus ..........................................................................................34
RTC ..............................................................................................34
Power ....................................................................................34
Power supply ...................................................................................34
Internal voltage ...............................................................................34
Chapter 2: About the Development Board ............... 35
What’s on the development board? ........................................................35
The development board ......................................................................37
User interface ..........................................................................38
Switches and pushbuttons ............................................................39
Reset control, S3 ..............................................................................39
Power switch, S2 ..............................................................................39
User pushbuttons, S6 and S7 ................................................................40
Legend for multi-pin switches ..............................................................40
Module configuration switches, S4 .........................................................40
Wake-up button, S8 ...........................................................................40
Serial Port B MEI configuration switches, S1 ..............................................41
Jumpers .......................................................................... ........42
Jumper functions ..............................................................................43
Battery and Battery Holder ...........................................................43
4 NS9210 Processor Module Hardware Reference
LEDs ................................................................................... ... 4 4
WLAN LED LE7 ................................................................................. 44
Power LEDs, LE3 and LE4 .................................................................... 44
User LEDs, LE5 and LE6 ...................................................................... 44
Serial status LEDs ............................................................................. 45
Status LEDs Serial Port D LEDs .............................................................. 45
Status LEDs Serial Port B LEDs .............................................................. 45
Serial UART ports ...................................................................... 46
Serial port D, RS232 .......................................................................... 46
Serial port A TTL interface ................................................................. 47
Serial port C TTL interface ................................................................. 48
. . . . .
Serial port B, MEI interface ................................................................. 49
I2C interface ........................................................................... 50
2
I
C header ..................................................................................... 50
I2C digital I/O expansion .................................................................... 50
SPI interface ............................................................................ 52
Pin allocation ................................................................................. 53
Current Measurement Option ........................................................ 54
How the CMO works .......................................................................... 55
JTAG interface ......................................................................... 55
Standard JTAG ARM connector, X13 ....................................................... 56
PoE module connectors - IEEE802.3af .............................................. 56
The PoE module .............................................................................. 57
X9 ............................................................................................... 58
X26 .................................................................................... .......... 58
POE_GND ....................................................................................... 58
www.digiembedded.com 5
Power Jack, X24 ...............................................................................58
Ethernet interface .....................................................................58
RJ-45 pin allocation, X19 ....................................................................59
LEDs .............................................................................................60
Peripheral (expansion) headers ......................................................60
Peripheral application header, X33 ........................................................61
Module and test connectors ..........................................................62
Module connectors ............................................................................62
Test connectors ...............................................................................62
X10 pinout ......................................................................................63
X11 pinout ......................................................................................63
X20 pinout ......................................................................................64
X21 pinout ......................................................................................65
Appendix A:Specifications .......................................................... ....... 67
Environmental specifications .........................................................67
Mechanical specifications .............................................................67
Safety statements ....................................................... ....... ........67
Power requirements ...................................................................68
Typical module current / power measurements ..................................69
Typical power save module / JumpStart board current / power consumption measurements 69
Module, top view ..............................................................................70
Module, side view .............................................................................70
Layout recommendation ..............................................................71
Reset and edge sensitive input timing requirements .............................73
Appendix B:Certifications ................................................................. 75
FCC Part 15 Class B ....................................................................75
6 NS9210 Processor Module Hardware Reference
This guide provides information about the Digi NS9210 Processor Module embedded
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
core module.
. . . . .
Conventions used
in this guide
This table describes the typographic conventions used in this guide:
This convention Is used for
italic type Emphasis, new terms, variables, and document titles.
monospaced type Filenames, pathnames, and code examples.
Digi information
Related
documentation
Documentation
updates
Customer support To get help with a question or technical problem with this product, or to make
For additional documentation, see the Documentation folder under the Digi
JumpStart kit Start menu tab.
Be aware that if you see differences between the documentation you received in
your package and the documentation on the web site, the web site content is the
latest version.
comments and recommendations about our products or documentation, u se the
following contact information:
To contact Digi International by Use
United States telephone: 1 877 912 3444
International telephone: 1 952 912 3444
Address: Digi International
11001 Bren Road East
Minnetonka, MN 55343 U.S.A
Web site: www.digiembedded.com
www.digiembedded.com 7
8 ConnectCore 9P 9215 Hardware Reference
About the Module
CHAPTER 1
The NS9210 Processor Module is part of the ConnectCore embedded core
processor module family. Built on leading Digi technology, the network-enabled
ConnectCore 9P family provides a modular and scalable core processor solution that
significantly minimizes hardware and software design risk. This module combines
superior performance and a complete set of integrated peripherals and component
connectivity options in a compact and versatile form factor.
The NS9210 Processor Module is built around the NS9215 processor with a powerful
ARM926EJ-S core. For further information about the NS9215, see the NS9215
Hardware Reference available through your Digi JumpStart Kit. The embedded
module offers 8MB SDRAM and can support a maximum of 64MB SDRAM. The module
has also 4MB NOR flash and can support up to a maximum of 16MB NOR flash, a
single high speed serial peripheral interface (SPI) module, an I2C interface, UARTs,
programmable flexible interface modules (FIMs), ADC, 16-bit data/17-bit address
bus (buffered), and 64 shared GPIO signals for application-specific usage.
9
Chapter 1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Features and functionality
32-bit NET+ARM (ARM926EJ-S) RISC processor NS9215 @ 150MHz
ARM9 core with memory management unit (MMU)
4K data cache/4K instruction cache
8MB SDRAM (can support a maximum of 64MB SDRAM)
4MB NOR Flash (can support a maximum of 16MB NOR flash)
10 general purpose timers; NS9210 Processor Module supports 7 as
timer/counters and one quadrature decoder
64 GPIOs signals with up to five different multiplexing schemes (all are on
connector X2)
Two 80-pin connectors
Up to four UARTs
One SPI channel, multiplexed on different plac es
Integrated 10/100Mbps Ethernet MAC/PHY
2
I
C interface
JTAG signals available on module connector
8 ADC (analog to digital converter) inputs
2x flexible interface modules (FIMs) running at max. 300 MHz, integrated in
NS9215 processor
2 LEDs (LE1: green, and LE2:orange) available on module
16-bit data and 17-bit address buses, both are buffered
Single +3.3V power supply
Module variant The NS9210 Processor Module is currently available in standard variants below.
Product numbers: Features
CC-9P-V502-C 150 MHz CPU speed, 8MB SDRAM, 4 MB NOR flash, RTC, 10/100 Mbps
Ethernet
CC-9P-V501-C 150 MHz CPU speed, 8MB SDRAM, 2MB NOR flash, RTC, 10/100 Mbps
Ethernet
29
Module pinout
The module has two 80 pins connectors, X1 and X2. The next tables describe each
pin, its properties, and its use on the development board.
10 NS9210 Processor Module Hardware Reference
Pinout legend:
Type
X1 pinout
. . . . .
I Input
O Output
I/O Input or output
PPower
X1 pin
number
1 P GND GND
2 P GND GND
3 I RSTIN# RSTIN# 10k pull-up on module
4 O PWRGOOD PWRGOOD Output of the reset controller
5 O RSTOUT# RSTOUT# Output of logical AND function
6 I TCK TCK JTAG - 10k pull-up on module
7 I TMS TMS JTAG - 10k pull-up on module
8 I TDI TDI JTAG - 10k pull-up on module
9 O TDO TDO JTAG - 10k pull-up on module
10 I TRST# TRST# JTAG - 2k2 pull-up on module
11 O RTCK RTCK JTAG - Optional
Type Module functionality Usage on
Development board
Comments
push pull with 470R current
limiting resistor
between NS9215 RESET_DONE
and NS9215 RESET_OUT#
12 I CONF2/OCD_EN# CONF2/OCD_EN# 10k pull-up on module
13 I LITTLE# / BIG
ENDIAN
14 I Reserved
(WLAN_DISABLE#)
15 I SOFT_CONF0 SOFT_CONF0 2k2 series resistor on module
16 I SOFT_CONF1 SOFT_CONF1 2k2 series resistor on module
17 I SOFT_CONF2 SOFT_CONF2 2k2 series resistor on module
18 I SOFT_CONF3 SOFT_CONF3 2k2 series resistor on module
19 O Reserved
(WLAN_LED#)
www.digiembedded.com 11
LITTLE# / BIG
ENDIAN
Reserved
(WLAN_DISABLE#)
Reserved
(WLAN_LED#)
2k2 series resistor on module
Low active WLAN Disable
signal
Active low signal coming from
Piper chip. This signal comes
directly from the Piper chip
without series resistor.
Chapter 1
X1 pin
number
Type Module functionality Usa ge on
Development board
Comments
20 P GND GND
21 I/O D0 D0 Buffered Data - only active when
either CS0# or CS2# is active
NS9215 D[31:16]
22 I/O D1 D1
23 I/O D2 D2
24 I/O D3 D3
25 I/O D4 D4
26 I/O D5 D5
27 I/O D6 D6
28 I/O D7 D7
29 I/O D8 D8
30 I/O D9 D9
31 I/O D10 D10
32 I/O D11 D11
33 I/O D12 D12
34 I/O D13 D13
35 I/O D14 D14
36 I/O D15 D15
37 P GND GND
38 O AO AO Buffered Address always active
39 O A1 A1
40 O A2 A2
41 O A3 A3
42 O A4 A4
43 O A5 A5
44 O A6 A6
45 O A7 A7
46 O A8 A8
47 O A9 A9
48 O A10 A10
49 O A11 A11
50 O A12 A12
12 NS9210 Processor Module Hardware Reference
. . . . .
X1 pin
number
51 O A13 A13
52 O A14 A14
53 O A15 A15
54 O A16 A16
55 O GND GND
56 O EXT_OE# EXT_OE#
57 O EXT_WE# EXT_WE#
58 O CSO# CSO#
59 O CS2# CS2#
60 O BLE# BLE# NS9215 BE2#
61 O BHE# BHE# NS9215 BE3#
62 I EXT_WAIT# EXT_WAIT# 10k pull-up on module
63 O BCLK BCLK Connected over a 22R resistor to
64 P GND GND
Type Module functionality Usage on
Development board
Comments
NS9215 CLK_OUT1 pin
65 I ETH_TPIN ETH_TPIN
66 O ETH_ACTIVITY# ETH_ACTIVITY# Low active signal with 330R
resistor on module
67 I ETH_TPIP ETH_TPIP
68 O ETH_LINK# ETH_LINK Low active signal with 330R
resistor on module
69 O ETH_TPON ETH_TPON
70 O ETH_TROP ETH_TROP
71 P GND GND
72 P Reserved (USB_VBUS) Reserved (USB_VBUS)
73 I Reserved (USB_OC#) Reserved (USB_OC#)
74 I/O Reserved (USB_P) Reserved (USB_P)
75 I/O Reserved (USB_N) Reserved (USB_N)
76 O Reserved
(USB_PWREN#)
77 I Reserved
(USB_OTG_ID)
Reserved
(USB_PWREN#)
Reserved
(USB_OTG_ID)
www.digiembedded.com 13
Chapter 1
X1 pin
number
Type Module functionality Usa ge on
Development board
Comments
78 P VRTC VRTC Backup Battery for RTC, for 3V
cell.
Can be left floating, if RTC
backup not needed.
79 P VLIO VLIO Mobile: Power from Li-Ion
Battery (2.5V-5.5V)
Non-Mobile: connected to 3.3V
80 P GND GND
14 NS9210 Processor Module Hardware Reference
X2 pinout
. . . . .
X2 pin
number
1 P GND
2 P GND
3 I/O DCDA#/
4I/OCTSA#/
5I/ODSRA#/
6 I/O RXDA/
Type Module functionality Usage on
DMA0_DONE/
PIC_0_GEN_IO[0]
GPIO0/
SPI_EN (dup)
EIRQ0/
PIC_0_GEN_IO[1]
GPIO1/
-reserved-
EIRQ1/
PIC_0_GEN_IO[2]
GPIO2/
-reserved-
DMA0_PDEN/
PIC_0_GEN_IO[3]
GPIO3/
SPI_RX (dup)
Comments
Development board
7I/ORIA#/
EIRQ2/
Timer6_in/
GPIO4
SPI_CLK (dup)/
8 I/O RTSA#/ RS485CTLA
EIRQ3/
Timer6_Out/
GPIO5/
SPI_CLK (dup)/
9 I/O DTRA#/ TXCLKA
DMA0_REQ/
Timer7_In/
GPIO6/
PIC_DBG_DATA_OUT
www.digiembedded.com 15
Chapter 1
X2 pin
number
Type Module functionality Usage on
10 I/O TXDA/
Timer8_In/
Timer7_Out/
GPIO7/
SPI_TX (dup)
11 I/O DCDC#/
DMA1_DONE/
Timer8_Out/
GPIO8/
SPIB_EN (dup)/
12 I/O CTSC#/
I2C_SCK/
EIRQ0 (dup)/
GPIO9/
PIC_DBG_DATA_IN
13 I/O DSRC#/
QDCI/
EIRQ1 (dup)
GPIO10/
PIC_DBG_CLK
Comments
Development board
14 I/O RXDC/
DMA1_DP/
EIRQ2 (dup)/
GPIO11/
SPI_RXboot
15 I/O RIC#/ RXCLKC
I2C_SDA/
RST_DONE/
GPIO12/
SPI_CLK (dup)
16 I/O RTSC#/
QDCQ/
Ext Timer Event Out Ch 9/
GPIO13/
SPI_CLKboot
17 I/O DTRC#/ TXCLKC
DMA1_REQ/
PIC_0_CAN_RXD
GPIO14/
SPI_TXDboot
When booting, NS9215 RIC#
signal is default configured as
Output, RST_DONE. To avoid
input/output conflicts, put a series
resistor on this signal if
necessary.
16 NS9210 Processor Module Hardware Reference
. . . . .
X2 pin
number
18 I/O TXDC/
19 I/O DCDB# (dup)/
20 I/O CTSB# (dup)/
21 I/O DSRB# (dup)/
22 I/O RXDB (dup)/
Type Module functionality Usage on
Timer9_In/
PIC_0_CAN_TXD
GPIO15/
SPI_ENboot
PIC_0_BUS_1[8]
PIC_1_BUS_1[8]
GPIO51/
PIC_0_BUS_1[9]
PIC_1_BUS_1[9]
GPIO52/
PIC_0_BUS_1[10]
PIC_1_BUS_1[10]
GPIO53/
PIC_0_BUS_1[11]
PIC_1_BUS_1[11]
GPIO54/
Comments
Development board
23 I/O RIB# (dup)/
PIC_0_BUS_1[12]
PIC_1_BUS_1[12]
GPIO55/
24 I/O RTSB# (dup) / RS485CTLB (dup) /
PIC_0_BUS_1[13]
PIC_1_BUS_1[13]
GPIO56/
25 I/O TXCLKB (dup)/ DTRB# (dup) /
PIC_0_BUS_1[14]
PIC_1_BUS_1[14]
GPIO57/
26 I/O TXDB (dup)/
PIC_0_BUS_1[15]
PIC_1_BUS_1[15]
GPIO58/
www.digiembedded.com 17
Chapter 1
X2 pin
number
Type Module functionality Usage on
27 I/O DCDD# (dup) /
PIC_0_BUS_1[16]
PIC_1_BUS_1[16]
GPIO59/
28 I/O CTSD# (dup)/
PIC_0_BUS_1[17]
PIC_1_BUS_1[17]
GPIO60/
29 I/O DSRD# (dup)/
PIC_0_BUS_1[18]
PIC_1_BUS_1[18]
GPIO61/
30 I/O RXDD (dup)/
PIC_0_BUS_1[19]
PIC_1_BUS_1[19]
GPIO62/
31 I/O RID# (dup)/
PIC_0_BUS_1[20]
PIC_1_BUS_1[20]
GPIO63/
Comments
Development board
32 I/O RTSD# (dup) / RS485CTLD(dup) /
PIC_0_BUS_1[21]
PIC_1_BUS_1[21]
GPIO64/
33 I/O TXCLKD (dup) / DTRD# (dup) /
PIC_0_BUS_1[22]
PIC_1_BUS_1[22]
GPIO65
34 I/O TXDD (dup) /
PIC_0_BUS_1[23]
PIC_1_BUS_1[23]
GPIO66
35 I/O PIC_0_CLK[I]
PIC_0_CLK[0]
EIRQ3 (dup)/
GPIO67
36 I/O PIC_0_GEN_IO[0]
PIC_1_GEN_IO[0]
PIC_1_CAN_RXD
GPIO68
18 NS9210 Processor Module Hardware Reference
. . . . .
X2 pin
number
37 I/O PIC_0_GEN_IO[1]
38 I/O PIC_0_GEN_IO[2]
39 I/O PIC_0_GEN_IO[3]
40 I/O PIC_0_GEN_IO[4]
41 I/O PIC_0_GEN_IO[5]
Type Module functionality Usage on
PIC_1_GEN_IO[1]
PIC_1_CAN_TXD
GPIO69
PIC_1_GEN_IO[2]
PWM0/
GPIO70
PIC_1_GEN_IO[3]
PWM1/
GPIO71
PIC_1_GEN_IO[4]
PWM2/
GPIO72
PIC_1_GEN_IO[5]
PWM3/
GPIO73
Comments
Development board
42 I/O PIC_0_GEN_IO[6]
PIC_1_GEN_IO[6]
Timer0_In/
GPIO74
43 I/O PIC_0_GEN_IO[7]
PIC_1_GEN_IO[7]
Timer1_In/
GPIO75
44 I/O PIC_0_CTL_IO[0]
PIC_1_CTL_IO[0]
Timer2_In/
GPIO76
45 I/O PIC_0_CTL_IO[1]
PIC_1_CTL_IO[1]
Timer3_In/
GPIO77
46 I/O PIC_0_CTL_IO[2]
PIC_1_CTL_IO[2]
Timer4_In/
GPIO78
www.digiembedded.com 19
Chapter 1
X2 pin
number
Type Module functionality Usage on
47 I/O PIC_0_CTL_IO[3]
PIC_1_CTL_IO[3]
Timer5_In/
GPIO79
48 I/O PIC_0_BUS_0[0]
PIC_1_BUS_0[0]
Timer6_In (dup)/
GPIO80
49 I/O PIC_0_BUS_0[1]
PIC_1_BUS_0[1]
Timer7_In (dup)/
GPIO81
50 I/O PIC_0_BUS_0[2]
PIC_1_BUS_0[2]
Timer8_In (dup)/
GPIO82
51 I/O PIC_0_BUS_0[3]
PIC_1_BUS_0[3]
Timer9_In (dup)/
GPIO83
Comments
Development board
52 I/O PIC_0_BUS_0[4]
PIC_1_BUS_0[4]
Timer0_Out/
GPIO84
53 I/O PIC_0_BUS_0[5]
PIC_1_BUS_0[5]
Timer1_Out/
GPIO85
54 I/O PIC_0_BUS_0[6]
PIC_1_BUS_0[6]
Timer2_Out/
GPIO86
55 I/O PIC_0_BUS_0[7]
PIC_1_BUS_0[7]
Timer3_Out/
GPIO87
56 I/O PIC_0_BUS_0[13]/
PIC_1_BUS_0[13]/
Timer9_Out (dup)/
GPIO93
20 NS9210 Processor Module Hardware Reference
. . . . .
X2 pin
number
57 I/O PIC_0_BUS_0[14]/
58 I/O PIC_0_BUS_0[15]/
59 I/O PIC_0_BUS_1[0]/
60 I/O PIC_0_BUS_1[1]/
61 I/O PIC_0_BUS_1[2]/
Type Module functionality Usage on
PIC_1_BUS_0[14]/
QDCI (dup)/
GPIO94
PIC_1_BUS_0[15]/
QDCQ (dup)/
GPIO95
PIC_1_BUS_1[0]/
PIC_0_CAN_RXD
GPIO96
PIC_1_BUS_1[1]/
PIC_0_CAN_TXD
GPIO97
PIC_1_BUS_1[2]/
PIC_1_CAN_RXD
GPIO98
Comments
Development board
62 I/O PIC_0_BUS_1[3]/
PIC_1_BUS_1[3]/
PIC_1_CAN_TXD
GPIO99
63 I/O PIC_0_BUS_1[4]/
PIC_1_BUS_1[4]/
PWM4/
GPIO100
64 I/O PIC_0_BUS_1[5]/
PIC_1_BUS_1[5]/
EIRQ3/
GPIO101
65 I/O PIC_0_BUS_1[6]/
PIC_1_BUS_1[6]/
I2C_SCL (dup)/
GPIO102
66 I/O PIC_0_BUS_1[7]/
PIC_1_BUS_1[7]/
I2C_SDA (dup)/
GPIO103
4k7 pull-up on module
4k7 pull-up on module
www.digiembedded.com 21
Chapter 1
X2 pin
number
Type Module functionality Usage on
Development board
Comments
67 I VIN0_ADC
68 I VIN1_ADC
69 I VIN2_ADC
70 I VIN3_ADC
71 I VIN4_ADC
72 I VIN5_ADC
73 I VIN6_ADC
74 I VIN7_ADC
75 P VSS_ADC Connected on module to AGND
through 0
Ω resistor
76 P VREF_ADC 100nF decoupling capacitor
between VREF_ADC and
VSS_ADC
77 P 3.3V
78 P 3.3V
79 P GND
80 P GND
22 NS9210 Processor Module Hardware Reference
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Configuration pins — CPU
None of the 64 GPIO pins on connector X2 disturb CPU boot strap functions. The
boot strap functions are controlled by address signals; the user can not disturb boot
strap functions from outside, if the module configuration signals, described below,
are correctly configured.
. . . . .
Default module
CPU
configuration
The user has access to six configuration signals:
LITTLE#/BIG_ ENDIAN which allows the user to select the endianess of the
module
OCD_EN# which allows the user to activate on-chip debugging
SW_CONF [3:0] which are reserved for the user; the user software can read out
these signals through the GEN ID register
(@ 0xA090_0210).
www.digiembedded.com 23
Chapter 1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Configuration pins — Module
The NS9210 Processor Module supports the following JTAG signals: TCK, TMS, TDI,
TDO, TRST#, and RTCK. Selection can be made between ARM debug mode and
boundary scan mode with the signal OCD_EN#.
Identification of
the module
Module pin
configuration
In order to make it easier for software to recognize a module and especially a
hardware variant of the module, a specific bit field made of 4-bits has been
reserved on the module. This bit field can be read out through GEN ID register and
correspond to A[12:9]. These configuration signals use the internal CPU pull-up
resistor and can be pulled down through external population option 2k2 resistors.
In the same way, 3 bits have been available on the module to identify the SDRAM
configuration scheme. This bits correspond to A[19:17]. It is impossible for the user
to disturb either the variant specific or SDRAM configuration specific bits from
outside.
The NS9210 Processor Module has also available 4-bit for platform identification. This
bit field can be read out through GEN ID register and correspond to A[16:13].
Configuration of these signals is done through the SW_CONF pins. SW_CONF0 is
connected to A13 through a 2k2 series resistor, and so on for the further SW_CONF
pins. So this bit can be set high by leaving the corresponding SW_CONF pin
unconnected and set low by connecting the correspon ding SW_CONF pin directl y low.
The user can benefit from these pins to support application or platform specific
software configurations.
Signal name Function PU/PD Comment
LITTLE#/BIG_
ENDIAN
OCD_EN# JTAG / Boundary scan function
SW_CONF0 User-defined software
24 NS9210 Processor Module Hardware Reference
Set module endianess. 0 module
boots in little endian mode. 1
module boots in big endian mode.
select
0 ARM debug mode,
1 Boundary scan mode,
configuration pin; can be read in
GEN_ID register bit 4, default
high
BISTEN# set to high
BISTEN# set to low
PU Signal LITTLE#/BIG_ENDIAN
is connected to GPIO_A3/A27
through a 2k2 series resistor.
PU 10K
Connected to A13 through a 2k2
series resistor.
Read bit 4 of GEN ID register (@
0xA0900210).
Loading...