Diamond Power Products MM-48-AT User Manual
250
DIAMOND-MM-48-AT
Autocalibrating 16-bit Analog I/O PC/104 Module
With Relays and Optocouplers
User Manual V1.01
Copyright 2004
Diamond Systems Corporation
8430-D Central Ave.
Newark, CA 94560
Tel (510) 456-7800
www.diamondsystems.com
TABLE OF CONTENTS
DESCRIPTION.......................................................................................................................... 3
1.
2. DIAMOND-MM-48-AT BOARD DRAWING .............................................................................4
3. I/O HEADER PINOUT AND PIN DESCRIPTION..................................................................... 5
4. BOARD CONFIGURATION .....................................................................................................7
5. I/O MAP ....................................................................................................................................9
6. REGISTER DEFINITIONS......................................................................................................11
7. ANALOG INPUT RANGES AND RESOLUTION ..................................................................27
8. PERFORMING AN A/D CONVERSION.................................................................................28
9. A/D SCAN, FIFO, AND INTERRUPT OPERATION ..............................................................31
10. ANALOG OUTPUT OVERVIEW ............................................................................................ 34
11. GENERATING AN ANALOG OUTPUT ................................................................................. 35
12. AUTOCALIBRATION OPERATION ......................................................................................36
13. DIGITAL I/O OPERATION .....................................................................................................37
14. OPTOCOUPLER OPERATION.............................................................................................. 38
15. RELAY OPERATION .............................................................................................................40
16. COUNTER/TIMER OPERATION............................................................................................41
17. SPECIFICATIONS..................................................................................................................44
Diamond-MM-48-AT User Manual V1.01 Page 2
DIAMOND-MM-48-AT Autocalibrating Analog I/O PC/104 Module
1. DESCRIPTION
Diamond-MM-48-AT (DMM-48-AT) is a PC/104 expansion board offering embedded systems
designers a full feature set of analog and digital I/O capabilities. It is designed to be used in
any PC-compatible embedded computer with a PC/104 (ISA-bus) expansion connector.
DMM-48-AT offers reduced embedded system size and weight, as well as lower cost, by
providing more functionality on one board than other data acquisition boards.
Key features include:
Analog Inputs
♦ 16 single-ended analog inputs
♦ 16-bit A/D resolution
♦ 200KHz maximum aggregate A/D sampling rate
♦ +/-10V and +/-5V input ranges standard; 0-5V input range optional
♦ 2048-sample FIFO for reliable high-speed sampling
♦ Autocalibrated input circuit
Analog Outputs
♦ 8 analog outputs
♦ 12-bit D/A resolution, 0-4.096V output range (1mV per LSB)
♦ Autocalibrated output circuit
Digital I/O
♦ 4 programmable direction digital I/O lines
♦ Edge detection capability with interrupt on change of state
Optocoupler Inputs
♦ 4 optocoupler inputs, 3-28VDC input range
♦ Configurable input polarity
♦ Edge detection capability with interrupt on change of state
Relay Outputs
♦ 8 SPDT (form C) relays
♦ 1A / 30VDC or 0.125A / 125VAC rating
Counter/Timers
♦ 1 24-bit counter/timer for A/D sampling rate control
♦ 1 16-bit counter/timer for user counting and timing functions
♦ Programmable clock source for user counter/timer
System Features
♦ +5V-only operation
♦ Latching I/O connectors
♦ Jumpers may be replaced with zero-ohm resistors for increased ruggedness
o
♦ Extended temperature operation (-40 to +85
C)
Diamond-MM-48-AT User Manual V1.01 Page 3
2. DIAMOND-MM-48-AT BOARD DRAWING
Feature descriptions
J1 PC/104 8-bit bus connector
J2 PC/104 16-bit bus connector
J3 Analog and digital I/O connector
J4 Relay and optocoupler I/O connector
J6 Configuration jumper block
J7 Factory use only (used in factory calibration process)
J10 +/-5 input range selection (bipolar model only)
Diamond-MM-48-AT User Manual V1.01 Page 4
3. I/O HEADER PINOUT AND PIN DESCRIPTION
Diamond-MM-48-AT provides two I/O headers. J3, located on the right side of the board, is a
40-pin header that includes the analog in, analog out, and logic-level digital I/O features. Pin
1 is the upper left pin and is marked on the board. J4, located on the left side of the baord, is
a 34-pin header with the relay and optocoupler features.
J3: Analog and Digital I/O
Vin 0 1 2 Vin 1
Vin 2 3 4 Vin 3
Vin 4 5 6 Vin 5
Vin 6 7 8 Vin 7
Vin 8 9 10 Vin 9
Vin 10 11 12 Vin 11
Vin 12 13 14 Vin 13
Vin 14 15 16 Vin 15
A/D Gnd 17 18 A/D Gnd
Vout 0 19 20 Vout 1
Vout 2 21 22 Vout 3
Vout 4 23 24 Vout 5
Vout 6 25 26 Vout 7
D/A Gnd 27 28 Dgnd
Extclk 29 30 Gate 0
Out 0 31 32 Clk 1
Gate 1 33 34 Out 1
DIO 0 35 36 DIO 1
DIO 2 37 38 DIO 3
+5V 39 40 Dgnd
Signal Name Definition
Vin 0-15 Analog input channels 0 to 15; all inputs are single-ended
Vout 0-7 Analog output channels 0 – 7
DIO 0-3 Digital I/O port, TTL / CMOS compatible; programmable direction
Extclk External A/D trigger input
Gate 0 Counter 0 gate input
Out 0 Counter 0 output
Clk 1 Counter 1 clock input
Gate 1 Counter 1 gate input
Out 1 Counter 1 output
+5V Connected to PC/104 bus power supply
A/D Gnd Analog ground for analog inputs
D/A Gnd Analog ground for analog outputs
Dgnd Digital ground
Note: all grounds are electrically connected. The different pins are
intended to reduce noise by separating the current paths on the
board.
Diamond-MM-48-AT User Manual V1.01 Page 5
J4: Relays and Optocouplers
Opto 0- 1 2 Opto 0+
Opto 1- 3 4 Opto 1+
Opto 2- 5 6 Opto 2+
Opto 3- 7 8 Opto 3+
No connection 9 10 No connection
Relay 0 NO 11 12 Relay 0 NC
Relay 0 C 13 14 Relay 1 NO
Relay 1 NC 15 16 Relay 1 C
Relay 2 NO 17 18 Relay 2 NC
Relay 2 C 19 20 Relay 3 NO
Relay 3 NC 21 22 Relay 3 C
Relay 4 NO 23 24 Relay 4 NC
Relay 4 C 25 26 Relay 5 NO
Relay 5 NC 27 28 Relay 5 C
Relay 6 NO 29 30 Relay 6 NC
Relay 6 C 31 32 Relay 7 NO
Relay 7 NC 33 34 Relay 7 C
Signal Name Definition
Relay output contacts:
Relay N C (N = 0 to 7) Relay output common contact; this contact is always
used with relay output connections.
Relay N NC Relay output normally connected contact; this contact is connected
to the Out N C contact when power is off or when a 0 is written to the
relay’s control bit in the relay control register, and it is disconnected
when power is on and a 1 is written to the relay’s control bit.
Relay N NO Relay output normally open contact; this contact is disconnected
when power is off or when a 0 is written to the relay’s control bit in
the relay control register, and it is connected to the Out N C contact
when power is on and a 1 is written to the relay’s control bit.
Optoisolated input contacts:
Opto N + (N = 0 to 3) Optoisolated input contact, high side
Opto N - Optoisolated input contact, low side; opto inputs are polarized
Diamond-MM-48-AT User Manual V1.01 Page 6
4. BOARD CONFIGURATION
Refer to the Drawing of Diamond-MM-48-AT on page 4 for locations of the configuration
items mentioned here. All configuration except the A/D input range is done with jumper block
J6.
4.1 Base Address
Each board in your system must have a unique I/O address range. The first address in this
range is called the base address. Diamond-MM-48-AT uses an I/O range of 16 bytes. The
base address of this range is set with a portion of jumper block J6, located along the lower
portion of the board near the PC/104 bus connectors. Each of the six jumper locations
marked 10, 9, 8, 7, 6, 5 corresponds to the same-numbered address bit in the board’s 10-bit
I/O address. Bits 4-0 are always 0 for the base address, resulting in a 16-byte I/O address
block located on a 32-byte boundary. A jumper out is equal to a 1, and a jumper in is equal to
a 0. Although any address is selectable, certain locations are reserved or may cause conflicts
with other system resources. The table below lists recommended base address settings for
Diamond-MM-48-AT. The default setting is 300 Hex.
Base Address Jumper Position
Hex Decimal 10 9 8 7 6 5
200 512 In Out In In In In
240 512 In Out In In Out In
280 512 In Out In Out In In
2C0 512 In Out In Out Out In
300 768 (Default) In Out Out In In In
340 832 In Out Out In Out In
380 896 In Out Out Out In In
3C0 960 In Out Out Out Out In
4.2 Interrupt Level Selection
In addition to the base address described above, J6 is used to configure hardware interrupt
activity. Interrupts are used for several functions. They can be used to transfer A/D data from
the board to memory at a rate higher than can be achieved through software sampling. In
addition, they can be used to indicate to the application software when a change of state has
occurred on the optocoupler or digital inputs.
During interrupt operation, the board will periodically generate an interrupt request, or IRQ.
The processor will respond and run a user-supplied interrupt routine function, or the function
supplied with the board’s driver software. The interrupt routine reads the data from the board
and makes it available to the user application program.
DMM-48-AT allows you to select from levels 15, 14, 12, 11, 10, 9, 7, 6, 5, 4, and 3. Only one
IRQ level may be used. To select the desired IRQ level install a jumper in that number’s
location in the Interrupt area of jumper block J6.
On the PC/104 bus each IRQ level in use must have a 1KΩ pull-down resistor attached. To
enable the pull-down resistor for this board, install a jumper in the R location on J6.
Typically each board in the computer will use a different interrupt level, or IRQ level. However
in special circumstances multiple boards may share the same IRQ level. In this case only one
Diamond-MM-48-AT User Manual V1.01 Page 7
board should have the pull-down resistor enabled with a jumper in the R location. The other
boards should have the R jumper removed to disable their pull-down resistors.
4.3 Optocoupler Polarity
The 4 optocouplers may be configured for either direct or inverted polarity with the POL
position on J6. For direct polarity, an open circuit / low voltage input reads back as a 0, and a
high voltage reads back as a 1. For inverted polarity, an open circuit / low voltage reads as 1,
and a high voltage reads as 0. For direct polarity, the POL jumper should be absent. For
inverted polarity, install a jumper in the POL location.
4.4 Reserved
The EWP position on J6 is reserved for a future option and currently has no function.
4.5 Analog Input Range
On the standard bipolar input range model, the input range can be selected with a jumper for
either +/-10V or +/-5V. For +/-10V operation, jumper block J10 should be open. For +/-5V
operation, install a jumper in J10.
On the unipolar input range model, the input range is fixed at 0-5V, and J10 does not serve
any purpose.
Diamond-MM-48-AT User Manual V1.01 Page 8
5. I/O MAP
5.1 Overview
Diamond-MM-48-AT occupies 16 bytes in I/O memory space. A functional list of these
registers is provided below, and detailed register bit definitions are provided on the next page
and the following chapter. The information in chapters 5 and 6 is provided to assist in
understanding the board’s operation and for use by programmers writing their own driver
software. Diamond Systems’ Universal Driver software provides high-level control of the
board’s functionality and will isolate these underlying hardware details for most programmers.
Base + Write Function Read Function
0 D/A LSB A/D LSB
1 D/A MSB A/D MSB
2 A/D channel register A/D channel register
3 Relay control register Relay control readback
4 Digital I/O configuration Digital I/O config + status readback
5 Digital I/O output data Digital I/O input and edge data
6 Optocoupler configuration Optocoupler configuration readback
7 D/A channel and update control Optocoupler input and edge data
8 Command register Status register
9 Configuration register Configuration register readback
10 FIFO control register FIFO status register
11 Interrupt control register Interrupt status register
Addresses 12-15 form a window into 2 4-byte pages. The page is selected with a bit in
register 10.
Page 0: counter/timers
12 Ctr 0 and Ctr 1 LSB Ctr 0 and Ctr 1 MSB
13 Ctr 0 CSB (center byte) / Ctr 1 MSB Ctr 0 CSB / Ctr 1 MSB
14 Ctr 1 MSB Ctr 1 MSB
15 Counter/timer control register ---
Page 1: Calibration Control
12 EEPROM / TrimDAC data register EEPROM / TrimDAC data register
13 EEPROM / TrimDAC address register EEPROM / TrimDAC address register
14 Calibration control register Calibration status register
15 EEPROM access key FPGA code version
Diamond-MM-48-AT User Manual V1.01 Page 9
5.2 Register Map Bit Assignments
A blank location in the Write registers has no function.
A blank location in the Read registers has no function and reads back as 0.
WRITE operations
7 6 5 4 3 2 1 0
0 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
1 DA11 DA10 DA9 DA8
2 HIGH3 HIGH2 HIGH1 HIGH0 LOW3 LOW2 LOW1 LOW0
3 RELAY7 RELAY6 RELAY5 RELAY4 RELAY3 RELAY2 RELAY1 RELAY0
4 DIR3 DIR2 DIR1 DIR0
5 DIO3 DIO2 DIO1 DIO0
6 OEN3 OEN2 OEN1 OEN0 POL3 POL2 POL1 POL0
7 DAUPDT DACH2 DACH1 DACH0
8 DAPRE DAPRLD RESET FIFORST ADSTART
9 CKSEL1 CKFRQ1 CKFRQ0 SCNINT CLKEN CLKSEL
10 PAGE FIFOTH FIFOEN SCANEN
11 CLRT CLRD CLRO CLRA TINTE DINTE OINTE AINTE
12 Page 0: Counter data LSB Page 1: Calibration Data
13 Page 0: Counter data CSB Page 1: Calibration Address
14 Page 0: Counter data MSB Page 1: Calibration Control
15 Page 0: Counter Control Register Page 1: EEPROM Access Key Register
READ operations
7 6 5 4 3 2 1 0
0 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
1 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8
2 HIGH3 HIGH2 HIGH1 HIGH0 LOW3 LOW2 LOW1 LOW0
3 RELAY7 RELAY6 RELAY5 RELAY4 RELAY3 RELAY2 RELAY1 RELAY0
4 DIR3 DIR2 DIR1 DIR0
5 DEDGE3 DEDGE2 DEDGE1 DEDGE0 DIO3 DIO2 DIO1 DIO0
6 OEN3 OEN2 OEN1 OEN0 POL3 POL2 POL1 POL0
7 OEDGE3 OEDGE2 OEDGE1 OEDGE0 OPTO3 OPTO2 OPTO1 OPTO0
8 POL ADCH3 ADCH2 ADCH1 ADCH0
9 ADBUSY DABUSY CKSEL1 CKFRQ1 CKFRQ0 SCNINT CLKEN CLKSEL
10 OVF HF 8F EF PAGE FIFOTH FIFOEN SCANEN
11 TINT DINT OINT AINT TINTE DINTE OINTE AINTE
12 Page 0: Counter data LSB Page 1: Calibration Data
13 Page 0: Counter data CSB Page 1: Calibration Address
14 Page 0: Counter data MSB Page 1: Calibration Control/Status
15 Page 0: --- Page 1: FPGA revision code
Diamond-MM-48-AT User Manual V1.01 Page 10
6. REGISTER DEFINITIONS
Base + 0 Write D/A LSB
Bit No. 7 6 5 4 3 2 1 0
Name DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
Definitions:
DA7-0 D/A bits 7-0; DA0 is the LSB. D/A data is an unsigned 12-bit number ranging
from 0 to 4095.
Base + 0 Read A/D LSB
Bit No. 7 6 5 4 3 2 1 0
Name AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
Definitions:
AD7 – 0 A/D LSB data (bits 7-0 of the 16-bit value). A/D data is a signed 16-bit value
ranging from -32768 to 32767.
Base + 1 Write DAC 0 – 3 MSB
Bit No. 7 6 5 4 3 2 1 0
Name DA11 DA10 DA9 DA8
Definitions:
DA11 – 8 D/A data bits 11-8 for the selected channel. DA11 is the MSB.
Diamond-MM-48-AT User Manual V1.01 Page 11
Base + 1 Read A/D MSB
Bit No. 7 6 5 4 3 2 1 0
Name AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8
Definitions:
AD15 – 8 A/D MSB data (bits 15-8 of the 16-bit value). A/D data is a signed 16-bit value
ranging from -32768 to 32767.
Note: Reading from Base + 0 and Base + 1 result in the same physical operation, reading
from the FIFO. The FIFO is 8 bits wide x 2048 bytes deep, with A/D data stored and retrieved
in interleaved fashion. Data from the A/D is put into the FIFO in little-endian mode, with the
LSB inserted first, and the MSB inserted second. Thus the data comes out of the FIFO in the
same order. Each time a byte is read from either Base + 0 or Base + 1, the next byte will be
read from the FIFO and the FIFO counter will be decremented.
Because the FIFO decrements after each read operation, you cannot read out the same A/D
value more than once (unless the FIFO is empty, in which case the last byte may be read
indefinitely). It is the programmer’s responsibility to ensure that data is read out of the FIFO
properly so that appropriate LSB / MSB pairs are read out together.
Base + 2 Read/Write A/D Channel Register
Bit No. 7 6 5 4 3 2 1 0
Name HIGH3 HIGH2 HIGH1 HIGH0 LOW3 LOW2 LOW1 LOW0
Definitions:
HIGH3 – 0 High channel of channel scan range; ranges from LOW to 15
LOW3 – 0 Low channel of channel scan range; ranges from 0 to 15
The high channel must be greater than or equal to the low channel.
When this register is written, the current A/D channel is set to the low channel and ADBUSY
= 1 for 10 uS. A/D channels are automatically selected in sequence by the board. Each time
an A/D conversion starts, the board increments to the next channel in the range. When the
high channel is sampled, the board resets to the low channel.
Diamond-MM-48-AT User Manual V1.01 Page 12
Base + 3 Read/Write Relay Control Port
Bit No. 7 6 5 4 3 2 1 0
Name RELAY7 RELAY6 RELAY5 RELAY4 RELAY3 RELAY2 RELAY1 RELAY0
These bits control the 8 relays. 0 = off (C connected to NC), 1 = on (C connected to NO). The
written value may be read back with true logic. The value on the corresponding output pin is
the inverse of the value in this register.
On power-up or reset, the output register is cleared to all zeroes and all relays reset to their
off condition (C connected to NC) by resetting all RELAY pins to 1. Relays are in the off
condition when power is off and remain in that condition when power is applied until a 1 is
written to their corresponding control register bit.
Base + 4 Read/Write Digital I/O Configuration Register
Bit No. 7 6 5 4 3 2 1 0
Name DIR3 DIR2 DIR1 DIR0
Definitions:
DIR3-0 Digital I/O direction settings for each bit: 1 = output, 0 = input
All digital I/O lines are in input mode on power-up.
Diamond-MM-48-AT User Manual V1.01 Page 13
Base + 5 Write Digital I/O Data
Bit No. 7 6 5 4 3 2 1 0
Name DIO3 DIO2 DIO1 DIO0
Definitions:
DIO3 – 0 Digital I/O output data. Only bits in output mode are affected. Any bit in input
mode will ignore data written to this register.
Base + 5 Read Digital I/O Data and Edge Status
Bit No. 7 6 5 4 3 2 1 0
Name DEDGE3 DEDGE2 DEDGE1 DEDGE0 DIO3 DIO2 DIO1 DIO0
Definitions:
DEDGE3 – 0 Edge status for DIO lines: 1 = change occurred since last read, 0 = no
change occurred
DIO3 – 0 Digital I/O readback. If a bit is in output mode, the readback value is equal to the
programmed value.
Base + 6 Read/Write Optocoupler Edge Detection Configuration Register
Bit No. 7 6 5 4 3 2 1 0
Name OEN3 OEN2 OEN1 OEN0 POL3 POL2 POL1 POL0
OEN3-0 Enable edge detection on the selected digital input line: 0 = disabled, 1 =
enabled
POL3-0 Select active edge polarity for selected digital input line: 0 = falling, 1 = rising
An interrupt request will occur when OINTE = 1 and a digital input line enabled with OENn
exhibits an edge whose polarity matches POLn (a qualifying edge). If an interrupt request
occurs, and an additional qualifying edge occurs before the digital interrupt flip flop is reset,
no additional interrupt request will be generated. It is possible for more than one line’s
qualifying edge to be detected in a single interrupt (for example if 3 lines exhibit qualifying
edges at the same time), but not more than one edge per line (for example if a second
qualifying edge on the same line occurs before the interrupt is serviced).
It is possible for a qualifying edge to occur in the time between when the interrupt routine
reads the digital input status register and when it resets the interrupt flip flop. In this case the
qualifying edge will be lost, since resetting the flip flop also resets the edge detection status
bits.
Diamond-MM-48-AT User Manual V1.01 Page 14
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