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Dialog DA1458 Series, DA1468 Series User Manual

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User Manual
DA1458x/DA1468x Production
Line Tool
UM-B-041

Abstract

This document describes the DA1458x/DA1468x Production Line Tool (PLT). The various software applications, as well as the PLT hardware are explained in detail. The purpose of this document is to help users to become familiar with the tool and help them use it in a short amount of time.
UM-B-041
DA1458x/DA1468x Production Line Tool
User Manual
03-Aug-2018
CFR0012
© 2018 Dialog Semiconductor

Contents

Abstract ................................................................................................................................................ 1
Contents ............................................................................................................................................... 2
Figures .................................................................................................................................................. 6
Tables ................................................................................................................................................. 10
1 Terms and Definitions ................................................................................................................. 13
2 References ................................................................................................................................... 15
3 New version features .................................................................................................................. 16
4 Introduction.................................................................................................................................. 17
5 Hardware ...................................................................................................................................... 18
5.1 Hardware Block Diagram .................................................................................................... 18
5.2 Printed Circuit Board Layout ............................................................................................... 19
5.3 PLT Power Supply .............................................................................................................. 20
5.4 DUT Connector ................................................................................................................... 20
5.5 Data Streaming ................................................................................................................... 21
5.6 Golden Unit ......................................................................................................................... 23
5.6.1 GU Reset ............................................................................................................. 23
5.7 Current Measurements ....................................................................................................... 24
5.8 Jumper Settings .................................................................................................................. 24
5.8.1 J26 - Current Measurements ............................................................................... 25
5.8.2 J42 - DA1458x OTP Burning Voltage .................................................................. 25
5.8.3 J47, J46 - GU Reset ............................................................................................ 26
5.8.4 J37 - GU Programming ........................................................................................ 26
5.9 PLT Functional Blocks ........................................................................................................ 28
6 Software ....................................................................................................................................... 29
6.1 Introduction ......................................................................................................................... 29
6.2 DA15101 support ................................................................................................................ 30
6.3 Software Package Contents ............................................................................................... 30
6.4 Prerequisites ....................................................................................................................... 33
6.5 System Requirements ......................................................................................................... 34
6.6 Limitations ........................................................................................................................... 34
6.7 Building the Code ................................................................................................................ 35
6.8 Executing the Applications .................................................................................................. 37
6.9 Test Sequence .................................................................................................................... 42
6.9.1 DA1458x Test Sequence ..................................................................................... 42
6.9.2 DA1468x Test Sequence ..................................................................................... 47
6.10 VBAT/Reset Signals Operation ........................................................................................... 52
6.10.1 VBAT Only ........................................................................................................... 52
6.10.2 VBAT On with Reset ............................................................................................ 53
6.10.3 VBAT as Reset .................................................................................................... 53
6.11 Custom Memory Data ......................................................................................................... 54
6.11.1 Homekit Hash Setup Code .................................................................................. 55
6.11.2 Custom data CSV file format ............................................................................... 57
6.12 Golden Unit Scan Test ........................................................................................................ 58
6.13 Creating PLT Firmware Files .............................................................................................. 60
UM-B-041
DA1458x/DA1468x Production Line Tool
User Manual
03-Aug-2018
CFR0012
© 2018 Dialog Semiconductor
7 Applications ................................................................................................................................. 65
7.1 Introduction ......................................................................................................................... 65
7.2 CFG PLT Application .......................................................................................................... 65
7.2.1 XML and XSD Files ............................................................................................. 67
7.2.2 Hardware Setup ................................................................................................... 69
7.2.2.1 Station Identification ........................................................................ 69
7.2.2.2 Device IC ......................................................................................... 69
7.2.2.3 Active DUTs ..................................................................................... 69
7.2.2.4 DUT COM Ports ............................................................................... 70
7.2.2.5 Golden Unit ...................................................................................... 70
7.2.2.6 VBAT/Reset Mode ........................................................................... 71
7.2.3 General ................................................................................................................ 72
7.2.3.1 Statistics .......................................................................................... 72
7.2.3.2 Test Options .................................................................................... 72
7.2.4 BD Addresses ...................................................................................................... 74
7.2.4.1 BD Address Assignment .................................................................. 74
7.2.5 DUT Hardware Setup (DA1458x) ........................................................................ 77
7.2.5.1 UART Boot Pins Setup .................................................................... 77
7.2.5.2 UART Baud Rate ............................................................................. 77
7.2.5.3 UART Programming GPIOs Setup .................................................. 78
7.2.5.4 Sleep Clock Source ......................................................................... 78
7.2.5.5 SPI Flash Configuration ................................................................... 79
7.2.5.6 I2C EEPROM Configuration ............................................................ 80
7.2.5.7 Range Extender Configuration ........................................................ 81
7.2.6 Test Settings (DA1458x)...................................................................................... 82
7.2.6.1 XTAL Trim ........................................................................................ 82
7.2.6.2 GPIO Watchdog operation .............................................................. 82
7.2.6.3 Scan DUT Advertise Test ................................................................ 83
7.2.6.4 RF Tests .......................................................................................... 83
7.2.6.5 GPIO/LED Test ................................................................................ 90
7.2.6.6 GPIO Connection Test..................................................................... 91
7.2.6.7 Audio Test ........................................................................................ 92
7.2.6.8 Sensor Test ..................................................................................... 92
7.2.6.9 Custom Test .................................................................................... 93
7.2.6.10 External 32kHz Test ........................................................................ 94
7.2.6.11 Current Measurement Test .............................................................. 95
7.2.6.12 Temperature Measurement Test ..................................................... 98
7.2.6.13 Scan Test ......................................................................................... 98
7.2.7 Memory Functions (DA1458x) ........................................................................... 100
7.2.7.1 OTP Memory ................................................................................. 100
7.2.7.2 SPI Flash Memory ......................................................................... 101
7.2.7.3 I2C EEPROM Memory................................................................... 103
7.2.7.4 Memory read .................................................................................. 104
7.2.8 Memory Header (DA1458x) ............................................................................... 105
7.2.8.1 General .......................................................................................... 105
7.2.8.2 BD Address .................................................................................... 106
7.2.8.3 Custom Memory Data .................................................................... 107
UM-B-041
DA1458x/DA1468x Production Line Tool
User Manual
03-Aug-2018
CFR0012
© 2018 Dialog Semiconductor
7.2.9 DUT Hardware Setup (DA1468x) ...................................................................... 109
7.2.9.1 UART Boot Pins Setup .................................................................. 109
7.2.9.2 UART Baud Rate ........................................................................... 109
7.2.9.3 Clock Source ................................................................................. 110
7.2.10 Test Settings (DA1468x).................................................................................... 111
7.2.10.1 XTAL Trim ...................................................................................... 111
7.2.10.2 GPIO Watchdog operation ............................................................ 111
7.2.10.3 Scan DUT Advertise Test .............................................................. 112
7.2.10.4 RF Tests ........................................................................................ 112
7.2.10.5 GPIO/LED Test .............................................................................. 118
7.2.10.6 GPIO Connection Test................................................................... 119
7.2.10.7 Sensor Test ................................................................................... 120
7.2.10.8 ADC Calibration (DA14681-00 only) .............................................. 121
7.2.10.9 Custom Test .................................................................................. 121
7.2.10.10 External 32kHz Test ...................................................................... 122
7.2.10.11 Current Measurement Test ............................................................ 123
7.2.10.12 Temperature Measurement Test ................................................... 126
7.2.10.13 Scan Test ....................................................................................... 126
7.2.11 Memory Functions (DA1468x) ........................................................................... 128
7.2.11.1 OTP Memory ................................................................................. 128
7.2.11.2 QSPI Flash Memory ...................................................................... 129
7.2.11.3 Memory read .................................................................................. 130
7.2.12 Memory Header (DA1468x) ............................................................................... 131
7.2.12.1 OTP Header ................................................................................... 131
7.2.12.2 OTP Header - BD Address ............................................................ 133
7.2.12.3 OTP Header - XTAL Trim .............................................................. 133
7.2.12.4 QSPI Header - BD Address ........................................................... 134
7.2.12.5 QSPI Header - XTAL Trim ............................................................. 134
7.2.12.6 Custom Memory Data .................................................................... 135
7.2.13 Debug Settings .................................................................................................. 137
7.2.14 Security .............................................................................................................. 137
7.3 GUI PLT Application .......................................................................................................... 138
7.3.1 GUI PLT Settings ............................................................................................... 141
7.3.2 Barcode Scanner Mode ..................................................................................... 142
7.3.2.1 Homekit Setup Code Scan Example ............................................. 143
7.3.3 Running the GUI PLT and Executing Tests....................................................... 148
7.3.4 Debug Console .................................................................................................. 151
7.3.5 DUT Log File ...................................................................................................... 152
7.3.6 CSV File ............................................................................................................. 153
7.4 CLI PLT Application .......................................................................................................... 154
7.4.1 CLI Commands .................................................................................................. 154
7.4.2 Running the CLI and Executing Tests ............................................................... 156
7.4.3 Using CLI Commands as Arguments ................................................................ 159
7.5 GU Upgrade Application ................................................................................................... 160
8 Example Usage .......................................................................................................................... 166
Appendix A Top-view of PLT PCB Version D ............................................................................... 173
Appendix B Electrical Schematics ................................................................................................ 174
UM-B-041
DA1458x/DA1468x Production Line Tool
User Manual
03-Aug-2018
CFR0012
© 2018 Dialog Semiconductor
Appendix C Hardware Modifications PLT Version D ................................................................... 178
Appendix D Suggestions about Hardware and Cabling .............................................................. 179
Appendix E RF Path Losses Calibration ....................................................................................... 181
E.1 Prerequisites ..................................................................................................................... 181
E.2 Setup ................................................................................................................................. 182
E.3 Procedure .......................................................................................................................... 184
Appendix F Hex2Bin ........................................................................................................................ 190
Appendix G Bin2Image ................................................................................................................... 191
Appendix H Automatic GU COM Port Find ................................................................................... 192
Appendix I Improving Cabling between PLT and DUTs .............................................................. 194
Appendix J DA14583 Internal SPI Flash Memory ......................................................................... 196
Appendix K DA14586 Internal SPI Flash Memory ........................................................................ 197
Appendix L Honeywell Xenon 1900 Barcode Scanner Setup ..................................................... 198
Appendix M Golden Unit Upgrade Using Smart Snippets Toolbox ........................................... 199
Appendix N Connecting a Speaker to the Golden Unit for Audio Test ...................................... 200
Appendix O FTDI Driver Removal and Installation ...................................................................... 201
Appendix P DA1458x DK Pro Motherboard Connection ............................................................. 202
Appendix Q DA1468x DK Pro Motherboard Connection ............................................................. 203
Appendix R Connecting DA1468x DK Pro Motherboard for Current Measurements ............... 204
Appendix S Connecting DUT with Battery Supply ....................................................................... 206
Appendix T User Interfaces Shortcut Keys .................................................................................. 207
Appendix U DA1458x Supported SPI Flash\EEPROM Memories ............................................... 208
Appendix V DA1468x Supported QSPI Flash Memories ............................................................. 209
Appendix W BLE Tester Measurement Results ........................................................................... 210
Appendix X Memory programming ................................................................................................ 214
X.1 DA14580/1/2/3/5/6 Memory Programming Tests ............................................................. 214
X.2 DA1468x Memory Programming Operation ...................................................................... 217
Appendix Y CSV Log File Contents ............................................................................................... 219
Appendix Z DUT Status Codes ...................................................................................................... 232
Appendix AA Golden Unit Status Codes ...................................................................................... 242
Revision History .............................................................................................................................. 245
UM-B-041
DA1458x/DA1468x Production Line Tool
User Manual
03-Aug-2018
CFR0012
© 2018 Dialog Semiconductor

Figures

Figure 1: Production Line Tool Hardware ............................................................................................ 17
Figure 2: Production Line Tool Hardware Board Block Diagram ........................................................ 18
Figure 3: Top View of the PLT Hardware Board (Version C) .............................................................. 19
Figure 4: PLT Hardware Power Connections ...................................................................................... 20
Figure 5: Production Line Tool DUT Connections ............................................................................... 20
Figure 6: CPLD UART Data Streams .................................................................................................. 21
Figure 7: CPLD XTAL Trim Pulse Data Stream .................................................................................. 22
Figure 8: CPLD UART Loopback Data Stream ................................................................................... 22
Figure 9: Golden Unit .......................................................................................................................... 23
Figure 10: GU Reset Circuit ................................................................................................................ 24
Figure 11: VBAT DUT Current Measurement Setup ........................................................................... 24
Figure 12: Connections for ‘Floating Current’ Measurements ............................................................. 25
Figure 13: VPP Control Circuit Schematic .......................................................................................... 25
Figure 14: Location of the VPP Jumper J42 ........................................................................................ 26
Figure 15: Location of J46 Jumper ...................................................................................................... 26
Figure 16: Location of J47 Jumper ...................................................................................................... 26
Figure 17: J37 - GU Programming Jumper Schematics ..................................................................... 27
Figure 18: Location of J37 Jumper ...................................................................................................... 27
Figure 19: PLT Functional Blocks ....................................................................................................... 28
Figure 20: Production Line Tool Software Block Diagram .................................................................. 29
Figure 21: DA1458x/DA1468x PLT Software Package Contents ....................................................... 30
Figure 22: DA1458x Test Sequence ................................................................................................... 46
Figure 23: DA1468x Test Sequence ................................................................................................... 51
Figure 24: VBAT only .......................................................................................................................... 52
Figure 25: VBAT On with Reset .......................................................................................................... 53
Figure 26: VBAT as Reset ................................................................................................................... 53
Figure 27: Custom Memory Data CSV File Example .......................................................................... 57
Figure 28: Golden Unit Scan Test ....................................................................................................... 58
Figure 29: Golden Unit Scan Test Example Parameters .................................................................... 59
Figure 30: Binaries .............................................................................................................................. 60
Figure 31: Folder Contents of ‘fw_files’ ............................................................................................... 61
Figure 32: CFG PLT Startup Screen ................................................................................................... 65
Figure 33: CFG PLT with Erroneous Configuration Parameter ........................................................... 66
Figure 34: XSD Schema File Example ................................................................................................ 68
Figure 35: Station Identification ........................................................................................................... 69
Figure 36: Device IC ............................................................................................................................ 69
Figure 37: Active DUTs ....................................................................................................................... 69
Figure 38: DUT COM Ports ................................................................................................................. 70
Figure 39: Golden Unit COM Port ....................................................................................................... 70
Figure 40: VBAT/Reset Mode Selection .............................................................................................. 71
Figure 41: Statistics ............................................................................................................................. 72
Figure 42: Test Options ....................................................................................................................... 72
Figure 43: BD Address Assignment .................................................................................................... 74
Figure 44: Example for Load from File Mode ...................................................................................... 75
Figure 45: UART Boot Pins Setup - DA1458x..................................................................................... 77
Figure 46: UART Baud Rate - DA1458x ............................................................................................. 77
Figure 47: UART Programming GPIOs Setup - DA1458x .................................................................. 78
Figure 48: Sleep Clock Source - DA1458x.......................................................................................... 78
Figure 49: SPI Flash Configuration - DA1458x ................................................................................... 79
Figure 50: I2C EEPROM Configuration - DA1458x ............................................................................ 80
Figure 51: Range Extender Configuration - DA1458x ......................................................................... 81
Figure 52: XTAL Trim - DA1458x ........................................................................................................ 82
Figure 53: GPIO Watchdog operation - DA1458x ............................................................................... 82
Figure 54: Scan DUT Advertise Test - DA1458x ................................................................................ 83
Figure 55: Golden Unit RF Tests - DA1458x....................................................................................... 84
Figure 56: BLE Tester General Settings - DA1458x ........................................................................... 85
Figure 57: BLE Tester TX Power - DA1458x ...................................................................................... 86
Figure 58: BLE Tester Frequency Offset - DA1458x .......................................................................... 87
UM-B-041
DA1458x/DA1468x Production Line Tool
User Manual
03-Aug-2018
CFR0012
© 2018 Dialog Semiconductor
Figure 59: BLE Tester Modulation Index - DA1458x ........................................................................... 88
Figure 60: BLE Tester RX Sensitivity - DA1458x ................................................................................ 89
Figure 61: Path Losses per DUT - DA1458x ....................................................................................... 90
Figure 62: GPIO/LED Tests - DA1458x .............................................................................................. 90
Figure 63: GPIO Connection Test - DA1458x ..................................................................................... 91
Figure 64: Audio Test .......................................................................................................................... 92
Figure 65: Sensor Test - DA1458x ...................................................................................................... 92
Figure 66: Custom Test - DA1458x ..................................................................................................... 93
Figure 67: External 32kHz Test - DA1458x ......................................................................................... 94
Figure 68: Current Measurement Test - DA1458x .............................................................................. 95
Figure 69: Temperature Measurement Test - DA1458x ..................................................................... 98
Figure 70: Scan Test - DA1458x ......................................................................................................... 98
Figure 71: OTP Memory - DA1458x .................................................................................................. 100
Figure 72: Different Image per DUT Folder Example ........................................................................ 101
Figure 73: SPI Flash Memory - DA1458x .......................................................................................... 101
Figure 74: I2C EEPROM Memory - DA1458x ................................................................................... 103
Figure 75: Memory Read Test - DA1458x ......................................................................................... 104
Figure 76: Memory Read Test Example Log File - DA1458x ............................................................ 104
Figure 77: OTP Header - DA1458x ................................................................................................... 105
Figure 78: BD Address - DA1458x .................................................................................................... 106
Figure 79: Custom Memory Data - DA1458x .................................................................................... 107
Figure 80: UART Boot Pins Setup - DA1468x................................................................................... 109
Figure 81: UART Baud Rate - DA1468x ........................................................................................... 109
Figure 82: Clock Source - DA14682/3-00 Only ................................................................................. 110
Figure 83: XTAL Trim - DA1468x ...................................................................................................... 111
Figure 84: GPIO Watchdog operation - DA1468x ............................................................................. 111
Figure 85: Scan DUT Advertise Test - DA1468x .............................................................................. 112
Figure 86: Golden Unit RF Tests - DA1468x..................................................................................... 112
Figure 87: BLE Tester General Settings - DA1468x ......................................................................... 113
Figure 88: BLE Tester TX Power - DA1468x .................................................................................... 114
Figure 89: BLE Tester Frequency Offset - DA1468x ........................................................................ 115
Figure 90: BLE Tester Modulation Index - DA1468x ......................................................................... 116
Figure 91: BLE Tester RX Sensitivity - DA1468x .............................................................................. 117
Figure 92: Path Losses per DUT - DA1468x ..................................................................................... 118
Figure 93: GPIO/LED Tests - DA1468x ............................................................................................ 118
Figure 94: GPIO Connection Tests - DA1468x ................................................................................. 119
Figure 95: Sensor Test - DA1468x .................................................................................................... 120
Figure 96: ADC Calibration - DA14681-00 ........................................................................................ 121
Figure 97: Custom Test - DA1468x ................................................................................................... 121
Figure 98: External 32kHz Test - DA1468x ....................................................................................... 122
Figure 99: Current Measurement Tests - DA1468x .......................................................................... 123
Figure 100: Temperature Measurement Test - DA1468x ................................................................. 126
Figure 101: Scan Test - DA1468x ..................................................................................................... 126
Figure 102: OTP Memory - DA1468x ................................................................................................ 128
Figure 103: QSPI Flash - DA1468x ................................................................................................... 129
Figure 104: Memory Read Test - DA1468x ....................................................................................... 130
Figure 105: Memory Read Test Example Log File - DA1468x .......................................................... 130
Figure 106: OTP Header - DA1468x ................................................................................................. 131
Figure 107: OTP Header BD Address - DA1468x ............................................................................. 133
Figure 108: OTP Header XTAL Trim - DA1468x ............................................................................... 133
Figure 109: QSPI Header BD Address - DA1468x ........................................................................... 134
Figure 110: QSPI Header XTAL Trim ................................................................................................ 134
Figure 111: Custom Memory Data - DA1468x .................................................................................. 135
Figure 112: Debug Settings ............................................................................................................... 137
Figure 113: Security .......................................................................................................................... 137
Figure 114: GUI PLT Main Screen .................................................................................................... 139
Figure 115: GUI PLT Settings ........................................................................................................... 141
Figure 116: Barcode Scan Option in GUI PLT .................................................................................. 142
Figure 117: Barcode Scanner Controls ............................................................................................. 143
UM-B-041
DA1458x/DA1468x Production Line Tool
User Manual
03-Aug-2018
CFR0012
© 2018 Dialog Semiconductor
Figure 118: Barcode Scan - BD Address Assignment ...................................................................... 143
Figure 119: GUI PLT - Erroneous Messages in “run scripts before testing starts” ........................... 148
Figure 120: GUI PLT OTP Burn Warning Message .......................................................................... 149
Figure 121: GUI PLT Testing (1 of 2) ................................................................................................ 149
Figure 122: GUI PLT Testing (2 of 2) ................................................................................................ 150
Figure 123: GUI PLT Tests Finished ................................................................................................. 150
Figure 124: GUI PLT Retry Failed DUTs Message ........................................................................... 151
Figure 125: Debug Console............................................................................................................... 151
Figure 126: DUT Log File .................................................................................................................. 152
Figure 127: CSV File ......................................................................................................................... 153
Figure 128: CLI Software Start Screen ............................................................................................. 154
Figure 129: CLI PLT Print Settings (x Command) ............................................................................. 156
Figure 130: CLI PLT DUT COM Port Enumeration ('p' Command) ................................................... 157
Figure 131: CLI PLT Read and Compare BD Address in QSPI ('v' Command) ............................... 158
Figure 132: CLI PLT Testing ............................................................................................................. 158
Figure 133: CLI PLT Testing Finished ............................................................................................... 158
Figure 134: CLI with Commands as Arguments................................................................................ 159
Figure 135: GU Upgrade - Introduction page .................................................................................... 160
Figure 136: GU Upgrade - Exit Message .......................................................................................... 161
Figure 137: GU Upgrade - Hardware Version ................................................................................... 161
Figure 138: GU Upgrade - Hardware Version Compatibility ............................................................. 161
Figure 139: GU Upgrade - Power Supply .......................................................................................... 162
Figure 140: GU Upgrade - Power Supply Pop-Up ............................................................................ 162
Figure 141: GU Upgrade - Golden Unit Reset .................................................................................. 163
Figure 142: GU Upgrade - Golden Unit Reset Message for Manual Mode ...................................... 163
Figure 143: GU Upgrade - GU COM Port ......................................................................................... 164
Figure 144: GU Upgrade - Burn Firmware ........................................................................................ 164
Figure 145: GU Upgrade - Burn Firmware Pop-Up Message ........................................................... 165
Figure 146: GU Upgrade - Burn Firmware Success ......................................................................... 165
Figure 147: Top-view of PLT PCB Version D .................................................................................... 173
Figure 148: VBAT and VPP Control from CPLD ............................................................................... 174
Figure 149: CPLD DUT UART Connections ..................................................................................... 174
Figure 150: CPLD FTDI and GU Control Connections ..................................................................... 175
Figure 151: FTDI Chip for USB UART to DUTs 1, 2, 3 and 4 ........................................................... 175
Figure 152: Quad USB HUB ............................................................................................................. 176
Figure 153: Golden Unit - Dedicated USB Port and FTDI Chip ........................................................ 176
Figure 154: Golden Unit - GU LED and SPI Flash Memory .............................................................. 177
Figure 155: VBAT_DUT and VDDIO Supplies .................................................................................. 177
Figure 156: GU Supply and VPP Generation .................................................................................... 177
Figure 157: DA14580_RD_tester Version D ..................................................................................... 178
Figure 158: Jumper J47 Added Next to Golden Unit Socket ............................................................ 178
Figure 159: R365 (10 k) Added Next to Reset Button .................................................................... 178
Figure 160: R365, J47 and RESET Shown in Electrical Schematic ................................................. 178
Figure 161: Possible Solution of Antenna on Cable and Fixed Radius of DUTs to Antenna ............ 179
Figure 162: Possible Solution of Antenna on Cable and DUTs Put in Line ...................................... 179
Figure 163: Example Locations and RSSI Readouts of Horizontal Antenna .................................... 180
Figure 164: Setup diagram ................................................................................................................ 182
Figure 165: Hex2Bin Example Directory with Files ........................................................................... 190
Figure 166: Hex2Bin.exe Example .................................................................................................... 190
Figure 167: Bin2Image Example Directory with Files ....................................................................... 191
Figure 168: Bin2Image Example ....................................................................................................... 191
Figure 169: Example of Twisted Pair Cable with 4 Pairs and Ferrite ................................................ 194
Figure 170: Location of Pull-Down Resistors .................................................................................... 194
Figure 171: Anti-Ringing Solution ...................................................................................................... 195
Figure 172: Pin Assignment of DA14583 – QFN40 .......................................................................... 196
Figure 173: Pin Assignment of DA14586 - QFN40 ........................................................................... 197
Figure 174: Speaker Connection for Audio Test. .............................................................................. 200
Figure 175: DA14580/5 Pro Motherboard DK Wiring. ....................................................................... 202
Figure 176: DA14680/1/2/3 Pro Motherboard DK Wiring. ................................................................. 203
UM-B-041
DA1458x/DA1468x Production Line Tool
User Manual
03-Aug-2018
CFR0012
© 2018 Dialog Semiconductor
Figure 177: DA1468x PRO DK Ammeter Connection with PLT ........................................................ 204
Figure 178: DA1468x DK PRO Current Measurement Settings ....................................................... 205
Figure 179: CSV File Entries (1/4) .................................................................................................... 224
Figure 180: CSV File Entries (2/4) .................................................................................................... 225
Figure 181: CSV File Entries (3/4) .................................................................................................... 229
Figure 182: CSV File Entries (4/4) .................................................................................................... 231
UM-B-041
DA1458x/DA1468x Production Line Tool
User Manual
03-Aug-2018
CFR0012
© 2018 Dialog Semiconductor

Tables

Table 1: DA1458x_DA1468x_PLT_v4.3 added features .................................................................... 16
Table 2: Power Supply Requirements ................................................................................................. 20
Table 3: PLT Connections to Applications .......................................................................................... 21
Table 4: Jumpers ................................................................................................................................. 24
Table 5: PLT User Interface Application Executables ......................................................................... 30
Table 6: Executables Folder Description ............................................................................................. 31
Table 7: Production Line Tool Prerequisites ....................................................................................... 33
Table 8: Minimum System Requirements ........................................................................................... 34
Table 9: Opening the PLT Visual Studio 2015 Express Source Code Solution .................................. 35
Table 10: DA1458x_DA1468x_CFG_PLT.exe Application Execution ................................................ 37
Table 11: DA1458x_DA1468x_GUI_PLT.exe Application Execution ................................................. 39
Table 12: DA1458x_DA1468x_CLI_PLT.exe Application Execution .................................................. 40
Table 13: GU_fw_upgrade.exe Application Execution ........................................................................ 41
Table 14: DA1458x Test Sequence .................................................................................................... 42
Table 15: DA1468x Test Sequence .................................................................................................... 47
Table 16: Custom Memory Data Input Modes..................................................................................... 54
Table 17: Homekit Setup Code Format ............................................................................................... 55
Table 18: Homekit Setup Code Checksum Algorithm ......................................................................... 56
Table 19: CFG PLT Main Menu Options ............................................................................................. 66
Table 20: CFG PLT Bottom Strip Options ........................................................................................... 66
Table 21: XML File Parts ..................................................................................................................... 67
Table 22: Station Identification ............................................................................................................ 69
Table 23: Device IC ............................................................................................................................. 69
Table 24: Active DUTs ......................................................................................................................... 70
Table 25: DUT COM Ports .................................................................................................................. 70
Table 26: Set the GU COM Port .......................................................................................................... 71
Table 27: Golden Unit Firmware Version Upgrade ............................................................................. 71
Table 28: VBAT/Reset Mode ............................................................................................................... 71
Table 29: Statistics .............................................................................................................................. 72
Table 30: Test Options ........................................................................................................................ 73
Table 31: BD Address Assignment - Standard Mode ......................................................................... 75
Table 32: BD Address Assignment Options - Range Mode ................................................................ 75
Table 33: BD Address Assignment Options - Load from File Mode.................................................... 76
Table 34: BD Address Assignment Options - Scan Mode .................................................................. 76
Table 35: UART TX-RX Pins - DA1458x ............................................................................................. 77
Table 36: UART Baud Rate - DA1458x ............................................................................................... 77
Table 37: UART Programming GPIOs Setup - DA1458x .................................................................... 78
Table 38: Sleep Clock Source - DA1458x ........................................................................................... 79
Table 39: SPI Pin Setup - DA1458x .................................................................................................... 79
Table 40: SPI Flash Configuration - SPI Flash Options - DA1458x .................................................... 80
Table 41: I2C Pin Setup - DA1458x .................................................................................................... 81
Table 42: I2C EEPROM Configuration – EEPROM Memory Options - DA1458x .............................. 81
Table 43: Range Extender Configuration - DA1458x - DA1458x ........................................................ 81
Table 44: XTAL Trim - DA1458x ......................................................................................................... 82
Table 45: GPIO Watchdog operation - DA1458x ................................................................................ 82
Table 46: Scan DUT Advertise Test - DA1458x .................................................................................. 83
Table 47: Golden Unit RF Tests - DA1458x ........................................................................................ 84
Table 48: BLE Tester General Settings - DA1458x ............................................................................ 85
Table 49: BLE Tester TX Power - DA1458x........................................................................................ 86
Table 50: BLE Tester Frequency Offset - DA1458x ............................................................................ 87
Table 51: BLE Tester Modulation Index - DA1458x ............................................................................ 88
Table 52: BLE Tester RX Sensitivity - DA1458x ................................................................................. 89
Table 53: Path Losses per DUT from RF Tests DA1458x Options ..................................................... 90
Table 54: GPIO/LED Tests - DA1458x ................................................................................................ 91
Table 55: GPIO Connection Test - DA1458x ...................................................................................... 91
Table 56: Audio Test ........................................................................................................................... 92
Table 57: Sensor Tests - DA1458x ..................................................................................................... 92
Table 58: Custom Tests - DA1458x .................................................................................................... 93
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Table 59: External 32kHz Test - DA1458x .......................................................................................... 94
Table 60: Current Measurement Test – Instrument Settings - DA1458x ............................................ 96
Table 61: Current Measurement Test – Peripheral Current Measurement - DA1458x....................... 96
Table 62: Current Measurement Test - Sleep Current Measurement - DA1458x ............................... 97
Table 63: Temperature Measurement Test - DA1458x ....................................................................... 98
Table 64: Scan Test DA1458x Options ............................................................................................... 99
Table 65: OTP Memory - DA1458x ................................................................................................... 100
Table 66: SPI Flash Erase - DA1458x .............................................................................................. 101
Table 67: SPI Flash Image Write - DA1458x .................................................................................... 102
Table 68: I2C EEPROM Image Write - DA1458x .............................................................................. 103
Table 69: Memory Read Test - DA1458x .......................................................................................... 104
Table 70: OTP Header - DA1458x .................................................................................................... 105
Table 71: BD Address - DA1458x ..................................................................................................... 107
Table 72: Custom Memory Data - DA1458x ..................................................................................... 108
Table 73: UART TX-RX Pins - DA1468x ........................................................................................... 109
Table 74: UART Baud Rate - DA1468x ............................................................................................. 110
Table 75: Clock Source - DA14682/3-00 Only .................................................................................. 110
Table 76: XTAL Trim - DA1468x ....................................................................................................... 111
Table 77: GPIO Watchdog operation - DA1468x .............................................................................. 111
Table 78: Scan DUT Advertise Test - DA1468x ................................................................................ 112
Table 79: Golden Unit RF Tests - DA1468x ...................................................................................... 113
Table 80: BLE Tester General Settings - DA1468x .......................................................................... 113
Table 81: BLE Tester TX Power - DA1468x...................................................................................... 114
Table 82: BLE Tester Frequency Offset - DA1468x .......................................................................... 115
Table 83: BLE Tester Modulation Index - DA1468x .......................................................................... 116
Table 84: BLE Tester RX Sensitivity - DA1468x ............................................................................... 117
Table 85: Path Losses per DUT from RF Tests DA1468x Options ................................................... 118
Table 86: GPIO/LED Tests - DA1468x .............................................................................................. 119
Table 87: GPIO Connection Tests - DA1468x .................................................................................. 119
Table 88: Sensor Tests - DA1468x ................................................................................................... 120
Table 89: ADC Calibration - DA14681-00 ......................................................................................... 121
Table 90: Custom Tests DA1468x Options ....................................................................................... 122
Table 91: External 32kHz Tests DA1468x Options ........................................................................... 122
Table 92: Current Measurement Tests - DA1468x ........................................................................... 124
Table 93: Current Measurement Test – Peripheral Current Measurement - DA1468x..................... 124
Table 94: Current Measurement Test - Sleep Current Measurement - DA1468x ............................. 125
Table 95: Temperature Measurement Test - DA1468x ..................................................................... 126
Table 96: Scan Test DA1468x Options ............................................................................................. 127
Table 97: OTP Memory - DA1468x ................................................................................................... 128
Table 98: QSPI Flash Erase - DA1468x ............................................................................................ 129
Table 99: QSPI Flash Image Write - DA1468x.................................................................................. 130
Table 100: Memory Read Test - DA1468x ........................................................................................ 131
Table 101: General - OTP Header DA1468x Options ....................................................................... 132
Table 102: OTP Header BD Address - DA1468x .............................................................................. 133
Table 103: OTP Header XTAL Trim - DA1468x ................................................................................ 134
Table 104: QSPI Header BD Address - DA1468x ............................................................................. 134
Table 105: QSPI Header XTAL Trim ................................................................................................. 134
Table 106: Custom Memory Data - DA1468x ................................................................................... 135
Table 107: Debug Settings ................................................................................................................ 137
Table 108: Security Options .............................................................................................................. 138
Table 109: GUI PLT Main Screen Description .................................................................................. 139
Table 110: GUI PLT Settings............................................................................................................. 141
Table 111: Homekit Setup Code Scan Example ............................................................................... 143
Table 112: CLI Commands................................................................................................................ 154
Table 113: DA14580 PLT Example Usage ....................................................................................... 166
Table 114: RF Test RSSI Results ..................................................................................................... 180
Table 115: Prerequisites .................................................................................................................... 181
Table 116: Calibration Setup ............................................................................................................. 182
Table 117: Procedure steps .............................................................................................................. 184
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Table 118: FTDI "DialogSemi" Serial Number .................................................................................. 192
Table 119: DA14583 Internal SPI Flash Connections ....................................................................... 196
Table 120: DA14586 Internal SPI Flash Connections ....................................................................... 197
Table 121: User Interface Shortcut Keys .......................................................................................... 207
Table 122: DA1458x Supported SPI Flash Memories ...................................................................... 208
Table 123: DA1468x Supported QSPI Flash Memories .................................................................... 209
Table 124: MT8852B Supported Command Codes .......................................................................... 210
Table 125: MT8852B – BLE TX Output Power Test Results ............................................................ 210
Table 126: MT8852B – BLE Carrier Frequency Offset and Drift Test Results ................................. 211
Table 127: MT8852B – BLE Modulation Characteristics Test Results ............................................. 211
Table 128: MT8852B – Error List ...................................................................................................... 212
Table 129: DA1458x Memory Programming – OTP Memory ........................................................... 214
Table 130: DA1458x Memory Programming - SPI Flash .................................................................. 215
Table 131: DA1458x Memory Programming – EEPROM Memory ................................................... 216
Table 132: DA1468x Memory Programming – OTP Memory ........................................................... 217
Table 133: Memory Programming – QSPI Memory .......................................................................... 218
Table 134: CSV File Contents ........................................................................................................... 219
Table 135: CSV File Entries (1/4). ..................................................................................................... 224
Table 136: CSV File Entries (2/4). ..................................................................................................... 225
Table 137: CSV File Entries (3/4). ..................................................................................................... 229
Table 138: CSV File Entries (4/4). ..................................................................................................... 231
Table 139: DUT Status Codes........................................................................................................... 232
Table 140: Golden Unit Status Codes ............................................................................................... 242
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1 Terms and Definitions

API Application Programming Interface BD Bluetooth Device .bin Firmware files in binary format BLE Bluetooth low energy CFG Configuration CLI Command Line Interface COM Communication port CPLD Complex Programmable Logic Device CRC Cyclic redundancy check CSV Comma Separated Values DLL Dynamic Link Library DMA Direct Memory Access DMM Digital Multi-meter DTM Direct Test Mode (as specified by the BLE Core standard) DUT Device Under Test DVM Digital Voltage Meter EEPROM Electrically Erasable Programmable Read-Only Memory .exe Executable file FTDI Future Technology Devices International Ltd. GPIO General Purpose Input-Output GU Golden Unit GUI Graphical User Interface .hex Firmware file in hexadecimal format HW hardware IC Integrated Circuit IDE Integrated Development Environment I2C Inter-Integrated Circuit JTAG Joint Test Action Group OS Operating System OTP One Time Programmable (memory) PC Personal Computer PCB Printed circuit board PER Packet Error Rate PLT Production Line Tool PLTD Production Line Tool DLL POR Power-On Reset RAM Random Access Memory RCX Resistor Crystal Oscillator RF Radio Frequency RX Receive SCPI Standard Commands for Programmable Instruments SoC System on Chip SDK Software Development Kit SPI Serial Peripheral Interface SW Software TCS Trim and Calibration Section
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TX Transmit UART Universal Asynchronous Receiver/Transmitter UI User Interface USB Universal Serial Bus VISA Virtual Instrument Software Architecture VPP Programming supply voltage (pin) XML Extensible Markup Language XTAL Crystal XSD XML Schema Definition
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2 References

[1] UM-B-040, DA1458x/DA1468x Production Line Tool, User manual, Dialog Semiconductor. [2] UM-B-014, DA1458x Bluetooth Smart Development Kit - Expert, User Manual, Dialog
Semiconductor [3] FT4232H – Hi-Speed Quad USB UART IC, FTDI Chip. [4] FT232 – USB UART IC, FTDI Chip [5] Anritsu MT8852B, https://www.anritsu.com/en-US/test-measurement/products/mt8852b [6] Keysight 34401A, http://www.keysight.com/en/pd-1000001295%3Aepsg%3Apro-pn-
34401A/digital-multimeter-6-digit?cc=US&lc=eng
[7] Keithley 2000, http://www.tek.com/tektronix-and-keithley-digital-multimeter/keithley-2000-series-
6%C2%BD-digit-multimeter-scanning [8] Papouch TMU USB thermometer, https://www.papouch.com/en/shop/product/tmu-usb-
thermometer/
[9] NI USB TC-01, http://sine.ni.com/nips/cds/view/p/lang/en/nid/208177 [10] Honeywell Xenon 1900, https://www.honeywellaidc.com/products/barcode-scanners/general-
duty/xenon-1900g-1902g [11] Zebra/Motorola LS2208, https://www.zebra.com/us/en/products/scanners/general-purpose-
scanners/handheld/ls2208.html
[12] AN-B-020, DA14580 End product testing and programming guidelines, Application Note, Dialog
Semiconductor [13] Litepoint IQXel-M, http://www.litepoint.com/test-solutions-for-manufacturing/iqxel-m/ [14] NI USB-6009 DAQ, http://sine.ni.com/nips/cds/view/p/lang/en/nid/201987 [15] Keysight 34461A, http://www.keysight.com/en/pd-2270273-pn-34461A/digital-multimeter-6-digit-
34401a-replacement-truevolt-dmm?cc=GR&lc=eng
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3 New version features

This manual explains the usage of the 16 channel DA1458x/DA1468x Production Line Tool (PLT). It refers to the DA1458x_DA1468x_PLT_v4.3 software release, which compared to DA1458x_DA1468x_PLT_v4.2 has the added features illustrated in Table 1.
Table 1: DA1458x_DA1468x_PLT_v4.3 added features
#
Features
Description
1
Automated GU firmware upgrade.
A new GUI application executable was created (GU_fw_upgrade.exe) to automate the process of the Golden Unit firmware upgrade.
2
External 32kHz connection test.
Added a connection test of the external low power 32kHz crystal oscillator. 3
HID barcode scanner.
Barcode scanner mode now supports HID barcode scanner devices.
4
DA14585/6 range extender tests.
Range extender tests were added. These are available for DA14585/6 devices.
5
Write OTP image & OTP header in a single binary.
User can now burn a single binary in the OTP that could contain both the OTP firmware and the OTP header part.
6
Improvements for DA14683 secure boot.
Added new OTP header fields (OTP image length, CRC, Secure device), to help the operations of creating a secure device product.
7
DA14682/3, DA15101 XTAL 32MHz support.
DA14682/3, DA15101 devices with XTAL 32MHz crystal are now supported. New test firmware files were added for both production and memory programming tests.
8
Warning pop-up window when any OTP write is enabled.
If an OTP memory area is going to be burned, a window will pop-up with a warning informing the user that the OTP memory is going to be burned. This option can be disabled.
9
Peripheral current measurements.
Current measurement for attached peripherals (LEDs on GPIOs, buzzer, or custom). Improved current measurement algorithm.
10
GPIO toggle for external watchdog circuit.
A GPIO can be selected by the user to toggle every 2sec in order to keep an external watchdog circuit alive.
11
DA1468x Pro-DK motherboard as current measurement instrument.
This version supports the DA1468x Pro-DK current meter module to be used for the current measurement tests.
12
Set/Get GPIO status test.
GPIO correct operation test, either as a pair with another GPIO to set and get the correct state, or sensing a high/low state. Available for all ICs.
13
DA1458x configurable SPI and EEPROM memories.
User can now configure the memory to be used, without having to rebuild the flash programmer firmware. Also more SPI flash memories are now supported by default.
14
DA1458x memory enable GPIO.
User can select a GPIO to go high before any memory action. This can be used in case the hardware product design has a memory enable GPIO.
15
DA1458x sleep clock selection (needed for boost mode).
The sleep clock can be selected, either external 32Khz or the internal RCX. This selection is crucial for products that operate in boost mode.
16
OTP TCS section write.
The tool can now burn the OTP TCS area. User has only to set the data to be burned in the TCS area. PLT automatically finds the first available empty TCS entry.
17
Scan advertisements using the production test firmware
A new production test was added that uses HCI advertisement commands to set the device into advertisement mode. The GU scans the air to find the DUT advertisements and reports the RSSI. This test is very similar to measuring the DUT TX power.
18
Added PER limits in RF RSSI tests.
In all RF reception tests, Packet Error Rate limit was added.
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4 Introduction

By using the PLT, it is possible to test, calibrate and load firmware for 16 different devices under test (DUTs) in parallel.
The following are deliverable parts of the tool.
● Hardware
○ Main board (Figure 1) together with a DA14580-QFN48 Golden Unit. ○ Electrical schematics of the main board. ○ Gerber files of the main board. ○ Bill of Materials of the main board.
● Software
○ Source code files organized in a Microsoft® Visual Studio Express 2015 solution. ○ Application executables and required DLLs.
● Documents.
An example of a sequence of actions the tool performs is given below. All actions are performed in parallel for up to 16 devices.
1. Download the production test firmware (e.g. prod_test_580.bin).
2. Perform automatic crystal (XTAL) trimming.
3. Perform RF RSSI test.
4. Download and burn the customer firmware (into OTP, SPI flash, QSPI flash or I2C EEPROM)
5. Burn the OTP header.
6. Perform Scan test. Reset the DUTs and set the GU to scan for the DUT BLE advertisements.
Figure 1: Production Line Tool Hardware
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5 Hardware

5.1 Hardware Block Diagram

The Production Line Tool hardware consists of various blocks, as illustrated in Figure 2. These blocks are explained below.
● Blue blocks: USB-to-UART interfaces.
○ Four FT4232 FTDI QUAD USB-to-UART interfaces are used for a 16-channel USB-to-UART
conversion.
○ The GU is connected to the PC via an FT232 FTDI USB-to-UART interface.
● Red block: A CPLD that has the following purpose.
○ Switch UART signals between the PC USB-UART and DUTs. ○ Switch DUTs VBAT signal ○ Switch DUTs VPP signal (only when VBAT is enabled). ○ Produce Reset signal to the DUTs. ○ Produce 500ms XTAL calibration pulse.
● Orange block: A Golden Unit (GU) is mounted, which has the following functionality:
○ CPLD control using custom commands. ○ Transceiver for Bluetooth RF signals to and from the DUTs. ○ Produce an audio tone using PWM, used for audio testing. ○ Scan for device BLE advertisements, after the customer firmware has been programmed.
● Purple blocks: Sixteen (16) device connectors.
Figure 2: Production Line Tool Hardware Board Block Diagram
USB HUB
FT4232
FT4232
FT4232
FT4232
CPLD
Golden Unit
USB Cable 2
FT232
USB Cable 1
Production Line Tool Hardware
URX/UTX
URX/UTX
URX/UTX
URX/UTX
4x URX/UTX
4x URX/UTX
4x URX/UTX
4x URX/UTX
Control &
Commands
URX/UTX
DUT1
DUT2 DUT3
DUT16
VPP Enable
VBAT Enable
XTAL trim pulse
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5.2 Printed Circuit Board Layout

In Figure 3, the top view of the PLT board is illustrated. The important parts are pointed by the orange boxes. The VPP jumper and the Current jumper are colored in blue.
The Golden Unit has a DA14580 QFN48-die soldered. Most of the 48 pins are basically used to connect to the CPLD. The CPLD is programmed during the production of the PLT board via the CPLD socket. No need for the users to use the CPLD socket.
The black banana sockets are all connected to the same ground (GND) plane.
Figure 3: Top View of the PLT Hardware Board (Version C)
USB/UART
for DUTs
4xFTDI
USB/UART
VBAT
VDDIO
5V
USB/UART
for GU
GU JTAG
Golden
Unit
Antenna or SMA cable
CPLD
GU reset
VPP
VPP
jumper
Current
jumper
16x DUTs
CPLD prog.
socket
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5.3 PLT Power Supply

External power supply is needed for the PLT to run. This should be connected to the banana sockets as shown in Figure 4.
Table 2 shows the voltage and current requirements for each power supply. The blue banana
sockets can be used for device current measurements.
Figure 4: PLT Hardware Power Connections
Table 2: Power Supply Requirements
Power Supply
Voltage (V)
Current (mA)
Buck Mode
Boost Mode
VBAT (Buck mode)
2.4 … 3.3
16 x 20
VBAT (Boost mode)
1.5 … 3.3
16 x 20
VDDIO
2.4 … 3.3
70
70
VDD 5V
4.75 … 5.25
~335
~335
VPP
6.6 … 6.8
16 x 2
16 x 2

5.4 DUT Connector

The BLE devices are connected to the PLT using the DUT1-16 connectors at the edge of the PLT board. Figure 5 shows the pin-header connections from the Production Line Tool hardware board to the DUTs. Table 3 describes the purpose of each pin.
Figure 5: Production Line Tool DUT Connections
Production Line Tool
1 2
3 4
5 6
7 8
9 10
XTAL Calibration Pulse
not used
GND
VPP
RST
VBAT
not used
not used
DUT TX
DUT RX
(pinning 100 mil)
VBAT
DUT TX
DUT RX
VPP
GND
DUT
Only DA14580/1/2/3
RST
CURRENT CURRENT
GND
VBAT
GND
VDDIO
GND VDD 5V
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Table 3: PLT Connections to Applications
Header Pin
Name
Description
1
VBAT
Depending on the VBAT/Reset Signals Operation mode this can be used as Voltage supply for the DUT or as Reset signal. Due to this connection, no external power supply is needed for the DUTs. This pin must be connected if there is no other power supply (e.g. battery).
2
XTAL Calibration Pulse
This pin can be used as a reference pulse during the automatic crystal calibration. More details are given in 7.2.6.1 for DA1458x devices and in 7.2.10.1 for DA1468x devices. The crystal trim pulse can also be supplied in the UART RX device pin. This is the most common scenario. However, there may be hardware limitations where the UART RX pin cannot be used. In such cases, the particular PLT header pin is used.
6
GND
Ground pin. This pin must be connected.
7
DUT TX
This is connected to the device UART TX pin. This pin must be connected.
8
VPP
This pin provides the 6.8V required to program the OTP in the DA14580/1/2/3 devices.
Note: This option is not available with the VBAT as Reset mode.
9
DUT RX
This is connected to the device UART RX pin. This pin can also provide the crystal calibration reference pulse for the automatic crystal (XTAL) trim procedure, as described in 7.2.6.1 for DA1458x devices and in 7.2.10.1 for DA1468x devices. This pin must be connected.
10
RST
The reset signal must be connected if battery powered devices are used. A power cycle of VBAT will produce a Power on Reset (POR), so a RESET is
given to the DUT. In that case the RST-wire is not needed. In summary, when no battery is used, the POR will RESET the DUT.

5.5 Data Streaming

Figure 6, Figure 7 and Figure 8 illustrate the three possible data streams through the CPLD. The
CPLD switches S1, S2, S3 and S4 are controlled by the software via the Golden Unit.

Normal Operation (Figure 6):

UART-RxD data is transported via the RED arrows (AA):
PC USB USB HUB Quad UART CPLD signal ‘AA’ DUT RxD (programmed as RxD).
UART-TxD data is transported via the BLUE arrows (BB):
PC USB USB HUB Quad UART CPLD signal ‘BB’ DUT TxD.
Figure 6: CPLD UART Data Streams
`
Golden
Unit
Quad UART
Quad
USB
HUB
PC USB
1
3
5
7
9
2
4
6
8
10
g
r
u(x)
Tg
Tr
CPLD
1
2
3
4
PC USB
l(x)
x(x)
VDDIO Vbat
v(x)
&
Vpp
gnd
DUT Connection Port
1
0
1
0
‘0’
0
1
‘1’
0
1
u(x)
p(0/1)
t(0...3)
Vbat
DUT-
Tx
Reset
Vpp
Pulse
DUT-
Rx
UART-Tx UART-Rx
S1
S2
S3
S4
AA
BB
r(xx)
16 * Virtual COM-PORT
1 * Virtual COM-PORT
16 * DUT Interface Switches + Connection Ports
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Crystal Trimming (Figure 7):

The XTAL calibration pulse (500ms) is transported via the PURPLE arrows (CC):
CPLD TIMER Tg CPLD S4 DUT RxD (programmed as GPIO). UART-TxD data is transported via the BLUE arrows (BB):
PC USB USB HUB Quad UART CPLD signal ‘BB’ DUT TxD.
Figure 7: CPLD XTAL Trim Pulse Data Stream

Loopback Operation (Figure 8):

Loopback operation is used during the start of the tests. The PC PLT software uses this feature to automatically find the numbers of the Virtual COM ports in the Windows PC.
The UART loopback data is transported via the GREEN arrows (DD): PC USB USB HUB Quad UART CPLD signal ‘DD’ SW1 Quad UART USB HUB USB PC.
Figure 8: CPLD UART Loopback Data Stream
Note: The CPLD is also used to switch the UART signals between the QUAD FTDIs and the DUTs.
When the VBAT is switched off and the UART wires are not disconnected, a ‘rest voltage’ may be present on the product. This could cause problems with the power-on reset (POR) and the product might not boot correctly. The CPLD will switch off the UART signals when the VBAT is not present.
`
Golden
Unit
Quad UART
Quad
USB
HUB
PC USB
1
3
5
7
9
2
4
6
8
10
g
r
u(x)
Tg
Tr
CPLD
1
2
3
4
PC USB
l(x)
x(x)
VDDIO Vbat
v(x)
&
Vpp
gnd
DUT Connection Port
1
0
1
0
‘0’
0
1
‘1’
0
1
u(x)
p(0/1)
t(0...3)
Vbat
DUT-
Tx
Reset
Vpp
Pulse
DUT-
Rx
UART-Tx UART-Rx
S1
S2
S3
S4
BB
CC
r(xx)
16 * Virtual COM-PORT
1 * Virtual COM-PORT
16 * DUT Interface Switches + Connection Ports
`
Golden
Unit
Quad UART
Quad
USB
HUB
PC USB
1
3
5
7
9
2
4
6
8
10
g
r
u(x)
Tg
Tr
CPLD
1
2
3
4
PC USB
l(x)
x(x)
VDDIO Vbat
v(x)
&
Vpp
gnd
DUT Connection Port
1
0
1
0
‘0’
0
1
‘1’
0
1
u(x)
p(0/1)
t(0...3)
Vbat
DUT-
Tx
Reset
Vpp
Pulse
DUT-
Rx
UART-Tx UART-Rx
S1
S2
S3
S4
DD
r(xx)
16 * Virtual COM-PORT
1 * Virtual COM-PORT
16 * DUT Interface Switches + Connection Ports
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5.6 Golden Unit

Figure 9: Golden Unit
The Golden Unit (GU) is a 'daughter' board mainly used in the Expert Development Kit [2]. In the PLT, the GU is used for various purposes:
● RF transmitter for the RF RSSI DUT test.
● RF Receiver for the device BLE advertisement scan test.
● Audio tone generator for the audio test.
● Controlling the CPLD.
The GU uses an SPI Flash memory mounted on the PLT board. The SPI Flash is pre-programmed with a specific production test firmware. If required, there are several ways to upgrade the GU firmware, either via the PLT’s GU JTAG connector, via the UART or using a new GUI application executable (GU_fw_upgrade.exe) as explained in 7.5. The latest GU firmware can be found inside the latest PLT software release, under the executables\binaries\GU folder. Note: PLT v4.3 and onwards requires the latest firmware version of the Golden Unit. If the Golden Unit firmware is not updated, then the PLT applications will not run.
Note: The Golden Unit is calibrated during PLT production. It is delivered with a calibration characterization document.

5.6.1 GU Reset

The Golden Unit includes a hardware reset circuit. The GU reset signal is connected to an FTDI FT232 GPIO pin.
Figure 10 illustrates the electrical schematics of the GU reset circuit. Section 5.8.3 illustrates the
jumper positions on the PLT PCB. The red line is the connection between the FTDI IC GPIO pin (DTR) and the GU reset signal on the
PLT GU connector header. The PLT software controls this pin via the FTDI DLL driver ftd2xx.dll. Making pin DTR low for a short period of time will reset the GU. Every time the PLT tests start, a hardware reset is issued to the Golden Unit. Jumper J47 should be ON and J46 OFF for this reset method to operate.
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Figure 10: GU Reset Circuit

5.7 Current Measurements

The PLT board provides connections to perform DUT current measurements (see Figure 11). By connecting a current meter to the blue banana sockets, the combined VBAT current of all DUTs can be measured. Jumper J26 should be removed when a current meter is connected. If no current meter is used, jumper J26 should be mounted. See also section 5.8.
The connection shown in Figure 11 can only be used with the VBAT Only and VBAT On with Reset (when the VBAT lines are used to power the DUTs) modes. If the DUTs are powered using a single external power supply, then the multi-meter should be connected on that power supply in a similar way as described before with the PLT. If the DUTs are powered independently (e.g. each one with its own battery) the current measurement procedure cannot be used.
Figure 11: VBAT DUT Current Measurement Setup

5.8 Jumper Settings

This section describes the PLT hardware jumper settings.
Table 4: Jumpers
Jumper
PLT HW version
Description
J26
A, B, C, D
Connects the VBAT line from the PLT power supply to the DUTs. This jumper can be used when there is no multi-meter instrument connected for current measurement.
J37
B, C, D
This jumper sets the Golden Unit’s SPI Flash chip select (CS) pin to high. This jumper is needed placed when the Golden Unit should NOT boot from the SPI flash.
CURRENT
CURRENT
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Jumper
PLT HW version
Description
J42
B, C, D
Feeds the VPP lines of the DUT connectors with VPP voltage used for OTP burning in DA14580/1/2/3 DUTs.
J46
C, D
This jumper can be used to reset the Golden Unit. The two pins on the jumper are the same as the ones in the GU reset switch next to the jumper.
J47
D
This jumper connects the Golden Unit’s FTDI DTR line to the Golden Unit’s reset pin.
With this jumper on the PLT, software can reset the Golden Unit on-demand.

5.8.1 J26 - Current Measurements

As shown in Figure 12, jumper J26 should be mounted when no external current meter is attached. Otherwise, when a current meter is connected via the blue banana sockets to measure the device current, the J26 jumper should be removed.
Figure 12: Connections for ‘Floating Current’ Measurements

5.8.2 J42 - DA1458x OTP Burning Voltage

If DA14580/1/2/3 OTP programming is required, the VPP line should be connected between the PLT DUT connector and the actual DUT (Figure 5). Jumper J42 on the PLT board should also be mounted. Figure 14 shows the jumper position on the PLT hardware board. Figure 13 illustrates the electrical schematics of the VPP and the location of the J42 jumper.
DA14585/6 and DA1468x devices do not need an external voltage for the OTP to be burned. Therefore, the VPP line from the PLT DUT connector (Figure 5) should not be connected to the DA1468x DUT.
Note: The VPP line feature cannot be used with the VBAT as Reset mode, because of the fact that the VPP line will not operate when VBAT is not switched on. It is secured in the hardware.
Figure 13: VPP Control Circuit Schematic
CURRENT CURRENT
J26
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Figure 14: Location of the VPP Jumper J42

5.8.3 J47, J46 - GU Reset

For a GU hardware reset, jumper J47 should be mounted and jumper J46 should be removed. These two jumpers are involved in the circuit illustrated in Figure 10. In this way, the PLT software will control the GU hardware reset. Figure 15 shows the jumper placement on the actual PCB.
Figure 15: Location of J46 Jumper
Figure 16: Location of J47 Jumper

5.8.4 J37 - GU Programming

Jumper J37 connects the Chip Select of the GU SPI Flash to a logic high level. This causes the GU not to boot from the already programmed SPI Flash, allowing the GU to load different code into its System-RAM via the JTAG connector or via UART. Figure 17 shows the circuit schematic and Figure
18 shows the location of jumper J37 on the PLT PCB.
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Figure 17: J37 - GU Programming Jumper Schematics
Figure 18: Location of J37 Jumper
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5.9 PLT Functional Blocks

Figure 19 shows an overview of the PLT hardware functions. For detailed electrical schematics, see Appendix B.
USB - HUB
USB - UART
USB - UART
USB - UART
USB - UART
USB UART
Golden Unit
DUT 1
6.7V Vpp
CPLD
DUT 2
DUT 3
DUT 4
DUT 5
DUT 6
DUT 7
DUT 8
DUT 9
DUT 10
DUT 11
DUT 12
DUT 13
DUT 14
DUT 15
DUT 16
PC
PC
Vbat
Vpp
500mSec
pulse
Rst
3V3
1V8 1V2
12MHz
Xtal
5V
Vbat Vbat DUTs
Power
VDDIO VDDIO CPLD
SWITCHES
Figure 19: PLT Functional Blocks
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6 Software

6.1 Introduction

Figure 20: Production Line Tool Software Block Diagram
BLE tester instrument support
Ambient temperature measure
Current measurements support
cur_meas_
driver.dll
ni6009.dll
ammeter_scpi
.dll
ammeter_da1
468x_dk.dll
user.dll
mt8852b.dll
ble_tester_driver.dll
IQxelM.dll
user.dll
tmu_temp.dll
Temp_meas
_driver.dll
ni_usb_tc01.dll
user.dll
User Interface Core DLLs Instruments
User defined extensions
DA1458x & DA1468x FWs
(uartboot.bin, prod_test.bin)
flash_programmer.bin,
plt_fw.bin)
p_dll.dll
CFG, GUI, CLI, or GU
upgrade
cfg_dll.dll
dbg_dll.dll
u_dll.dll
production_line_tool.dll
Logs
CSV
barcode_scanner.dll
params.xml
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The Production Line Tool software is a collection of software blocks that interact with each other, as shown in Figure 20. Its main purpose is to communicate with the PLT hardware and the DUTs in order to run the production tests and perform memory operations. The software blocks can be arranged in four main groups:
● Red blocks: User Interface (UI) applications.
● Blue blocks: Core libraries.
● Green blocks: Instrument interface libraries.
● Purple blocks: User defined extensions.
Core libraries, instrument interface libraries and user-defined extensions are explained in detail in UM-B-040 [1]. The User Interface applications block consists of four application executables. For details, see section Applications.
Table 5: PLT User Interface Application Executables
Short Name
File Name
Description
CFG PLT
DA1458x_DA1468x_CFG_PLT.exe
Configuration application. Load, edit and save the test parameters and the memory actions to be performed during device testing.
GUI PLT
DA1458x_DA1468x_GUI_PLT.exe
Graphical User Interface (GUI) application. Performs the actual device validation and memory programming. Provides a visual indication of the test results and access to the result logs.
CLI PLT
DA1458x_DA1468x_CLI_PLT.exe
The same as the GUI PLT but console based.
GU Upgrade
GU_fw_upgrade.exe
A Graphical User Interface (GUI) application, which is used to easily upgrade the firmware of the Golden Unit.

6.2 DA15101 support

DA15101 devices are supported from PLT version v4.2 and onwards. The DA15101 chipset is similar to the DA14683, thus the same tests are supported shown in Table 15. In this user manual DA15101 chipsets are treated as DA14682/3, meaning that references to DA1468x apply to DA15101 chipsets as well.

6.3 Software Package Contents

The PLT software release package comes in a compressed folder DA1458x_DA1468x_PLT_v_X.zip, where 'X' represents the version number of the current PLT release.
Figure 21 illustrates the main folders of the PLT software package. Folder executables holds all the
executables and libraries needed for the PLT to run on a Windows 7/8/8.1/10 machine. Folder source contains the entire source code of the PLT, organized in a Visual Studio Express 2015 solution.
Figure 21: DA1458x/DA1468x PLT Software Package Contents
Table 6 gives a short description of the files and folders contained in the executables directories.
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Table 6: Executables Folder Description
File or Folder
Description
ammeter_instr_plugins/
Contains the current measurement instrument DLLs, used during the current measurement tests.
ammeter_instr_plugins/ni6009.dll
This is the DLL for the NI-6009 DAQ [14] that could be used in the current measurements. The usage of this instrument for measuring the current requires an external shunt resistor and things complicate when the measurement switches from many DUTs to one DUT. We only recommend using this instrument if one DUT per run is tested.
ammeter_instr_plugins/ammeter_scpi.dll
This is the DLL for taking current measurements using a DMM that supports the standard SCPI commands. NI­VISA is also used for this purpose. Example DMM instruments are the Keysight 34401A [6], the Keithely 2000
[7] or the Keysight 34461A [15]. The PLT has been tested
with all three instruments.
ammeter_instr_plugins/ammeter_da1468x_dk.dll
This is the DLL for taking current measurements using the current measurement module placed on the DA1468x pro motherboard.
binaries/
Contains the necessary firmware binaries. These are described in detail in UM-B-040 [1]. Additionally, the SetupCode_Generator_680.exe application used in homekit products to create a specific hash key is included.
binaries/GU/prod_test_GU.bin
Contains the Golden Unit latest firmware binary. Users should better upgrade their PLT hardware with the GU firmware contained in this folder.
ble_tester_instr_plugins/
Contains the BLE tester instrument DLLs.
ble_tester_instr_plugins/mt8852b.dll
This is the DLL that performs the Direct Test Mode RF tests using the Anritsu MT8852B instrument [5].
Note: There is an issue in Anritsu MT8852B firmware version 4.20.000 and should be upgraded to the latest one. Latest MT8852B instrument firmware can be downloaded from the following link:
https://www.anritsu.com/en-US/test­measurement/support/downloads?model=MT8852B
ble_tester_instr_plugins/IQxelM.dll
This is the DLL that performs the Direct Test Mode RF tests using the Litepoint IQxel-M instrument [13].
icons/
Contains pictures used by the PLT applications.
IQmeasure_3.1.2/
Contains specific Litepoint IQxel-M DLLs as released by Litepoint.
params/
Contains the configuration params.xml file, the XML schema params.xsd and a sample of BD address file named bd_address.ini.
params/custom_mem_data.csv
This is a sample CSV file to be used in the custom memory burn action. Users could edit this file and add their own specific memory data to be burned by the PLT. The PLT will match the entries in the CSV file using the BD addresses. The format of the file is explained later.
scripts/
Contains sample batch script files. User can select batch script files to be executed by the PLT before and after each test.
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File or Folder
Description
scripts/run_before_tests.cmd
An example script that copies and renames binaries from a directory to a folder required by the PLT when ‘Different image per DUT’ is selected. This folder is accessed by the PLT to read and burn different binary per DUT.
scripts/run_after_tests.cmd
An example script that moves all logs files, except the ones with the current date, to a specific folder.
temp_meas_instr_plugins/
Contains the temperature measurement instrument DLLs.
temp_meas_instr_plugins/ni_usb_tc01.dll
The ni_usb_tc01.dll is the DLL used to interface a NI USB TC01 [9] temperature sensor for temperature measurements.
temp_meas_instr_plugins/tmu_temp_sens.dll
The tmu_temp_sens.dll is the DLL used to interface a Papouch TMU sensor [7] for temperature measurements.
volt_meter_instr_plugins/
Contains the voltage meter instrument DLLs. These are used only in DA14681-00 silicon for ADC calibration purposes.
volt_meter_instr_plugins
/volt_meter_scpi.dll
The volt_meter_scpi.dll is a DLL that implements basic interface with a DVM using SCPI commands through NI­VISA libraries and GPIB interface. Has been tested with Keithley 2000 [7] and Keysight 34401A [6].
DA1458x_DA1468x_CFG_PLT.exe
This is the configuration application. It is a graphical user interface application used to edit the PLT test configuration parameters, saved in an XML file, params.xml.
DA1458x_DA1468x_CLI_PLT.exe
This is the command line interface tool. It performs the production tests and memory programming through a console.
DA1458x_DA1468x_GUI_PLT.exe
This is the graphical user interface tool. It performs the production tests and memory programming through a graphical user interface.
GU_fw_upgrade.exe
This is the Golden Unit firmware upgrade application.
ammeter_driver.dll/.lib
This DLL loads and accesses all DMM instrument DLLs from inside the ammeter_instr_plugins. It acts as an intermediate layer between the prod_line_tool_dll and the instrument DLLs.
barcode_scanner.dll/.lib
This DLL receives BD addresses from a barcode scanner with USB to serial interface. Has been tested with Honeywell Xenon 1900 and the Motorola LS2208 barcode scan readers [10] [11].
ble_tester_driver.dll/.lib
This DLL loads and accesses all BLE tester instrument DLLs from inside ble_tester_instr_plugins folder.
cfg_dll.dll/.lib
This is the configuration parameter handling DLL. It can validate, load and save parameters from a given XML file.
dbg_dll.dll/.lib
The dbg_dll.dll file is a DLL used to print debug messages to a file or to a debug console.
ftd2xx.dll
This is the FTDI DLL. Used to hard reset the Golden Unit from the application whenever needed through an FTDI GPIO pin.
p_dll.dll/.lib
This is the production test DLL that performs device functional tests.
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File or Folder
Description
prod_line_tool_dll.dll/.lib
This is the core DLL. The heart of the system that performs the state machines for all tests and memory actions to be executed. It is responsible to log the results and notify the user interfaces about the current device test status.
temp_meas_driver.dll/.lib
This is the temperature measurement driver DLL. It loads and accesses all temperature measurement DLLs from inside the temp_meas_instr_plugins folder.
u_dll.dll/.lib
This is the DLL that performs the memory actions, like the memory programming, erasing, etc.
vc_redist.x86.exe/vc_redist.x64.exe
These are the Visual Studio 2015 Express redistributable packages for 32 and 64-bit machines. For installing these, users should agree to the license requirements described during the installation of any of these packages and also found here: https://www.visualstudio.com/license-
terms/mt171551/.
volt_meter_driver.dll/.lib
This is the voltage meter driver DLL. It loads and accesses all voltage meter DLLs from inside the volt_meter_instr_plugins folder.

6.4 Prerequisites

Before building and running the code, the packages indicated in Table 7 should be installed on the PC. Some are required and others are optional depending on the tests or actions needed.
Table 7: Production Line Tool Prerequisites
Item
Optional
Description
Visual Studio 2015 Express
Yes
The IDE used to edit and debug the Production Line Tool. This is only required if users would like to edit the software.
vc_redist.x86.exe
No
Already described in Table 6. Users should agree to the license requirements described during the installation of any of these packages and also found here:
https://www.visualstudio.com/license-terms/mt171551/.
MSXML6
No
Installed by default in Win 7/8/8.1/10.
.NET framework 4
No
Needed for the graphical user interface applications.
Latest FTDI drivers
No
Tested with FTDI v2.12.24, v2.12.26 and v2.12.28 drivers.
Honeywell Xenon 1900 drivers
Yes
Needed if the barcode scanner is going to be used for scanning the devices BD addresses and/or custom memory data. Other types of barcode scanners could also be used.
Motorola LS2208 drivers
Yes
Used if a barcode scanner is going to be used for scanning the device BD addresses and/or custom memory data.
NI-VISA 15.5
Yes
Used for optional instrument control, like BLE tester and voltage meter.
NI-VISA 15.5 can be downloaded from
http://www.ni.com/download/ni-visa-15.5/5846/en/
NI-488.2 15.5
Yes
Used for instrument control, like BLE tester and DMM. NI-488.2 15.5 can be downloaded from
http://www.ni.com/download/ni-488.2-15.5/5859/en/
NI-DAQmx
Yes
Used for optional instrument control like temperature measurements using the NI USB TC01 sensor.
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6.5 System Requirements

Table 8 contains the minimum system requirements for the PLT to operate.
Table 8: Minimum System Requirements
Item
Minimum Requirements
Operating system
Windows 7/8/8.1/10
CPU
Dual Core CPU
Memory
1 GB RAM or larger. Each device log can reach up to 40 kB.
Hard drive
For 100000 devices, at least 4 GB of available hard disk is required.
Monitor resolution
1280 x 768 or higher
Monitor DPI Smaller - 100% = 96 DPI
Supported
Medium - 125% = 120 DPI
Supported
Larger - 150% = 144 DPI
Not supported

6.6 Limitations

Parallel control of multiple PLT hardware boards on the same PC is not supported.
However, by correctly setting up the system, two or more PLT hardware boards could be connected and controlled by multiple GUI PLT application instances on the same PC, but the tests should only be executed sequentially. The main reasons for this limitation are indicated below:
● The GU FT232 FTDI IC is programmed to have a special serial string, "DialogSemi" (see Table
118). This is used in the 'GU COM port find' PLT operation. This operation searches all PC
connected FTDIs to find the serial string "DialogSemi". When found, it saves it as the GU COM port number to be used by the PLT. The 'GU COM port find' operation will open and lock, for a short period of time, all Windows COM ports, one by one, even the ones used by the other PLT hardware. If the second GUI PLT application instance is performing test operations at the same time and wants to open its DUT COM ports, the operation may fail.
● When the GUI PLT application starts the test operations, it performs a DUT COM port
enumeration. During this process, the GU sets the CPLD in UART loopback mode. It opens all PC COM ports one by one and sends a specific word, while trying to see if it receives it back.
During this process, other PLTs may need to work with ‘their’ DUT COM ports, which may
happen to be currently used by the ‘DUT COM port enumeration’ process of the first PLT.
● GU hardware reset. In every PLT test run a GU HW reset is issued from the PLT software using
a specific GU FTDI GPIO pin. In order to access the GU FTDI the FTDI API is used from
ftd2xx.dll. To access the FTDI hardware and read the serial number through the FTDI ftd2xx.dll the FT_Open API is used on all PC COM ports, one by one. Since FT_Open is used in
all PC COM ports, conflicts could arise if other PLTs would also like to use these COM ports.
● BD addresses handling. Usually, the PLT automatically sets the DUT BD addresses by
increasing them one by one. Special care should be taken to work with multiple PLT hardware and software. Most probably, two different BD address files should be used for each PLT hardware.
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6.7 Building the Code

The PLT software release package contains not only application executables for directly performing the tests out of the box, but also the entire source code of the tools. This is organized in a Visual Studio 2015 Express solution.
To open the Visual Studio 2015 Express PLT source code solution the following steps should be executed (see Table 9).
Table 9: Opening the PLT Visual Studio 2015 Express Source Code Solution
Step
Description
1
Download the latest PLT software package (e.g. DA1458x_DA1468x_PLT_v_4.x.zip)
2
Extract the software package. The following two folders should exist.
3
Go to folder 'source\production_line_tool'. The following files and folders should exist.
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Step
Description
4
Double click the production_line_tool.sln Visual Studio 2015 Express solution file. The Visual Studio 2015 Express application will start and the PLT Solution Explorer should be shown.
5
To build the code follow the process described in the UM-B-040 document [1]. Note: Some Visual Studio projects may need to be unloaded prior to building the code, as they require
external libraries to be installed. Please read UM-B-040 [1] for details.
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6.8 Executing the Applications

To execute the Production Line Tool applications, the process described in the following tables should be followed.
Table 10: DA1458x_DA1468x_CFG_PLT.exe Application Execution
Step
Description
1
Download the latest PLT software package (e.g. DA1458x_DA1468x_PLT_v_4.x.zip).
2
Extract the software package. The following two folders should exist.
3
Go to folder 'executables'. This folder should contain the following files and sub-folders.
4
Double click the DA1458x_DA1468x_CFG_PLT.exe application executable. Most probably, the following warning will be shown.
During start-up, the DA1458x_DA1468x_CFG_PLT.exe application loads the Hardware configuration parameters from the params.xml file. These parameters also contain the GU COM port. The default params.xml file has the GU COM port set to 4. If this COM port number does not exist in the PC, then this warning message will be shown. Therefore, this warning message indicates that the default GU COM port set in the params.xml file is not valid or that the GU USB cable is not connected to the PC.
Press 'OK' if the warning message appears.
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Step
Description
5
The application will start and the initial Hardware Setup screen will be shown.
6
Connect the PLT HW to the PC. Connect the GU and the DUT USB cables to the PC. Check the Windows Device Manager that 17 new COM ports were found, 16 for the DUTs and 1 for the GU. The following picture is an example of a Device Manager COM ports for a PC that has the PLT connected.
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Step
Description
7
On the DA1458x_DA1468x_CFG_PLT.exe Hardware Setup initial screen press, Auto to automatically find the GU COM port among the 17 Windows enumerated COM ports. The Auto button will turn green if successful. Press Save* to save the new GU COM port in the params.xml file.
Table 11: DA1458x_DA1468x_GUI_PLT.exe Application Execution
Step
Description
1
To successfully start the DA1458x_DA1468x_GUI_PLT.exe application, the DA1458x_DA1468x_CFG_PLT.exe should be executed first in order to set up the system and perform the required tests. See Table 10.
2
Go to folder 'executables'. This folder should contain the following files and sub-folders. Double click on DA1458x_DA1468x_GUI_PLT.exe.
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Step
Description
3
Double click the DA1458x_DA1468x_GUI_PLT.exe application executable. The following initial screen will appear.
4
By clicking the keyboard spacebar, the START button will be pressed and the preconfigured tests and memory actions will start to be executed.
Table 12: DA1458x_DA1468x_CLI_PLT.exe Application Execution
Step
Description
1
To successfully start the DA1458x_DA1468x_CLI_PLT.exe application, the DA1458x_DA1468x_CFG_PLT.exe should be executed first, in order to set up the system and perform the required tests. See Table 10.
2
Go to folder 'executables'. This folder should contain the following files and sub-folders.
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Step
Description
3
Double click the DA1458x_DA1468x_CLI_PLT.exe application executable. The following initial screen will appear.
4
Type 's' and then press Enter. The preconfigured tests and memory actions will start to be executed.
Table 13: GU_fw_upgrade.exe Application Execution
Step
Description
1
GU_fw_upgrade.exe can be started by either opening the application from the executables folder or by pressing the ‘Upgrade GU Firmware’ button in the PLT Hardware Setup tab in DA1458x_DA1468x_CFG_PLT.exe.
2
Go to folder 'executables'. This folder should contain the following files and sub-folders.
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Step
Description
3
Double click the GU_fw_upgrade.exe application executable. The following initial screen will appear.
4
Follow the instructions to guide you to successfully configure and select the Golden Unit. A detailed procedure is given in Chapter 7.5.

6.9 Test Sequence

This section describes the sequence of steps involved for the DA1458x and DA1468x device testing. It outlines all the steps the PLT follows to successfully test a device.

6.9.1 DA1458x Test Sequence

Table 14 describes each step the PLT undertakes for DA1458x devices. Some of the steps are
optional and will only be executed if the equivalent actions are enabled in the configuration parameters. Additionally, some of the steps are supported only for specific DA1458x IC versions.
The entire test sequence for the DA1458x DUTs is shown in Figure 22.
Table 14: DA1458x Test Sequence
Step
Device
Action
Opt
Description
1
DA1458x
Statistics update
No
Update the total tests executed.
2
DA1458x
BD addresses
No
Update the BD addresses for all DUTs.
3
DA1458x
Configuration parameters
No
Configuration parameters are passed from the CLI or GUI to the prod_line_tool_dll. If any of the parameters is not valid, an error will occur.
4
DA1458x
Reset GU
No
Golden Unit hardware reset by controlling an FT232 pin.
5
DA1458x
Initialize CPLD
No
Set the CPLD to an initial known state.
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Step
Device
Action
Opt
Description
6
DA1458x
Check temperature sensor instrument
Yes
Check whether the temperature measurement instrument is online, only if the temperature measurement test is active.
7
DA1458x
Check BLE tester instrument
Yes
Check whether the BLE tester instrument is online, only if any of the BLE tester test operations is active.
8
DA1458x
Check ammeter instrument
Yes
Check whether the ammeter instrument is online, only if any of the current measurement tests is active.
9
DA1458x
Toggle GU LED
No
Toggle the GU red LED on the PLT hardware to indicate that the GU is alive.
10
DA1458x
Check DUT COM ports
No
Check whether the PLT has identified the DUT COM ports and if not run the automatic DUT COM port identification.
11
DA1458x
Temperature measure
Yes
If the temperature measurement test is active, take a measurement and log it to all DUT logs and in the CSV file.
12
DA1458x
Download prod_test_58x.bin
Yes
If any of the production tests is active (e.g. RF tests, XTAL trim, etc.) download the prod_test_58x.bin to the devices.
13
DA1458x
Open the devices COM ports and get the prod_test_58x.bin firmware version.
Yes
After prod_test_58x.bin has been downloaded to the DUTs, test commands can be sent to it. First, the Windows DUTs COM ports are opened. Then a command to get the prod_test_58x.bin firmware version is sent to the devices. If there is a problem in the firmware or in the device, then this is the first failure to happen. The FW version get action will fail.
14
DA1458x
GPIO Watchdog
Yes
If the GPIO watchdog option is enabled, the firmware will begin a periodic GPIO toggling during the whole production test procedure.
15
DA1458x
XTAL trim
Yes
Perform the XTAL trim procedure, if this is active.
16
DA1458x
XTAL trim OTP burn
Yes
If the 'Burn to OTP' option is selected in the CFG PLT, then the calculated XTAL trim value will be burned to the OTP Header.
17
DA1458x
UART resync
Yes
If the XTAL trim procedure was performed in the UART RX pin, then a special UART resync procedure takes place to resynchronize the device's UART RX path, as it may have entered into a baud rate error state due to the 500ms received XTAL trim pulse.
18
DA1458x
BLE scan HCI
Yes
If the Scan DUT Advertise test is active then perform a BLE scan test using HCI triggered advertisements.
19
DA1458x
BLE tester TX power
Yes
If the BLE tester TX Power test is active, then perform the test using the external BLE tester instrument.
20
DA1458x
BLE tester TX carrier offset
Yes
If the BLE tester TX carrier offset test is active, then perform the test using the external BLE tester instrument.
21
DA1458x
BLE tester TX modulation index
Yes
If the BLE tester TX modulation index test is active, then perform the test using the external BLE tester instrument.
22
DA1458x
BLE tester RSSI
Yes
If the BLE tester RSSI test is active, then perform the test using the external BLE tester instrument.
23
DA1458x
GU RSSI test
Yes
If the RSSI test using the GU as transmitter is active, then perform the test.
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Step
Device
Action
Opt
Description
24
DA1458x
GPIO/LED
Yes
Perform the GPIO/LED test, if the test is active.
25
DA1458x
GPIO connection test
Yes
Perform a GPIO continuity or voltage level test, if the test is active.
26
DA14582/5/6 only
Audio test
Yes
Perform the audio test, only for DA145482 and DA14585/6 devices and only if the particular test is enabled.
27
DA1458x
Sensor test
Yes
Perform the sensor tests only if these are enabled.
28
DA1458x
Custom test
Yes
Perform any active custom test.
29
DA1458x
External 32kHz
Yes
Check whether the external 32kHz crystal operates correctly.
30
DA1458x
Current measure
Yes
Perform any active current measurement test for peripherals.
31
DA1458x
Current measure
Yes
Perform the sleep current measurement.
32
DA1458x
Open COM port and perform Firmware download
Yes
If any memory action is active (e.g. SPI Flash burn, erase etc.), download the flash_programmer.bin to the devices.
33
DA1458x
Get
flash_programmer.bin
version.
Yes
After flash_programmer.bin has been downloaded, commands can be sent. A command to get the flash_programmer.bin firmware version is sent to the devices.
34
DA1458x
GPIO Watchdog
Yes
If the GPIO watchdog option is enabled, the firmware will begin a periodic GPIO toggling during the whole memory programming procedure.
35
DA1458x
Initialize SPI Flash memory
Yes
If any SPI flash operation is enabled, initialize memory.
36
DA1458x
SPI erase
Yes
Erase the SPI Flash, either entirely or part of it depending on the configuration.
37
DA1458x
SPI check empty
Yes
Depending on the configuration, check whether the SPI Flash is empty to verify the Flash erase procedure.
38
DA1458x
SPI image write
Yes
If enabled, write the SPI Flash with the customer image. If verify is enabled, the contents of the Flash will be read back and compared to the original image downloaded.
39
DA1458x
Initialize I2C EEPROM memory
Yes
If any EEPROM operation is enabled, initialize memory.
40
DA1458x
I2C EEPROM write
Yes
Write the I2C EEPROM with the customer image. If verify is enabled, the contents of the EEPROM will be read back and compared to the original image downloaded.
41
DA1458x
Custom memory data
Yes
Write custom memory data, taken from a barcode scanner, entered manually or through a CVS file.
42
DA1458x
OTP image write
Yes
Write the OTP image with the customer image. If verify is enabled, the contents of the OTP memory will be read back and compared to the original image downloaded.
43
DA1458x
OTP BD address write
Yes
If enabled, write the BD address into the OTP memory. If verify is enabled, the OTP BD address will be read back and compared to the original.
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Step
Device
Action
Opt
Description
44
DA1458x
OTP BD address read
Yes
If enabled, the BD address from the OTP will be read. The BD address will be printed in GUI or CLI application. An additional test can be enabled to compare the read BD address with the one supplied by the tool.
45
DA1458x
OTP header write
Yes
If enabled, the OTP header fields will be burned.
46
DA1458x
Memory read
Yes
Up to ten memory read tests can be performed with up to 256 bytes in length.
47
DA1458x
Scan test
Yes
If enabled, the GU will scan for device BLE advertisements. For the DUTs to be scanned a valid firmware has to be burned into the OTP, SPI Flash or EEPROM that sends BLE advertisements after power up. Additionally, the BD address should be burned into the OTP by the PLT. The PLT expects to find devices in the air with the BD addresses programmed by the same tool, so it can match the BD addresses returned by the GU.
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Production Tests
Using Ammeter Tester
Memory Programming
Start
Update session parameters and
initialize PLT
Retrieve
Firmware
version
XTAL trim
calibration
Using External BLE Tester
Tx Power
Test
Tx
Frequency
offset test
Tx
Modulation
Index test
Rx
Sensitivity
Test
Golden Unit –
Rx RF Test
GPIO/
LED Test
Sensor
Test
Custom
Test
Load Memory Programming
Firmware
Retrieve
Firmware
Version
SPI erase
SPI Check
Empty
Write SPI
Memory
Write OTP
Image
Write OTP
BD Address
Read OTP
BD Address
Write OTP
Memory
Header
End
Scan Test
Peripheral
Current
Measurement
Sleep Current Measurement
Using Temperature Sensor
Temperature
measurement
Custom Data
Write Test
Memory
Read Test
Write OTP XTAL Trim
Single Test Multiple Tests
Load Production
Test Firmware
GPIO
Watchdog
GPIO
Connection
Test
External
32kHz
Test
SPI
initialization
BLE scan
HCI
Audio
test
GPIO
watchdog
Write
EEPROM
Memory
EEPROM
initialization
External
Instrument
Figure 22: DA1458x Test Sequence
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6.9.2 DA1468x Test Sequence

Table 15 describes each step that the PLT undertakes to validate and program DA1468x based
devices. Some of the steps are optional and will only be executed if the equivalent actions are enabled in the configuration parameters. Additionally, some of the steps are supported only for specific DA1468x IC versions.
The entire test sequence for the DA1468x DUTs is shown in Figure 23.
Table 15: DA1468x Test Sequence
Step
Device
Action
Opt
Description
1
DA1468x
Statistics update
No
Update the total tests executed.
2
DA1468x
BD addresses
No
Update the BD addresses for all DUTs.
3
DA1468x
Configuration parameters
No
Configuration parameters are passed from the CLI or GUI to the prod_line_tool_dll. If any of the parameters is not valid, an error will occur.
4
DA1468x
Reset GU
No
GU hardware reset by controlling an FT232 pin.
5
DA1468x
Initialize CPLD
No
The GU will set the CPLD to an initial known state.
6
DA1468x
Check temperature sensor instrument
Yes
Check whether the temperature measurement instrument is online, only if the temperature measurement test is active.
7
DA1468x
Check BLE tester instrument
Yes
Check whether the BLE tester instrument is online, only if any of the BLE tester test operations is active.
8
DA14681­00 only
Check voltage meter instrument
Yes
Check whether the voltage meter is online, only if the ADC gain calibration is active and only for DA14681­00 devices.
9
DA1468x
Check ammeter instrument
Yes
Check whether the ammeter instrument is online, only if any of the current measurement tests is active.
10
DA1468x
Toggle GU LED
No
Toggle the GU red LED on the PLT hardware to indicate that the GU is alive.
11
DA1468x
Check DUT COM ports
No
Check whether the PLT has identified the DUT COM ports and if not run the automatic DUT COM port identification.
12
DA1468x
Temperature measure
Yes
If the temperature measurement test is active, take a measurement and log it to all DUT logs and in the CSV file.
13
DA1468x
Download uartboot_68x.bin
Yes
If any of the production tests is active and the download through uartboot option is enabled, first the uartboot_68x.bin will be downloaded and then the production test firmware. In addition, if the GPIO watchdog option is enabled, then it will start the toggling after the uartboot_68x.bin is loaded and right before the production test download.
14
DA1468x
GPIO Watchdog
Yes
If the GPIO watchdog option is enabled, then firmware will start the toggling after the uartboot_68x.bin is loaded and right before the production test download.
15
DA1468x
Download prod_test_68x.bin
Yes
If any of the production tests is active (e.g. RF tests, XTAL trim, etc.) download the prod_test_68x.bin to the devices.
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Step
Device
Action
Opt
Description
16
DA1468x
Open the devices COM ports and get the prod_test_681_xx.bin firmware version
Yes
After prod_test_68x_xx.bin has been downloaded, commands can be sent to it. First, the Windows DUTs COM ports are opened. Then, a command to get the prod_test_68x_xx.bin firmware version is send to the devices. If there is a problem in the firmware or in the device, then this is the first failure to happen. The FW version get action will fail.
17
DA1468x
GPIO Watchdog
Yes
If the GPIO watchdog option is enabled, the firmware will begin a periodic GPIO toggling during the whole production test procedure.
18
DA1468x­00 only
ADC gain calibration
Yes
If this option is enabled and if the device is based on a DA14681-00 IC, then the ADC gain calibration procedure takes place using an external voltage meter instrument.
19
DA1468x
XTAL trim
Yes
Perform the XTAL trim procedure, if this is active.
20
DA1468x
UART resync
Yes
If the XTAL trim procedure was performed in the UART RX pin, then a special UART resync procedure takes place to resynchronize the device's UART RX path as it may have entered in a baud rate error state due to the 500ms received XTAL trim pulse.
21
DA1468x
BLE scan HCI
Yes
If the Scan DUT Advertise test is active then perform a BLE scan test using HCI triggered advertisements.
22
DA1468x
BLE tester TX power
Yes
If the BLE tester TX Power test is active, then perform the test using the external BLE tester instrument.
23
DA1468x
BLE tester TX carrier offset
Yes
If the BLE tester TX carrier offset test is active, then perform the test using the external BLE tester instrument.
24
DA1468x
BLE tester TX modulation index
Yes
If the BLE tester TX modulation index test is active, then perform the test using the external BLE tester instrument.
25
DA1468x
BLE tester RSSI
Yes
If the BLE tester RSSI test is active, then perform the test using the external BLE tester instrument.
26
DA1468x
GU RSSI test
Yes
If the RSSI test using the GU as transmitter is active, then perform the test.
27
DA1468x
GPIO/LED
Yes
Perform the GPIO/LED test, if the test is active.
28
DA1468x
GPIO Connection test
Yes
Perform a GPIO continuity or voltage level test, if the test is active.
29
DA1468x
Sensor test
Yes
Perform the sensor tests only if these are enabled.
30
DA1468x
Custom test
Yes
Perform any active custom test.
31
DA1468x
External 32kHz
Yes
Check whether the external 32kHz crystal operates correctly.
32
DA1468x
Current measure
Yes
Perform any active current measurement test for peripherals.
33
DA1468x
Current measure
Yes
Perform the sleep current measurement.
34
DA1468x
Open COM port and download uartboot_68x.bin
Yes
If any of the memory actions is active (e.g. QSPI burn, QSPI erase, etc.) download the uartboot_68x.bin to the devices.
35
DA1468x
Get uartboot_68x.bin version.
Yes
After uartboot_68x.bin has been downloaded, commands can be sent to it. A command to get the uartboot_68x.bin firmware version is send to the devices.
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Step
Device
Action
Opt
Description
36
DA1468x
GPIO Watchdog
Yes
If the GPIO watchdog option is enabled, the firmware will begin a periodic GPIO toggling during the whole memory programming procedure.
37
DA1468x
QSPI memory initialization
Yes
If any QSPI operation is enabled, initialize memory.
38
DA1468x
QSPI erase
Yes
Erase the QSPI, either the entire or part of it depending on the configuration.
39
DA1468x
QSPI check empty
Yes
Depending on the configuration, check whether the QSPI is empty to verify the QSPI erase procedure.
40
DA1468x
QSPI image write
Yes
If enabled, write the QSPI with the customer image. If verify is enabled, the contents of the QSPI will be read back and compared to the original image downloaded.
41
DA1468x
QSPI BD address write
Yes
If enabled, the device BD address is programmed to a specific QSPI flash address.
42
DA1468x
QSPI BD address read
Yes
If enabled, the PLT will read the BD address field from the QSPI. This will be printed in the GUI, CLI screen and in the device logs. An additional test can be enabled to compare the read BD address to the one supplied by the tool.
43
DA1468x
QSPI XTAL trim write
Yes
If enabled, the XTAL trim value calculated during the XTAL trim calibration procedure will be burned into the QSPI flash.
44
DA1468x­00 only
QSPI ADC gain calibration write
Yes
If enabled, the ADC gain calibration value calculated during the calibration procedure will be burned into the QSPI flash.
45
DA1468x
Custom memory data
Yes
Write custom memory data, taken from a barcode scanner, entered manually or through a CVS file.
46
DA1468x
OTP image write
Yes
Write the OTP image with the customer image. If verify is enabled, the contents of the OTP memory will be read back and compared to the original image downloaded.
47
DA1468x
OTP BD address write
Yes
If enabled, write the BD address into the OTP memory. If verify is enabled, the OTP BD address will be read back and compared to the original.
48
DA1468x
OTP BD address read
Yes
If enabled, the PLT will read the BD address field from the OTP. This will be printed in the GUI, CLI screen and in the device logs. An additional test can be enabled to compare the read BD address to the one supplied by the tool.
49
DA1468x
OTP XTAL trim write
Yes
If enabled, the XTAL trim value calculated during the XTAL trim calibration procedure will be burned into the OTP TCS header.
50
DA1468x­00 only
OTP ADC gain calibration write
Yes
If enabled, the ADC gain calibration value calculated during the calibration procedure will be burned into the OTP TCS header.
51
DA1468x
OTP header write
Yes
If enabled, the OTP header fields will be burned.
52
DA1468x
Memory read
Yes
Up to 10 memory read tests can be performed with up to 256 bytes in length.
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Step
Device
Action
Opt
Description
53
DA1468x
Scan test
Yes
If enabled, the GU will scan for device BLE advertisements. For the DUTs to be scanned a valid firmware has to be burned into the OTP or QSPI flash that sends BLE advertisements after power up. Additionally, the BD address should be burned into the OTP or the QSPI by the PLT. The PLT expects to find devices in the air with the BD addresses programmed by the same tool, so it can match the BD addresses returned by the GU.
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Production Tests
Using Ammeter Tester
Memory Programming
Start
Update session parameters and
initialize PLT
Load Memory Programming
Firmware
Retrieve
Firmware
version
XTAL trim
calibration
Using External BLE Tester
Tx Power
Test
Tx
Frequency
offset test
Tx
Modulation
Index test
Rx
Sensitivity
Test
Golden Unit –
Rx RF Test
GPIO/
LED Test
Sensor
Test
Custom
Test
Load Memory Programming
Firmware
Retrieve
Firmware
Version
QSPI erase
QSPI Check
Empty
Write QSPI
Memory
Write OTP
Image
Write OTP
BD Address
Read OTP
BD Address
Write OTP
Memory
Header
End
Scan Test
Peripheral
Current
Measurement
Sleep Current Measurement
Using Temperature Sensor
Temperature
measurement
Custom Data
Write Test
Memory
Read Test
Write QSPI
BD Address
Read QSPI
BD Address
Write QSPI XTAL Trim
Write OTP
XTAL Trim
Single Test Multiple Tests
Load Production
Test Firmware
GPIO
Watchdog
GPIO
Watchdog
GPIO
Connection
Test
External
32kHz
Test
QSPI
intialization
BLE scan
HCI
GPIO
Watchdog
External
Instrument
Figure 23: DA1468x Test Sequence
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6.10 VBAT/Reset Signals Operation

The following chapter describes the PLT hardware VBAT and Reset signal operation during the DUT
Test Sequence.
There are three different modes available to power and reset the DUTs using a combination of the PLT VBAT and Reset lines. These are described next.

6.10.1 VBAT Only

Figure 24: VBAT only
In this mode only the VBAT line is used, as shown in Figure 24. Only the VBAT signal from the PLT hardware board to the DUT should be connected. The Reset signal is not driven. The DUTs are powered independently from their VBAT lines connected to the PLT HW and when reset is needed, the PLT software toggles the VBAT line low in order to perform a POR to each device.
Battery powered DUTs or DUTs with an external power supply are not supported in this mode. PLT to DUT VBAT line connection is mandatory. PLT Reset line connection is not required.
Firmware download
When the firmware download procedure begins, the PLT VBAT line will power the DUTs and the UART connections will open. This will result to a POR for all active devices. The POR will activate the DUTs UART booting procedure and the PLT software will be able to download the test firmware.
If there are devices that failed the test firmware download procedure, the PLT will perform a VBAT POR to retry the firmware download procedure only for those that failed. During the extra attempts to download firmware to the failed devices, the VBAT lines of the devices that succeeded will remain active. After three retry attempts, the PLT VBAT lines will remain active only for the devices that have succeeded. The retry operation and the amount of retries can be configured by the user. Check
7.2.3.2 for more details.
When the production testing has finished the above procedure will be repeated for the memory programming, as a different firmware needs to be downloaded to the DUTs.
Current measurement
Since the DUTs will be powered through the PLT HW using the VBAT line, the Current Measurement
Test for the DA14580/1/2/3/5/6 and the Current Measurement Test for the DA14681/2/3 are
supported as described in the Current Measurements chapter.
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6.10.2 VBAT On with Reset

Figure 25: VBAT On with Reset
In this mode the reset of the DUTs will be performed by the PLT Reset line as shown in Figure 25. During this mode, the PLT VBAT line continuously provides power to the DUTs and the DUTs are reset using the PLT Reset line.
Power supply can be provided to the DUTs if the PLT VBAT line is connected to the DUTs. However, for battery powered DUTs or for DUTs with an external power supply VBAT should not be connected. For such devices, only the connection to the PLT Reset line is mandatory.
Firmware download
When the firmware download procedure begins, the PLT will reset the DUTs using the PLT Reset line. The VBAT line is already active and remains active for the entire PLT test and memory programming procedure. If there are devices that failed to download firmware, the PLT will reset all the DUTs again and retry to download firmware to all of them even if these have succeeded. This is different approach from the VBAT Only procedure, since the Reset line is a single hardware line that cannot be differently controlled for each DUT, as opposed to the VBAT lines. The retry operation and the amount of retries can be configured by the user. Check 7.2.3.2 for more details.
When the production testing has finished, the above procedure will be repeated for the memory programming, as a different firmware needs to be downloaded to the DUTs.
Current measurement
If the DUTs are powered through the PLT HW using the VBAT line, or if they are powered using a single common line from an external power supply, the Current Measurement Test for the DA14580/1/2/3/5/6 and the Current Measurement Test for the DA14681/2/3 are supported as described in the Current Measurements chapter. If the DUTs are powered independently or have their own power supply (e.g. battery) then the current measurement tests are not supported.

6.10.3 VBAT as Reset

Figure 26: VBAT as Reset
In this mode, the reset of the DUTs will be performed using the PLT VBAT line as shown in Figure
26. Each DUT can be reset independently using the VBAT lines. This mode has advantage over
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VBAT On with Reset since VBAT lines can independently be controlled as opposed to the PLT Reset
line. This mode supports only devices that are battery powered or have an external power supply and are
already powered on. PLT VBAT line connection is mandatory and it must be connected to the DUT reset pin. The PLT Reset line connection is not used.
Note: When using this mode, the PLT VPP signal used for programming the OTP memory (OTP header and burning the XTAL Trim to OTP during production testing for the DA14580/1/2/3 devices) is not supported. An external VPP supply (as described in Table 2) should be provided when using this mode.
Firmware download
When the firmware download procedure begins, the UART connections will open and the PLT VBAT lines will be used to reset the DUTs.
If there are devices that failed the firmware download procedure, the PLT will perform a reset (using the VBAT line of each DUT) to retry for those DUTs that failed. After three attempts, the UART connections will remain on only for the devices that have firmware loaded. The retry operation and the amount of retries can be configured by the user. Check 7.2.3.2 for more details.
When the production testing has finished, the above procedure will be repeated for the memory programming, as a different firmware needs to be downloaded to the DUTs.
Current measurement
If the DUTs are powered using a single common line from an external power supply, then the Current
Measurement Test for the DA14580/1/2/3/5/6 and the Current Measurement Test for the
DA14681/2/3 are supported as described in Current Measurements. If the DUTs are powered independently or have their own power supply (e.g. battery) then the current measurement tests are not supported.

6.11 Custom Memory Data

The following chapter describes the PLT ‘Custom Memory Data’ configuration and programming
procedure. The PLT supports programming custom user data of any size up to 256 bytes, to any memory and
from any start address. Custom data can be entered to the PLT by the three input methods described in Table 16.
Table 16: Custom Memory Data Input Modes
Input Modes
Description
Barcode scanner
Prior of starting the PLT tests, before pressing the START button in the PLT GUI, users can use a barcode scanner to enter custom memory data, different for each DUT. A new GUI screen is used to scan DUT barcodes and save the barcode scanned data to the PLT. The PLT will then burn these data to the user specified memory and address. Duplicate scan data protection can be enabled to protect scanning same data for different DUTs in the same test.
CSV file
Users can provide a path to a CSV file that will contain the custom memory data for each DUT. The format of the CSV file is specific and is provided in Custom data CSV
file format.
Manual
Users can manually edit the custom memory data prior of each PLT test run. The edit can be done in the PLT GUI or in the params.xml file using an external application or script. If different data per DUT is required then the update of the custom memory data should be done before every PLT test run.
Chapter Custom Memory Data explains in detail the various configuration parameters of the ‘Custom Memory Data’ programming PLT feature.
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6.11.1 Homekit Hash Setup Code

The PLT supports the hashing and programming of homekit setup codes. This feature is only supported for DA14681/2/3 DUTs and can be enabled in the Custom Memory Data test using the Homekit binary generator option. For this to work users should input to the PLT a specific format of the setup code and device serial number. The format should be as described in Table 17.
Table 17: Homekit Setup Code Format
Homekit Setup Code format
Description
XXXXXXXXYYYYAAZZZZZZZZZZZZC
Part
Length
Description
XXXXXXXX
8 digit
Homekit setup code without the dashes.
YYYY
4 characters
Setup ID
AA
1 byte
Accessory category
ZZZZZZZZZZZZ
12 characters
Serial number
C
1 character
Checksum of the previous characters
Example: Consider a device with setup code 50867478, setup id 7OSX, accessory category 03 and serial number 112233445566. The input to the PLT should be given as 508674787OSX03112233445566R.
The final character ‘R’ is the checksum of the previous characters.
The algorithm of the checksum is given in Table 18.
The homekit setup code characters can be taken from either input mode described in Table 16. The PLT will read the data and will apply it as input argument to the SetupCode_Generator_680.exe application found under the binaries folder. The SetupCode_Generator_680.exe application will create, in the same binaries folder, a binary image with the name XXXXXXXXYYYYAAZZZZZZZZZZZZ.bin. The PLT will burn this file to the DUT memory and start address that the user has configured.
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Table 18: Homekit Setup Code Checksum Algorithm
Homekit Setup Code Checksum Algorithm
const char checkCharList[] = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ"; /** * * @brief Homekit specific setup code and serial number checksum check function. * This checksum algorithm is similar to EAN, ILN and NVE but with alphanumeric instead of numbers * * @param[in] *inString The string to check its checksum. * @param[in] *inLength The length of the string. * * @return The checksum character. * **/ char hmkt_setupcode_chksm(const char *inString, int inLength) { char check = 0; int index = 0; unsigned int sum = 0; const char *characters = inString;
for (index=0; index<inLength && characters[index]!=0; index++) { if ((index % 2) == 0) sum += characters[index]; else sum += characters[index] * 3; }
sum = sum % 36;
if (sum != 0) sum = 36 - sum;
check = checkCharList[sum];
return check;
}
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6.11.2 Custom data CSV file format

This section describes the format of the CSV file used in CSV file input mode of the Custom Memory Data test.
Figure 27: Custom Memory Data CSV File Example
Each line in the CSV file corresponds to a specific DUT, which is bound to a BD address. The BD address is written in the first column of the CSV file. After the DUT BD address, up to five memory operations can exist.
Each of these operations must have the following columns in the correct order as described below:
● Memory type (DA14580/1/2/3/5/6 can have OTP, SPI, EEPROM and DA14681/2/3 can have OTP and QSPI),
● Start address
● Size of data in bytes
● Data to be written.
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Figure 27 shows an example of a CSV file targeted for DA14580 DUTs. In this particular example the
CSV file contains information for DUTs with BD addresses 80:EA:CA:80:00:01 to 80:EA:CA:80:00:13. For BD addresses 80:EA:CA:80:00:04-05 there are three tests and two for the rest.
The first operation, which is similar for all BD addresses with only the Data field to be different, is to write in the OTP Header memory of the DA14580 DUTs five bytes, in OTP address 0x47F54 (OTP Customer field).
The second operation is identical for all DUTs. It is configured to write into the SPI flash address 0x8000 10 bytes (0x112233445566778899AA).
Finally, the third operation only applies for BD addresses 80:EA:CA:80:00:04 and 80:EA:CA:80:00:05. This will write 256 bytes of data in address 0x9000 of the SPI flash memory.

6.12 Golden Unit Scan Test

This section describes the PLT scan test procedure using the Golden Unit as scanner device.
Start
· Hard reset the GU and handle VBAT/RST lines.
· Download Firmware (only for DA1458x DUTs).
Are there any scan retries left?
· Initialize GU and set it to search only for the BD addresses that are not yet found
· Update the found BD addresses
· Power off the DUTs that were found (only when VBAT lines are used to power the
DUTs)
YES
· Are there any BD addresses left?
· Are there any scan retries left?
· Do the DUTs need to reboot?
EndNO
YES
NO
Figure 28: Golden Unit Scan Test
User can set various scan properties to adjust the Scan test procedure. The available properties that apply to the DA1458x devices are described Table 64 and for the DA1468x devices in Table 96.
Figure 28 shows the scan sequence. First, the Golden Unit and the DUTs are reset. At this stage, if
the Firmware load enable is active (option is available only in DA1458x DUTs) the PLT will download the selected firmware. Then, the GU will begin scanning for the BD addresses of all active DUTs. After each scan cycle, the already found BD addresses are removed from the search list of the GU and the appropriate DUTs will be powered off. This procedure will continue until the retries have reached the Scan retries set by the user. The PLT will reset the GU after a specific number or retries,
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given in DUT reboot option. Finally, the parameters DUT reboot time and DUT reboot difference set the DUT time needed to perform a POR with a small delay between the DUTs if needed.
Figure 29: Golden Unit Scan Test Example Parameters
Figure 29 shows an example for DA14580 DUT connected with VBAT only mode as described in VBAT/Reset Signals Operation. For this example, the following steps will be executed.
● Reset the GU in order to be in a clean state, power off the DUTs and wait for 2500ms (DUT
reboot time). Power on and load prox_reporter_580.bin firmware to each DUT with a 37ms time difference between them.
● Execute three GU scan procedures. After each scan procedure is finished, power off the found
DUTs.
● Again, reset the GU, power off the DUTs and wait for 2500ms (DUT reboot time). Power on and
load prox_reporter_580.bin firmware to each DUT with a 37ms time difference between them.
● Continue with another three GU scan procedures and after each scan procedure power off the
found DUTs.
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6.13 Creating PLT Firmware Files

For the PLT to successfully operate, various firmware files are used based on the device type (GU or DUT), the chipset flavor (DA14580/1/2/3/5/6 or DA146801/2/3) or the purpose of the firmware (different firmware for production tests and for memory programming).
All these firmware files are kept under the binaries folder in the PLT software package, as shown in
Figure 30. In order to create these firmware files, the SDK packages should be downloaded from the
customer portal and apply the source code patches located under the fw_files folder in the PLT software package as shown in Figure 31.
Figure 30: Binaries
The source code patches maintain the folder structure of the SDK they are targeting, in order to apply the source code patch using a simple copy and replace to the files needed. After patching, the projects contain all the necessary changes and the same firmware files can be built as those in the binaries folder of the PLT software package.
The ‘fw_files’ folder has two main categories. Firmware targeted for the GU and for the DUTs. Under each category there is a folder indicating the IC target and the SDK used.
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Figure 31: Folder Contents of ‘fw_files’
Applying a source code patch for each one of the binaries is described below.

Golden Unit Firmware

The Golden Unit is a DA14580 device. A modified version of the prod_test_580.bin firmware is used.
This patch contains all the changes needed to re-create the following firmware.
· prod_test_GU.bin
In order to re-create the exact source code of the prod_test_GU.bin firmware:
1. Use a clean copy of the DA1458x_SDK_5.0.4 SDK from the customer portal.
2. Copy the contents of the ‘…\fw_files\GU\DA1458x_SDK_5.0.4\DA1458x_SDK\5.0.4\’ folder to the default SDK.
3. The Keil v5 project file of the prod_test_GU.bin is the ‘prod_test.uvprojx’ under the folder ‘\5.0.4\projects\target_apps\prod_test\prod_test\Keil_5\’.

DA14580/1/2/3 Firmware

This patch contains all the changes needed to re-creates the following firmware:
· prod_test_580.bin
· prod_test_581.bin
· flash_programmer_580.bin
· prox_reporter_580.bin
· ble_app_barebone_580.bin
Note: Due to functional differences between the DA14580 and DA14581 chips, a different production test firmware for each IC is needed.
Note: Because DA14582 supports the audio test, another patch must be applied over this, in order to create a production test firmware that supports audio test for the DA14582 DUTs, as described later.
Note: The PLT uses the same firmware for DA14583 and DA14580, so there is no need for a different production test binary.
In order to re-create the exact source code of the above firmware:
1. Use a clean copy of the DA1458x_SDK_5.0.4 SDK from the customer portal.
2. Copy the contents of the ‘…\fw_files\DUT\DA14580_581_583\DA1458x_SDK_5.0.4\DA1458x_SDK\5.0.4\’ folder to the default SDK.
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3. The Keil v5 project file of the prod_test_580.bin and prod_test_581.bin is the
‘prod_test.uvprojx’ under the folder ‘\5.0.4\projects\target_apps\prod_test\prod_test\Keil_5\’. To select between the DA14580 and DA14581 there is a “Select Target” option next to the project properties.
4. The Keil v5 project file of the flash_programmer_580.bin is the ‘programmer.uvprojx’ under the folder ‘\5.0.4\utilities\flash_programmer\’. Make sure that ‘programmer_uart’ option is selected under “Select Target”.
5. The Keil v5 project file of the prox_reporter_580.bin is the ‘prox_reporter.uvprojx’ under the folder ‘\5.0.4\projects\target_apps\ble_examples\prox_reporter\Keil_5\’.
6. The Keil v5 project file of the ble_app_barebone_580.bin is the
‘ble_app_barebone.uvprojx’ under the folder ‘\5.0.4\projects\target_apps\ble_examples\ble_app_barebone\Keil_5\’.

DA14582 Firmware with Audio Test

This patch contains all the changes needed to re-create the following firmware:
· prod_test_582.bin
Note: This patch requires applying the DA14580/1/2/3 Firmware patch first. In order to re-create the exact source code of the above firmware:
1. Use the modified SDK version as described in the above section.
2. Copy the contents of the ‘…\fw_files\DUT\DA14582\DA1458x_SDK_5.0.4\DA1458x_SDK\5.0.4\’ folder to the current SDK.
3. The Keil v5 project file of the prod_test_582.bin is the ‘prod_test.uvprojx’ under the folder ‘\5.0.4\projects\target_apps\prod_test\prod_test\Keil_5\’. In ‘Select Target’ option, select the ‘prod_test_580’, ‘clean’ and ‘build’ the project.

DA14585/6 Firmware

This patch contains all the changes needed to re-creates the following firmware:
· prod_test_585.bin
· flash_programmer_585.bin
· prox_reporter_585.bin
In order to re-create the exact source code of the above firmware:
1. Use a clean copy of the DA14585_SDK_6.0.6.427 from the customer portal.
2. Copy the contents of the ‘…\fw_files\DUT\DA14585_586\DA14585_SDK_6.0.6.427\DA14585_SDK\6.0.6.427\’ folder to the default SDK.
3. The Keil v5 project file of the prod_test_585.bin is the ‘prod_test.uvprojx’ under the folder ‘\6.0.6.427\projects\target_apps\prod_test\prod_test\Keil_5\’.
4. The Keil v5 project file of the flash_programmer_585.bin is the ‘programmer.uvprojx’ under the folder ‘\6.0.6.427\utilities\flash_programmer\’. Make sure that ‘programmer_uart’ option is selected under ‘Select Target’.
5. The Keil v5 project file of the prox_reporter_585.bin is the ‘prox_reporter.uvprojx’ under the folder ‘\6.0.6.427\projects\target_apps\ble_examples\prox_reporter\Keil_5\’.

DA14585 Firmware for DA14585 IoT+ DK

This patch contains all the changes needed to re-create the following firmware:
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· prod_test_585_IoT+.bin
Note: This patch requires applying the DA14585/6 Firmware patch first. In order to re-create the exact source code of the above firmware:
1. Use the modified SDK version as described in the above section.
2. The Keil v5 project file of the prod_test_585_IoT+.bin is the ‘prod_test.uvprojx’ under the folder ‘\5.0.4\projects\target_apps\prod_test\prod_test\Keil_5\’. In ‘Select Target’ option, select the ‘prod_test_585’.
3. Open project.
4. Open da1458x_config_advanced.h file and change the CFG_IOT_DK definition to #define CFG_IOT_DK (1).
5. ‘clean’ and ‘build’ the project.

DA14681/2/3 Firmware

This patch contains all the changes needed to re-creates the following firmware:
· prod_test_681_01.bin
· prod_test_683_00.bin
· uartboot_681_01.bin
· pxp_reporter_681_01.bin.cached
· pxp_reporter_683_00.bin.cached
In order to re-create the exact source code of the above firmware:
1. Use a clean copy of the DA1468x_DA15xxx_SDK_1.0.12.1078 from the customer portal.
2. Copy the contents of the ‘…\fw_files\DUT\DA1468x- DA15xxx\DA1468x_DA15xxx_SDK_1.0.12.1078\’ folder to the default SDK.
3. The Smart Snippets Studio project file of the prod_test_681_01.bin and
prod_test_683_00.bin is the ‘plt_fw’ under the folder ‘…\DA1468x_DA15xxx_SDK_1.0.12.1078\projects\dk_apps\reference_designs\plt_fw’.
To create each binary, select from the drop down menu the “Release RAM” option for each
chip.
4. The Smart Snippets Studio project file of the uartboot_681_01.bin is the ‘uartboot’ under the folder ‘…\DA1468x_DA15xxx_SDK_1.0.12.1078\sdk\bsp\system\loaders\uartboot\’. To create the binary, select from the drop down menu the “Release” option.
5. The Smart Snippets Studio project file of the pxp_reporter_681_01.bin.cached and pxp_reporter_683_00.bin.cached is the ‘pxp_reporter’ under the folder ‘…\DA1468x_DA15xxx_SDK_1.0.12.1078\projects\dk_apps\demos\pxp_reporter\’. To create each binary, select from the drop down menu the ‘QSPI_Release’ option for each chip.
Each binary will be created under the project folder in a folder having the same name as the selected option.
Note: The pxp_reporter source code generates a .bin file. In order to write it to the QSPI Flash memory and boot from it, a .cached version of the binary must be created using the ‘bin2image.exe’. See Bin2Image for more details.

DA14683 Firmware for 32MHz XTAL

This patch contains all the changes needed to re-create the following firmware:
· prod_test_683_00_XTAL32MHz.bin
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· uartboot_68x_XTAL32MHz.bin
· pxp_reporter_683_XTAL32MHz.bin.cached
Note: This patch requires applying the DA14681/2/3 Firmware patch first. In order to re-create the exact source code of the above firmware:
1. Use the modified SDK version as described in the above section.
2. The Smart Snippets Studio project file of the prod_test_683_00_XTAL32MHz.bin is the
‘plt_fw’ under the folder ‘…\DA1468x_DA15xxx_SDK_1.0.12.1078\projects\dk_apps\reference_designs\plt_fw’.
Before creating the binary, open custom_config_ram.h file and change the dg_configEXT_CRYSTAL_FREQ option to
#define dg_configEXT_CRYSTAL_FREQ EXT_CRYSTAL_IS_32M.
Select from the drop down menu the ‘DA14683-00 Release RAM’ option to build the binary.
3. The Smart Snippets Studio project file of the uartboot_68x_XTAL32MHz.bin is the ‘uartboot’ under the folder ‘…\DA1468x_DA15xxx_SDK_1.0.12.1078\sdk\bsp\system\loaders\uartboot\’.
Before creating the binary, open custom_config.h file and change the
dg_configEXT_CRYSTAL_FREQ option to
#define dg_configEXT_CRYSTAL_FREQ EXT_CRYSTAL_IS_32M.
To create the binary, select from the drop down menu the ‘Release’ option.
4. The Smart Snippets Studio project file of the pxp_reporter_683_XTAL32MHz.bin.cached is the ‘pxp_reporter’ under the folder ‘…\DA1468x_DA15xxx_SDK_1.0.12.1078\projects\dk_apps\demos\pxp_reporter\’. Before creating the binary, open custom_config_qspi.h file and change the
dg_configEXT_CRYSTAL_FREQ option to
#define dg_configEXT_CRYSTAL_FREQ EXT_CRYSTAL_IS_32M.
Select from the drop down menu the ‘DA14683-00 Release QSPI’ option to build the binary.
Each binary will be created under the project folder in a folder having the same name as the selected option.
Note: The pxp_reporter source code generates a .bin file. In order to write it to the QSPI Flash memory and boot from it, a .cached version of the binary must be created using the ‘bin2image.exe’. See Bin2Image for more details.
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7 Applications

7.1 Introduction

The PLT software includes four different applications (Table 5). The CFG PLT is used to setup the system according to the device hardware options and select the required tests and memory actions to be performed. The GU Upgrade is used to update the Golden Unit firmware. The GUI and the CLI PLT applications are used to perform the tests, monitor their progress in real-time and view the test results.

7.2 CFG PLT Application

Note 1 Each Hardware Setup field can be minimized by clicking on it, but it will not be disabled. The tests will
run if they are enabled, even when the test field is minimized and not shown.
Figure 32: CFG PLT Startup Screen
The CFG PLT application (DA1458x_DA1468x_CFG_PLT.exe) is a GUI application tool, which is mainly used to appropriately configure the tests and memory operations the tool will perform. Depending on the selected device chipset and the enabled actions, only appropriate options are enabled and shown. Any change made by the user is validated before being saved to the XML file, with the use of a schema XSD file. This prevents erroneous values to be stored in the XML file that would harm the production procedure.
Figure 32 shows the initial CFG PLT screen. The Main Menu options are described in Table 19 and
the bottom strip information is described in Table 20. The application begins with the Hardware Setup tab (see section 7.2.2). Users can navigate to the other PLT configurable options by selecting the different tabs.
When a tab is selected, the settings of this tab are reloaded from the XML file. If there is an error in the configuration XML file, a warning message will be shown indicating which of the parameters has error. Additionally, the related graphic entry in the CFG application for the erroneous configuration parameter will be highlighted in red.
An example is given in Figure 33. Configuration parameter dut_num_1 has wrong value (error instead of either false or true) in the params.xml file. When the Hardware Setup CFG tab is selected the warning message will be displayed. If OK is pressed, the Hardware Setup tab will be loaded with the DUT 1 checkbox in red. The displayed value will be the default value taken from the XML schema document (params.xsd).
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Figure 33: CFG PLT with Erroneous Configuration Parameter
When the user makes a change, the Save button will become Save* to indicate that a save is required.
In case of a configuration parameter error, pressing Save will save the default parameter value, overwriting the erroneous value.
Table 19: CFG PLT Main Menu Options
Region
Option
Description
File
Open XML file
Opens a new XML file and loads the settings. The full path of the new XML file is shown at the bottom end of the screen.
View XML file
Opens the XML file in notepad.
Save as…
Exports all settings to a new XML file. The full path of the new XML file is shown at the bottom end of the screen.
Reset to defaults
Overwrites all parameters options in the XML file with their default values taken from the XSD file.
Exit
Exits the CFG PLT application.
Run Run GUI PLT
Opens the GUI PLT application.
Run CLI PLT
Opens the CLI PLT application.
Table 20: CFG PLT Bottom Strip Options
Option
Description
Shows the full path of the XML file that is currently used.
Shows the selected device IC.
Saves all the options of the currently selected tab. E.g. If General settings tab is selected, then only the settings for this tab will be saved.
Note: A shortcut for this button is the Ctrl+S key combination.
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7.2.1 XML and XSD Files

The CFG PLT application is a front-end user interface for the cfg_dll.dll library (Figure 20). The cfg_dll.dll library, explained in detail in [1], is an XML parser, editor and parameter validator. It has
an easy-to-use API for reading and manipulating the params.xml file. File params.xsd is the XML schema used for parameter validation.
In the CFG PLT application, all user selectable options are loaded and saved inside the XML file, by effectively using the cfg_dll.dll library API. The XSD schema file params.xsd is not edited in any way but only read by the cfg_dll.dll library API, whenever a parameter validation is needed.
The params.xml file is separated into three main parts as explained in Table 21.
Table 21: XML File Parts
Part Name
Example
Description
Common part
The main top part of the XML file contains parameters common to any DUT, like the BD address mode, the COM ports and which device is enabled or disabled. It also holds the debug parameters, the test statistics and the test station name used in the logs.
DA1458x
The second XML part, with the element name config_params_da1458x, holds parameters used for DA1458x devices. Under this part, the entire test and memory action settings are stored.
DA1468x
The third and final XML part, with the element name config_params_da1468x, holds parameters used for DA1468x devices. Under this part, the entire test and memory action settings are stored.
The XSD schema file, params.xsd, holds information about the overall structure of the params.xml file, the default and valid values a parameter can take and useful help information about the purpose of each parameter. An example part of the XSD file is given in Figure 34.
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Figure 34: XSD Schema File Example
Element next_bd_addr holds the Next BD address, as described in section 7.2.4.1 and Table 31. It has a default value of x:default="00:00:00:00:00:01". This default value will be returned by the cfg_dll.dll API if the XML file has an error entry in the equivalent next_bd_addr element, since the validation of the parameter will fail.
The x:info="The BD address …" value will be loaded by the cfg_dll.dll API and be used in the CFG PLT tooltips. The type="x:cfg:hex_array_6_bytes" defines the parameter type. This is the actual XSD entry that is used for the parameter validation. The cfg:hex_array_6_bytes type is defined later in the file and has a rather complicated pattern defined with <xs:pattern value ="([0-9A-Fa-f]…"/>. If the next_bd_addr element in the XML file has a value that does not match this pattern, the validation of the parameter will fail and the cfg_dll.dll API will return the default value (00:00:00:00:01). In the CFG PLT, the default value will be shown in red, indicating that an error exists in the params.xml file for this parameter. It will not change the erroneous value in the params.xml file until the user presses the Save button, in which case the default value will overwrite the erroneous value.
In the second example of Figure 34, the RF_path_loss_DUT_1 XSD element is shown. This element is used in the Path Losses per DUT as shown in Figure 62. This element has a default value of 0 and the allowed values are floats, between <xs:minInclusive value="0"/> and <xs:maxInclusive
value="40"/>, as shown in the cfg_dut_path_losses type description. The x:info="Set the RF path .."/> will be loaded by the cfg_dll.dll API and used in the CFG PLT tooltips as shown in the
bottom part of Figure 34.
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7.2.2 Hardware Setup

This section describes the Hardware Setup settings available for the PLT hardware board, as shown in Figure 32.
7.2.2.1 Station Identification
Figure 35: Station Identification
This field holds a name given by the user to distinguish between different test stations. The value of this field is written into the DUT log and CSV files. Table 22 describes the available options for the Station Identification.
Table 22: Station Identification
Option
Description
Station ID
The name of the PLT test station.
7.2.2.2 Device IC
Figure 36: Device IC
Users can select the device IC type. This option will also change any IC related graphics, such as selectable tabs and tests. Table 23 describes the available options for the Device IC.
Table 23: Device IC
Option
Description
Device IC
The Dialog BLE chipset used in the device under test.
7.2.2.3 Active DUTs
Figure 37: Active DUTs
Enables or disables the testing for each DUT. Table 24 describes the available options for the Active DUT.
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Table 24: Active DUTs
Option
Description
DUT1-16
Enables the specific DUT device placed on connector DUT1-DUT16.
7.2.2.4 DUT COM Ports
Figure 38: DUT COM Ports
This field shows the Windows COM port assigned to each DUT. The table is filled only when the 'COM Enum' action has been performed by the CFG or the GUI PLT applications, or when non-zero entries
exist in the com_port_x params.xml options. When the 'COM Enum' action is performed, the tools will automatically find the DUT COM ports and save them in the params.xml file. These values will be read by the CFG PLT application and be displayed here. When a 'COM Enum' action has not been performed, the GUI PLT will automatically run it once in every first test execution.
Note: Great care must be taken when the params.xml file is shared across different stations, where different DUT COM Ports will probably exist. The 'COM Enum' action should then be performed again, so the new COM ports of the new PC system are identified and updated in the XML file.
Table 25 describes the available options for the DUT COM Ports.
Table 25: DUT COM Ports
Option
Description
DUT1-16
Shows the Widows COM port assigned to a specific DUT.
Reset
Sets all values to zero.
Enum
Executes the COM port enumeration procedure. The found COM ports are shown before being saved.
7.2.2.5 Golden Unit
Figure 39: Golden Unit COM Port
This field holds the Golden Unit COM port. Manual or automatic COM port find can be selected. The Golden Unit COM port can be manually selected from the list with all the available COM ports
existing in the system. Additionally, it can automatically be found by pressing the Auto button. The
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automatic procedure searches the serial number of all system COM ports to find the “DialogSemi” string. Details on how to program the serial number in the GU FTDI can be found in Appendix H.
Table 26: Set the GU COM Port
Option
Description
Auto
Initiates the automatic Golden Unit COM port find procedure.
Refresh
Refreshes the dropdown menu with all the available system COM ports.
Dropdown Menu
Manually select the Golden Unit COM port from all of the available system COM ports.
Table 27: Golden Unit Firmware Version Upgrade
Option
Description
Refresh
Retrieves the current BLE and application versions of the connected Golden Unit.
Upgrade GU Firmware
Opens the GU Upgrade, which is used to update the Golden Unit firmware.
7.2.2.6 VBAT/Reset Mode
Figure 40: VBAT/Reset Mode Selection
This field holds the VBAT/Reset mode selections. This option sets the PLT VBAT and PLT Reset line modes for the DUT power supply and reset during the PLT test sequence. Table 28 describes the available selections.
Table 28: VBAT/Reset Mode
Option
Description
VBAT/Reset Mode
Select the operation for VBAT/Reset signals. Available options are:
● VBAT Only
● VBAT On with Reset
● VBAT as Reset
● VBAT and Reset
VBAT/Reset Signals Operation chapter describes each mode in detail. Default setting is
VBAT only.
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7.2.3 General

7.2.3.1 Statistics
Figure 41: Statistics
This field holds the test result statistics. Table 29 describes the Statistics field.
Table 29: Statistics
Option
Description
Pass
Shows the number of DUTs that have successfully passed all the tests.
Fail
Shows the number of DUTs that have failed the tests.
Total
Shows the number of DUTs that will be tested. This option is available only when Range mode is enabled in the BD Address Assignment.
Left
Shows how many DUTs are still to be tested. This option is available only when Range mode is enabled in the BD Address Assignment.
Runs
Shows the number of test runs the PLT has performed.
Reset
Pressing the Reset button clears all statistics values to their defaults. Values Pass, Fail and Runs will be set to zero. If Range mode is enabled in the BD Address Assignment, the Total and Left values will be set as the difference of Next and End BD address, otherwise will be set to zero.
7.2.3.2 Test Options
Figure 42: Test Options
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This field holds generic PLT test procedure options. The PLT procedure is split into two main parts:
Production tests and Memory programming. Production tests include all the tests under Test Settings (DA1458x) or Test Settings (DA1468x).
Memory Programming includes all the tests under Memory Functions (DA1458x) or Memory
Functions (DA1468x) and Memory Header (DA1458x) or Memory Header (DA1468x). Table 30 describes the available settings for the Test Options.
Table 30: Test Options
Option
Description
Production tests
This option enables the production test operations.
Download the production test firmware using the UART memory programmer firmware (uartboot_68x.bin). (Only for DA14681/2/3 Devices)
This option enables the downloading of the production test firmware using the memory programming firmware. PLT will first reset the DUTs and download the memory programming firmware (uartboot_68x.bin). It will then download the production test firmware to the DUTs and by using a special command it will replace the firmware. The DUTs will automatically reset to the production test firmware. This procedure saves production test time.
Memory programming
This option enables the memory programming operations.
Notify user for OTP burning
When this option is enabled, PLT will inform the user with all the OTP burning tests that are enabled. A pop-up message will appear prompting the user whether to proceed with the tests.
Firmware download retries
Configures the firmware download retries in case of an error during firmware download.
Re-test failed DUTs
When this option is enabled, any DUT that failed will immediately be retested with the exact same options, including the BD address. This option is the same to the Retest failed DUTs - Enable under GUI PLT Settings.
Enable VBAT and UART at the end of the tests
Enables the VBAT lines and UART communication between the PC and the devices after all the tests have finished. If enabled, DUTs will remain powered after the end of the tests.
Reset VBAT
If this option is enabled the VBAT line will be toggled. If not selected, the DUTs will keep in their system RAM the last test firmware downloaded by the PLT.
Run script before testing starts
This option enables the execution of a batch or an executable before the device testing procedure starts. As described in Running the GUI PLT and Executing
Tests, the success return code should be a value between 0 and 100 for the tool
not to report an error. Any other value will be taken as error and prevent the tool from running the tests.
Enable script timeout
Enables a wait timeout for the script to finish. The time to wait is set in the timeout field below. If this option is disabled PLT will wait until the script ends.
Timeout
The time to wait for the script to finish.
Script path
The path of file to execute when the Run script before testing starts option is enabled.
Run script when testing is finished
This option enables the execution of a batch or an executable after the device testing procedure has finished. The success return code should be 0 for the tool not to report an error.
Enable script timeout
Enables a wait timeout for the script to finish. The time to wait is set in the timeout field below. If this option is disabled, PLT will wait until the script ends.
Timeout
The time to wait for the script to finish.
Script path
The path of file to execute when the Run script when testing is finished option is enabled.
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7.2.4 BD Addresses

7.2.4.1 BD Address Assignment
Figure 43: BD Address Assignment
The BD Address Assignment field defines different ways the PLT can handle the device BD address. The available modes are Standard, Range, Load from file and Scan mode.
The Standard, Range, and Load from file modes are similar. These have a Start BD address, which is the initial address that the PLT session begins. The Next BD address field holds the BD address that will be used on the next PLT run, so the BD address assignment can be continued even after the GUI PLT is closed. For that reason, the user cannot alter the Next BD address. The Next BD address initial value is the same as the Start BD address when the PLT session begins.
For Scan mode, an external barcode scanner is needed to assign the device BD addresses. Note: In CFG PLT only the Start BD address is given. The assignment of the actual device BD
addresses occurs in the GUI PLT at the beginning of each test run.
Note: The only invalid BD address is 00:00:00:00:00:00.
Standard Mode
Table 31 describes the available options for the Standard mode. In this mode, the first active DUT
takes the Next BD address. This BD address is incremented by one and assigned to the next active DUT until all active DUTs have a BD address assigned to them.
This assignment mode never runs out of BD addresses and it will continue assigning addresses until the Next BD address reaches FF:FF:FF:FF:FF:FF.
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Table 31: BD Address Assignment - Standard Mode
Option
Description
Start BD address
The BD address that the PLT session has started with.
Next BD address
The BD address that will be used in the first active DUT of the next PLT run.
Range Mode
Table 32 describes the available options for the Range mode. This mode is the same as Standard
mode except for the additional End BD address. Sine a ‘Start BD address’ and an ‘End BD address’ exist, the total amount of devices to be tested can
be calculated. Therefore, this mode enables the Total and Left fields in the Statistics, where Total is the number of the BD addresses to be used from Start BD address to End BD address and Left is the number of BD addresses remaining.
Note: The End BD address must always be greater than the Start BD address. In addition, when Left BD addresses are not enough for the remaining active DUTs, the PLT will not run.
Table 32: BD Address Assignment Options - Range Mode
Option
Description
Start BD address
The BD address that the PLT session has started with.
Next BD address
The BD address that will be used in the first active DUT of the next PLT run.
End BD address
The BD address that the PLT session will end with.
Load from File Mode
Table 33 describes the available options for the Load from file mode. In this mode, the Start BD
address and the Next BD address have the same roles as before. The difference in this mode is that
the BD addresses are loaded from a file in the order as they are written in that file, not using the automatic incremental method of the previous modes. In every test run, the PLT will search for the first occurrence of the Next BD address in the file and will load it along with the BD addresses that follow, until all active DUTs have a BD address.
Figure 44: Example for Load from File Mode
For example, consider three active DUTs: DUT3, DUT6, and DUT 9 and the Next BD address to be 00:00:00:11:22:08. Figure 44 shows the beginning of the BD address file used in this example. The PLT will search for the Next BD address in the file and load it to the first active DUT: DUT3. It will then continue with 00:00:00:11:22:06 for DUT6 and 00:00:00:11:22:05 for DUT9. It will also return 00:00:00:11:22:04 as the Next BD address to be used in the next PLT test run.
Note: The BD address file should always end with a zero BD address (00:00:00:00:00:00) and a new line at the end.
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Table 33: BD Address Assignment Options - Load from File Mode
Option
Description
Start BD address
The BD address that the PLT session has started with.
Next BD address
The BD address from file that will be used in the first active DUT of the next PLT run.
BD address file
Path to the file that contains the BD addresses. Use button […] on the right to navigate and select a file.
Check for duplicate BD addresses
Before any BD address is assignment happens, there will be a check to find double BD addresses in the selected BD address file.
Scan Mode
Table 34 describes the available options for the Scan mode. For this option a USB-to-Serial barcode
scanner should be used to scan for BD address barcodes with ‘XX:XX:XX:XX:XX:XX’ format. The barcode scanner options are the same as those used for the barcode scanner mode in Custom
Memory Data for the DA1458x devices and in Custom Memory Data for the DA1468x devices.
Note: Barcode scanner mode is only available with GUI PLT Application. CLI PLT Application does NOT support this feature.
Table 34: BD Address Assignment Options - Scan Mode
Option
Description
Scanner Interface
Selection of the Barcode scanner input. Both HID and COM port interfaces are supported. This dropdown list provides an HID and all the available system COM ports as input options.
For the HID interface, any HID device is supported that includes newline (CR-LF) characters at the end of the scanned data.
For the COM port interface, a common USB to UART barcode scanner is supported. PLT has been tested with Honeywell Xenon 1900. Appendix L describes the setup procedure.
This option is the exact same option as for the DA1458x devices in Custom Memory
Data and the DA1468x devices in Custom Memory Data.
Scan mode
● Scan DUT position: In this mode the users must first scan the DUT position number
and then the BD address. The string used for the position of each DUT is "TEST POSITION 0xx" where "xx" is the DUT position number.
● Automatic DUT position: Scanned BD address will be assigned to the selected DUT.
The DUT selection is automatically been made, starting from the first active DUT and selecting the next one after a successful BD address scan. Users can change the selected DUT using the controls on the GUI PLT screen shown in Figure 117.
This option is the exact same option as for the DA1458x devices in Custom Memory
Data and the DA1468x devices in Custom Memory Data.
Automatically split BD address with ‘:’
When this option is enabled, the input data will be automatically delimited with colon marks. E.g. To enter the ‘11:22:33:44:55:66’ BD address the input string should be ‘112233445566’.
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7.2.5 DUT Hardware Setup (DA1458x)

7.2.5.1 UART Boot Pins Setup
Figure 45: UART Boot Pins Setup - DA1458x
Table 35 describes the available options for the TX-RX pins of the UART Boot Pins Setup DA1458x
options. The TX-RX pins selection defines the UART pins and the baud rate that will be used for firmware downloading to the DA1458x during boot.
Table 35: UART TX-RX Pins - DA1458x
Option
Description
TX: P0_0, RX: P0_1
Sets UART TX pin to P0_0, UART RX pin to P0_1 and Baud rate to 57600 bit/s.
TX: P0_2, RX: P0_3
Sets UART TX pin to P0_2, UART RX pin to P0_3 and Baud rate to 115200 bit/s.
TX: P0_4, RX: P0_5
Sets UART TX pin to P0_4, UART RX pin to P0_5 and Baud rate to 57600 bit/s.
TX: P0_6, RX: P0_7
Sets UART TX pin to P0_6, UART RX pin to P0_7 and Baud rate to 9600 bit/s.
Note: The baud rate is fixed during booting, since it is controlled by the device ROM bootloader.
7.2.5.2 UART Baud Rate
Figure 46: UART Baud Rate - DA1458x
Table 36 shows the available options for the UART baud rate.
The Baud Rate selected here is used after the initial firmware (flash_programmer_580/5.bin) has been downloaded to the DUT. The software will send a command to the DUT to change the UART baud rate to the one selected. All following UART communications with the DUT will be performed using the new baud rate. Please note that this happening only during memory programming where the flash_programmer_580/5.bin is used. During tests (RF tests, XTAL trimming, etc.), where the production test firmware is used, the baud rate is fixed at 115200 bit/s.
Table 36: UART Baud Rate - DA1458x
Option
Description
Baud Rate
● 9600 [bit/s]
● 57600 [bit/s]
● 115200 [bit/s]
● 1000000 [bit/s]
Note: 1 Mbit/s is the fastest and safest with 0% baud rate error.
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7.2.5.3 UART Programming GPIOs Setup
Figure 47: UART Programming GPIOs Setup - DA1458x
Table 37 shows the available options for the UART Programming GPIOs to be used during memory
programming for the DA1458x devices.
Note: This option should be disabled if the UART Programming GPIOs are exactly the same as the UART Boot Pins selected in UART Boot Pins Setup.
When this option is enabled, the user can configure a new set of UART pins to be used during tests and memory programming. The purpose of changing pins is to be able to use different UART pins than the predefined pairs supported by the DUT ROM bootloader, in case these default pins are used for other external components.
The DUT will always boot from a predefined pair of pins as configured in the UART Boot Pins Setup. Then it will switch to the new pins configured here by sending a command to the firmware, for both the Production tests and the Memory programming firmware. A separate UART hardware connection has to be made between the PLT hardware board and the DUT.
The DUT will have four UART connections with the PLT hardware. The connections should be made using enhanced PLT DUT connectors. For a single DUT, the UART boot pins should be connected to the PLT DUT connector 1 (DUT1) and the UART Programming GPIOs should be connected to the PLT DUT connector 2 (DUT2). In this configuration, the PLT can support up to eight DUTs.
Table 37: UART Programming GPIOs Setup - DA1458x
Option
Description
Enable
This option enables the UART programming mode. Users can select the new UART TX-RX GPIOs from the dropdown lists.
Port TX
Dropdown list to select the port of the UART TX GPIO that will be used during testing. This option alters the contents of the Pin TX dropdown list to the available GPIOs based on the selected port.
Pin TX
Dropdown list to select the UART TX GPIO that will be used during testing.
Port RX
Dropdown list to select the port of the UART RX GPIO that will be used during testing. This option alters the contents of the Pin RX dropdown list to the available GPIOs based on the selected port.
Pin RX
Dropdown list to select the UART RX GPIO that will be used during testing.
7.2.5.4 Sleep Clock Source
Figure 48: Sleep Clock Source - DA1458x
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Table 38 describes the available options for the DA1458x Sleep Clock Source operation.
Table 38: Sleep Clock Source - DA1458x
Option
Description
Internal RCX/External 32kHz
Select which crystal the DUTs will use during sleep.
7.2.5.5 SPI Flash Configuration
Figure 49: SPI Flash Configuration - DA1458x
Table 39 describes the available options for the SPI Pin Setup.
Table 39: SPI Pin Setup - DA1458x
Option
Description
SPI pin setup
This option enables the SPI pin selections. If this option is disabled, default pin configuration will be used. For the DA14583 and DA14586 this option will be disabled and their default pin configuration as described in Appendix J and Appendix K will be used.
CLK
Sets the GPIO for the CLK pin of the SPI bus. Default GPIO pin is P0_0.
MISO
Sets the GPIO for the MISO pin of the SPI bus. Default GPIO pin is P0_5.
MOSI
Sets the GPIO for the MOSI pin of the SPI bus. Default GPIO pin is P0_6.
CS
Sets the GPIO for the CS pin of the SPI bus. Default GPIO pin is P0_3.
Enable pin
Sets a specific GPIO to high state during any SPI flash operation.
Pin
Sets the GPIO to be used as the enable pin.
Table 40 describes the available options for the DA1458x SPI Flash Configuration. In order to
properly setup the SPI Flash configuration, refer to the datasheet of the memory to be used.
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Note: If the memory to be used is listed in the supported memories (Appendix T), then the on demand SPI flash configuration option is not needed.
Table 40: SPI Flash Configuration - SPI Flash Options - DA1458x
Option
Description
SPI flash options
Enables the on demand SPI flash configuration.
Word length
Shows the length of each word in the SPI-bus.
Mode type
Shows the SPI-bus role of the chip.
SPI clock idle polarity
Sets the level of the idle state of the clock.
SPI sampling edge
Sets the SPI-bus sampling edge.
SPI interrupt
Enables the SPI interrupt. Note: This interrupt may be shared with other interrupts.
SPI clock divider
Sets the SPI-bus clock frequency.
Total size
Sets the SPI Flash size in bytes.
Page size
Sets the size of each page of the SPI Flash memory.
Jedec ID
Sets the SPI Flash Jedec ID.
Jedec ID mask
Sets the bitmask of the Jedec ID.
Memory protection
Sets the SPI Flash protection value.
7.2.5.6 I2C EEPROM Configuration
Figure 50: I2C EEPROM Configuration - DA1458x
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Table 41 describes the available options for the I2C Pin Setup.
Table 41: I2C Pin Setup - DA1458x
Option
Description
I2C pin setup
This option enables the I2C pin selections. If this option is disabled, the default pin configuration will be used.
SCL
Sets the GPIO for the SCL pin of the I2C bus. Default GPIO pin is P0_2.
SDA
Sets the GPIO for the SDA pin of the I2C bus. Default GPIO pin is P0_3.
Enable pin
Sets a specific GPIO to high state during any EEPROM operation.
Pin
Sets the GPIO to be used as the enable pin.
Table 42 describes the available options for the DA1458x I2C EEPROM Configuration. In order to
properly setup the I2C EEPROM configuration, refer to the datasheet of the memory to be used. Note: If the memory to be used is listed in the supported memories (Appendix T), then the on
demand I2C EEPROM configuration option is not needed.
Table 42: I2C EEPROM Configuration – EEPROM Memory Options - DA1458x
Option
Description
EEPROM memory options
Enables the on demand EEPROM memory configuration.
Slave address
Sets the I2C-bus slave address of the EEPROM memory to be used.
Speed mode
Sets the I2C-bus speed.
Address mode
Sets the I2C-bus addressing mode.
Address size
Sets the I2C-bus number of bytes used for address.
Total size
Sets the EEPROM size in bytes.
Page size
Sets the size of each page of the EEPROM memory.
7.2.5.7 Range Extender Configuration
Figure 51: Range Extender Configuration - DA1458x
Table 43 describes the available options for the DA1458x Range Extender Configuration operation.
Table 43: Range Extender Configuration - DA1458x - DA1458x
Option
Description
Enable
Enables the Range extender.
Power control GPIO
Sets the GPIO to be used for the power control of the range extender.
Max power GPIO
Sets the GPIO to be used to indicate the maximum power of the range extender.
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7.2.6 Test Settings (DA1458x)

7.2.6.1 XTAL Trim
Figure 52: XTAL Trim - DA1458x
Table 44 describes the available options for the DA1458x XTAL Trim operation.
Table 44: XTAL Trim - DA1458x
Option
Description
Enable
This option enables the automatic crystal oscillator frequency calibration procedure.
GPIO input pulse pin
The GPIO on which the DUT will receive the reference pulse during calibration. The UART RX pin can be used for this purpose without any additional connection from the PLT hardware to the DUT.
Burn to OTP
When this option is selected, the XTAL trim value calculated from the automated calibration process will be written into the OTP XTAL trim header field and the OTP XTAL calibration flag will be set.
7.2.6.2 GPIO Watchdog operation
Figure 53: GPIO Watchdog operation - DA1458x
Table 45 describes the available options for the DA1458x GPIO Watchdog operation.
Table 45: GPIO Watchdog operation - DA1458x
Option
Description
Enable Watchdog
This option enables the continuous toggling of a GPIO during the whole production testing and memory programming procedure, except during firmware download. The pulse on the GPIO has approximately 1.5% duty cycle and 0.48Hz frequency.
Test name
The name assigned for this test.
Pin
Select the GPIO that will be toggled.
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7.2.6.3 Scan DUT Advertise Test
Figure 54: Scan DUT Advertise Test - DA1458x
Table 46 describes the available options for the DA1458x Scan DUT Advertise Test operation. In this
test, the Golden Unit acts as a scanner and the DUTs start advertising using HCI commands.
Table 46: Scan DUT Advertise Test - DA1458x
Option
Description
Enable
This option enables the Scan DUT Advertise Test operation.
Channel
The BLE channel frequency used in the RF RX test using the Golden Unit.
Scan retries
The number of retries to perform the test.
Range extender output power (only in DA14585 with the range extender enabled)
Set the range extender power mode for this test. RSSI limit
The RSSI limit for pass/fail criteria in the RF RX test using the Golden Unit. If the average RSSI of the device after it has received the packets transmitted from the Golden Unit is less than that the test will be considered as failed.
7.2.6.4 RF Tests
This section refers to various RF tests conducted between the DUTs and the Golden Unit or an external BLE tester.
These tests can have multiple instances with different settings. Tests can be added and removed using the two buttons (e.g. and in Figure 55) at the bottom right side of each panel.
Note: When adding or removing a test, all settings are refreshed with the values written to the XML file, meaning that any unsaved settings will be lost.
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Golden Unit
Figure 55: Golden Unit RF Tests - DA1458x
Table 47 describes the available options for the RF RX test using the Golden Unit as a transmitter.
In the RF RX test, the Golden Unit sends 500 packets on the selected BLE channel. The DUTs are set in receive mode and the RSSI is measured. If the RSSI measured by the DUT reception is less than the specified RSSI limit value, the device will fail and the tests will stop for that particular device.
Table 47: Golden Unit RF Tests - DA1458x
Option
Description
Enable
This option enables the specific RF RX test using the Golden Unit as a transmitter.
Test name
The name assigned to each test. The assigned name will be shown on the tab and next to it an indication showing whether the specific test is enabled or not.
Frequency
The BLE channel frequency used in the RF RX test using the Golden Unit.
RSSI limit
The RSSI limit for pass/fail criteria in the RF RX test using the Golden Unit. If the average RSSI of the device, after it has received the packets transmitted from the Golden Unit, is less than the value entered here the test will fail.
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BLE Tester
In the BLE Tester panel, a number of tests can be enabled that require an external BLE tester instrument.
BLE Tester – General Settings
Figure 56: BLE Tester General Settings - DA1458x
Table 48 describes the general settings for the BLE Tester supported tests. Any available external
instrument found by the ble_tester_driver DLL and their interfaces can be selected.
Table 48: BLE Tester General Settings - DA1458x
Option
Description
Enable
This option enables all of the BLE Tester tests, which include:
● BLE Tester TX Power
● Frequency Offset
● Modulation Index
● RX Sensitivity
Instrument
Select the BLE tester DLL name. Names are shown only if a BLE tester instrument DLL exists in the project ble_tester_instr_plugins folder.
Interface
The interface of the instrument to be used by the driver.
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BLE Tester - TX Power
Figure 57: BLE Tester TX Power - DA1458x
Table 49 describes the available options for the TX Power test using a BLE Tester instrument.
Table 49: BLE Tester TX Power - DA1458x
Option
Description
Enable
This option enables the specific TX power test using a BLE tester instrument.
Test name
The name assigned to each test. The assigned name will be shown on the tab and next to it an indication showing whether the specific test is enabled or not.
Frequency
The BLE channel frequency used in the BLE TX power test.
Power range
Set the device TX output power range. Available options are:
● Auto (No auto option for Litepoint IQxel-M. Sets the instrument to trigger at -25dBm)
● +22 dBm to +7 dBm
● +9 dBm to -3 dBm
● +5 dBm to -7 dBm
● -4 dBm to -16 dBm
● -12 dBm to -26 dBm
● -24 dBm to -35 dBm
Default value is Auto.
Range extender output power (only in DA14585 with the range extender enabled)
Set the range extender power mode for this test. High limit
Set the average high power limit for the BLE TX output power pass/fail test criteria.
Low limit
Set the average low power limit for the BLE TX output power pass/fail test criteria.
Peak average
Set the peak-to-average power limit for the BLE TX output power pass/fail test criteria.
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BLE Tester - Frequency Offset
Figure 58: BLE Tester Frequency Offset - DA1458x
Table 50 describes the available options for the Frequency Offset test using a BLE Tester
instrument.
Table 50: BLE Tester Frequency Offset - DA1458x
Option
Description
Enable
This option enables the specific TX frequency offset test using a BLE tester instrument.
Test name
The name assigned to each test. The assigned name will be shown on the tab and next to it an indication showing whether the specific test is enabled or not.
Frequency
The BLE channel frequency used in the BLE TX frequency offset test.
Power range
Set the device TX output power range. Available options are:
● Auto
● +22 dBm to +7 dBm
● +9 dBm to -3 dBm
● +5 dBm to -7 dBm
● -4 dBm to -16 dBm
● -12 dBm to -26 dBm
● -24 dBm to -35 dBm
Default value is Auto.
Range extender output power (only in DA14585 with the range extender enabled)
Set the range extender power mode for this test. Positive limit
Set the maximum positive offset limit in kHz for the TX carrier frequency offset pass/fail test criteria.
Negative limit
Set the maximum negative offset limit in kHz for the TX carrier frequency offset pass/fail test criteria.
Drift packet limit
Set the overall packet drift in kHz for the TX drift pass/fail test criteria.
Drift rate limit
Set the drift rate limit in kHz/50 s for the TX drift pass/fail test criteria.
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BLE Tester - Modulation Index
Figure 59: BLE Tester Modulation Index - DA1458x
Table 51 describes the available options for the Modulation Index test using a BLE Tester instrument.
Table 51: BLE Tester Modulation Index - DA1458x
Option
Description
Enable
This option enables the specific TX modulation index test using a BLE tester instrument.
Test name
The name assigned to each test. The assigned name will be shown on the tab and next to it an indication showing whether the specific test is enabled or not.
Frequency
The BLE channel frequency used in the BLE TX modulation index offset test.
Power range
Set the device TX output power range. Available options are:
● Auto
● +22 dBm to +7 dBm
● +9 dBm to -3 dBm
● +5 dBm to -7 dBm
● -4 dBm to -16 dBm
● -12 dBm to -26 dBm
● -24 dBm to -35 dBm
Default value is Auto.
Range extender output power (only in DA14585 with the range extender enabled)
Set the range extender power mode for this test. F1 min
Set the F1 minimum average limit in kHz for the TX modulation index pass/fail test criteria.
F1 max
Set the F1 maximum average limit in kHz for the TX modulation index pass/fail test criteria.
F2 max
Set the F2 maximum limit in kHz for the TX modulation index pass/fail test criteria.
F1/F2 ratio
Set the F1/F2 maximum average ratio limit for the TX modulation index pass/fail test criteria.
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BLE Tester - RX Sensitivity
Figure 60: BLE Tester RX Sensitivity - DA1458x
Table 52 describes the available options for the RX Sensitivity test using a BLE Tester instrument.
Table 52: BLE Tester RX Sensitivity - DA1458x
Option
Description
Enable
This option enables the specific RX sensitivity test using a BLE tester instrument.
Test name
The name assigned to each test. The assigned name will be shown on the tab and next to it an indication showing whether the specific test is enabled or not.
Frequency
The BLE channel frequency used in the BLE RX sensitivity test.
Pattern
The bit pattern of the TX data. Available options are:
● PRBS9
● 10101010
● 11110000
Spacing
The packet spacing in s.
Num of packets
The number of packets the BLE tester instrument to transmit.
Tx power
The TX output power of the BLE tester instrument. Suggested values are 0 to -10 dBm.
Dirty
When enabled, the BLE tester packet generator can use a dirty table to transmit.
CRC alternate
When enabled, the BLE tester will alternatingly send packets with CRC correct and CRC incorrect.
RSSI limit
The RSSI limit for pass/fail criteria in the RF RX sensitivity test. If the average RSSI of the device after it has received the transmitted packets is less than this value, the test will be considered as failed.
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Path Losses per DUT
Figure 61: Path Losses per DUT - DA1458x
Table 53 describes the available options for the Path losses per DUT.
Based on the relative position of each DUT during the RF tests and since the RF tests are performed over the air, values can be used to correct for any path losses. These values are added to the limits of the TX Power and RF RX RSSI tests. Additional information can be found in Appendix D and
Appendix E.
Table 53: Path Losses per DUT from RF Tests DA1458x Options
Option
Description
DUT1-16
Set the calibrated path loss value for each DUT. These will be added as corrections to the limits of the TX Power and RF RX RSSI tests.
7.2.6.5 GPIO/LED Test
Figure 62: GPIO/LED Tests - DA1458x
GPIO/LED Tests can have multiple instances with different settings. Tests can be added or removed using the two buttons (e.g. and in Figure 62) at the bottom right side of each panel.
Note: When adding or removing a test, all settings are refreshed with the values written to the XML file, meaning that any unsaved settings will be lost.
Table 54 describes the available options for the GPIO/LED Tests DA1458x Options.
In these tests, a specific pulse can be given to a GPIO and any LED connected to it can be visually tested. The Pin option sets the GPIO to be used, Low and High define the duty cycle and the Retries the number of pulses.
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Table 54: GPIO/LED Tests - DA1458x
Option
Description
Enable
This option enables the GPIO/LED toggling. Can be used for visual LED testing.
Test name
The name assigned to each test. The assigned name will be shown on the tab and next to it an indication showing whether the specific test is enabled or not.
Pin
The GPIO that will be used for the specific test.
Retries
Number of pulses to be generated for the specific test.
Low
Sets the amount of the OFF time of the pulse in ms for the specific test.
High
Sets the amount of the ON time of the pulse in ms for the specific test.
7.2.6.6 GPIO Connection Test
Figure 63: GPIO Connection Test - DA1458x
GPIO Connection Tests can have multiple instances with different settings. Tests can be added and removed using the two buttons (e.g. and in Figure 63) at the bottom right side of each panel.
Note: When adding or removing a test all settings are refreshed with the values written to the XML file, meaning that any unsaved settings will be lost.
Table 55 describes the available options for the DA1458x GPIO Connection Test.
When enabled, the PLT software will check the connection of specified GPIO (Get Pin) by either checking its state or the connection with another pin (Set Pin). In the latter case, the user gives the Set Pin and the state to check.
Table 55: GPIO Connection Test - DA1458x
Option
Description
Enable
This option enables the specific custom test.
Test name
The name assigned to each test. The assigned name will be shown on the tab and next to it an indication showing whether the specific test is enabled or not.
Enable Set Pin
Enables the use of the secondary GPIO to drive the GPIO under test. When this option is set, the Get Pin level option will be disabled.
Set Pin
Sets the GPIO to be used as a Set Pin.
Get Pin
Sets the GPIO to be tested.
Get Pin level
Sets the GPIO state the test awaits to see in the Get Pin. This option is disabled if the Set Pin mode is enabled.
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7.2.6.7 Audio Test
Figure 64: Audio Test
Table 56 describes the available options for the Audio Test Trim DA1458x Options.
Enabling this test will set the DUTs to listen for a 4 kHz tone produced by the GU. The DUT will send the audio data received to the PLT software. The PLT software will decode them, analyze if a 4 kHz tone exists in the audio data, and calculate the Power Level. If the tone is not detected or if the power level calculated is less than the one entered as limit the test will fail.
In order to perform the audio test an external speaker should be connected to the GU as shown in
Appendix N.
Note: Audio test is supported only for DA14582, DA14585 and DA14586 devices.
Table 56: Audio Test
Option
Description
Enable
This option enables the audio testing.
Power level
The threshold limit of the power level calculated for the 4 kHz tone.
7.2.6.8 Sensor Test
Figure 65: Sensor Test - DA1458x
Sensor Tests can have multiple instances with different settings. Tests can be added and removed using the two buttons (e.g. and in Figure 65) at the bottom right side of each panel.
Note: When adding or removing a test all settings are refreshed with the values written to the XML file, meaning that any unsaved settings will be lost.
Table 57 describes the available options for the Sensor Tests DA1458x Options.
Table 57: Sensor Tests - DA1458x
Option
Description
Enable
This option enables the specific sensor test.
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Option
Description
Test name
The name assigned to each test. The assigned name will be shown on the tab and next to it an indication showing whether the specific test is enabled or not.
Read / Write mode
Select the sensor test procedure, to read or write.
Register address
The sensors register address to read or write data.
Write data
The byte to be written at the sensor register.
SPI / I2C
Select the interface that the sensor is connected to.
SPI - CLK
Select the GPIO for the sensor SPI CLK.
SPI - MISO
Select the GPIO for the sensor SPI MISO.
SPI - MOSI
Select the GPIO for the sensor SPI MOSI.
SPI - CS
Select the GPIO for the sensor SPI CS.
I2C - SCL
Select the GPIO for the sensor I2C SCL.
I2C - SDA
Select the GPIO for the sensor I2C SDA.
Slave address
The sensor I2C bus slave address.
Interrupt GPIO check
Enables the sensor interrupt signal test via GPIO.
Interrupt GPIO
Select the GPIO to be used as a sensor interrupt.
Expected data
The received sensor byte that will be expected on a successful operation.
7.2.6.9 Custom Test
Figure 66: Custom Test - DA1458x
Custom Tests can have multiple instances with different settings. Tests can be added and removed using the two buttons (e.g. and in Figure 66) at the bottom right side of each panel.
Note: When adding or removing a test all settings are refreshed with the values written to the XML file, meaning that any unsaved settings will be lost.
Table 58 describes the available options for the DA1458x Custom Tests.
When enabled, the PLT software will send an HCI command via the UART to activate a customer defined test that will run on the DUTs. The HCI custom test command will contain a single byte as data (the Command ID byte), to be used mainly as identification for a specific test in the customized firmware. Default functionality of the production test firmware is to respond with the same Command ID. Otherwise, PLT will consider the test as failed.
Table 58: Custom Tests - DA1458x
Option
Description
Enable
This option enables the specific custom test.
Test name
The name assigned to each test. The assigned name will be shown on the tab and next to it an indication showing whether the specific test is enabled or not.
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Option
Description
Command ID
The byte that will be sent to the device running the production test firmware.
7.2.6.10 External 32kHz Test
Figure 67: External 32kHz Test - DA1458x
Table 59 describes the available options for the DA1458x External 32kHz Test.
When enabled, the PLT software will verify the correct operation of the External 32kHz crystal on each DUT.
Table 59: External 32kHz Test - DA1458x
Option
Description
Enable
This option enables the External 32kHz test.
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7.2.6.11 Current Measurement Test
Figure 68: Current Measurement Test - DA1458x
In this test, an external ammeter instrument can be used to calculate the total current consumption of all the active DUTs at the time of the sampling. The ammeter instrument can be connected in the blue banana plugs as described in Current Measurements or to an external power supply (if present) depending the selected VBAT/Reset Mode.
During measurement, PLT will control the instrument using the ammeter_driver DLL [1]. Table 60 describes the instrument selection settings found by the ammeter_driver DLL, Table 61 describes the settings used for each of the peripheral current measurement tests and Table 62 describes the current measurement options for each sleep state.
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Note: Modifications in the production test firmware are mandatory in order to achieve the correct current consumption of a specific hardware design. Running the default firmware without any modifications may result in increased current consumption.
Note: During sleep current measurement test, if the measurement taken is outside of the limits set, PTL will reset all devices and begin a firmware download and current measurement to each device separately, using the limits set for a single device, in order to identify which device failed.
Peripheral Current Measurement Tests can have multiple instances with different settings. Tests can be added and removed using the two buttons (e.g. and in Figure 68) at the bottom right side
of each panel. Note: When adding or removing a test all settings are refreshed with the values written to the XML
file, meaning that any unsaved settings will be lost.
Table 60: Current Measurement Test – Instrument Settings - DA1458x
Option
Description
Enable
This option enables all of Current Measurement tests, which include:
● Idle Current Measurement
● Extended Sleep Current Measurement
● Deep Sleep Current Measurement
Only one of the Extended/Deep sleep current measurements can be selected, meaning that the other one will be disabled.
Instrument
Select the Ammeter instrument DLL name. Names are shown only if an ammeter instrument DLL exists in the project ammeter_instr_plugins folder.
Interface
The interface of the instrument to be used by the driver.
Table 61: Current Measurement Test – Peripheral Current Measurement - DA1458x
Option
Description
Enable
This option enables the specific peripheral current measurement test.
Test name
The name assigned to each test. The assigned name will be shown on the tab and next to it an indication showing whether the specific test is enabled or not.
Shunt resistor
The value of the shunt resistor used for peripheral measurement. Applicable only if a voltmeter or a NI-DAQ is used to measure current instead of a DMM. Values from 0 to 9999 are supported.
Wait time
The time in ms the PLT will wait before taking a current measurement, after it has sent an instruction to the DUTs to go into sleep state. Supported values are 1 to 500000ms.
Range
The range value in Ampere units that the ammeter instrument will operate. Supported values are 0 to 9999 and default value is 0.001A. When the ammeter_scpi.dll is used, if this value is set to zero, the instrument will use automatic range functionality.
Resolution
The ammeter instrument resolution value in Ampere units.
Samples
The number of samples that the ammeter instrument will read and average. 1 to 1000 is supported.
SCPI cmd
A SCPI command to be passed to the ammeter instrument just before the measurement is taken. Supports multiple commands separated with a column. Up to 256 characters are supported.
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Option
Description
Upper limit
The upper limit value for the peripheral current measurement test procedure, for a single DUT.
Next to this input field the total upper limit current consumption for all the enabled DUTs is shown, which is the value to be used during testing. Note: During testing, some DUTs may fail until the current measurement test takes place. In that case, the PLT will automatically re-calculate the total upper limit by using the value given for a single DUT multiplied with the number of the active DUTs at the time that the test will run.
Low limit
The low limit value for the peripheral current measurement test procedure, for a single DUT.
Next to this input field the total upper limit current consumption for all the enabled DUTs is shown, which is the value to be used during testing. Note: During test, some DUTs may fail until the current measurement test takes place. In that case, the PLT will automatically re-calculate the total low limit by using the value given for a single DUT multiplied with the number of the active DUTs at the time that the test will run.
Test Options
Select between a PWM GPIO test and custom test. Note: For the custom tests to work, a modified production test firmware must be
created with tests that set the DUTs to specific states before the current measurement test. Each test must be assigned to a specific opcode. The custom tests are the exact same as in Custom Test.
Test Options - GPIO
Pin
Sets the GPIO to toggle with the PWM pulse.
GPIO state
Sets the active state of the GPIO.
PWM frequency
Sets the PWM frequency.
PWM duty
Sets the PWM duty cycle.
Test Options – Custom Test
Start Command ID
The opcode of the custom test that sets the state of the DUT.
Stop Command ID
The opcode of the custom test that restores the DUT to its original state.
Table 62: Current Measurement Test - Sleep Current Measurement - DA1458x
Option
Description
Enable
This option enables the specific current measurement using the ammeter instrument provided in the Instrument section.
Shunt resistor
The value of the shunt resistor used for sleep current measurement. Applicable only if a voltmeter or a NI-DAQ is used to measure current instead of a DMM. Values from 0 to 9999 are supported.
Wait time
The time in ms the PLT will wait before taking a current measurement, after it has sent an instruction to the DUTs to go into a specific sleep state. Supported values are 1 to 500000ms.
Sleep time
The time in seconds that the DUTs will remain in sleep mode. A timer in the production test firmware will wake up the devices. Supported values are 1 to 9sec for DA14580/1/2/3 and up to 1200sec for the rest.
Range
The range value in Ampere units that the ammeter instrument will operate. Supported values are 0 to 9999 and default value is 0.001A. When the ammeter_scpi.dll is used, if this value is set to zero, the instrument will use the automatic range functionality.
Resolution
The ammeter instrument resolution value in Ampere units.
Samples
The number of samples that the ammeter instrument will read and average. 1 to 1000 is supported.
SCPI cmd
An SCPI command to be passed to the ammeter instrument just before the measurement is taken. Supports multiple commands separated with a column. Up to 256 characters are supported.
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Option
Description
Upper limit
The upper limit value for the sleep current measurement test procedure, for a single DUT.
Next to this input field the total upper limit current consumption for all the enabled DUTs is shown, which is the value to be used during testing. Note: During test, some DUTs may fail until the current measurement test takes place; in that case, the PLT will automatically re-calculate the total upper limit by using the value given for a single DUT multiplied with the number of the active DUTs at the time that the test will run.
Low limit
The low limit value for the sleep current measurement test procedure, for a single DUT. Next to this input field the total upper limit current consumption for all the enabled DUTs
is shown, which is the value to be used during testing. Note: During testing, some DUTs may fail until the current measurement test takes place. In that case, the PLT will automatically re-calculate the total low limit by using the value given for a single DUT multiplied with the number of the active DUTs at the time that the test will run.
7.2.6.12 Temperature Measurement Test
Figure 69: Temperature Measurement Test - DA1458x
Table 63 describes the available options of the DA1458x Temperature Measurement Test.
Table 63: Temperature Measurement Test - DA1458x
Option
Description
Enable
This option enables the temperature measurement test.
Instrument
Selects the temperature measurement DLL. Names are shown only if a temperature measurement instrument DLL exists in the project folder temp_meas_instr_plugins.
Interface
The interface of the instrument to be used by the driver.
7.2.6.13 Scan Test
Figure 70: Scan Test - DA1458x
Table 64 describes the available options for the DA1458x Scan Test.
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By enabling this test, the Golden Unit will scan for the DUT’s BD addresses advertised after the customer firmware has been burned. For this test to work, a bootable firmware with the ability to advertise with the BD address given by the PLT must be burned into each DUT. Additionally, the BD addresses provided by the PLT should be burned into OTP memory, such that the devices advertise with the BD addresses that the tool uses.
Table 64: Scan Test DA1458x Options
Option
Description
Enable
This option enables the Scan test.
Scan retries
The total number of BLE advertising scans the Golden Unit will perform.
DUT reboot
Define after how many retries the PLT will reboot the DUTs.
DUT reboot difference
Set the time difference between each DUT when the PLT reboots the devices, in order to avoid air collisions.
DUT reboot time
The time the VBAT will remain low during the device reboot. This value is time in ms*100 (e.g. 15 is 1500ms).
Firmware load enable
By enabling this option, a new image will be downloaded to all active DUTs before scanning for BLE advertising devices.
Firmware path
The path of the binary file to download to the devices for the scan test.
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7.2.7 Memory Functions (DA1458x)

This section describes the Memory Functions settings available when using DA1458x devices. Memory functions include OTP, SPI Flash, and I2C EEPROM memory programming.
7.2.7.1 OTP Memory
This test enables the OTP memory programming. Table 65 describes the available options for the OTP Memory image write operation.
Figure 71: OTP Memory - DA1458x
Note: If the binary is larger than the available OTP image area (OTP memory excluding the header area), the
PLT software will split the binary into two parts. The first part will contain only the OTP image area. The second part will contain the OTP header fields, split in OTP words. PLT will burn the non-zero words one by one, as single OTP entries in the OTP header area. The check empty feature will handle the first part as an OTP image binary. The second part will be checked word by word.
Table 65: OTP Memory - DA1458x
Option
Description
Write enable
This option enables the OTP image write operation.
● No check
● Check empty
● Check if data match
Memory protection options: No check: No protection is enabled. PLT will attempt to burn the OTP memory
without running any check.
Check empty: PLT will first check if the OTP memory is empty. Check if data match: PLT will first check if the memory to be burned is empty. If it
is not, it will compare the contents with the data to be burned. If the data are not the same the test will fail without making any changes to the memory. If the data are the same, PLT will not burn the memory to prevent using the OTP repair memory.
Verify image
If this option is enabled, PLT will read back the contents of the OTP memory and compare them to the original image file. If these do not match it will fail.
Burn image length to OTP header (OTP DMA length)
If this option is selected, PLT software will calculate the length in OTP words and burn it to the Memory Header (DA1458x) – OTP DMA length. When selected, it will disable the OTP DMA length option in Memory header tab.
Different image per DUT
If this option is selected, a different image per DUT can be burned into the OTP. The image name must be specific for each DUT, as described below.
Image path
Via this field, the user specifies the image file to be burned into the OTP. A .bin binary file of any name can be selected.
Depending on the size of the selected binary, PLT will inform the user if the binary contains both the image and the header part or if it exceeds the maximum supported size.
If Different image per DUT is selected, the user only selects the directory of the images. In that case, the binary file names must have the following format: img_xx.bin, where ‘X’ denotes the DUT number. For example, if the user has activated DUTs 1, 5 and 10 then img_01.bin, img_05.bin and img_10.bin binary files should exist in the selected OTP image path as shown in Figure 72.
Range of numbers is img_01.bin … img_16.bin.
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