DFI QB702-B User Manual

QB702-B

Qseven Board

User’s Manual

A24720340

www.d.comChapter 1 Introduction

Copyright

FCC and DOC Statement on Class B

This publication contains information that is protected by copyright. No part of it may be reproduced in any form or by any means or used to make any transformation/adaptation without the prior written permission from the copyright holders.

This publication is provided for informational purposes only. The manufacturer makes no representations or warranties with respect to the contents or use of this manual and specifically disclaims any express or implied warranties of merchantability or fitness for any particular purpose. The user will assume the entire risk of the use or the results of the use of this document. Further, the manufacturer reserves the right to revise this publication and make changes to its contents at any time, without obligation to notify any person or entity of such revisions or changes.

Changes after the publication’s first release will be based on the product’s revision. The website will always provide the most updated information.

Trademarks

Product names or trademarks appearing in this manual are for identification purpose only and are the properties of the respective owners.

Qseven Specification Reference

http://www.qseven-standard.org/

This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures:

• Reorient or relocate the receiving antenna.

• Increase the separation between the equipment and the receiver.

• Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.

• Consult the dealer or an experienced radio TV technician for help.

Notice:

1. The changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate the equipment.

2. Shielded interface cables must be used in order to comply with the emission limits.

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Save & Exit ................................................................................................ 28

Updating the BIOS .......................................................................................29

Trademarks ........................................................................................................2

FCC and DOC Statement on Class B .....................................................2

About this Manual ..........................................................................................4

Warranty ............................................................................................................4

Static Electricity Precautions ......................................................................4

Safety Measures ..............................................................................................4

About the Package .........................................................................................5

Chapter 1 - Introduction .............................................................................6

Specifications ................................................................................................6

Features ..........................................................................................................7

Chapter 2 - Hardware Installation ................................................ 8

Board Layout .................................................................................................8

Block Diagram ...............................................................................................8

Mechanical Diagram ....................................................................................9

System Memory ..........................................................................................10

Cooling Option ............................................................................................10

MXM Connector ..........................................................................................11

MXM Connector Signal Description .......................................................13

Installing QB702-B Series onto a Carrier Board ...............................19

Chapter 4 - Supported Software .......................................................... 30

Appendix A - nLite and AHCI Installation Guide ...........................39

nLite ...............................................................................................................39

AHCI ..............................................................................................................43

Appendix B - System Error Message ...................................................45

Appendix C - Troubleshooting ................................................................46

Chapter 3 - BIOS Setup ............................................................... 20

Overview ..................................................................................................... 20

AMI BIOS Setup Utility .............................................................................21

Main ..........................................................................................................21

Advanced ...................................................................................................21

Chipset ......................................................................................................24

Boot...........................................................................................................27

Security ...................................................................................................... 28

www.dﬁ .comChapter 1 Introduction

About this Manual

Static Electricity Precautions

An electronic file of this manual is included in the CD. To view the user’s manual in the CD, insert the CD into a CD-ROM drive. The autorun screen (Main Board Utility CD) will appear. Click “User’s Manual” on the main menu.

Warranty

1. Warranty does not cover damages or failures that arised from misuse of the product, inability to use the product, unauthorized replacement or alteration of components and product specifications.

2. The warranty is void if the product has been subjected to physical abuse, improper installation, modification, accidents or unauthorized repair of the product.

3. Unless otherwise instructed in this user’s manual, the user may not, under any circumstances, attempt to perform service, adjustments or repairs on the product, whether in or out of warranty. It must be returned to the purchase point, factory or authorized service agency for all such work.

4. We will not be liable for any indirect, special, incidental or consequencial damages to the product that has been modified or altered.

It is quite easy to inadvertently damage your PC, system board, components or devices even before installing them in your system unit. Static electrical discharge can damage computer components without causing any signs of physical damage. You must take extra care in handling them to ensure against electrostatic build-up.

1. To prevent electrostatic build-up, leave the system board in its anti-static bag until you are ready to install it.

2. Wear an antistatic wrist strap.

3. Do all preparation work on a static-free surface.

4. Hold the device only by its edges. Be careful not to touch any of the components, contacts or connections.

5. Avoid touching the pins or contacts on all modules and connectors. Hold modules or connectors by their ends.

Important:

Electrostatic discharge (ESD) can damage your processor, disk drive and other components. Perform the upgrade instruction procedures described at an ESD workstation only. If such a station is not available, you can provide some ESD protection by wearing an antistatic wrist strap and attaching it to a metal part of the system chassis. If a wrist strap is unavailable, establish and maintain contact with the system chassis throughout any procedures requiring ESD protection.

Safety Measures

To avoid damage to the system:

• Use the correct AC input voltage range.

To reduce the risk of electric shock:

• Unplug the power cord before removing the system chassis cover for installation or servicing. After installation or servicing, cover the system chassis before plugging the power cord.

www.dﬁ .comChapter 1 Introduction

About the Package

The package contains the following items. If any of these items are missing or damaged, please contact your dealer or sales representative for assistance.

• One QB702-B board

• One DVD

• One QR (Quick Reference)

Optional Items

• Q7-100 carrier board kit

• Two standoff bolts

• Two sets of nut and bolt

• One bracket

• Heat spreader with heat sink

• Heat spreader

The board and accessories in the package may not come similar to the information listed above. This may differ in accordance with the sales region or models in which it was sold. For more information about the standard package in your region, please contact your dealer or sales representative.

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Chapter 1 - Introduction

Specifications

Processor

Chipset System Memory

Graphics

Audio LAN

Serial ATA

SDIO/MMC Interface

Trusted Platform Module-TPM (optional)

SSD (optional)

• QB702-B620T102

- Intel

• QB702-B640T102

- Intel

• QB702-B660T102

- Intel

• QB702-B680T102

- Intel

• Intel® EG20T PCH

• 1GB DDR2 onboard

• Supports memory down (single 32-bit channel)

• Intel® GMA 600

• Supports up to 400MHz graphics frequency

• Ultra low power integrated 3D graphics

• High deﬁ nition hardware video decoder and encoder engine

• Supports LVDS and SDVO interfaces

- LVDS: Supports pixel clock depths of 18/24-bit, single channel, max. pixel

- SDVO: Up to 160MHz pixel clock, equates to 1280x1024 @ 85Hz

• Supports High Deﬁ nition Audio interface

• Integrated Intel® PCH GbE MAC

• One Micrel KSZ9021RNI Ethernet PHY

• Supports 10Mbps, 100Mbps and 1Gbps data transmission

• IEEE 802.3 (10/100Mbps) and IEEE 802.3ab (1Gbps) compliant

• Supports 2 SATA interfaces

- One port shared with SSD

• SATA speed up to 3Gb/s (SATA 2.0)

• Supports 1 SDIO/MMC

• Supports SDA Standard Ver 1.0, SD memory card speciﬁ cation Ver 2.0, SDIO card speciﬁ cation Ver 1.0, MMC System speciﬁ cation Ver 4.1

• Conforms to Secure Digital Host Controller (SDHC) speed class 6

• Provides a Trusted PC for secure transactions

• Provides software license protection, enforcement and password protection

• 2GB/4GB/8GB/16GB/32GB

AtomTM E620T (512KB L2 cache, 600 MHz, 3.3W)

AtomTM E640T (512KB L2 cache, 1.0 GHz, 3.6W)

AtomTM E660T (512KB L2 cache, 1.3 GHz, 3.6W)

AtomTM E680T (512KB L2 cache, 1.6 GHz, 4.5W)

clock of 80MHz, equates to 1280x768 @ 60Hz

Chapter 1

Expansion Interfaces

Energy Efﬁ cient Design

BIOS

Watchdog Timer

Power

Power Consumption

OS Support Temperature

Humidity PCB

• Supports 8 USB 2.0 interfaces:

- 7 Host and 1 Host/Client (selectable)

• Supports 1 LPC interface

• Supports 1 SMBus interface

• Supports 1 I

• Supports 3 PCIe x1 interfaces

• Supports CAN-bus (Controller-Area Network) interface

• Supports ExpressCard (PCIe signal only)

• Supports 1 serial interface (TX/RX)

• Supports 8-bit DIO interface

• Supports ACPI 2.0/1.0 speciﬁ cation

• Enhanced Intel

• AMI BIOS

- 16Mbit SPI Flash BIOS (UEFI BIOS)

• Software programmable from 1 to 255 seconds

• Input: VCC_RTC, 5V standby, 5V

• Supports ATX/AT mode

• 7.6 W with E680 at 1.6GHz and 1GB DDR2 onboard

• Windows XP Professional x86 & SP3 (32-bit)

• Operating: -40oC to 85oC

• Storage: -40

• 10% to 90%

• Dimensions

- Qseven form factor

- 70mm (2.76") x 70mm (2.76")

• Compliance

- Qseven speciﬁ cation revision 1.2

C interface

SpeedStep Technology

C to 85oC

www.dﬁ .comChapter 1 Introduction

Chapter 1

)

play

/Gig

)

Features

• DDR2

DDR2 is a higher performance DDR technology whose data transfer rate delivers bandwidth of 4.3 GB per second and beyond. That is twice the speed of the conventional DDR without increasing its power consumption. DDR2 SDRAM modules work at 1.8V supply compared to

2.6V memory voltage for DDR modules. DDR2 also incorporates new innovations such as the On-Die Termination (ODT) as well as larger 4-bit pre-fetch against DDR which fetches 2 bits per clock cycle.

• Graphics

The integrated Intel® HD graphics engine delivers an excellent blend of graphics performance and features to meet business needs. It provides excellent video and 3D graphics with outstanding graphics responsiveness. These enhancements deliver the performance and compatibility needed for today’s and tomorrow’s business applications. Supports LVDS and SDVO display outputs.

• Serial ATA

Serial ATA is a storage interface that is compliant with SATA 2.0a specification. With speed of up to 3Gb/s (SATA 2.0), it improves hard drive performance faster than the standard parallel ATA whose data transfer rate is 100MB/s. The bandwidth of the SATA 3.0 will be limited by carrier board design.

• Gigabit LAN

The Micrel KSZ9021RNI Ethernet Phy controller supports up to 1Gbps data transmission.

Specification Comparison Table

The table below shows the Qseven standard specifications and the corresponding specifications supported on the QB702-B module.

System I/O Interface PCI Ex

ress Lanes 0 1 (x1 link

Serial ATA channels 0 0 2 2

orts 3 4 8 8

USB 2.0 LVDS channels 0 0 Dual Channel 24bits Sin

Port, TMDS

Dis High Definition

udio/AC'97

Ethernet 10/100

abi

Mbit

ressCard support0022

Ex Low Pin Count bus 0 0 1 1 Secure Digital I/O 8-bi for SD/MMC cards

stem Management 0 1 1 1

C Bus

I SPI Bus 0 0 1 1 CAN Bus 0 0 1 1

Trigge

Watchdo Power Button 1 1 1 1 Power Good 1 1 1 1 Reset Button 1 1 1 1 LID Button 0 0 1 1

Button 0 0 1 1

Slee Suspend To RAM (S3

mode Wake 0 0 1 1

low alarm 0 0 1 1

Batter Thermal control 0 0 1 1 FAN control 0 0 1 1

RM/RISC Based

Minimum Confi

0011 0011

0 0 1 (Gigabit Ethernet) 1

0011

1111

0011

uration

X86 Based Minimum Configuration

Maximum Configuration 43

DFI QB702 Configuration

le Channel 24bits

• Watchdog Timer

The Watchdog Timer function allows your application to regularly “clear” the system at the set time interval. If the system hangs or fails to function, it will reset at the set time interval so that your system will continue to operate.

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Chapter 2 - Hardware Installation

SDVO

HDA

LPC

PCIe x1 3x

SM Bus

LVDS

USB 04

USB Client

SDIO/MMC

CAN Bus

C Bus

SSD

SPI

Board Layout

SPI Flash BIOS

DDR2

Intel

EG20T

Intel Atom E6xxT

DDR2

PMIC

USB HUB

GLAN PHY

Top View

Chapter 2

Block Diagram

AMXM Golden Finger

Micro

controller-

PIC16F690

WDTO

LVDS_DIMMING

CB_PWRBTN

WDI

C_DAT/CLO

SPI Flash

16Mbit

+5V

LVDS

SDVO

HDA

LPC

SM Bus

PCIe x1 3x

PMIC

DC/DC

LDO

SDIO/MMC

C Bus

CAN Bus

SPI

Processor

CORE

Atom E6xx Series

Graphics

CORE

Memory

Controller

PCIe x1

DDR2

1Gbit x8

CLK Gen

DDR2

SSD

TPM

Bottom View

USB Client

Serial RX/TX

USB 0-4

EG20T

SPI

EEPROM

USB Hub

USB 5-7

SATA 2x

SSD

GbE

KSZ9021RNI

USB 5

Port 1 (optional)

PHY

GMII

www.dﬁ .comChapter 2 Hardware Installation

Mechanical Diagram

Chapter 2

QB702-B Module with thermal solution

0.00

8.00 20.20

1.20

Heatspreader

Heatsink

Module PCB

Carrier PCB

0.00

32.86

56.50

70.00

QB702-B Module

27.74

18.00

52.00

56.48

70.00

Top View

33.33

Ø2.50 (*4pcs)

1.60

Standoff

Side View of the Module with thermal solution and Carrier Board

Bottom View

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Chapter 2

Important:

System Memory

The system board is equipped with memory down (single 32-bit channel) that support DDR2.

Cooling Option

Heat Spreader with Heat Sink

Top View of the Heat Sink

DDR2

Bottom View of the Heat Spreader

• “1”, “2” and “3“ denote the locations of the thermal pads designed to contact the corresponding components that are on QB702-B Series.

• Remove the plastic covering from the thermal pads prior to mounting the heat sink onto QB702-B Series.

www.dﬁ .comChapter 2 Hardware Installation

MXM Connector

The MXM connector is used to interface with the carrier board. Insert QB702-B series to the MXM connector on the carrier board. Refer to the following page for the pin function of this connector.

Refer to “Installing QB702-B Series onto a Carrier Board” section for more information.

Chapter 2

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Chapter 2

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Chapter 2

MXM Connector Signal Description

PCI Express Interface Signals Descriptions Signal Pin# Pin Type Pwr Rail

PCIE0_RX+ 180 PCIE0_RX- 182

PCIE0_TX+ PCIE0_TXPCIE1_RX+ 174 PCIE1_RX- 176 PCIE1_TX+ PCIE1_TXPCIE2_RX+ 168 PCIE2_RX- 170 PCIE2_TX+ PCIE2_TXPCIE3_RX+ 162 PCIE3_RX- 164 PCIE3_TX+ PCIE3_TXPCIE_CLK_REF+ 155 PCIE_CLK_REF- 157 PCIE_WAKE# 156 I CMOS 3.3V Suspend/3.3V PU 10K to 3.3V Suspend PCI Express Wake Event: Sideband wake signal asserted by components requesting wakeup. PCIE_RST# 158 O CMOS 3.3V/3.3V Reset Signal for external devices.

Express Card Support Pins Signal Pin# Pin Type Pwr Rail

EXCD0_CPPE# 177 I CMOS 3.3V PU 10K to 3.3V ExpressCard slot #0 capable card request EXCD0_PERST# 171 O CMOS 3.3V PU 10K to 3.3V ExpressCard slot #0 reset. EXCD1_CPPE# 178 I CMOS 3.3V PU 10K to 3.3V ExpressCard slot #1 capable card request. EXCD1_PERST# 172 O CMOS 3.3V ExpressCard slot #1 reset.

Gigabit Ethernet Signals Signal Pin# Pin Type Pwr Rail

GBE_MDI0+ 12 GBE

MDI0- 10

GBE

MDI1+ 11 MDI1- 9

GBE

MDI2+ 6

GBE

MDI2- 4

GBE

MDI3+ 5

GBE

MDI3- 3

GBE

GBE_CTREF 15 I/O GB_LAN GB_LAN

GBE_LINK# 13 O CMOS 3.3V PP 3.3V/3.3V PU 10K to 2.5V Ethernet controller 0 link indicator, active low. GBE_LINK100# 7 O CMOS 3.3V PP 3.3V/3.3V Ethernet controller 0 100Mbit/sec link indicator, active low. GBE_LINK1000# 8 O CMOS 3.3V PP 3.3V/3.3V Ethernet controller 0 1000Mbit/sec link indicator, active low. GBE_ACT# 14 O CMOS 3.3V PP 3.3V/3.3V PU 10K to 2.5V Ethernet controller 0 activity indicator, active low.

I PCIE

179

O PCUE

181

I PCIE

173

O PCUE

175

I PCIE

167

O PCUE

169

I PCIE

161

O PCUE

163

O PCUE PCIE PCI Express Reference Clock for Lanes 0 to 3.

I/O GB_LAN Media Dependent Interface (MDI) differential pair 0. The MDI can operate in 1000, 100, and 10Mbit/sec modes.This signal pair is used for all modes. I/O GB_LAN Media Dependent Interface (MDI) differential pair 1. The MDI can operate in 1000, 100, and 10Mbit/sec modes.This signal pair is used for all modes. I/O GB_LAN Media Dependent Interface (MDI) differential pair 2. The MDI can operate in 1000, 100, and 10Mbit/sec modes.This signal pair is used for all modes. I/O GB_LAN Media Dependent Interface (MDI) differential pair 3. The MDI can operate in 1000, 100, and 10Mbit/sec modes.This signal pair is used for all modes.

/Tolerance

PCIE

/Tolerance

GB_LAN GB_LAN GB_LAN GB_LAN

PU/PD (DFI-QB702) Description

PCI Express channel 0, Receive Input differential pair.

PCI Express channel 0, Transmit Output differential pair.

PCI Express channel 1, Receive Input differential pair.

PCI Express channel 1, Transmit Output differential pair.

PCI Express channel 2, Receive Input differential pair.

PCI Express channel 2, Transmit Output differential pair.

PCI Express channel 3, Receive Input differential pair.

PCI Express channel 3, Transmit Output differential pair.

PU/PD (DFI-QB702) Description

Reference voltage for carrier board Ethernet channel 0 magnetics center tap. The reference voltage is determined by the requirements of the module's PHY and may be as low as 0V and as high as 3.3V. The reference voltage output should be current limited on the module. In a case in which the reference is shorted to ground, the current must be limited to 250mA or less.

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Chapter 2

Serial ATA Interface Signals Signal Pin# Pin Type Pwr Rail

SATA0_RX+ 35 SATA0_RX- 37 SATA0_TX+ 29 SATA0_TX- 31 SATA1_RX+ 36 SATA1_RX- 38 SATA1_TX+ 30 SATA1_TX- 32

SATA_ACT# 33 O OC 3.3V 3.3V/3.3V Serial ATA Led. Open collector output pin driven during SATA command activity.

USB Interface Signals Signal Pin# Pin Type Pwr Rail

USB

P0+ 96 P0- 94

USB USB

P1+ 95 P1- 93

USB

P2+ 90

USB

P2- 88

USB

P3+ 89

USB USB

P3- 87 P4+ 84

USB

P4- 82

USB

P5+ 83

USB

P5- 81

USB

P6+ 78

USB USB

P6- 76 P7+ 77

USB

P7- 75

USB USB_0_1_OC# 86 I CMOS 3.3V Suspend/3.3V PU 10K to 3.3V Suspend Over current detect input 1. This pin is used to monitor the USB power over current of the USB Ports 0 and 1.

USB_2_3_OC# 85 I CMOS 3.3V Suspend/3.3V PU 10K to 3.3V Suspend Over current detect input 2. This pin is used to monitor the USB power over current of the USB Ports 2 and 3. USB_4_5_OC# 80 I CMOS 3.3V Suspend/3.3V PU 10K to 3.3V Suspend Over current detect input 3. This pin is used to monitor the USB power over current of the USB Ports 4 and 5. USB_6_7_OC# 79 I CMOS 3.3V Suspend/3.3V Not support Over current detect input 4. This pin is used to monitor the USB power over current of the USB Ports 6 and 7.

USB_ID 92 I CMOS 3.3V Suspend/3.3V PD 10K

USB_CC 91 I CMOS 3.3V Suspend/3.3V PD 10K

SDIO Interface Signals Signal Pin# Pin Type Pwr Rail

SDIO_CD# 43 I/O CMOS 3.3V/3.3V PU 10K to 3.3V SDIO Card Detect. This signal indicates when a SDIO/MMC card is present. SDIO_CLK 42 O CMOS 3.3V/3.3V SDIO Clock. With each cycle of this signal a one-bit transfer on the command and each data line occurs. This signal has maximum frequency of 48 MHz.

SDIO_CMD 45 I/O OD/PP CMOS 3.3V/3.3V SDIO_LED 44 O CMOS 3.3V/3.3V SDIO LED. Used to drive an external LED to indicate when transfers occur on the bus.

SDIO_WP 46 I/O CMOS 3.3V/3.3V PU 10K to 3.3V SDIO Write Protect. This signal denotes the state of the write-protect tab on SD cards. SDIO_PWR# 47 O CMOS 3.3V/3.3V SDIO Power Enable. This signal is used to enable the power being supplied to a SD/MMC card device. SDIO_DAT0-7 48-55 I/O PP CMOS 3.3V/3.3V SDIO Data lines. These signals operate in push-pull mode

I SATA

O SATA

I SATA

O SATA

I/O USB I/O USB I/O USB I/O USB I/O USB I/O USB I/O USB

/Tolerance

AC coupled on AC coupled on AC coupled on AC coupled on AC coupled on AC coupled on AC coupled on AC coupled on

/Tolerance

USB USB USB USB USB USB USB USB

/Tolerance

PU/PD (DFI-QB702) Description

Serial ATA channel 0, Receive Input differential pair.

Serial ATA channel 0, Transmit Output differential pair.

Serial ATA channel 1, Receive Input differential pair.

Serial ATA channel 1, Transmit Output differential pair.

PU/PD (DFI-QB702) Description

Universal Serial Bus Port 0 differential pair.I/O USB Universal Serial Bus Port 1 differential pair.This port may be optionally used as USB client port. Universal Serial Bus Port 2 differential pair. Universal Serial Bus Port 3 differential pair. Universal Serial Bus Port 4 differential pair. Universal Serial Bus Port 5 differential pair. Universal Serial Bus Port 6 differential pair. Universal Serial Bus Port 7 differential pair.

USB ID pin.Configures the mode of the USB Port 1. If the signal is detected as being 'high active' the BIOS will automatically configure USB Port 1 as USB Client and enable USB Client support. This signal should be driven as OC signal by external circuitry.

USB Client Connect pin.If USB Port 1 is configured for client mode then an externally connected USB host should set this signal to high-active in order to properly make the connection with the module's internal USB client controller. If the external USB host is disconnected, this signal should be set to low-active in order to inform the USB client controller that the external host has been disconnected. A level shifter/protection circuitry should be implemented on the carrier board for this signal.

PU/PD (DFI-QB702) Description

SDIO Command/Response. This signal is used for card initialization and for command transfers. During initialization mode this signal is open drain. During command transfer this signal is in push-pull mode.

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Chapter 2

High Definition Audio Signals/AC'97 Signal Pin# Pin Type Pwr Rail

HDA_RST# 61 O CMOS 3.3V/3.3V HD Audio/AC'97 Codec Reset. HDA_SYNC 59 O CMOS 3.3V/3.3V Serial Bus Synchronization HDA_BCLK 63 O CMOS 3.3V/3.3V HD Audio/AC'97 24 MHz Serial Bit Clock from Codec. HDA_SDO 67 O CMOS 3.3V/3.3V HD Audio/AC'97 Serial Data Output to Codec. HDA_SDIN 65 I CMOS 3.3V/3.3V HD Audio/AC'97 Serial Data input to Codec.

LVDS Flat Panel Signals Signal Pin# Pin Type Pwr Rail

LVDS_PPEN 111 O CMOS 3.3V/3.3V Controls panel power enable. LVDS_BLEN 112 O CMOS 3.3V/3.3V Controls panel Backlight enable.

LVDS_BLT_CTRL/GP_PWM_OUT0 123 O CMOS 3.3V/3.3V LVDS_A0+ 99

LVDS_A0- 101 LVDS_A1+ 103 LVDS_A1- 105 LVDS_A2+ 107 LVDS_A2- 109 LVDS_A3+ 113 LVDS_A3- 115 LVDS_A_CLK+ 119 LVDS_A_CLK- 121 LVDS_B0+ 100 LVDS_B0- 102 LVDS_B1+ 104 LVDS_B1- 106 LVDS_B2+ 108 LVDS_B2- 110 LVDS_B3+ 114 LVDS_B3- 112 LVDS_B_CLK+ 120 LVDS_B_CLK- 122 LVDS_DID_CLK/GP_I2C_CLK 127 I/O OD CMOS 3.3V/3.3V Primary functionality is DisplayID DDC clock line used for LVDS flat panel detection. If primary functionality is not used it can be as General Purpose I²C bus clock line. LVDS_DID_DAT/GP_I2C_DAT 125 I/O OD CMOS 3.3V/3.3V Primary functionality DisplayID DDC data line used for LVDS flat panel detection. If primary functionality is not used it can be as General Purpose I²C bus data line. LVDS_BLC_CLK 128 I/O OD CMOS 3.3V/3.3V Control clock signal for external SSC clock chip. LVDS_BLC_DAT 126 I/O OD CMOS 3.3V/3.3V Control data signal for external SSC clock chip.

SDVO Interface Signals Signal Pin# Pin Type Pwr Rail

SDVO_BCLK- 133 SDVO_BCLK+ 131 SDVO_INT- 134 SDVO_INT+ 132 SDVO_GREEN- 139 SDVO_GREEN+ 137 SDVO_BLUE- 145 SDVO_BLUE+ 143 SDVO_RED- 151 SDVO_RED+ 149 SDVO_FLDSTALL- 140 SDVO_FLDSTALL+ 138 SDVO_TVCLKIN- 146 SDVO_TVCLKIN+ 144

SDVO_CTRL_CLK 152 I/O OD CMOS 3.3V/3.3V

SDVO_CTRL_DAT 150 I/O OD CMOS 3.3V/3.3V

O LVDS LVDS primary channel differential pair 1.

O LVDS

O LVDS LVDS primary channel differential pair clock lines.

O LVDS LVDS secondary channel differential pair 0.

O LVDS LVDS secondary channel differential pair 1.

O LVDS LVDS secondary channel differential pair 2.

O LVDS

O LVDS LVDS secondary channel differential pair clock lines.

O PCIE

I PCIE

O PCIE

I PCIE

/Tolerance

LVDS

/Tolerance

SDVO

PU/PD (DFI-QB702) Description

Primary functionality is to control the panel backlight brightness via pulse width modulation (PWM). When not in use for this primary purpose it can be used as General Purpose PWM Output.

LVDS primary channel differential pair 0.O LVDS

LVDS primary channel differential pair 2.

LVDS primary channel differential pair 3.

LVDS secondary channel differential pair 3.

PU/PD (DFI-QB702) Description

SDVO differential pair clock lines.

SDVO differential pair interrupt input lines.

SDVO differential pair green data lines.

SDVO differential pair blue data lines.

SDVO differential pair red data lines.

SDVO differential pair field stall lines.

SDVO differential pair TV-Out synchronization clock lines. I²C based control signal (clock) for SDVO device.

Note: If the control bus from the SDVO device has a different signaling voltage, then a level shifting device will be required on the carrier board to properly translate the voltage level for this signal. I²C based control signal (data) for SDVO device. Note: If the control bus from the SDVO device has a different signaling voltage, then a level shifting device will be required on the carrier board to properly translate the voltage level for this signal.

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+ 32 hidden pages

DFI QB702-B User Manual

Copyright

FCC and DOC Statement on Class B

Trademarks

Table of Contents

About this Manual

Static Electricity Precautions

Warranty

Safety Measures

About the Package

Chapter 1 - Introduction

Specifications

Features

Chapter 2 - Hardware Installation

Board Layout

Block Diagram

Mechanical Diagram

System Memory

Cooling Option

MXM Connector

MXM Connector Signal Description