DFI HR908-B User Manual

HR908-B

COM Express Compact Module

User’s Manual

A25430511

1

www.dﬁ .comChapter 1 Introduction

Copyright

FCC and DOC Statement on Class B

This publication contains information that is protected by copyright. No part of it may be reproduced in any form or by any means or used to make any transformation/adaptation without the prior written permission from the copyright holders.

This publication is provided for informational purposes only. The manufacturer makes no representations or warranties with respect to the contents or use of this manual and specifically disclaims any express or implied warranties of merchantability or fitness for any particular purpose. The user will assume the entire risk of the use or the results of the use of this document. Further, the manufacturer reserves the right to revise this publication and make changes to its contents at any time, without obligation to notify any person or entity of such revisions or changes.

Changes after the publication’s first release will be based on the product’s revision. The website will always provide the most updated information.

Trademarks

Product names or trademarks appearing in this manual are for identification purpose only and are the properties of the respective owners.

COM Express Specification Reference

PICMG® COM Express ModuleTM Base Specification. http://www.picmg.org/

This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures:

• Reorient or relocate the receiving antenna.

• Increase the separation between the equipment and the receiver.

• Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.

• Consult the dealer or an experienced radio TV technician for help.

Notice:

1. The changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate the equipment.

2. Shielded interface cables must be used in order to comply with the emission limits.

2

www.dﬁ .comChapter 1 Introduction

Table of Contents

Copyright .............................................................................................................2

Trademarks ........................................................................................................2

FCC and DOC Statement on Class B .....................................................2

About this Manual ..........................................................................................4

Chapter 4 - BIOS Setup ............................................................... 28

Overview ..................................................................................................... 28

AMI BIOS Setup Utility .............................................................................29

Main ..........................................................................................................29

Advanced ...................................................................................................29

Chipset ......................................................................................................34

Boot...........................................................................................................40

Security ...................................................................................................... 41

Save & Exit ................................................................................................ 41

Updating the BIOS ....................................................................................42

Notice: BIOS SPI ROM .............................................................................43

Warranty ............................................................................................................4

Static Electricity Precautions ......................................................................4

Safety Measures ..............................................................................................4

About the Package .........................................................................................5

Chapter 1 - Introduction .............................................................................6

Specifications ................................................................................................6

Features ........................................................................................................7

Chapter 2 - Concept .......................................................................8

COM Express Module Standards ..............................................................8

Specification Comparison Table ...............................................................9

Chapter 3 - Hardware Installation .............................................. 10

Board Layout ...............................................................................................10

Block Diagram .............................................................................................10

Mechanical Diagram ..................................................................................11

System Memory ..........................................................................................12

Installing the DIMM Module ........................................................................13

Connectors ...................................................................................................14

CPU Fan Connector .....................................................................................14

COM Express Connectors ............................................................................15

COM Express connector Signal Discription .................................................... 16

Standby Power LED ................................................................................... 25

Cooling Option ............................................................................................25

Installing HR908-B onto a Carrier Board ............................................26

Chapter 5 - Supported Software .......................................................... 44

Appendix A - nLite and AHCI Installation Guide ...........................57

nLite ...............................................................................................................57

AHCI ..............................................................................................................61

Appendix B - Watchdog Sample Code ................................................63

Appendix C - System Error Message ...................................................64

Appendix D - Troubleshooting ................................................................65

3

www.dﬁ .comChapter 1 Introduction

About this Manual

Static Electricity Precautions

An electronic file of this manual is included in the CD. To view the user’s manual in the CD, insert the CD into a CD-ROM drive. The autorun screen (Main Board Utility CD) will appear. Click “User’s Manual” on the main menu.

Warranty

1. Warranty does not cover damages or failures that arised from misuse of the product, inability to use the product, unauthorized replacement or alteration of components and product specifications.

2. The warranty is void if the product has been subjected to physical abuse, improper installation, modification, accidents or unauthorized repair of the product.

3. Unless otherwise instructed in this user’s manual, the user may not, under any circumstances, attempt to perform service, adjustments or repairs on the product, whether in or out of warranty. It must be returned to the purchase point, factory or authorized service agency for all such work.

4. We will not be liable for any indirect, special, incidental or consequencial damages to the product that has been modified or altered.

It is quite easy to inadvertently damage your PC, system board, components or devices even before installing them in your system unit. Static electrical discharge can damage computer components without causing any signs of physical damage. You must take extra care in handling them to ensure against electrostatic build-up.

1. To prevent electrostatic build-up, leave the system board in its anti-static bag until you are ready to install it.

2. Wear an antistatic wrist strap.

3. Do all preparation work on a static-free surface.

4. Hold the device only by its edges. Be careful not to touch any of the components, contacts or connections.

5. Avoid touching the pins or contacts on all modules and connectors. Hold modules or connectors by their ends.

Important:

Electrostatic discharge (ESD) can damage your processor, disk drive and other components. Perform the upgrade instruction procedures described at an ESD workstation only. If such a station is not available, you can provide some ESD protection by wearing an antistatic wrist strap and attaching it to a metal part of the system chassis. If a wrist strap is unavailable, establish and maintain contact with the system chassis throughout any procedures requiring ESD protection.

Safety Measures

To avoid damage to the system:

• Use the correct AC input voltage range.

To reduce the risk of electric shock:

• Unplug the power cord before removing the system chassis cover for installation or servicing. After installation or servicing, cover the system chassis before plugging the power cord.

4

www.dﬁ .comChapter 1 Introduction

About the Package

The package contains the following items. If any of these items are missing or damaged, please contact your dealer or sales representative for assistance.

• One HR908 board

• One QR (Quick Reference)

• One DVD

Optional Items

• COM331-B carrier board kit

• COM101-BAT carrier board kit

• Heat spreader: TBD

• Heat spreader with heat sink and fan: TBD

• Heat sink with fan The board and accessories in the package may not come similar to the information listed

above. This may differ in accordance with the sales region or models in which it was sold. For more information about the standard package in your region, please contact your dealer or sales representative.

5

www.dﬁ .comChapter 1 Introduction

Chapter 1 - Introduction

Specifications

Processor

Chipset System Memory

Graphics

• 3rd generation Intel® CoreTM processors (22nm process technology) : Intel : Intel : Intel : Intel : Intel : Intel : Intel : Intel : Intel : Intel

• 2 : Intel : Intel : Intel : Intel : Intel : Intel : Intel : Intel : Intel : Intel

®

CoreTM i7-3615QE (6M Cache, up to 3.3GHz); 45W

®

CoreTM i7-3612QE (6M Cache, up to 3.1GHz); 35W

®

CoreTM i7-3555LE (4M Cache, up to 3.2GHz); 25W

®

CoreTM i7-3517UE (4M Cache, up to 2.8GHz); 17W

®

CoreTM i5-3610ME (3M Cache, up to 3.3GHz); 35W

®

CoreTM i3-3120ME (3M Cache, 2.4GHz); 35W

®

CoreTM i3-3217UE (3M Cache, 1.6GHz); 17W

®

CeleronTM 1020E (2M Cache, 2.2GHz); 35W

®

CeleronTM 1047UE (2M Cache, 1.4GHz); 17W

®

CeleronTM 927UE (1M Cache, 1.5GHz); 17W

nd

generation Intel® CoreTM processors (32nm process technology)

®

CoreTM i7-2715QE (6M Cache, up to 3.0GHz); 45W

®

CoreTM i7-2655LE (4M Cache, up to 2.9GHz); 25W

®

CoreTM i7-2610UE (4M Cache, up to 2.4GHz); 17W

®

CoreTM i5-2515E (3M Cache, up to 3.2GHz); 35W

®

CoreTM i3-2310E (3M Cache, 2.1GHz); 35W

®

CoreTM i3-2340UE (3M Cache, 1.3GHz); 17W

®

CeleronTM B810E (2M Cache, 1.6GHz); 35W

®

CeleronTM 847E (2M Cache, 1.1GHz); 17W

®

CeleronTM 827E (1.5M Cache, 1.4GHz); 17W

®

CeleronTM 807UE (1M Cache, 1.0GHz); 10W

• BGA 1023 packaging technology

• Intel® QM67 Express chipset

• One 204-pin SODIMM socket

• Supports DDR3 SODIMM

3rd Generation Processors 2nd Generation Processors

DDR3 1066/1333/1600MHz DDR3 1066/1333MHz (i5/i3/Celeron)

•Supports DDR3L SODIMM

- 1066/1333MHz when operating at 1.35V

- 1066/1333/1600MHz when operating at 1.5V

• Supports up to 8GB system memory

• DRAM device technologies: 1Gb, 2Gb and 4Gb DDR3 DRAM technologies are supported for x8 and x16 devices, unbuffered, non-ECC

• Intel® HD Graphics 4000 (3rd generation processors)

®

HD Graphics 3000 (2nd generation processors)

• Intel

®

• Intel

HD Graphics (Intel

®

• Supports LVDS, VGA, and DDI interfaces

• VGA: resolution up to 1920x1200 @ 60Hz

• LVDS: Single Channel - 18/24-bit; Dual Channel - 36/48-bit, resolution up to 1920x1200 @ 60Hz

• Digital Display Interfaces: HDMI, DVI, DP and SDVO

• HDMI, DVI, DP: resolution up to 1920x1200 @ 60Hz

®

Clear Video Technology

• Intel

• DirectX Video Acceleration (DXVA) for accelerating video processing

- Full AVC/VC1/MPEG2 HW Decode

• Supports DirectX 11/10.1/10/9 and OpenGL 3.0 (3rd generation processors)

• Supports DirectX 10.1/10/9 and OpenGL 3.0 (2nd generation processors)

DDR3 1600MHz (i7)

TM

Celeron

processors)

Chapter 1

Audio LAN

Serial ATA

Watchdog Timer

Expansion Interfaces

Damage Free Intelligence

OS Support

BIOS Temperature

Humidity Power PCB

• Supports High Deﬁ nition Audio interface

• Intel® 82579LM Gigabit Ethernet PHY

• Integrated 10/100/1000 transceiver

• Fully compliant with IEEE 802.3, IEEE 802.3u, IEEE 802.3ab

• Supports 4 Serial ATA interfaces

• 2 SATA 3.0 with data transfer rate up to 6Gb/s 2 SATA 2.0 with data transfer rate up to 3Gb/s

• Integrated Advanced Host Controller Interface (AHCI) controller

• Supports RAID 0/1/5/10

• Watchdog timeout programmable via software from 1 to 255 seconds

• Supports 8 USB 2.0 interfaces

• Supports 1 PCIe x16 interface

- Supports Gen 3.0 (3rd generation processors)

- Conﬁ gurations (supported only via a riser card): : One x8 (GFX) and two x4 (I/O) : Two x8 (GFX, I/O) : One x16 (GFX, I/O)

• Supports 1 PCIe x4 and 3 PCIe x1 (default); or 7 PCIe x1 interfaces

• Supports LPC interface

• Supports SMBus interface

• Supports I2C interface

• Supports 2 serial interfaces (TX/RX)

• Supports 4-bit input and 4-bit output GPIO

• Monitors CPU temperature

• Monitors CPU fan speed

• Monitors Vcore/VGFX/DDR voltages

• Watchdog timer function

• Windows XP Professional x86 & SP3 (32-bit)

• Windows XP Professional x64 & SP2 (64-bit)

• Windows 7 Ultimate x86 & SP1 (32-bit)

• Windows 7 Ultimate x64 & SP1 (64-bit)

• Windows 8 Enterprise x86 (32-bit)

• Windows 8 Enterprise x64 (64-bit)

• 64Mbit UEFI SPI BIOS

• Operating: 0oC to 60oC

• Storage: -20

o

C to 85oC

• 10% to 90%

• Input: 12V, 5VSB, VCC_RTC

• Dimensions

- COM Express

®

Compact

- 95mm (3.74") x 95mm (3.74")

• Compliance

- PICMG COM Express

®

R2.1 Compact form factor, Type 6

6

www.dﬁ .comChapter 1 Introduction

Chapter 1

Features

• Watchdog Timer

The Watchdog Timer function allows your application to regularly “clear” the system at the set time interval. If the system hangs or fails to function, it will reset at the set time interval so that your system will continue to operate.

• DDR3

DDR3 delivers increased system bandwidth and improved performance. The advantages of DDR3 are its higher bandwidth and its increase in performance at a lower power than DDR2.

• Graphics

Note:

Due to the limitation of chipset QM67, 3 display features will not be supported.

The integrated Intel® HD graphics engine delivers an excellent blend of graphics performance and features to meet business needs. It provides excellent video and 3D graphics with outstanding graphics responsiveness. These enhancements deliver the performance and compatibility needed for today’s and tomorrow’s business applications. It supports LVDS, VGA and DDI interfaces.

• Serial ATA

Serial ATA is a storage interface that is compliant with SATA 1.0a specification. With speed of up to 3Gb/s (SATA 2.0) and 6Gb/s (SATA 3.0), it improves hard drive performance faster than the standard parallel ATA whose data transfer rate is 100MB/s. The bandwidth of the SATA 3.0 will be limited by carrier board design.

• Gigabit LAN

The Intel 82579LM Gigabit LAN controller supports up to 1Gbps data transmission.

7

www.dﬁ .comChapter 1 Introduction

Chapter 2 - Concept COM Express Module Standards

The figure below shows the dimensions of the different types of COM Express modules. HR908-B is a COM Express Compact module. The dimension is 95mm x 95mm.

Common for all Form Factors Extended only Basic only Compact only Compact and Basic only Mini only

Chapter 2

106.00

Extended

91.00

18.00

6.00

0.00

4.00

0.00

16.50

Mini

8

74.20

80.00

91.00

BasicCompact

70.00

51.00

4.00

121.00

151.00

www.dﬁ .comChapter 2 Concept

Chapter 2

/

A

Specification Comparison Table

The table below shows the COM Express standard specifications and the corresponding specifications supported on the HR908-B module.

COM Express Module Base

Connector Feature

A-B A-B PCI Express Lanes 0 - 5 1 / 6 6 A-B LVDS Channel A 0 / 1 1 A-B LVDS Channel B 0 / 1 1 A-B eDP on LVDS CH A pins 0 / 1 0 A-B VGA Port 0 / 1 1 A-B TV-Out NA NA A-B DDI 0 NA NA

5

A-B A-B CAN interface on SER1 0 / 1 0

A-B SATA / SAS Ports 1 / 4 4 A-B AC’97 / HDA Digital Interface 0 / 1 1 A-B USB 2.0 Ports 4 / 8 8 A-B USB Client 0 / 1 0 A-B USB 3.0 Ports NA NA A-B LAN Port 0 1 / 1 1 A-B Express Card Support 1 / 2 2 A-B LPC Bus 1 / 1 1 A-B SPI 1 / 2 1 A-B

6

A-B A-B SMBus 1 / 1 1

A-B I2C 1 / 1 1 A-B Watchdog Timer 0 / 1 1 A-B Speaker Out 1 / 1 1 A-B External BIOS ROM Support 0 / 2 0 A-B Reset Functions 1 / 1 1

Serial Ports 1 - 2 0 / 2 2

SDIO (muxed on GPIO) 0 / 1 0 General Purpose I/O 8 / 8 8

Specification Type 6

(No IDE or PCI, add DDI+ USB3)

Max

Min

System I/O

System Management

DFI HR908-B Type 6

• 5 Indicates 12V-tolerant features on former VCC_12V signals.

• 6 Cells in the connected columns spanning rows provide a rough approximation of features sharing connector pins.

COM Express Module Base

Connector Feature

A-B A-B Thermal Protection 0 / 1 A-B Battery Low Alarm 0 / 1 A-B Suspend/Wake Signals 0 / 3 A-B Power Button Support 1 / 1 A-B Power Good 1 / 1 A-B VCC_5V_SBY Contacts 4 / 4

5

A-B

5

A-B

5

A-B A-B Trusted Platform Modules 0 / 1

A-B A-B VCC_12V Contacts 12 / 12

Sleep Input 0 / 1 Lid Input 0 / 1 Fan Control Signals 0 / 2

Specification Type 6

(No IDE or PCI, add DDI+ USB3) Min

Power Management

Max

Power

DFI HR908-B Type 6

1 1 2 1 1 4 1 1 2 0

12

Module Pin-out - Required and Optional Features C-D Connector. PICMG® COM.0Revision 2.1

COM Express Module Base

Connector Feature

C-D

6

C-D

6

C-D C-D C-D VCC_12V Contacts 12 / 12

PCI Express Lanes 16 - 31 0 / 16 PCI Express Graphics (PEG) 0 / 1 Muxed SDVO Channels 1 - 2 NA NA PCI Express Lanes 6 - 15 0 / 2 PCI Bus - 32 Bit NA NA PATA Port NA NA LAN Ports 1 - 2 NA NA DDIs 1 - 3 0 / 3 USB 3.0 Ports 0 / 4

Specification Type 6

(No IDE or PCI, add DDI+ USB3) Min

Max

System I/O

Power

DFI HR908-B Type 6

0 1

2

3 N

12

9

www.dﬁ .comChapter 2 Concept

Chapter 3 - Hardware Installation

PEG 16x LANES

HD Audio

USB 2.0 8x

SATA 2.0 2x, SATA 3.0 2x

LVDS (Dual Channel)

CRT

PCIe

x1

6x

LAN Ports

SM Bus

Seri

al P

ort

2x

LPC Bus

SPI

System Fan PWM/TACH_IN

DDP Port

C

DDP Port D

DDP Port B/SDVO Port B

PCIe x1 Lane 7

Board Layout

Intel

CPU fan

1

Intel 82579LM

BGA 1023 i3/i5/i7

Intel

QM67

Standby Power LED

SPI Flash BIOS

iTE

IT8518E

DDR3 SODIMM

Top View

Chapter 3

Block Diagram

Channel A (DDR3)

1066/1333/1600MHz

Channel A (DDR3L)

1066/1333MHz

DDR3/

DDR3L

SODIMM

SM Bus

HD Audio

LPC Bus

A / B

GPIO/

2

C

WDT/I

USB 2.0 8x

SATA 2.0 2x, SATA 3.0 2x

LVDS (Dual Channel)

CRT

PCIe x1 6x

SPI

Serial Port 2x

System Fan PWM/TACH_IN

Processor

CORE

CORE CORE CORE

nd

3rd/2

Generation

®

Core™ i7/i5/i3

Intel

Graphics

CORE

(Direct Media

Memory

Controller

DMI

Interface)

Mobile Intel® QM67

(Platform

Controller Hub)

Intel® FDI

(Flexible Display

Interface)

IMVP7

(Vcore,Vgfx)

PEG 16x LANES

DDP Port B/SDVO Port B

DDP Port C

DDP Port D

PCIe x1 Lane 7

C / D

Bottom View

LAN Ports

PCIe x1, Lane 8

Intel® GLAN

D110

C110 B110

A110

COM Express connector

D1

C1 B1

A1

10

PHY 82579LM

www.dﬁ .comChapter 3 Hardware Installation

Mechanical Diagram

Chapter 3

95.00

4.00

23.60

33.60

35.60

2.00

1.60

5.0 or 8.0 mm

87.00

4.00

HR908-B Module with Heat Sink

95.00

87.00

76.00

83.50 Cooler

3.50

standoff

Module PCB

Module PCB The height of the highest parts

CarrierBoard

33.60

91.00

87.00

0.00

4.00

0.00

HR908-B Module

95.00

Ø2

87.00

76.00

.70(*4 pcs)

91.00

87.00

0.00

4.00

95.00

Top View

Bottom View

Side View of the Module with Heat Sink and Carrier Board

14.00

2.00

0.00

70.20

11

12.50

www.dﬁ .comChapter 3 Hardware Installation

Chapter 3

System Memory

Important:

Electrostatic discharge (ESD) can damage your board, processor, disk drives, add-in boards, and other components. Perform installation procedures at an ESD workstation only. If such a station is not available, you can provide some ESD protection by wearing an antistatic wrist strap and attaching it to a metal part of the system chassis. If a wrist strap is unavailable, establish and maintain contact with the system chassis throughout any procedures requiring ESD protection.

System Memory

The system board is equipped with one 204-pin SODIMM socket that support DDR3 memory modules.

Important:

When the Standby Power LED lit red, it indicates that there is power on the board. Power-off the PC then unplug the power cord prior to installing any devices. Failure to do so will cause severe damage to the board and components.

Standby

Power LED

DDR3

12

www.dﬁ .comChapter 3 Hardware Installation

Chapter 3

Installing the DIMM Module

Note:

The system board used in the following illustrations may not resemble the actual one. These illustrations are for reference only.

1. Make sure the PC and all other peripheral devices connected to it has been powered down.

2. Disconnect all power cords and cables.

3. Locate the SODIMM socket on the system board.

4. Note the key on the socket. The key ensures the module can be plugged into the socket in only one direction.

5. Grasping the module by its edges, align the module into the socket at an approximately 30 degrees angle. Apply firm even pressure to each end of the module until it slips down into the socket. The contact fingers on the edge of the module will almost completely disappear inside the socket.

6. Push down the module until the clips at each end of the socket lock into position. You will

hear a distinctive “click”, indicating the module is correctly locked into position.

Clip

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www.d.comChapter 3 Hardware Installation

Chapter 3

Connectors

CPU Fan Connector

Sense Power

Ground

Connect the CPU fan’s cable connector to the CPU fan connector on the board. The cooling fan will provide adequate airflow throughout the chassis to prevent overheating the CPU and board components.

BIOS Setting

1 3

COM Express Connectors

The COM Express connectors are used to interface the HR908-B COM Express board to a carrier board. Connect the COM Express connectors (lcoated on the solder side of the board) to the COM Express connectors on the carrier board.

Refer to the “Installing HR908-B onto a Carrier Board” section for more information.

COM Express Connectors

“Module Board H/W Monitor” submenu in the Advanced menu of the BIOS will display the current speed of the cooling fan. Refer to chapter 3 of the manual for more information

.

Refer to the following pages for the pin functions of these connectors.

14

www.dﬁ .comChapter 3 Hardware Installation

COM Express Connectors

Row A Row B Row A Row B

A1 GND (FIXED) B1 GND (FIXED) A56 PCIE_TX4- B56 PCIE_RX4A2 GBE0_MDI3- B2 GBE0_ACT# A57 GND B57 GPO2 A3 GBE0_MDI3+ B3 LPC_FRAME# A58 PCIE_TX3+ B58 PCIE_RX3+ A4 GBE0_LINK100# B4 LPC_AD0 A59 PCIE_TX3- B59 PCIE_RX3A5 GBE0_LINK1000# B5 LPC_AD1 A60 GND (FIXED) B60 GND (FIXED) A6 GBE0_MDI2- B6 LPC_AD2 A61 PCIE_TX2+ B61 PCIE_RX2+ A7 GBE0_MDI2+ B7 LPC_AD3 A62 PCIE_TX2- B62 PCIE_RX2- A8 GBE0_LINK# B8 LPC_DRQ0# A63 GPI1 B63 GPO3 A9 GBE0_MDI1- B9 LPC_DRQ1# A64 PCIE_TX1+ B64 PCIE_RX1+ A10 GBE0_MDI1+ B10 LPC_CLK A65 PCIE_TX1- B65 PCIE_RX1A11 GND (FIXED) B11 GND (FIXED) A66 GND B66 WAKE0# A12 GBE0_MDI0- B12 PWRBTN# A67 GPI2 B67 WAKE1# A13 GBE0_MDI0+ B13 SMB_CK A68 PCIE_TX0+ B68 PCIE_RX0+ A14 GBE0_CTREF B14 SMB_DAT A69 PCIE_TX0- B69 PCIE_RX0- A15 SUS_S3# B15 SMB_ALERT# A70 GND(FIXED) B70 GND (FIXED) A16 SATA0_TX+ B16 SATA1_TX+ A71 LVDS_A0+ B71 LVDS_B0+ A17 SATA0_TX- B17 SATA1_TX- A72 LVDS_A0- B72 LVDS_B0- A18 SUS_S4# B18 SUS_STAT# A73 LVDS_A1+ B73 LVDS_B1+ A19 SATA0_RX+ B19 SATA1_RX+ A74 LVDS_A1- B74 LVDS_B1- A20 SATA0_RX- B20 SATA1_RX- A75 LVDS_A2+ B75 LVDS_B2+ A21 GND (FIXED) B21 GND (FIXED) A76 LVDS_A2- B76 LVDS_B2- A22 SATA2_TX+ B22 SATA3_TX+ A77 LVDS_VDD_EN B77 LVDS_B3+ A23 SATA2_TX- B23 SATA3_TX- A78 LVDS_A3+ B78 LVDS_B3- A24 SUS_S5# B24 PWR_OK A79 LVDS_A3- B79 LVDS_BKLT_EN A25 SATA2_RX+ B25 SATA3_RX+ A80 GND (FIXED) B80 GND (FIXED) A26 SATA2_RX- B26 SATA3_RX- A81 LVDS_A_CK+ B81 LVDS_B_CK+ A27 BATLOW# B27 WDT A82 LVDS_A_CK- B82 LVDS_B_CKA28 (S)ATA_ACT# B28 AC/HDA _SDIN2 A83 LVDS_I2C_CK B83 A29 AC/HDA_SYNC B29 AC/HDA _SDIN1 A84 LVDS_I2C_DAT B84 VCC_5V_SBY A30 AC/HDA _RST# B30 AC/HDA _SDIN0 A85 GPI3 B85 VCC_5V_SBY A31 GND (FIXED) B31 GND (FIXED) A86 RSVD B86 VCC_5V_SBY A32 AC/HDA _BITCLK B32 SPKR A87 RSVD B87 VCC_5V_SBY A33 AC/HDA _SDOUT B33 I2C_CK A88 PCIE0_CK_REF+ B88 BIOS_DIS1# A34 BIOS_DIS0# B34 I2C_DAT A89 PCIE0_CK_REF- B89 VGA_RED A35 THRMTRIP# B35 THRM# A90 GND (FIXED) B90 GND (FIXED) A36 USB6- B36 USB7- A91 SPI_POWER B91 VGA_GRN A37 USB6+ B37 USB7+ A92 SPI_MISO B92 VGA_BLU A38 USB_6_7_OC# B38 USB_4_5_OC# A93 GPO0 B93 VGA_HSYNC A39 USB4- B39 USB5- A94 SPI_CLK B94 VGA_VSYNC A40 USB4+ B40 USB5+ A95 SPI_MOSI B95 VGA_I2C_CK A41 GND (FIXED) B41 GND (FIXED) A96 TPM_PP B96 VGA_I2C_DAT A42 USB2- B42 USB3- A97 TYPE10# B97 SPI_CS# A43 USB2+ B43 USB3+ A98 SER0_TX B98 RSVD A44 USB_2_3_OC# B44 USB_0_1_OC# A99 SER0_RX B99 RSVD A45 USB0- B45 USB1- A100 GND (FIXED) B100 GND (FIXED) A46 USB0+ B46 USB1+ A101 SER1_TX B101 FAN_PWMOUT A47 VCC_RTC B47 EXCD1_PERST# A102 SER1_RX B102 FAN_TACHIN A48 EXCD0_PERST# B48 EXCD1_CPPE# A103 LID# B103 SLEEP# A49 EXCD0_CPPE# B49 SYS_RESET# A104 VCC_12V B104 VCC_12V A50 LPC_SERIRQ B50 CB_RESET# A105 VCC_12V B105 VCC_12V A51 GND (FIXED) B51 GND (FIXED) A106 VCC_12V B106 VCC_12V A52 PCIE_TX5+ B52 PCIE_RX5+ A107 VCC_12V B107 VCC_12V A53 PCIE_TX5- B53 PCIE_RX5- A108 VCC_12V B108 VCC_12V A54 GPI0 B54 GPO1 A109 VCC_12V B109 VCC_12V A55 PCIE_TX4+ B55 PCIE_RX4+ A110 GND (FIXED) B110 GND (FIXED)

Chapter 3

Row C Row DRow C Row D

C1 GND (FIXED) D1 GND (FIXED) C56 PEG_RX1- D56 PEG_TX1C2 GND D2 GND C57 TYPE1# D57 TYPE2# C3 NA D3 NA C58 PEG_RX2+ D58 PEG_TX2+ C4 NA D4 NA C59 PEG_RX2- D59 PEG_TX2C5 GND D5 GND C60 GND (FIXED) D60 GND (FIXED) C6 NA D6 NA C61 PEG_RX3+ D61 PEG_TX3+ C7 NA D7 NA C62 PEG_RX3- D62 PEG_TX3C8 GND D8 GND C63 RSVD D63 RSVD C9 NA D9 NA C64 RSVD D64 RSVD C10 NA D10 NA C65 PEG_RX4+ D65 PEG_TX4+ C11 GND (FIXED) D11 GND (FIXED) C66 PEG_RX4- D66 PEG_TX4C12 NA D12 NA C67 NC D67 GND C13 NA D13 NA C68 PEG_RX5+ D68 PEG_TX5+ C14 GND D14 GND C69 PEG_RX5- D69 PEG_TX5C15 DDI1_PAIR6+ D15 DDI1_CTRLCLK_AUX+ C70 GND (FIXED) D70 GND (FIXED) C16 DDI1_PAIR6- D16 DDI1_CTRLDATA_AUX- C71 PEG_RX6+ D71 PEG_TX6+ C17 RSVD D17 RSVD C72 PEG_RX6- D72 PEG_TX6C18 RSVD D18 RSVD C73 GND D73 GND C19 PCIE_RX6+ D19 PCIE_TX6+ C74 PEG_RX7+ D74 PEG_TX7+ C20 PCIE_RX6- D20 PCIE_TX6- C75 PEG_RX7- D75 PEG_TX7C21 GND (FIXED) D21 GND (FIXED) C76 GND D76 GND C22 PCIE_RX7+ D22 PCIE_TX7+ C77 RSVD D77 IDE_CBLID# C23 PCIE_RX7- D23 PCIE_TX7- C78 PEG_RX8+ D78 PEG_TX8+ C24 DDI1_HPD D24 RSVD C79 PEG_RX8- D79 PEG_TX8C25 DDI1_PAIR4+ D25 RSVD C80 GND (FIXED) D80 GND (FIXED) C26 DDI1_PAIR4- D26 DDI1_PAIR0+ C81 PEG_RX9+ D81 PEG_TX9+ C27 RSVD D27 DDI1_PAIR0- C82 PEG_RX9- D82 PEG_TX9C28 RSVD D28 RSVD C83 TPM_PP D83 RSVD C29 DDI1_PAIR5+ D29 DDI1_PAIR1+ C84 GND D84 GND C30 DDI1_PAIR5- D30 DDI1_PAIR1- C85 PEG_RX10+ D85 PEG_TX10+ C31 GND (FIXED) D31 GND (FIXED) C86 PEG_RX10- D86 PEG_TX10C32 DDI2_CTRLCLK_AUX+ D32 DDI1_PAIR2+ C87 GND D87 GND C33 DDI2_CTRLDATA_AUX- D33 DDI1_PAIR2- C88 PEG_RX11+ D88 PEG_TX11+ C34 DDI2_DDC_AUX_SEL D34 DDI1_DDC_AUX_SEL C89 PEG_RX11- D89 PEG_TX11C35 RSVD D35 RSVD C90 GND (FIXED) D90 GND (FIXED) C36 DDI3_CTRLCLK_AUX+ D36 DDI1_PAIR3+ C91 PEG_RX12+ D91 PEG_TX12+ C37 DDI3_CTRLDATA_AUX- D37 DDI1_PAIR3- C92 PEG_RX12- D92 PEG_TX12C38 DDI3_DDC_AUX_SEL D38 RSVD C93 GND D93 GND C39 DDI3_PAIR0+ D39 DDI2_PAIR0+ C94 PEG_RX13+ D94 PEG_TX13+ C40 DDI3_PAIR0- D40 DDI2_PAIR0- C95 PEG_RX13- D95 PEG_TX13C41 GND (FIXED) D41 GND (FIXED) C96 GND D96 GND C42 DDI3_PAIR1+ D42 DDI2_PAIR1+ C97 RSVD D97 RSVD C43 DDI3_PAIR1- D43 DDI2_PAIR1- C98 PEG_RX14+ D98 PEG_TX14+ C44 DDI3_HPD D44 DDI2_HPD C99 PEG_RX14- D99 PEG_TX14C45 RSVD D45 RSVD C100 GND (FIXED) D100 GND (FIXED) C46 DDI3_PAIR2+ D46 DDI2_PAIR2+ C101 PEG_RX15+ D101 PEG_TX15+ C47 DDI3_PAIR2- D47 DDI2_PAIR2- C102 PEG_RX15- D102 PEG_TX15C48 RSVD D48 RSVD C103 GND D103 GND C49 DDI3_PAIR3+ D49 DDI2_PAIR3+ C104 VCC_12V D104 VCC_12V C50 DDI3_PAIR3- D50 DDI2_PAIR3- C105 VCC_12V D105 VCC_12V C51 GND (FIXED) D51 GND (FIXED) C106 VCC_12V D106 VCC_12V C52 PEG_RX0+/ D52 PEG_TX0+ C107 VCC_12V D107 VCC_12V C53 PEG_RX0- D53 PEG_TX0- C108 VCC_12V D108 VCC_12V C54 TYPE0# D54 PEG_LANE_RV# C109 VCC_12V D109 VCC_12V C55 PEG_RX1+ D55 PEG_TX1+ C110 GND (FIXED) D110 GND (FIXED)

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COM Express Connectors Signal Description

Pin Types I Input to the Module O Output from the Module I/O Bi-directional input / output signal OD Open drain output

C97/HDA Signals Descriptions

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description AC/HAD_RST# A30 O CMOS 3.3V Suspend/3.3V Connect to CODEC pin 11 RESET# Reset output to CODEC, active low. AC/HDA_SYNC A29 O CMOS 3.3V/3.3V PU 1K to 3.3VSB Connect to CODEC pin 10 SYNC Sample-synchronization signal to the CODEC(s). AC/HDA_BITCLK A32 I/O CMOS 3.3V/3.3V Connect to CODEC pin 6 BIT_CLK Serial data clock generated by the external CODEC(s). AC/HDA_SDOUT A33 O CMOS 3.3V/3.3V Connect to CODEC pin 5 SDATA_OUT Serial TDM data output to the CODEC. AC/HDA_SDIN2 B28 I/O CMOS 3.3V Suspend/3.3V Connect 33 Ω in series to CODEC2 pin 8 SDATA_IN AC/HDA_SDIN1 B29 I/O CMOS 3.3V Suspend/3.3V Connect 33 Ω in series to CODEC1 pin 8 SDATA_IN AC/HDA_SDIN0 B30 I/O CMOS 3.3V Suspend/3.3V Connect 33 Ω in series to CODEC0 pin 8 SDATA_IN

Gigabit Ethernet Signals Descriptions

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description GBE0_MDI0+ A13 I/O Analog 3.3V max Suspend GBE0_MDI0- A12 I/O Analog 3.3V max Suspend GBE0_MDI1+ A10 I/O Analog 3.3V max Suspend GBE0_MDI1- A9 I/O Analog 3.3V max Suspend GBE0_MDI2+ A7 I/O Analog 3.3V max Suspend GBE0_MDI2- A6 I/O Analog 3.3V max Suspend GBE0_MDI3+ A3 I/O Analog 3.3V max Suspend

MDI3-

GBE0 GBE0_ACT# B2 OD CMOS 3.3V Suspend/3.3V Connect to LED and recommend current limit resistor 150Ω to 3.3VSB Gigabit Ethernet Controller 0 activity indicator, active low. GBE0_LINK# A8 OD CMOS 3.3V Suspend/3.3V NC Gigabit Ethernet Controller 0 link indicator, active low. GBE0_LINK100# A4 OD CMOS 3.3V Suspend/3.3V Connect to LED and recommend current limit resistor 150Ω to 3.3VSB Gigabit Ethernet Controller 0 1000 Mbit / sec link indicator, active low. GBE0_LINK1000# A5 OD CMOS 3.3V Suspend/3.3V Connect to LED and recommend current limit resistor 150Ω to 3.3VSB Gigabit Ethernet Controller 0 1000 Mbit / sec link indicator, active low.

SATA Signals Descriptions

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description SATA0_TX+ A16 O SATA AC coupled on Module AC Coupling capacitor SATA0_TX- A17 O SATA AC coupled on Module AC Coupling capacitor SATA0_RX+ A19 I SATA AC coupled on Module AC Coupling capacitor SATA0_RX- A20 I SATA AC coupled on Module AC Coupling capacitor SATA1_TX+ B16 O SATA AC coupled on Module AC Coupling capacitor SATA1_TX- B17 O SATA AC coupled on Module AC Coupling capacitor SATA1_RX+ B19 I SATA AC coupled on Module AC Coupling capacitor SATA1_RX- B20 I SATA AC coupled on Module AC Coupling capacitor SATA2_TX+ A22 O SATA AC coupled on Module AC Coupling capacitor SATA2_TX- A23 O SATA AC coupled on Module AC Coupling capacitor SATA2_RX+ A25 I SATA AC coupled on Module AC Coupling capacitor SATA2_RX- A26 I SATA AC coupled on Module AC Coupling capacitor SATA3_TX+ B22 O SATA AC coupled on Module AC Coupling capacitor SATA3_TX- B23 O SATA AC coupled on Module AC Coupling capacitor SATA3_RX+ B25 I SATA AC coupled on Module AC Coupling capacitor SATA3_RX- B26 I SATA AC coupled on Module AC Coupling capacitor ATA_ACT# A28 I/O CMOS 3.3V / 3.3V PU 10K to 3.3V Connect to LED and recommend current limit resistor 220Ω to 3.3V ATA (parallel and serial) or SAS activity indicator, active low.

2I

O Analog3.3V max Suspend

Connect to Magnetics Module MDI0+/-

Connect to Magnetics Module MDI1+/-

Connect to Magnetics Module MDI2+/-

Connect to Magnetics Module MDI3+/-

Connect to SATA0 Conn TX pin

Connect to SATA0 Conn RX pin Serial ATA or SAS Channel 0 receive differential pair.

Connect to SATA1 Conn TX pin

Connect to SATA1 Conn RX pin Serial ATA or SAS Channel 1 receive differential pair.

Connect to SATA2 Conn TX pin

Connect to SATA2 Conn RX pin Serial ATA or SAS Channel 2 receive differential pair.

Connect to SATA3 Conn TX pin Serial ATA or SAS Channel 3 transmit differential pair.

Connect to SATA2 Conn RX pin Serial ATA or SAS Channel 3 receive differential pair.

Serial TDM data inputs from up to 3 CODECs.

Gigabit Ethernet Controller 0: Media Dependent Interface Differential Pairs 0,1,2,3. The MDI can operate in 1000, 100 and 10 Mbit / sec modes. Some pairs are unused in some modes, per the following: 1000BASE-T 100BASE-TX 10BASE-T MDI[0]+/- B1_DA+/- TX+/- TX+/ MDI[1]+/- B1_DB+/- RX+/- RX+/ MDI[2]+/- B1_DC+/ MDI

Serial ATA or SAS Channel 0 transmit differential pair.

Serial ATA or SAS Channel 1 transmit differential pair.

Serial ATA or SAS Channel 2 transmit differential pair.

+/- B1_DD+/-

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Chapter 3

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description AC/HAD_RST# A30 O CMOS 3.3V Suspend/3.3V Connect to CODEC pin 11 RESET# Reset output to CODEC, active low. AC/HDA_SYNC A29 O CMOS 3.3V/3.3V PU 1K to 3.3VSB Connect to CODEC pin 10 SYNC Sample-synchronization signal to the CODEC(s). AC/HDA_BITCLK A32 I/O CMOS 3.3V/3.3V Connect to CODEC pin 6 BIT_CLK Serial data clock generated by the external CODEC(s). AC/HDA_SDOUT A33 O CMOS 3.3V/3.3V Connect to CODEC pin 5 SDATA_OUT Serial TDM data output to the CODEC. AC/HDA_SDIN2 B28 I/O CMOS 3.3V Suspend/3.3V Connect 33 Ω in series to CODEC2 pin 8 SDATA_IN AC/HDA_SDIN1 B29 I/O CMOS 3.3V Suspend/3.3V Connect 33 Ω in series to CODEC1 pin 8 SDATA_IN AC/HDA_SDIN0 B30 I/O CMOS 3.3V Suspend/3.3V Connect 33 Ω in series to CODEC0 pin 8 SDATA_IN

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description GBE0_MDI0+ A13 I/O Analog 3.3V max Suspend GBE0_MDI0- A12 I/O Analog 3.3V max Suspend GBE0_MDI1+ A10 I/O Analog 3.3V max Suspend GBE0_MDI1- A9 I/O Analog 3.3V max Suspend GBE0_MDI2+ A7 I/O Analog 3.3V max Suspend GBE0_MDI2- A6 I/O Analog 3.3V max Suspend GBE0_MDI3+ A3 I/O Analog 3.3V max Suspend GBE0

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O Analog3.3V max Suspend GBE0_ACT# B2 OD CMOS 3.3V Suspend/3.3V Connect to LED and recommend current limit resistor 150Ω to 3.3VSB Gigabit Ethernet Controller 0 activity indicator, active low. GBE0_LINK# A8 OD CMOS 3.3V Suspend/3.3V NC Gigabit Ethernet Controller 0 link indicator, active low. GBE0_LINK100# A4 OD CMOS 3.3V Suspend/3.3V Connect to LED and recommend current limit resistor 150Ω to 3.3VSB Gigabit Ethernet Controller 0 1000 Mbit / sec link indicator, active low. GBE0_LINK1000# A5 OD CMOS 3.3V Suspend/3.3V Connect to LED and recommend current limit resistor 150Ω to 3.3VSB Gigabit Ethernet Controller 0 1000 Mbit / sec link indicator, active low.

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description SATA0_TX+ A16 O SATA AC coupled on Module AC Coupling capacitor SATA0_TX- A17 O SATA AC coupled on Module AC Coupling capacitor SATA0_RX+ A19 I SATA AC coupled on Module AC Coupling capacitor SATA0_RX- A20 I SATA AC coupled on Module AC Coupling capacitor SATA1_TX+ B16 O SATA AC coupled on Module AC Coupling capacitor SATA1_TX- B17 O SATA AC coupled on Module AC Coupling capacitor SATA1_RX+ B19 I SATA AC coupled on Module AC Coupling capacitor SATA1_RX- B20 I SATA AC coupled on Module AC Coupling capacitor SATA2_TX+ A22 O SATA AC coupled on Module AC Coupling capacitor SATA2_TX- A23 O SATA AC coupled on Module AC Coupling capacitor SATA2_RX+ A25 I SATA AC coupled on Module AC Coupling capacitor SATA2_RX- A26 I SATA AC coupled on Module AC Coupling capacitor SATA3_TX+ B22 O SATA AC coupled on Module AC Coupling capacitor SATA3_TX- B23 O SATA AC coupled on Module AC Coupling capacitor SATA3_RX+ B25 I SATA AC coupled on Module AC Coupling capacitor SATA3_RX- B26 I SATA AC coupled on Module AC Coupling capacitor ATA_ACT# A28 I/O CMOS 3.3V / 3.3V PU 10K to 3.3V Connect to LED and recommend current limit resistor 220Ω to 3.3V ATA (parallel and serial) or SAS activity indicator, active low.

Connect to Magnetics Module MDI0+/-

Connect to Magnetics Module MDI1+/-

Connect to Magnetics Module MDI2+/-

Connect to Magnetics Module MDI3+/-

Pin Types I Input to the Module O Output from the Module I/O Bi-directional input / output signal OD Open drain output

A

C97/HDA Signals Descriptions

Serial TDM data inputs from up to 3 CODECs.

Gigabit Ethernet Signals Descriptions

p

Serial ATA or SAS Channel 0 transmit differential pair.

Connect to SATA0 Conn RX pin Serial ATA or SAS Channel 0 receive differential pair.

Connect to SATA1 Conn TX pin

Connect to SATA2 Conn TX pin

Connect to SATA3 Conn TX pin Serial ATA or SAS Channel 3 transmit differential pair.

Connect to SATA2 Conn RX pin Serial ATA or SAS Channel 3 receive differential pair.

Connect to SATA2 Conn RX pin Serial ATA or SAS Channel 2 receive differential pair.

Serial ATA or SAS Channel 2 transmit differential pair.

Gigabit Ethernet Controller 0: Media Dependent Interface Differential Pairs 0,1,2,3. The MDI can operate in 1000, 100 and 10 Mbit / sec modes. Some pairs are unused in some modes, per the following: 1000BASE-T 100BASE-TX 10BASE-T MDI[0]+/- B1_DA+/- TX+/- TX+/- MDI[1]+/- B1_DB+/- RX+/- RX+/- MDI[2]+/- B1_DC+/- MDI

[3]

+/- B1_DD+/-

Connect to SATA1 Conn RX pin Serial ATA or SAS Channel 1 receive differential pair.

SATA Signals Descriptions

Connect to SATA0 Conn TX pin

Serial ATA or SAS Channel 1 transmit differential pair.

ress Lanes Signals Descriptions

PCI Ex

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description PCIE_TX0+ A68 AC Coupling capacitor PCIE_TX0- A69 AC Coupling capacitor PCIE_RX0+ B68 PCIE_RX0- B69 PCIE_TX1+ A64 AC Coupling capacitor PCIE_TX1- A65 AC Coupling capacitor PCIE_RX1+ B64 PCIE_RX1- B65 PCIE_TX2+ A61 AC Coupling capacitor PCIE_TX2- A62 AC Coupling capacitor PCIE_RX2+ B61 PCIE_RX2- B62 PCIE_TX3+ A58 AC Coupling capacitor PCIE_TX3- A59 AC Coupling capacitor PCIE_RX3+ B58 PCIE_RX3- B59 PCIE_TX4+ A55 AC Coupling capacitor PCIE_TX4- A56 AC Coupling capacitor PCIE_RX4+ B55 PCIE_RX4- B56 PCIE_TX5+ A52 AC Coupling capacitor PCIE_TX5- A53 AC Coupling capacitor PCIE_RX5+ B52 PCIE_RX5- B53 PCIE_TX6+ D19 AC Coupling capacitor PCIE_TX6- D20 AC Coupling capacitor PCIE_RX6+ C19 PCIE_RX6- C20 PCIE_TX7+ D22 NA PCIE_TX7- D23 NA PCIE_RX7+ C22 NA PCIE_RX7- C23 NA PCIE0_CK_REF+ A88 PCIE0_CK_REF- A89

O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 0

I PCIE AC coupled off Module PCI Express Differential Receive Pairs 0

O PCIE

I PCIE AC coupled off Module

O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 2

I PCIE AC coupled off Module

O PCIE AC coupled on Module

I PCIE AC coupled off Module

O PCIE AC coupled on Module

I PCIE AC coupled off Module PCI Express Differential Receive Pairs 4

O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 5

I PCIE AC coupled off Module PCI Express Differential Receive Pairs 5

O PCIE AC coupled on Module

I PCIE AC coupled off Module

O PCIE AC coupled on Module

I PCIE AC coupled off Module

O PCIE PCIE Connect to PCIE device, PCIe CLK Buffer or slot

AC coupled on Module PCI Express Differential Transmit Pairs 1

Connect to PCIE device or slot

Device - Connect AC Coupling cap 0.1uF Slot - Connect to PCIE Conn pin

Connect to PCIE device or slot

Device - Connect AC Coupling cap 0.1uF Slot - Connect to PCIE Conn pin

Connect to PCIE device or slot

Device - Connect AC Coupling cap 0.1uF Slot - Connect to PCIE Conn pin

Connect to PCIE device or slot

Device - Connect AC Coupling cap 0.1uF Slot - Connect to PCIE Conn pin

Connect to PCIE device or slot

Device - Connect AC Coupling cap 0.1uF Slot - Connect to PCIE Conn pin

Connect to PCIE device or slot

Device - Connect AC Coupling cap 0.1uF Slot - Connect to PCIE Conn pin

Connect to PCIE device or slot

Device - Connect AC Coupling cap 0.1uF Slot - Connect to PCIE Conn pin

NA

PCI Express Differential Receive Pairs 1

PCI Express Differential Receive Pairs 2

PCI Express Differential Transmit Pairs 3

PCI Express Differential Receive Pairs 3

PCI Express Differential Transmit Pairs 4

PCI Express Differential Transmit Pairs 6

PCI Express Differential Receive Pairs 6

PCI Express Differential Transmit Pairs 7 (Optional with on board LAN, Default setting as NC) PCI Express Differential Receive Pairs 7 (Optional with on board LAN, Default setting as NC) Reference clock output for all PCI Express and PCI Express Graphics lanes.

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PCIE_RX1+ B64 PCIE_RX1- B65 PCIE_TX2+ A61 AC Coupling capacitor PCIE_TX2- A62 AC Coupling capacitor PCIE_RX2+ B61 PCIE_RX2- B62 PCIE_TX3+ A58 AC Coupling capacitor PCIE_TX3- A59 AC Coupling capacitor PCIE_RX3+ B58 PCIE_RX3- B59 PCIE_TX4+ A55 AC Coupling capacitor PCIE_TX4- A56 AC Coupling capacitor PCIE_RX4+ B55 PCIE_RX4- B56 PCIE_TX5+ A52 AC Coupling capacitor PCIE_TX5- A53 AC Coupling capacitor PCIE_RX5+ B52 PCIE_RX5- B53 PCIE_TX6+ D19 AC Coupling capacitor PCIE_TX6- D20 AC Coupling capacitor PCIE_RX6+ C19 PCIE_RX6- C20 PCIE_TX7+ D22 NA PCIE_TX7- D23 NA PCIE_RX7+ C22 NA PCIE_RX7- C23 NA PCIE0_CK_REF+ A88 PCIE0_CK_REF- A89

Connect to PCIE device or slot

Device - Connect AC Coupling cap 0.1uF Slot - Connect to PCIE Conn pin

Connect to PCIE device or slot

Device - Connect AC Coupling cap 0.1uF Slot - Connect to PCIE Conn pin

NA

Device - Connect AC Coupling cap 0.1uF Slot - Connect to PCIE Conn pin

Connect to PCIE device or slot

I PCIE AC coupled off Module

O PCIE AC coupled on Module

PCI Express Differential Receive Pairs 7 (Optional with on board LAN, Default setting as NC)

O PCIE PCIE Connect to PCIE device, PCIe CLK Buffer or slot

Reference clock output for all PCI Express and PCI Express Graphics lanes.

PCI Express Differential Receive Pairs 6

O PCIE AC coupled on Module

PCI Express Differential Transmit Pairs 7 (Optional with on board LAN, Default setting as NC)

PCI Express Differential Transmit Pairs 4

PCI Express Differential Receive Pairs 2

PCI Express Differential Transmit Pairs 6

PCI Express Differential Transmit Pairs 3

I PCIE AC coupled off Module PCI Express Differential Receive Pairs 5

I PCIE AC coupled off Module

O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 5

I PCIE AC coupled off Module PCI Express Differential Receive Pairs 4

O PCIE AC coupled on Module

Device - Connect AC Coupling cap 0.1uF Slot - Connect to PCIE Conn pin

Connect to PCIE device or slot

Device - Connect AC Coupling cap 0.1uF Slot - Connect to PCIE Conn pin

Connect to PCIE device or slot

Device - Connect AC Coupling cap 0.1uF Slot - Connect to PCIE Conn pin

PCI Express Differential Receive Pairs 1

PCI Express Differential Receive Pairs 3

O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 2

I PCIE AC coupled off Module

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PEG Signals Descriptions

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description PEG_TX0+ D52 AC Coupling capacitor PEG_TX0- D53 AC Coupling capacitor PEG_RX0+ C52 PEG_RX0- C53 PEG_TX1+ D55 AC Coupling capacitor PEG_TX1- D56 AC Coupling capacitor PEG_RX1+ C55 PEG_RX1- C56 PEG_TX2+ D58 AC Coupling capacitor PEG_TX2- D59 AC Coupling capacitor PEG_RX2+ C58 PEG_RX2- C59 PEG_TX3+ D61 AC Coupling capacitor PEG_TX3- D62 AC Coupling capacitor PEG_RX3+ C61 PEG_RX3- C62 PEG_TX4+ D65 AC Coupling capacitor PEG_TX4- D66 AC Coupling capacitor PEG_RX4+ C65 PEG_RX4- C66 PEG_TX5+ D68 AC Coupling capacitor PEG_TX5- D69 AC Coupling capacitor PEG_RX5+ C68 PEG_RX5- C69 PEG_TX6+ D71 AC Coupling capacitor PEG_TX6- D72 AC Coupling capacitor PEG_RX6+ C71 PEG_RX6- C72 PEG_TX7+ D74 AC Coupling capacitor PEG_TX7- D75 AC Coupling capacitor PEG_RX7+ C74 PEG_RX7- C75 PEG_TX8+ D78 AC Coupling capacitor PEG_TX8- D79 AC Coupling capacitor PEG_RX8+ C78 PEG_RX8- C79 PEG_TX9+ D81 AC Coupling capacitor PEG_TX9- D82 AC Coupling capacitor PEG_RX9+ C81 PEG_RX9- C82 PEG_TX10+ D85 AC Coupling capacitor PEG_TX10- D86 AC Coupling capacitor PEG_RX10+ C85 PEG_RX10- C86 PEG_TX11+ D88 AC Coupling capacitor PEG_TX11- D89 AC Coupling capacitor PEG_RX11+ C88 PEG_RX11- C89 PEG_TX12+ D91 AC Coupling capacitor PEG_TX12- D92 AC Coupling capacitor PEG_RX12+ C91 PEG_RX12- C92 PEG_TX13+ D94 AC Coupling capacitor PEG_TX13- D95 AC Coupling capacitor PEG_RX13+ C94 PEG_RX13- C95 PEG_TX14+ D98 AC Coupling capacitor PEG_TX14- D99 AC Coupling capacitor PEG_RX14+ C98 PEG_RX14- C99 PEG_TX15+ D101 AC Coupling capacitor PEG_TX15- D102 AC Coupling capacitor PEG_RX15+ C101 PEG_RX15- C102

PEG_LANE_RV# D54 I CMOS 3.3V / 3.3V

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 0

I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 0

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 1

I PCIE

O PCIE AC coupled on Module

I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 2

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 3

I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 3

O PCIE AC coupled on Module

I PCIE AC coupled off Module

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 5

I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 5

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 6

I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 6

O PCIE

I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 7

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 8

I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 8

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 9

I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 9

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 10

I PCIE AC coupled off Module

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 11

I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 11

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 12

I PCIE AC coupled off Module

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 13

I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 13

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 14

I PCIE AC coupled off Module

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 15

I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 15

AC coupled off Module PCI Express Graphics receive differential pairs 1

AC coupled on Module PCI Express Graphics transmit differential pairs 7

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Chapter 3

PCI Express Graphics transmit differential pairs 2

PCI Express Graphics transmit differential pairs 4

PCI Express Graphics receive differential pairs 4

PCI Express Graphics receive differential pairs 10Connect AC Coupling cap 0.22uF

PCI Express Graphics receive differential pairs 12

PCI Express Graphics receive differential pairs 14

PCI Express Graphics lane reversal input strap. Pull low on the Carrier board to reverse lane order.

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ExpressCard Signals Descriptions

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description EXCD0_CPPE# A49 PU 10k to 3.3V EXCD1_CPPE# B48 PU 10k to 3.3V EXCD0_PERST# A48 EXCD1_PERST# B47

DDI Signals Descriptions

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description DDI1_PAIR0+/SDVO1_RED+ D26 Connect AC Coupling Capacitors 0.1uF to Device

PAIR0-/SDVO1_RED- D27 Connect AC Coupling Capacitors 0.1uF to Devic

DDI1 DDI1_PAIR1+/SDVO1_GRN+ D29 Connect AC Coupling Capacitors 0.1uF to Device DDI1_PAIR1-/SDVO1_GRN- D30 Connect AC Coupling Capacitors 0.1uF to Device DDI1_PAIR2+/SDVO1_BLU+ D32 Connect AC Coupling Capacitors 0.1uF to Device DDI1_PAIR2-/SDVO1_BLU- D33 Connect AC Coupling Capacitors 0.1uF to Device DDI1_PAIR3+/SDVO1_CK+ D36 Connect AC Coupling Capacitors 0.1uF to Device DDI1_PAIR3-/SDVO1_CK- D37 Connect AC Coupling Capacitors 0.1uF to Device

DDI1_PAIR4+/SDVO1_INT+ C25 Connect AC Coupling Capacitors 0.1uF to Device DDI1_PAIR4-/SDVO1_INT- C26 Connect AC Coupling Capacitors 0.1uF to Device

DDI1_PAIR5+/SDVO1_TVCLKIN+ C29 Connect AC Coupling Capacitors 0.1uF to Device DDI1_PAIR5-/SDVO1_TVCLKIN- C30 Connect AC Coupling Capacitors 0.1uF to Device DDI1_PAIR6+/SDVO1_FLDSTALL+ C15 Connect AC Coupling Capacitors 0.1uF to Device DDI1_PAIR6-/SDVO1_FLDSTALL- C16 Connect AC Coupling Capacitors 0.1uF to Device

DDI1_CTRLCLK_AUX+/SDVO1_CTRLCLK D15

DDI1_CTRLCLK_AUX/SDVO1_CTRLDATA

DDI1_HPD C24 I CMOS 3.3V / 3.3V PD 1M and Connect to device Hot Plug Detect DDI Hot-Plug Detect

DDI1_DDC_AUX_SEL D34 I CMOS 3.3V / 3.3V PD 1M

DDI2_PAIR0+ D39 Connect AC Coupling Capacitors 0.1uF to Device DDI2_PAIR0- D40 Connect AC Coupling Capacitors 0.1uF to Device DDI2_PAIR1+ D42 Connect AC Coupling Capacitors 0.1uF to Device DDI2_PAIR1- D43 Connect AC Coupling Capacitors 0.1uF to Device DDI2_PAIR2+ D46 Connect AC Coupling Capacitors 0.1uF to Device DDI2_PAIR2- D47 Connect AC Coupling Capacitors 0.1uF to Device DDI2_PAIR3+ D49 Connect AC Coupling Capacitors 0.1uF to Device DDI2_PAIR3- D50 Connect AC Coupling Capacitors 0.1uF to Device

DDI2_CTRLCLK_AUX+ C32

DDI2_CTRLCLK_AUX- C33

DDI3_HPD D44 I CMOS 3.3V / 3.3V PD 1M and Connect to device Hot Plug Detect DDI Hot-Plug Detect

DDI3_DDC_AUX_SEL C34 I CMOS 3.3V / 3.3V PD 1M to GND

DDI3_PAIR0+ C39 Connect AC Coupling Capacitors 0.1uF to Device DDI3_PAIR0- C40 Connect AC Coupling Capacitors 0.1uF to Device DDI3_PAIR1+ C42 Connect AC Coupling Capacitors 0.1uF to Device DDI3_PAIR1- C43 Connect AC Coupling Capacitors 0.1uF to Device DDI3_PAIR2+ C46 Connect AC Coupling Capacitors 0.1uF to Device DDI3_PAIR2- C47 Connect AC Coupling Capacitors 0.1uF to Device DDI3_PAIR3+ C49 Connect AC Coupling Capacitors 0.1uF to Device DDI3_PAIR3- C50 Connect AC Coupling Capacitors 0.1uF to Device

D16

I CMOS 3.3V /3.3V

O CMOS 3.3V /3.3V PCI ExpressCard: reset, active low, one per card

O PCIE AC coupled off Module DDI 1 Pair 0 differential pairs/Serial Digital Video B red output differential pair O PCIE AC coupled off Module DDI 1 Pair 1 differential pairs/Serial Digital Video B green output differential pair

O PCIE

O PCIE AC coupled off Module DDI 1 Pair 3 differential pairs/Serial Digital Video B clock output differential pair.

I PCIE

I PCIE AC coupled off Module Serial Digital Video TVOUT synchronization clock input differential pair.

I PCIE

I/O PCIE AC coupled on Module

I/O OD CMOS 3.3V / 3.3V

I/O PCIE AC coupled on Module

I/O OD CMOS 3.3V / 3.3V

O PCIE AC coupled off Module

O PCIE AC coupled off Module DDI 2 Pair 1 differential pairs

O PCIE AC coupled off Module DDI 2 Pair 2 differential pairs

O PCIE AC coupled off Module DDI 2 Pair 3 differential pairs

I/O PCIE AC coupled on Module

I/O OD CMOS 3.3V / 3.3V I/O PCIE AC coupled on Module

I/O OD CMOS 3.3V / 3.3V

O PCIE AC coupled off Module

O PCIE DDI 3 Pair 1 differential pairs

O PCIE AC coupled off Module

O PCIE AC coupled off Module DDI 3 Pair 3 differential pairs

AC coupled off Module DDI 1 Pair 2 differential pairs/Serial Digital Video B blue output differential pair

AC coupled off Module

AC coupled off Module Serial Digital Video Field Stall input differential pair.

AC coupled off Module

PD 49.9K to GND

W IC between

PU 2.2K to 3.3V, PD 49.9K to GND PU 100K to 3.3V

(S/W IC between

PU 2.2K to 3.3V/PU 100K to

3.3V

(S/W IC between

PD 49.9K to GND

(S/W IC between

PU 2.2K to 3.3V, PD 49.9K to GND PU 100K to 3.3V

W IC between

PU 2.2K to 3.3V/PU 100K to

3.3V

(S/W IC between

Connect to DP AUX+ DP AUX+ function if DDI1_DDC_AUX_SEL is no connect

Connect to HDMI/DVI I2C CTRLCLK HDMI/DVI I2C CTRLCLK if DDI1_DDC_AUX_SEL is pulled high

Connect to DP AUX- DP AUX- function if DDI1_DDC_AUX_SEL is no connect

Connect to HDMI/DVI I2C CTRLDATA HDMI/DVI I2C CTRLDATA if DDI1_DDC_AUX_SEL is pulled high

PU 100K to 3.3V for DDC(HDMI/DVI)

Connect to DP AUX+ DP AUX+ function if DDI2_DDC_AUX_SEL is no connect

Connect to HDMI/DVI I2C CTRLCLK HDMI/DVI I2C CTRLCLK if DDI2_DDC_AUX_SEL is pulled high Connect to DP AUX- DP AUX- function if DDI2_DDC_AUX_SEL is no connect

Connect to HDMI/DVI I2C CTRLDATA HDMI/DVI I2C CTRLDATA if DDI2_DDC_AUX_SEL is pulled high

PU 100K to 3.3V for DDC(HDMI/DVI)

PCI ExpressCard: PCI Express capable card request, active low, one per card

Serial Digital Video B interrupt input differential pair.

Selects the function of DDI1_CTRLCLK_AUX+ and DDI1_CTRLDATA_AUX-. DDI[n]_DDC_AUX_SEL shall be pulled to 3.3V on the Carrier with a 100K Ohm resistor to configure the DDI[n]_AUX pair as the DDC channel. Carrier DDI

DDI 2 Pair 0 differential pairs

Selects the function of DDI2_CTRLCLK_AUX+ and DDI2_CTRLDATA_AUX-. DDI[n]_DDC_AUX_SEL shall be pulled to 3.3V on the Carrier with a 100K Ohm resistor to configure the DDI[n]_AUX pair as the DDC channel. Carrier DDI

DDI 3 Pair 0 differential pairs

DDI 3 Pair 2 differential pairs

DDC AUX SEL should be connected to pin 13 of the DisplayPor

DDC_AUX_SEL should be connected to pin 13 of the DisplayPor

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PCIE_TX4+ A55 AC Coupling capacitor PCIE_TX4- A56 AC Coupling capacitor PCIE_RX4+ B55 PCIE_RX4- B56 PCIE_TX5+ A52 AC Coupling capacitor PCIE_TX5- A53 AC Coupling capacitor PCIE_RX5+ B52 PCIE_RX5- B53 PCIE_TX6+ D19 AC Coupling capacitor PCIE_TX6- D20 AC Coupling capacitor PCIE_RX6+ C19 PCIE_RX6- C20 PCIE_TX7+ D22 NA PCIE_TX7- D23 NA PCIE_RX7+ C22 NA PCIE_RX7- C23 NA PCIE0_CK_REF+ A88 PCIE0_CK_REF- A89

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description PEG_TX0+ D52 AC Coupling capacitor PEG_TX0- D53 AC Coupling capacitor PEG_RX0+ C52 PEG_RX0- C53 PEG_TX1+ D55 AC Coupling capacitor PEG_TX1- D56 AC Coupling capacitor PEG_RX1+ C55 PEG_RX1- C56 PEG_TX2+ D58 AC Coupling capacitor PEG_TX2- D59 AC Coupling capacitor PEG_RX2+ C58 PEG_RX2- C59 PEG_TX3+ D61 AC Coupling capacitor PEG_TX3- D62 AC Coupling capacitor PEG_RX3+ C61 PEG_RX3- C62 PEG_TX4+ D65 AC Coupling capacitor PEG_TX4- D66 AC Coupling capacitor PEG_RX4+ C65 PEG_RX4- C66 PEG_TX5+ D68 AC Coupling capacitor PEG_TX5- D69 AC Coupling capacitor PEG_RX5+ C68 PEG_RX5- C69 PEG_TX6+ D71 AC Coupling capacitor PEG_TX6- D72 AC Coupling capacitor PEG_RX6+ C71 PEG_RX6- C72 PEG_TX7+ D74 AC Coupling capacitor PEG_TX7- D75 AC Coupling capacitor PEG_RX7+ C74 PEG_RX7- C75 PEG_TX8+ D78 AC Coupling capacitor PEG_TX8- D79 AC Coupling capacitor PEG_RX8+ C78 PEG_RX8- C79 PEG_TX9+ D81 AC Coupling capacitor PEG_TX9- D82 AC Coupling capacitor PEG_RX9+ C81 PEG_RX9- C82 PEG_TX10+ D85 AC Coupling capacitor PEG_TX10- D86 AC Coupling capacitor PEG_RX10+ C85 PEG_RX10- C86 PEG_TX11+ D88 AC Coupling capacitor PEG_TX11- D89 AC Coupling capacitor PEG_RX11+ C88 PEG_RX11- C89 PEG_TX12+ D91 AC Coupling capacitor PEG_TX12- D92 AC Coupling capacitor PEG_RX12+ C91 PEG_RX12- C92 PEG_TX13+ D94 AC Coupling capacitor PEG_TX13- D95 AC Coupling capacitor PEG_RX13+ C94 PEG_RX13- C95 PEG_TX14+ D98 AC Coupling capacitor PEG_TX14- D99 AC Coupling capacitor PEG_RX14+ C98 PEG_RX14- C99 PEG_TX15+ D101 AC Coupling capacitor PEG_TX15- D102 AC Coupling capacitor PEG_RX15+ C101 PEG_RX15- C102

PEG_LANE_RV# D54 I CMOS 3.3V / 3.3V

PCI Express Graphics lane reversal input strap. Pull low on the Carrier board to reverse lane order.

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description EXCD0_CPPE# A49 PU 10k to 3.3V EXCD1_CPPE# B48 PU 10k to 3.3V EXCD0_PERST# A48 EXCD1_PERST# B47

Connect to PCIE device or slot

Device - Connect AC Coupling cap 0.1uF Slot - Connect to PCIE Conn pin

Connect to PCIE device or slot

Device - Connect AC Coupling cap 0.1uF Slot - Connect to PCIE Conn pin

NA

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

O CMOS 3.3V /3.3V PCI ExpressCard: reset, active low, one per card

I PCIE AC coupled off Module

PCI Express Graphics receive differential pairs 14

PCI Express Graphics receive differential pairs 12

ExpressCard Signals Descriptions

I CMOS 3.3V /3.3V

PCI ExpressCard: PCI Express capable card request, active low, one per card

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 14

I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 15

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 13

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 15

I PCIE AC coupled off Module

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 13

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 12

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 11

I PCIE AC coupled off Module

I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 11

PCI Express Graphics receive differential pairs 10Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 8

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 10

I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 9

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 9

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 8

I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 5

O PCIE

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 6

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 5

I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 7

AC coupled on Module PCI Express Graphics transmit differential pairs 7

I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 6

PCI Express Graphics transmit differential pairs 4

I PCIE AC coupled off Module

I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 3

I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 2

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 3

PCI Express Graphics receive differential pairs 4

O PCIE AC coupled on Module

I PCIE

PCI Express Graphics transmit differential pairs 2

PEG Signals Descriptions

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 0

I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 0

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 1

AC coupled off Module PCI Express Graphics receive differential pairs 1

I PCIE AC coupled off Module

O PCIE AC coupled on Module

PCI Express Differential Receive Pairs 7 (Optional with on board LAN, Default setting as NC)

O PCIE PCIE Connect to PCIE device, PCIe CLK Buffer or slot

Reference clock output for all PCI Express and PCI Express Graphics lanes.

PCI Express Differential Receive Pairs 6

O PCIE AC coupled on Module

PCI Express Differential Transmit Pairs 7 (Optional with on board LAN, Default setting as NC)

PCI Express Differential Transmit Pairs 4

PCI Express Differential Transmit Pairs 6

I PCIE AC coupled off Module PCI Express Differential Receive Pairs 5

O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 5

I PCIE AC coupled off Module PCI Express Differential Receive Pairs 4

O PCIE AC coupled on Module

Connect to PCIE device or slot

Device - Connect AC Coupling cap 0.1uF Slot - Connect to PCIE Conn pin

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PEG_TX13+ D94 AC Coupling capacitor PEG_TX13- D95 AC Coupling capacitor PEG_RX13+ C94 PEG_RX13- C95 PEG_TX14+ D98 AC Coupling capacitor PEG_TX14- D99 AC Coupling capacitor PEG_RX14+ C98 PEG_RX14- C99 PEG_TX15+ D101 AC Coupling capacitor PEG_TX15- D102 AC Coupling capacitor PEG_RX15+ C101 PEG_RX15- C102

PEG_LANE_RV# D54 I CMOS 3.3V / 3.3V

PCI Express Graphics lane reversal input strap. Pull low on the Carrier board to reverse lane order.

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description EXCD0_CPPE# A49 PU 10k to 3.3V EXCD1_CPPE# B48 PU 10k to 3.3V EXCD0_PERST# A48 EXCD1_PERST# B47

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description DDI1_PAIR0+/SDVO1_RED+ D26 Connect AC Coupling Capacitors 0.1uF to Device DDI1

_

PAIR0-/SDVO1_RED- D27 Connect AC Coupling Capacitors 0.1uF to Devic

e

DDI1_PAIR1+/SDVO1_GRN+ D29 Connect AC Coupling Capacitors 0.1uF to Device DDI1_PAIR1-/SDVO1_GRN- D30 Connect AC Coupling Capacitors 0.1uF to Device DDI1_PAIR2+/SDVO1_BLU+ D32 Connect AC Coupling Capacitors 0.1uF to Device DDI1_PAIR2-/SDVO1_BLU- D33 Connect AC Coupling Capacitors 0.1uF to Device DDI1_PAIR3+/SDVO1_CK+ D36 Connect AC Coupling Capacitors 0.1uF to Device DDI1_PAIR3-/SDVO1_CK- D37 Connect AC Coupling Capacitors 0.1uF to Device

DDI1_PAIR4+/SDVO1_INT+ C25 Connect AC Coupling Capacitors 0.1uF to Device

DDI1_PAIR4-/SDVO1_INT- C26 Connect AC Coupling Capacitors 0.1uF to Device DDI1_PAIR5+/SDVO1_TVCLKIN+ C29 Connect AC Coupling Capacitors 0.1uF to Device DDI1_PAIR5-/SDVO1_TVCLKIN- C30 Connect AC Coupling Capacitors 0.1uF to Device DDI1_PAIR6+/SDVO1_FLDSTALL+ C15 Connect AC Coupling Capacitors 0.1uF to Device DDI1_PAIR6-/SDVO1_FLDSTALL- C16 Connect AC Coupling Capacitors 0.1uF to Device

I/O PCIE AC coupled on Module

PD 49.9K to GND

(S/

W IC between

Connect to DP AUX+ DP AUX+ function if DDI1_DDC_AUX_SEL is no connect

I/O OD CMOS 3.3V / 3.3V

PU 2.2K to 3.3V, PD 49.9K to GND

Connect to HDMI/DVI I2C CTRLCLK HDMI/DVI I2C CTRLCLK if DDI1_DDC_AUX_SEL is pulled high

I/O PCIE AC coupled on Module

PU 100K to 3.3V

(S/W IC between

Connect to DP AUX- DP AUX- function if DDI1_DDC_AUX_SEL is no connect

I/O OD CMOS 3.3V / 3.3V

PU 2.2K to 3.3V/PU 100K to

3.3V

(S/W IC between

Connect to HDMI/DVI I2C CTRLDATA HDMI/DVI I2C CTRLDATA if DDI1_DDC_AUX_SEL is pulled high

DDI1_HPD C24 I CMOS 3.3V / 3.3V PD 1M and Connect to device Hot Plug Detect DDI Hot-Plug Detect

DDI1_DDC_AUX_SEL D34 I CMOS 3.3V / 3.3V PD 1M

PU 100K to 3.3V for DDC(HDMI/DVI)

Selects the function of DDI1_CTRLCLK_AUX+ and DDI1_CTRLDATA_AUX-. DDI[n]_DDC_AUX_SEL shall be pulled to 3.3V on the Carrier with a 100K Ohm resistor to configure the DDI[n]_AUX pair as the DDC channel. Carrier DDI

[n]

DDC AUX SEL should be connected to pin 13 of the DisplayPor

t

DDI2_PAIR0+ D39 Connect AC Coupling Capacitors 0.1uF to Device DDI2_PAIR0- D40 Connect AC Coupling Capacitors 0.1uF to Device DDI2_PAIR1+ D42 Connect AC Coupling Capacitors 0.1uF to Device DDI2_PAIR1- D43 Connect AC Coupling Capacitors 0.1uF to Device DDI2_PAIR2+ D46 Connect AC Coupling Capacitors 0.1uF to Device DDI2_PAIR2- D47 Connect AC Coupling Capacitors 0.1uF to Device DDI2_PAIR3+ D49 Connect AC Coupling Capacitors 0.1uF to Device DDI2_PAIR3- D50 Connect AC Coupling Capacitors 0.1uF to Device

I/O PCIE AC coupled on Module

PD 49.9K to GND

(S/W IC between

Connect to DP AUX+ DP AUX+ function if DDI2_DDC_AUX_SEL is no connect

I/O OD CMOS 3.3V / 3.3V

PU 2.2K to 3.3V, PD 49.9K to GND

Connect to HDMI/DVI I2C CTRLCLK HDMI/DVI I2C CTRLCLK if DDI2_DDC_AUX_SEL is pulled high

I/O PCIE AC coupled on Module

PU 100K to 3.3V

(S/

W IC between

Connect to DP AUX- DP AUX- function if DDI2_DDC_AUX_SEL is no connect

I/O OD CMOS 3.3V / 3.3V

PU 2.2K to 3.3V/PU 100K to

3.3V

(S/W IC between

Connect to HDMI/DVI I2C CTRLDATA HDMI/DVI I2C CTRLDATA if DDI2_DDC_AUX_SEL is pulled high

DDI3_HPD D44 I CMOS 3.3V / 3.3V PD 1M and Connect to device Hot Plug Detect DDI Hot-Plug Detect

DDI3_DDC_AUX_SEL C34 I CMOS 3.3V / 3.3V PD 1M to GND

PU 100K to 3.3V for DDC(HDMI/DVI)

Selects the function of DDI2_CTRLCLK_AUX+ and DDI2_CTRLDATA_AUX-. DDI[n]_DDC_AUX_SEL shall be pulled to 3.3V on the Carrier with a 100K Ohm resistor to configure the DDI[n]_AUX pair as the DDC channel. Carrier DDI[n]_DDC_AUX_SEL should be connected to pin 13 of the DisplayPor

t

DDI3_PAIR0+ C39 Connect AC Coupling Capacitors 0.1uF to Device DDI3_PAIR0- C40 Connect AC Coupling Capacitors 0.1uF to Device DDI3_PAIR1+ C42 Connect AC Coupling Capacitors 0.1uF to Device DDI3_PAIR1- C43 Connect AC Coupling Capacitors 0.1uF to Device DDI3_PAIR2+ C4 Connect AC Coupling Capacitors 0.1uF to Device DDI3_PAIR2- C47 Connect AC Coupling Capacitors 0.1uF to Device DDI3_PAIR3+ C49 Connect AC Coupling Capacitors 0.1uF to Device DDI3_PAIR3- C50 Connect AC Coupling Capacitors 0.1uF to Device

PD 49.9K to GND

[n]

t

AC coupled off Module Serial Digital Video Field Stall input differential pair.

O PCIE

O PCIE AC coupled off Module DDI 1 Pair 3 differential pairs/Serial Digital Video B clock output differential pair.

I PCIE

I PCIE AC coupled off Module Serial Digital Video TVOUT synchronization clock input differential pair.

AC coupled off Module

O PCIE AC coupled off Module

DDI 3 Pair 0 differential pairs

O PCIE AC coupled off Module DDI 2 Pair 3 differential pairs

DDI 3 Pair 2 differential pairs

O PCIE DDI 3 Pair 1 differential pairs

O PCIE AC coupled off Module

DDI 2 Pair 0 differential pairs

O PCIE AC coupled off Module DDI 3 Pair 3 differential pairs

AC coupled off Module

DDI Signals Descriptions

O PCIE AC coupled off Module DDI 1 Pair 0 differential pairs/Serial Digital Video B red output differential pair

I PCIE

O PCIE AC coupled off Module DDI 2 Pair 2 differential pairs

O PCIE AC coupled off Module DDI 2 Pair 1 differential pairs

O PCIE AC coupled off Module

DDI2_CTRLCLK_AUX+ C32

DDI2_CTRLCLK_AUX- C33

DDI1_CTRLCLK_AUX+/SDVO1_CTRLCLK D15

DDI1_CTRLCLK_AUX- /SDVO1_CTRLDATA

D16

AC coupled off Module DDI 1 Pair 2 differential pairs/Serial Digital Video B blue output differential pair

O PCIE AC coupled off Module DDI 1 Pair 1 differential pairs/Serial Digital Video B green output differential pair

Serial Digital Video B interrupt input differential pair.

O CMOS 3.3V /3.3V PCI ExpressCard: reset, active low, one per card

PCI Express Graphics receive differential pairs 14

ExpressCard Signals Descriptions

I CMOS 3.3V /3.3V

PCI ExpressCard: PCI Express capable card request, active low, one per card

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 14

I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 15

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

Connect to PCIE device or slot

Connect AC Coupling cap 0.22uF

I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 13

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 15

I PCIE AC coupled off Module

O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 13

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DDI Signals Descriptions

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description

DDI3_CTRLCLK_AUX+ C36

DDI3_CTRLCLK_AUX- C37

DDI3_HPD C44 I CMOS 3.3V / 3.3V PD 1M and Connect to device Hot Plug Detect DDI Hot-Plug Detect

DDI3_DDC_AUX_SEL C38 I CMOS 3.3V / 3.3V PD 1M to GND

Important:

Ivy Bridge CPU+QM67 does not support active 3 display ports, only support active 2 display ports.

I/O PCIE AC coupled on Module

I/O OD CMOS 3.3V / 3.3V

I/O PCIE AC coupled on Module

I/O OD CMOS 3.3V / 3.3V

(S/W IC between

PU 2.2K to 3.3V, PD 49.9K to GND

(S/W IC between Rpu/Rpd

PU 100K to 3.3V

(S/W IC between

PU 2.2K to 3.3V/PU 100K to

3.3V

Connect to DP AUX+ DP AUX+ function if DDI3_DDC_AUX_SEL is no connect

Connect to HDMI/DVI I2C CTRLCLK HDMI/DVI I2C CTRLCLK if DDI3_DDC_AUX_SEL is pulled high

Connect to DP AUX- DP AUX- function if DDI3_DDC_AUX_SEL is no connect

Connect to HDMI/DVI I2C CTRLDATA HDMI/DVI I2C CTRLDATA if DDI3_DDC_AUX_SEL is pulled high

PU 100K to 3.3V for DDC(HDMI/DVI)

Chapter 3

20

Selects the function of DDI3_CTRLCLK_AUX+ and DDI3_CTRLDATA_AUX-. DDI[n]_DDC_AUX_SEL shall be pulled to 3.3V on the Carrier with a 100K Ohm resistor to configure the DDI[n]_AUX pair as the DDC channel. Carrier DDI

DDC AUX SEL should be connected to pin 13 of the DisplayPor

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I/O PCIE AC coupled on Module

(S/

W IC between

Connect to DP AUX- DP AUX- function if DDI2_DDC_AUX_SEL is no connect

I/O OD CMOS 3.3V / 3.3V

PU 2.2K to 3.3V/PU 100K to

3.3V

(S/W IC between

Connect to HDMI/DVI I2C CTRLDATA HDMI/DVI I2C CTRLDATA if DDI2_DDC_AUX_SEL is pulled high

DDI3_HPD D44 I CMOS 3.3V / 3.3V PD 1M and Connect to device Hot Plug Detect DDI Hot-Plug Detect

DDI3_DDC_AUX_SEL C34 I CMOS 3.3V / 3.3V PD 1M to GND

PU 100K to 3.3V for DDC(HDMI/DVI)

Selects the function of DDI2_CTRLCLK_AUX+ and DDI2_CTRLDATA_AUX-. DDI[n]_DDC_AUX_SEL shall be pulled to 3.3V on the Carrier with a 100K Ohm resistor to configure the DDI[n]_AUX pair as the DDC channel. Carrier DDI[n]_DDC_AUX_SEL should be connected to pin 13 of the DisplayPor

t

DDI3_PAIR0+ C39 Connect AC Coupling Capacitors 0.1uF to Device DDI3_PAIR0- C40 Connect AC Coupling Capacitors 0.1uF to Device DDI3_PAIR1+ C42 Connect AC Coupling Capacitors 0.1uF to Device DDI3_PAIR1- C43 Connect AC Coupling Capacitors 0.1uF to Device DDI3_PAIR2+ C4 Connect AC Coupling Capacitors 0.1uF to Device DDI3_PAIR2- C47 Connect AC Coupling Capacitors 0.1uF to Device DDI3_PAIR3+ C49 Connect AC Coupling Capacitors 0.1uF to Device DDI3_PAIR3- C50 Connect AC Coupling Capacitors 0.1uF to Device

I/O PCIE AC coupled on Module

PD 49.9K to GND

(S/W IC between

Connect to DP AUX+ DP AUX+ function if DDI3_DDC_AUX_SEL is no connect

I/O OD CMOS 3.3V / 3.3V

PU 2.2K to 3.3V, PD 49.9K to GND

(S/W IC between Rpu/Rpd

Connect to HDMI/DVI I2C CTRLCLK HDMI/DVI I2C CTRLCLK if DDI3_DDC_AUX_SEL is pulled high

I/O PCIE AC coupled on Module

PU 100K to 3.3V

(S/W IC between

Connect to DP AUX- DP AUX- function if DDI3_DDC_AUX_SEL is no connect

I/O OD CMOS 3.3V / 3.3V

PU 2.2K to 3.3V/PU 100K to

3.3V

Connect to HDMI/DVI I2C CTRLDATA HDMI/DVI I2C CTRLDATA if DDI3_DDC_AUX_SEL is pulled high

DDI3_HPD C44 I CMOS 3.3V / 3.3V PD 1M and Connect to device Hot Plug Detect DDI Hot-Plug Detect

DDI3_DDC_AUX_SEL C38 I CMOS 3.3V / 3.3V PD 1M to GND

PU 100K to 3.3V for DDC(HDMI/DVI)

Selects the function of DDI3_CTRLCLK_AUX+ and DDI3_CTRLDATA_AUX-. DDI[n]_DDC_AUX_SEL shall be pulled to 3.3V on the Carrier with a 100K Ohm resistor to configure the DDI[n]_AUX pair as the DDC channel. Carrier DDI

[n]

DDC AUX SEL should be connected to pin 13 of the DisplayPor

t

p

DDI 3 Pair 0 differential pairs

DDI 3 Pair 2 differential pairs

O PCIE DDI 3 Pair 1 differential pairs

DDI3_CTRLCLK_AUX+ C36

DDI3_CTRLCLK_AUX- C37

O PCIE AC coupled off Module

O PCIE AC coupled off Module DDI 3 Pair 3 differential pairs

AC coupled off Module

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DDI2_CTRLCLK_AUX- C33

USB Signals Descriptions

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Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description USB0+ A46 USB0- A45 USB1+ B46 USB1- B45 USB2+ A43 USB2- A42 USB3+ B43 USB3- B42 USB4+ A40 USB4- A39 USB5+ B40 USB5- B39 USB6+ A37 USB6- A36 USB7+ B37

USB7- B36

USB_0_1_OC# B44 I CMOS 3.3V Suspend/3.3V PU 10k to 3.3VSB Connect to Overcurrent of USB Power Switch

USB_2_3_OC# A44 I CMOS 3.3V Suspend/3.3V PU 10k to 3.3VSB Connect to Overcurrent of USB Power Switch

USB_4_5_OC# B38 I CMOS 3.3V Suspend/3.3V PU 10k to 3.3VSB Connect to Overcurrent of USB Power Switch

USB_6_7_OC# A38 I CMOS 3.3V Suspend/3.3V PU 10k to 3.3VSB Connect to Overcurrent of USB Power Switch

LVDS Signals Descriptions

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description LVDS_A0+ A71

LVDS_A0- A72

LVDS_A1+ A73

LVDS_A1- A74

LVDS_A2+ A75

LVDS_A2- A76

LVDS_A3+ A78

LVDS_A3- A79 LVDS_A_CK+ A81 LVDS_A_CK- A82 LVDS_B0+ B71 LVDS_B0- B72 LVDS_B1+ B73 LVDS_B1- B74 LVDS_B2+ B75 LVDS_B2- B76 LVDS_B3+ B77 LVDS_B3- B78 LVDS_B_CK+ B81 LVDS_B_CK- B82 LVDS_VDD_EN A77 O CMOS 3.3V / 3.3V PD 100K to GND Connect to enable control of LVDS panel power circuit LVDS panel power enable LVDS_BKLT_EN B79 O CMOS 3.3V / 3.3V PD 100K to GND Connect to enable control of LVDS panel backlight power circuit. LVDS panel backlight enable LVDS_BKLT_CTRL B83 O CMOS 3.3V / 3.3V PD 100K to GND Connect to brightness control of LVDS panel backlight power circuit. LVDS panel backlight brightness control LVDS_I2C_CK A83 I/O OD CMOS 3.3V / 3.3V PU 2.2K to 3.3V Connect to DDC clock of LVDS panel I2C clock output for LVDS display use LVDS_I2C_DAT A84 I/O OD CMOS 3.3V / 3.3V PU 2.2K to 3.3V Connect to DDC data of LVDS panel I2C data line for LVDS display use

I/O USB 3.3V Suspend/3.3V

I/O USB

I/O USB 3.3V Suspend/3.3V

O LVDS LVDS

O LVDS

O LVDS LVDS

3.3V Suspend/3.3V

LVDS

Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB connector Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB connector Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB connector Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB connector Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB connector Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB connector Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB connector

Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB connector

Connect to LVDS connector LVDS Channel A differential pairs

Connect to LVDS connector

Chapter 3

USB differential pairs 0

USB differential pairs 1

USB differential pairs 2

USB differential pairs 3

USB differential pairs 4

USB differential pairs 5

USB differential pairs 6

USB differential pairs 7, USB7 may be configured as a USB client or as a host, or both, at the Module designer's discretion.(CR901-B default set as a host)

USB over-current sense, USB channels 0 and 1. A pull-up for this line shall be present on the Module. An open drain driver from a USB current monitor on the Carrier Board may drive this line low. Do not

ull this line high on the Carrier Board. USB over-current sense, USB channels 2 and 3. A pull-up for this line shall be present on the Module. An open drain driver from a USB current monitor on the Carrier Board may drive this line low. Do not

ull this line high on the Carrier Board. USB over-current sense, USB channels 4 and 5. A pull-up for this line shall be present on the Module. An open drain driver from a USB current monitor on the Carrier Board may drive this line low. Do not pull this line high on the Carrier Board. USB over-current sense, USB channels 6 and 7. A pull-up for this line shall be present on the Module. An open drain driver from a USB current monitor on the Carrier Board may drive this line low. Do not pull this line high on the Carrier Board.

Ther LVDS flat panel differential pairs (LVDS_A[0:3]+/-, LVDS_B[0:3]+/-. LVDS_A_CK+/-, LVDS_B_CK+/-) shall have 100Ω terminations across the pairs at the destination. These terminations may be on the Carrier Board if the Carrier Board implements a LVDS deserializer on-board

LVDS Channel A differential clockO LVDS LVDS

LVDS Channel B differential pairs Ther LVDS flat panel differential pairs (LVDS_A[0:3]+/-, LVDS_B[0:3]+/-. LVDS_A_CK+/-, LVDS_B_CK+/-) shall have 100Ω terminations across the pairs at the destination. These terminations may be on the Carrier Board if the Carrier Board implements a LVDS deserializer on-board

LVDS Channel B differential clock

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USB_6_7_OC# A38 I CMOS 3.3V Suspend/3.3V PU 10k to 3.3VSB Connect to Overcurrent of USB Power Switch

USB over-current sense, USB channels 6 and 7. A pull-up for this line shall be present on the Module. An open drain driver from a USB current monitor on the Carrier Board may drive this line low. Do not

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ull this line high on the Carrier Board.

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description LVDS_A0+ A71

LVDS_A0- A72

LVDS_A1+ A73

LVDS_A1- A74

LVDS_A2+ A75

LVDS_A2- A76

LVDS_A3+ A78

LVDS_A3- A79 LVDS_A_CK+ A81 LVDS_A_CK- A82 LVDS_B0+ B71 LVDS_B0- B72 LVDS_B1+ B73 LVDS_B1- B74 LVDS_B2+ B75 LVDS_B2- B76 LVDS_B3+ B77 LVDS_B3- B78 LVDS_B_CK+ B81 LVDS_B_CK- B82 LVDS_VDD_EN A77 O CMOS 3.3V / 3.3V PD 100K to GND Connect to enable control of LVDS panel power circuit LVDS panel power enable LVDS_BKLT_EN B79 O CMOS 3.3V / 3.3V PD 100K to GND Connect to enable control of LVDS panel backlight power circuit. LVDS panel backlight enable LVDS_BKLT_CTRL B83 O CMOS 3.3V / 3.3V PD 100K to GND Connect to brightness control of LVDS panel backlight power circuit. LVDS panel backlight brightness control LVDS_I2C_CK A83 I/O OD CMOS 3.3V / 3.3V PU 2.2K to 3.3V Connect to DDC clock of LVDS panel I2C clock output for LVDS display use LVDS_I2C_DAT A84 I/O OD CMOS 3.3V / 3.3V PU 2.2K to 3.3V Connect to DDC data of LVDS panel I2C data line for LVDS display use

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LVDS Channel B differential clock

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Connect to LVDS connector

O LVDS LVDS

Connect to LVDS connector

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O LVDS LVDS

LVDS

Connect to LVDS connector

O LVDS LVDS

Connect to LVDS connector

LVDS Channel B differential pairs Ther LVDS flat panel differential pairs (LVDS_A[0:3]+/-, LVDS_B[0:3]+/-. LVDS_A_CK+/-, LVDS_B_CK+/-) shall have 100Ω terminations across the pairs at the destination. These terminations may be on the Carrier Board if the Carrier Board implements a LVDS deserializer on-board

O LVDS LVDS

Connect to LVDS connector

LVDS Channel A differential clockO LVDS LVDS

Connect to LVDS connector

LVDS Signals Descriptions

O LVDS LVDS

Connect to LVDS connector LVDS Channel A differential pairs

Ther LVDS flat panel differential pairs (LVDS_A[0:3]+/-, LVDS_B[0:3]+/-. LVDS_A_CK+/-, LVDS_B_CK+/-) shall have 100Ω terminations across the pairs at the destination. These terminations may be on the Carrier Board if the Carrier Board implements a LVDS deserializer on-board

O LVDS

Connect to LVDS connector

O LVDS LVDS

Connect to LVDS connector

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LPC Signals Descriptions

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description LPC_AD0 B4 LPC_AD1 B5 LPC_AD2 B6 LPC_AD3 B7 LPC_FRAME# B3 O CMOS 3.3V / 3.3V LPC frame indicates the start of an LPC cycle LPC_DRQ0# B8 LPC_DRQ1# B9 LPC_SERIRQ A50 I/O CMOS 3.3V / 3.3V PU 10K to 3.3V LPC serial interrupt LPC_CLK B10 O CMOS 3.3V / 3.3V LPC clock output - 33MHz nominal

SPI Signals Descriptions

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description SPI_CS# B97 O CMOS 3.3V Suspend/3.3V SPI_MISO A92 I CMOS 3.3V Suspend/3.3V Connect a series resistor 33Ω SPI_MOSI A95 O CMOS 3.3V Suspend/3.3V Connect a series resistor 33Ω SPI_CLK A94 O CMOS 3.3V Suspend/3.3V Connect a series resistor 33Ω

SPI_POWER A91 O 3.3V Suspend/3.3V

BIOS_DIS0# A34

BIOS_DIS1# B88

I/O CMOS 3.3V / 3.3V

I CMOS

3.3V / 3.3V LPC serial DMA request

NA

Connect a series resistor 33Ω

Chapter 3

Connect to LPC device

to Carrier Board SPI Device CS# pin

to Carrier Board SPI Device SO pin Data in to Module from Carrier SPI to Carrier Board SPI Device SI pin Data out from Module to Carrier SPI to Carrier Board SPI Device SCK pin Clock from Module to Carrier SPI

LPC multiplexed address, command and data bus

Chip select for Carrier Board SPI - may be sourced from chipset SPI0 or SPI1

Power supply for Carrier Board SPI – sourced from Module – nominally

3.3V. The Module shall provide a minimum of 100mA on SPI_POWER. Carriers shall use less than 100mA of SPI_POWER. SPI_POWER shall only be used to power SPI devices on the Carrier Selection straps to determine the BIOS boot device. The Carrier should only float these or pull them low, please refer to COM Express Module Base Specification Revision 2.1 for strapping options of BIOS disable signals.

BIOS DIS1#

1 1 0

BIO S DIS0 #

SPI

Chips et

Chipset

SPI CS0#

SPI CS1#

Destination

1

0

Module

1

Carrier

00

(Default)

Carri er

Descriptor

SPI_C S#

Hig h

ModuleModule SPI0/SPI1

ModuleModule

Module (Default)

Hig h

SPI0

SPI1 (Default)

Mod ule

CarrierCarri er

Module (Default)

Bios En try

Carrier FWH

SPI0/SPI1

SPI0/SPI1 (Default)

Ref Line

0

1

2

3

GA Signals Descriptions

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description VGA_RED B89 O Analog Analog PD 150R PD 150R,connect to VGA connector with EMI filter & ESD protect component. Red for monitor. Analog output VGA_GRN B91 O Analog Analog PD 150R PD 150R,connect to VGA connector with EMI filter & ESD protect component. Green for monitor. Analog output VGA_BLU B92 O Analog Analog PD 150R PD 150R,connect to VGA connector with EMI filter & ESD protect component. Blue for monitor. Analog output VGA_HSYNC B93 O CMOS 3.3V / 3.3V Connect to VGA connector with a3.3V Buffer IC to isolate PCH & Display Device Horizontal sync output to VGA monitor VGA_VSYNC B94 O CMOS 3.3V / 3.3V Connect to VGA connector with a 33V Buffer IC to isolate PCH & Display Device Vertical sync output to VGA monitor VGA_I2C_CK B95 I/O OD CMOS 3.3V / 3.3V PD 2.2K to 3.3V Connect to VGA connector with a 3.3V to 5V Level shift circuit. DDC clock line (I2C port dedicated to identify VGA monitor capabilities) VGA_I2C_DAT B96 I/O OD CMOS 3.3V / 3.3V PD 2.2K to 3.3V Connect to VGA connector with a 3.3V to 5V Level shift circuit. DDC data line.

Serial Interface Signals Descriptions

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description

SER0_TX A98 O CMOS 3.3V/5V PD 4.7K

SER0_RX A99 I CMOS 3.3V/5V PU 47K to 3.3V

SER1_TX A101 O CMOS 3.3V/5V PD 4.7K

SER1_RX A102 I CMOS 3.3V/5V PU 47K to 3.3V

General purpose serial port 0 transmitter

Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V

General purpose serial port 0 receiver

(Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V)

General purpose serial port 1 transmitter

Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V

General purpose serial port 1 receiver

Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V

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BIOS_DIS1# B88

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description VGA_RED B89 O Analog Analog PD 150R PD 150R,connect to VGA connector with EMI filter & ESD protect component. Red for monitor. Analog output VGA_GRN B91 O Analog Analog PD 150R PD 150R,connect to VGA connector with EMI filter & ESD protect component. Green for monitor. Analog output VGA_BLU B92 O Analog Analog PD 150R PD 150R,connect to VGA connector with EMI filter & ESD protect component. Blue for monitor. Analog output VGA_HSYNC B93 O CMOS 3.3V / 3.3V Connect to VGA connector with a3.3V Buffer IC to isolate PCH & Display Device Horizontal sync output to VGA monitor VGA_VSYNC B94 O CMOS 3.3V / 3.3V Connect to VGA connector with a 33V Buffer IC to isolate PCH & Display Device Vertical sync output to VGA monitor VGA_I2C_CK B95 I/O OD CMOS 3.3V / 3.3V PD 2.2K to 3.3V Connect to VGA connector with a 3.3V to 5V Level shift circuit. DDC clock line (I2C port dedicated to identify VGA monitor capabilities) VGA_I2C_DAT B96 I/O OD CMOS 3.3V / 3.3V PD 2.2K to 3.3V Connect to VGA connector with a 3.3V to 5V Level shift circuit. DDC data line.

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description

SER0_TX A98 O CMOS 3.3V/5V PD 4.7K

General purpose serial port 0 transmitter

(

Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V

)

SER0_RX A99 I CMOS 3.3V/5V PU 47K to 3.3V

General purpose serial port 0 receiver

(

Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V

)

SER1_TX A101 O CMOS 3.3V/5V PD 4.7K

General purpose serial port 1 transmitter

(

Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V

)

SER1_RX A102 I CMOS 3.3V/5V PU 47K to 3.3V

General purpose serial port 1 receiver

(

Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V

)

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GA Signals Descriptions

NA

Serial Interface Signals Descriptions

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En try

Descriptor

SPI_C S#

SPI CS0# Destination

SPI CS1# Destination

DIS0 #

DIS1#

1

00

0

ModuleModule SPI0/SPI1

SPI1 (Default)

SPI0

Hig h

CarrierCarri er

Carrier (Default)

Module (Default)

Mod ule

Module (Default)

Module

ModuleModule

3

2

1

0

Carrier FWH

SPI0/SPI1 (Default)

SPI0/SPI1

Chapter 3

Miscellaneous Si

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description I2C_CK B33 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K to 3.3VSB General purpose I2C port clock output I2C_DAT B34 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K to 3.3VSB General purpose I2C port data I/O line

SPKR B32 O CMOS 3.3V / 3.3V

WDT B27 O CMOS 3.3V / 3.3V Output indicating that a watchdog time-out event has occurred.

FAN_PWNOUT B101 O OD CMOS 3.3V / 3.3V

FAN_TACHIN B102 I OD CMOS 3.3V / 3.3V

TPM_PP A96 I CMOS 3.3V / 3.3V PD 1M

Power and System Management Signals Descriptions

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description

PWRBTN# B12 I CMOS 3.3V Suspend/3.3V PU 10K to 3.3VSB

SYS_RESET# B49 I CMOS 3.3V Suspend/3.3V PU 10K to 3.3V

CB_RESET# B50 O CMOS 3.3V Suspend/3.3V PU 10K to 3.3VSB

PWR_OK B24 I CMOS 3.3V / 3.3V

SUS_STAT# B18 O CMOS 3.3V Suspend/3.3V Indicates imminent suspend operation; used to notify LPC devices.

SUS_S3# A15 O CMOS 3.3V Suspend/3.3V

SUS_S4# A18 O CMOS 3.3V Suspend/3.3V Indicates system is in Suspend to Disk state. Active low output.

SUS_S5# A24 O CMOS 3.3V Suspend/3.3V Indicates system is in Soft Off state.

WAKE0# B66 I CMOS 3.3V Suspend/3.3V PU 10K to 3.3VSB PCI Express wake up signal.

WAKE1# B67 I CMOS 3.3V Suspend/3.3V PU 10K to 3.3VSB

BATLOW# A27 I CMOS 3.3V Suspend/ 3.3V PU 10K to 3.3VSB

LID# A103 I OD CMOS 3.3V Suspend/12V PU 10K to 3.3VSB

SLEEP# B103 I OD CMOS 3.3V Suspend/12V PU 10K to 3.3VSB

THRM# B35 I CMOS 3.3V / 3.3V PU 10K to 3.3V Input from off-Module temp sensor indicating an over-temp situation. THRMTRIP# A35 O CMOS 3.3V / 3.3V PU 10K to 3.3V Active low output indicating that the CPU has entered thermal shutdown. SMB_CK B13 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K to 3.3VSB System Management Bus bidirectional clock line. SMB_DAT B14 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K to 3.3VSB System Management Bus bidirectional data line.

SMB_ALERT# B15 I CMOS 3.3V Suspend/3.3V PU 10K to 3.3VSB

nal Descriptions

Output for audio enunciator - the "speaker" in PC-AT systems. This port provides the PC beep signal and is mostly intended for debugging purposes.

Fan speed control. Uses the Pulse Width Modulation (PWM) technique to control the fan's RPM.

Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V

Fan tachometer input for a fan with a two pulse output.

(Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V)

Trusted Platform Module (TPM) Physical Presence pin. Active high. TPM chip has an internal pull down. This signal is used to indicate Physical Presence to the TPM.

A falling edge creates a power button event. Power button events can be used to bring a system out of S5 soft off and other suspend states, as well as powering the system down. Reset button input. Active low request for Module to reset and reboot. May be falling edge sensitive. For situations when SYS_RESET# is not able to reestablish control of the system, PWR_OK or a power cycle may be used.

Reset output from Module to Carrier Board. Active low. Issued by Module chipset and may result from a low SYS_RESET# input, a low PWR_OK input, a VCC_12V power input that falls below the minimum specification, a watchdog timeout, or may be initiated by the Module software.

Power OK from main power supply. A high value indicates that the power is good. This signal can be used to hold off Module startup to allow Carrier based FPGAs or other configurable devices time to be programmed.

Indicates system is in Suspend to RAM state. Active low output. An inverted copy of SUS_S3# on the Carrier Board may be used to enable the non-standby power on a typical ATX supply.

General purpose wake up signal. May be used to implement wake-up on PS2 keyboard or mouse activity.

Indicates that external battery is low. This port provides a battery-low signal to the Module for orderly transitioning to power saving or power cut-off ACPI modes. LID switch. Low active signal used by the ACPI operating system for a LID switch.

(Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V)

Sleep button. Low active signal used by the ACPI operating system to bring the system to sleep state or to wake it up again.

(Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V)

System Management Bus Alert – active low input can be used to generate an SMI# (System Management Interrupt) or to wake the system.

23

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TPM_PP A96 I CMOS 3.3V / 3.3V PD 1M

Trusted Platform Module (TPM) Physical Presence pin. Active high. TPM chip has an internal pull down. This signal is used to indicate Physical Presence to the TPM.

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description

PWRBTN# B12 I CMOS 3.3V Suspend/3.3V PU 10K to 3.3VSB

A falling edge creates a power button event. Power button events can be used to bring a system out of S5 soft off and other suspend states, as well as powering the system down.

SYS_RESET# B49 I CMOS 3.3V Suspend/3.3V PU 10K to 3.3V

Reset button input. Active low request for Module to reset and reboot. May be falling edge sensitive. For situations when SYS_RESET# is not able to reestablish control of the system, PWR_OK or a power cycle may be used.

CB_RESET# B50 O CMOS 3.3V Suspend/3.3V PU 10K to 3.3VSB

Reset output from Module to Carrier Board. Active low. Issued by Module chipset and may result from a low SYS_RESET# input, a low PWR_OK input, a VCC_12V power input that falls below the minimum specification, a watchdog timeout, or may be initiated by the Module software.

PWR_OK B24 I CMOS 3.3V / 3.3V

Power OK from main power supply. A high value indicates that the power is good. This signal can be used to hold off Module startup to allow Carrier based FPGAs or other configurable devices time to be programmed.

SUS_STAT# B18 O CMOS 3.3V Suspend/3.3V Indicates imminent suspend operation; used to notify LPC devices.

SUS_S3# A15 O CMOS 3.3V Suspend/3.3V

Indicates system is in Suspend to RAM state. Active low output. An inverted copy of SUS_S3# on the Carrier Board may be used to

enable the non-standby power on a typical ATX supply. SUS_S4# A18 O CMOS 3.3V Suspend/3.3V Indicates system is in Suspend to Disk state. Active low output.

SUS_S5# A24 O CMOS 3.3V Suspend/3.3V Indicates system is in Soft Off state.

WAKE0# B66 I CMOS 3.3V Suspend/3.3V PU 10K to 3.3VSB PCI Express wake up signal.

WAKE1# B67 I CMOS 3.3V Suspend/3.3V PU 10K to 3.3VSB

General purpose wake up signal. May be used to implement wake-up

on PS2 keyboard or mouse activity.

BATLOW# A27 I CMOS 3.3V Suspend/ 3.3V PU 10K to 3.3VSB

Indicates that external battery is low.

This port provides a battery-low signal to the Module for orderly

transitioning to power saving or power cut-off ACPI modes.

LID# A103 I OD CMOS 3.3V Suspend/12V PU 10K to 3.3VSB

LID switch. Low active signal used by the ACPI operating system for a LID switch.

(

Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V

)

SLEEP# B103 I OD CMOS 3.3V Suspend/12V PU 10K to 3.3VSB

Sleep button. Low active signal used by the ACPI operating system to bring the

system to sleep state or to wake it up again.

(Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V)

THRM# B35 I CMOS 3.3V / 3.3V PU 10K to 3.3V Input from off-Module temp sensor indicating an over-temp situation. THRMTRIP# A35 O CMOS 3.3V / 3.3V PU 10K to 3.3V Active low output indicating that the CPU has entered thermal shutdown. SMB_CK B13 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K to 3.3VSB System Management Bus bidirectional clock line. SMB_DAT B14 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K to 3.3VSB System Management Bus bidirectional data line.

SMB_ALERT# B15 I CMOS 3.3V Suspend/3.3V PU 10K to 3.3VSB

System Management Bus Alert – active low input can be used to

generate an SMI# (System Management Interrupt) or to wake the system.

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Power and System Management Signals Descriptions

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GPIO Signals Descriptions

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description GPO0 A93 GPO1 B54 GPO2 B57 GPO3 B63 GPI0 A54 GPI1 A63 GPI2 A67 GPI3 A85

Power and GND Signal Descriptions

Signal Pin# Module Pin Type Pwr Rail /Tolerance HR908 Carrier Board Description

VCC_12V

VCC_5V_SBY B84~B87 Power

VCC_RTC A47 Power Real-time clock circuit-power input. Nominally +3.0V.

GND

104~A109 B104~B109 C104~C109

~

A1, A11, A21, A31, A41, A51, A57, A60, A66, A70, A80, A90, A100, A110, B1, B11, B21 ,B31, B41, B51, B60, B70, B80, B90, B100, B110, C1, C2, C5, C8, C11, C14, C21, C31, C41, C51, C60, C70, C73, C76, C80, C84, C87, C90, C93, C96, C100, C103, C110, D1, D2, D5, D8, D11, D14, D21, D31, D51, D60, D67, D70, D73, D76, D80, D84, D87, D90, D93, D96, D100, D103, D110

O CMOS

I CMOS 3.3V / 3.3V

Power Primary power input: +12V nominal. All available VCC_12V pins on the connector(s) shall be used.

Power

3.3V / 3.3V

Chapter 3

General purpose output pins.

Upon a hardware reset, these outputs should be low.

General purpose input pins.

Pulled high internally on the Module.

Standby power input: +5.0V nominal. If VCC5_SBY is used, all available VCC_5V_SBY pins on the connector(s) shall be used. Only used for standby and suspend functions. May be left unconnected if these functions are not used in the system design.

Ground - DC power and signal and AC signal return path. All available GND connector pins shall be used and tied to Carrier Board GND plane.

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Chapter 3

Standby Power LED

Standby

Power LED

This LED will light when the system is in the standby mode.

Cooling Option

Heat Sink with Cooling Fan

Note:

The system board used in the following illustrations may not resemble the actual board. These illustrations are for reference only.

Top View of the Heat Sink

1

Bottom View of the Heat Sink

2

• “1” and “2” denote the locations of the thermal pads designed to contact

the corresponding components that are on HR908-B.

Important:

Remove the plastic covering from the thermal pads prior to mounting the heat sink onto HR908-B.

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Chapter 3

Installing HR908-B onto a Carrier Board

Important:

The carrier board (COM331-B) used in this section is for reference purpose only and may not resemble your carrier board. These illustrations are mainly to guide you on how to install HR908-B onto the carrier board of your choice.

• To download COM331-B datasheet and manual

1. Now install the module and heatsink assembly onto the carrier board. The photo below shows the locations of the mounting holes on carrier board.

Mounting hole

2. Insert the provided mounting screws into the mounting holes - from the bottom through the top of the carrier board.

3. While supporting the mounting screw at the bottom, from the top side of the board, fasten a bolt into the screw.

Bolts

4. The photo below shows the solder side of the board with the screws already fixed in place.

Mounting screw

Mounting screws

5. The photo below shows the component side of the board with the bolts already fixed in place.

Bolts

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Chapter 3

6. Grasping HR908-B by its edges, position it on top of the carrier board with its mounting holes aligned with the bolts on the carrier board. This will also align the COM Express connectors of the two boards to each other.

COM Express connectors on HR908-B

COM Express connectors on the carrier board

7. Press HR908-B down firmly until it is completely seated on the COM Express connectors of the carrier board.

8. Use the provided mounting screws to secure HR908-B with heat sink to the carrier board and then connect the cooling fan’s cable to the fan connector on HR908-B.

The photo below shows the locations of the long mounting screws.

Long screws

Fan connector

HR908-B

Carrier board

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Chapter 4

Chapter 4 - BIOS Setup Overview

The BIOS is a program that takes care of the basic level of communication between the CPU and peripherals. It contains codes for various advanced features found in this system board. The BIOS allows you to configure the system and save the configuration in a battery-backed CMOS so that the data retains even when the power is off. In general, the information stored in the CMOS RAM of the EEPROM will stay unchanged unless a configuration change has been made such as a hard drive replaced or a device added. It is possible that the CMOS battery will fail causing CMOS data loss. If this happens, you need to install a new CMOS battery and reconfigure the BIOS settings.

Legends

KEYs Function

Right and Left Arrows Moves the highlight left or right to select a

menu.

Up and Down Arrows Moves the highlight up or down between

submenus or ﬁ elds.

Note:

The BIOS is constantly updated to improve the performance of the system board; therefore the BIOS screens in this chapter may not appear the same as the actual one. These screens are for reference purpose only.

Default Configuration

Most of the configuration settings are either predefined according to the Load Optimal Defaults settings which are stored in the BIOS or are automatically detected and configured without requiring any actions. There are a few settings that you may need to change depending on your system configuration.

Entering the BIOS Setup Utility

The BIOS Setup Utility can only be operated from the keyboard and all commands are keyboard commands. The commands are available at the right side of each setup screen.

The BIOS Setup Utility does not require an operating system to run. After you power up the system, the BIOS message appears on the screen and the memory count begins. After the memory test, the message “Press DEL to run setup” will appear on the screen. If the message disappears before you respond, restart the system or press the “Reset” button. You may also restart the system by pressing the <Ctrl> <Alt> and <Del> keys simultaneously.

<Esc> Exits to the BIOS setup utility

+ (plus key) Scrolls forward through the values or

options of the hightlighted ﬁ eld.

- (minus key) Scolls backward through the values or options of the hightlighted ﬁ eld.

Tab Select a ﬁ eld <F1> Displays general help <Enter> Press <Enter> to enter the highlighted

submenu

Scroll Bar

When a scroll bar appears to the right of the setup screen, it indicates that there are more available fields not shown on the screen. Use the up and down arrow keys to scroll through all the available fields.

Submenu

When ““ appears on the left of a particular field, it indicates that a submenu which contains additional options are available for that field. To display the submenu, move the highlight to that field and press <Enter>.

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Chapter 4

AMI BIOS Setup Utility Advanced Main

The Main menu is the first screen that you will see when you enter the BIOS Setup Utility.

Main

BIOS Information BIOS Vendor Core Version Compliancy Project Version Build Date and Time

System Lanuage

System Date System Time

Access Level

System Date

The date format is <day>, <month>, <date>, <year>. Day displays a day, from Sunday to Saturday. Month displays the month, from January to December. Date displays the date, from 1 to 31. Year displays the year, from 1980 to 2099.

Advanced

Boot Security

American Megatrends

4.6.5.3 UEFI 2.3; PI 1.2 1APTJ 0.18 x64 01/10/2013 15:13:05

[English]

[Mon 01/28/2013] [16:22:23]

Administraor

Save & ExitChipset

Choose the system default language.

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

The Advanced menu allows you to configure your system for basic operation. Some entries are defaults required by the system board, while others, if enabled, will improve the performance of your system or let you set some features according to your preference.

Important:

Setting incorrect field values may cause the system to malfunction

Main



ACPI Settings



PC Health Status



CPU Conﬁ guration



SATA Conﬁ guration



PCH-FW Conﬁ guration



USB Conﬁ guration



Network Stack



CPU PPM Conﬁ guration



WatchDog Conﬁ guration

Advanced

Save & ExitChipset Boot Security

System ACPI Parameters.

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

.

System Time

The time format is <hour>, <minute>, <second>. The time is based on the 24-hour military-time clock. For example, 1 p.m. is 13:00:00. Hour displays hours from 00 to

23. Minute displays minutes from 00 to 59. Second displays seconds from 00 to 59.

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Chapter 4

ACPI Power Management Configuration

This section is used to configure the ACPI Power Management.

Advanced

ACPI Settings

Enable ACPI Auto Conﬁ guration

ACPI Sleep State Resume by PME

Resume by RTC Alarm

[Disabled]

[S3 (Suspend to RAM) ] [Disabled]

[Disabled]

Enables or Disables BIOS ACPI Auto Conﬁ guration.

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

ACPI Sleep State

Selects the highest ACPI sleep state the system will enter when the Suspend button is pressed.

S1(POS) Enables the Power On Suspend function. S3(STR) Enables the Suspend to RAM function.

PC Health Status

This section displays hardware health monitor.

Advanced

System Hardware Monitor CPU SmartFan CPU Temperature CPU FAN Speed System FAN Speed VCore VGFX DDR +1.05V CPU VCCSA

[Enabled]

: +31 C : 4900 RPM : N/A : +0.818 V : N/A : +1.521 V : +1.049 V : +0.791 V

Enable/ Disable CPU SmartFan

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

Resume by PME

Enable this field to use the PME signal to wake up the system (via PCIE and onboard (LAN).

Resume by RTC Alarm

When Enabled, the system uses the RTC to generate a wakeup event.

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Chapter 4

CPU Configuration

This section is used to configure the CPU. It will also display the detected CPU information.

Advanced

CPU Conﬁ guration Intel(R) Core(TM) i3-3217UE CPU @ 1.60GHz

CPU Signature Microcode Patch Max CPU Speed Min CPU Speed CPU Speed Processor Cores Intel HT Technology Intel VT-X Technology Intel SMX Technology 64-bit

L1 Data Cache L1 Code Cache L2 Cache L3 Cache

Hyper-threading

Active Process Cores Limit CPUID Maximum Intel Virtualization Technology

306a8 C 1600 MHz 800 MHz 1500 MHz 2 Supported Supported Not Supported Supported

32 kB x2 32 kB x2 256 kB x2 3072 kB

[Enabled]

[All] [Disabled] [Disabled]

Enabled for Windows XP and Linux (OS optimized for Hyper-Threading Technology) and Disabled for other OS (OS not optimized for Hyper-Threading Technology). When Disabled only one thread per enabled core is enabled.

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

Hyper-threading

Enable this field for Windows XP and Linux which are optimized for Hyper-Threading technology. Select disabled for other OSes not optimized for Hyper-Threading technology. When disabled, only one thread per enabled core is enabled.

Active Process Core

Number of cores to enable in each processor package

SATA Configuration

This section is used to configure SATA functions.

Advanced

SATA Controller(s)

SATA Mode Selection SATA Test Mode

Serial ATA Port 0 Software Preserve Serial ATA Port 1 Software Preserve Serial ATA Port 2 Software Preserve Serial ATA Port 3 Software Preserve

[Enabled]

[IDE] [Disabled]

Empty Unknown Empty Unknown Empty Unknown Empty Unknown

Enable or disable Device.

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

SATA Controller(s)

This field is used to enable or disable the Serial ATA channels.

SATA Mode Selection

IDE Mode

This option configures the Serial ATA drives as Parallel ATA storage devices.

Limit CUPID Maximum

The CPUID instruction of some newer CPUs will return a value greater than 3. The default is Disabled because this problem does not exist in the Windows series operating systems. If you are using an operating system other than Windows, this problem may occur. To avoid this problem, enable this field to limit the return value to 3 or less than 3

.

Intel Virtualization Technology

When this field is set to Enabled, the VMM can utilize the additional hardware capabilities provided by Vanderpool Technology.

AHCI Mode This option allows the Serial ATA devices to use AHCI (Advanced Host Controller Interface).

RAID Mode This option allows you to create RAID or Intel Matrix Storage configuration on Serial ATA devices.

SATA Test Mode

This field is used to enable or disable the Serial ATA Test Mode.

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Chapter 4

PCH-FW Configuration

Advanced

ME FW Version ME Firmware Mode ME Firmware Type ME Firmware SKU



 Firmware Update Conﬁ guration

8.0.3.1427 Normal Mode Full Sku Firmware Unidentiﬁ ed

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

USB Configuration

This section is used to configure USB.

Advanced

USB Conﬁ guration USB Devices:

1 Keyboard, 2 Hubs

Legacy USB Support

EHCI Hand-off

USB hardware delays and time-outs:

USB transfer time-out Device reset time-out Device power-up delay

[Enabled]

[20 sec] [20 sec] [Auto]

Legacy USB Support

Enabled

Enables legacy USB.

Auto Disables support for legacy when no USB devices are connected.

Enables Legacy USB support. AUTO option disables legacy support if no USB devices are connected. DISABLE option will keep USB devices available only for EFI applications.

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

Disabled Keeps USB devices available only for EFI applications.

EHCI Hand-off

This is a workaround for OSes that does not support EHCI hand-off. The EHCI ownership change should be claimed by the EHCI driver.

USB transfer time-out

The time-out value for Bulk and Interrupt transfers.

Device reset time-out

Selects the USB mass storage device start unit command timeout.

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Chapter 4

Device power-up delay

Maximum time the device will take before it properly reports itself to the Host Controller. “Auto” uses default value: for a Root port it is 100 ms, for a Hub port the delay is taken from Hub descriptor.

Network Stack

Advanced

Network Stack

[Disable Link]

Enable/Disable UEFI network stack

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

CPU PPM Configuration

Advanced

CPU PPM Conﬁ guration

EIST

Turbo Mode

[Enabled]

Enable/Disable Intel SpeedStep

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

EIST

This field is used to enable or disable the Intel Enhanced SpeedStep Technology.

Turbo Mode

The options are Enabled and Disabled.

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Chapter 4

WatchDog Configuration

Advanced

WatchDog1 function

WatchDog2 function

[Disabled]

WatchDog function

This field is used to enable or disable the Watchdog timer function.

Watchdog 1 function

For HR908-B module board (Reset HR908-B by hardware)

Watchdog 2 function

Enable/Disable IT8518 WatchDog Timer.

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

Chipset

Configures relevant chipset functions.

Main



PCH-IO Conﬁ guration



System Agent (SA) Conﬁ guration



NB PCIe Bifurcation Conﬁ guration

Advanced

Chipset

Boot Security

Save & Exit

PCH Parameters

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

For carrier board usage.

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Chapter 4

PCH-IO Configuration

Chipset

Intel PCH RC Version Intel PCH SKU Name Intel PCH Rev ID



PCI Express Conﬁ guration



USB Conﬁ guration



PCH Azalia Conﬁ guration

PCH LAN Controller Wake on LAN

After G3

1.1.0.0 QM67 05/B3

[Enabled] [Enabled]

[Power on]

PCI Express Coniguration settings.

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

PCH LAN Controller

Enable or disable the PCH LAN Controller.

Wake on LAN Enable

Set this field to Enabled to wake up the system via the onboard LAN or via a LAN card that supports the remote wake up function.

After G3

PCI Express Configuration

PCI Express Conﬁ guration

PCI Express Clock Gating



PCI Express Root Port 1



PCI Express Root Port 5



PCI Express Root Port 6



PCI Express Root Port 7

PCIE Port 8 is assigned to LAN

Chipset

[Enabled]

PCI Express Clock Gating

Enables or disables PCI Express Clock Gating for each root port.

PCI Express Root Port 1, port 5 to PCI Express Root Port 7

Controls the PCI Express Root Port.

Enable or Disable PCI Express Clock Gating for each root port.

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

Power Off / WOL Power-on the system via WOL after G3.

Power On

Power-on the system after G3

.

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Chapter 4

USB Configuration

Chipset

USB Conﬁ guration

EHCI1

EHCI2

[Enable]

[Enabled]

EHCI1 and EHCI2

These fields are used to enable or disable USB 2.0

Control the USB EHCI (USB2.0) functions. One EHCI controller must always be enabled.

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

.

PCH Azalia Configuration

Chipset

PCH Azalia Conﬁ guration

Azalia



Azalia Internal HDMI Codec



Azalia HDMI Codec port B Azalia HDMI Codec port C Azalia HDMI Codec port D

[Auto]

[Enabled] [Enabled] [Enabled] [Enabled]

Azalia internal HDMI codec

Enable or disable the internal HDMI codec for Azalia.

Control detection of the Azalia device. Disable= Azalia will be unconditionally disabled Enabled= Azalia will be unconditionally enabled Auto=Azalia will be enabled if present, disabled otherwise.

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

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Chapter 4

System Agent (SA) Configuration

Chipset

System Agent Bridge Name System Agent RC Version VT-d Capability



Graphics Conﬁ guration



NB PCIe Conﬁ guration



Memory Conﬁ guration

IvyBridge

1.1.0.0 Unsupported

Conﬁ g Graphics settings.

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

Graphics Configuration

Chipset

Graphics Conﬁ guration IGFX VBIOS Version IGfx Frequency

Primary Display

DVMT Total Gfx Mem



LCD Control

2126 350 MHz

[Auto]

[256M]

Select which of IGFX/ PEG/PCI Graphics device should be Primary Display or select SG for Switchable Gfx.

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

Primary Display Auto When the system boots, it will auto detects the display device.

IGFX When the system boots, it will first initialize the onboard VGA.

PEG When the system boots, it will first initialize the PCI Express x16 graphics card.

DVMT Total Gfx Mem

Select DVMT5.0 total graphic memory size used by the internal graphics

.

device

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Chapter 4

LCD Control

Chipset

LCD Control

Primary IGFX Boot Display

LCD Panel Type

[VBIOS Default]

Select the Video Device which will be activated during POST. This has no effect if external graphics present. Secondary boot display selection will appear based on your selection. VGA modes will be supported only on primary display.

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

LCD Panel Type

Select LCD panel used by Internal Graphics Device by selecting the appropriate setup item.

NB PCIe Configuration

NB PCIe Conﬁ guration PEG0

PEG0 - Gen X

Enable PEG

Enabled PEG

To enable or disable the PEG

Chipset

.

Not Present

[Gen1]

[Auto]

Conﬁ gure PEG0 B0:D1:F0 Gen1-Gen3.

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

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Chapter 4

Memory Configuration

Chipset

Memory Information Memory RC Version

Memory Frequency Total Memory DIMM#1 CAS Latency (tCL) Minimum delay time CAS to RAS (tRCDmin) Row Precharge (tRPmin) Active to Precharge (tRASmin)

DDR Selection



1.1.0.0 1600 Mhz 4096 MB (DDR3) 4096 MB (DDR3) 11

11 11 28

[DDR3]

DDR Selection

Intel Ivy Bridge mobile CPU supports DDR3/DDR3L. Intel Sandy Bridge mobile CPU only supports DDR3.

DDR3 or DDR3L selection.

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

NB PCIe Bifurcation Configuration

Chipset

NB PCIe Bifurcation Conﬁ guration

PEG Bifurcation

[x16]

PEG Birfurcation x8, x4, x4

Reserved x8, x8 x16

PEG bifurcation conﬁ gu- ration.

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

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Chapter 4

Boot

Main

Boot Conﬁ guration

Bootup NumLock State

Quiet Boot Fast Boot

CSM16 Module Version Boot Option Priorities



CSM Parameters

Advanced

Boot

[On]

[Disabled] [Disabled]

07.69

Security

Save & ExitChipset

Select the keyboard NumLock state.

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

Bootup NumLock State

This allows you to determine the default state of the numeric keypad. By default, the system boots up with NumLock on wherein the function of the numeric keypad is the number keys. When set to Off, the function of the numeric keypad is the arrow keys.

Quiet Boot

Enables or disables the quiet boot option.

CSM Parameters

Main

Launch PXE OpROM policy

Launch Storage OpROM policy

Advanced

Boot

[Do not launch]

[Legacy only]

Security

Save & ExitChipset

Launch PXE OpROM policy

Controls the execution of UEFI and legacy PXE OpROM.

Launch Storage OpROM policy

Controls the execution of UEFI and legacy storage OpROM.

Controls the execution of UEFI and Legacy PXE OpROM

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

Fast Boot

Enables or disables boot with initialization of a minimal set of devices required to launch active boot option. Has no effect for BBS boot options.

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Chapter 4

Security

Main

Password Description If ONLY the Administrator’s password is set,

then this only limits access to Setup and is only asked for when entering Setup. If ONLY the User’s password is set, then this is a power on password and must be entered to boot or enter Setup. In Setup the User will have Administrator rights. The password length must be in the following range: Minimum length 3 Maximum length 20

Administrator Password

User Password

Administrator Password

Sets the administrator password.

User Password

Sets the user password.

Advanced

Boot Security

Save & ExitChipset

Set Administrator Password.

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

Save & Exit

Main

Advanced

Save Changes and Reset

Discard Changes and Reset Restore Defaults

Save as User Defaults Restore User Defaults

Boot Override

Launch EFI Shell from ﬁ lesystem device

Save Changes and Reset

To save the changes, select this field and then press <Enter>. A dialog box will appear. Select Yes to reset the system after saving all changes made

Discard Changes and Reset

To discard the changes, select this field and then press <Enter>. A dialog box will appear. Select Yes to reset the system setup without saving any changes.

Chipset

Boot Security Save & Exit

Reset the system after saving the changes.

 Select Screen  Select Item

Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults ESC: Exit

.

Restore Defaults

To restore and load the optimized default values, select this field and then press <Enter>. A dialog box will appear. Select Yes to restore the default values of all the setup options.

Save as User Defaults

To save changes done so far as user default, select this field and then press <Enter>. A dialog box will appear. Select Yes to save values as user default.

Restore User Defaults

To restore user default to all the setup options, select this field and then press <Enter>. A dialog box will appear. Select Yes to restore user default.

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Chapter 4

Clear Administrator or User Password

Note:

Using the “Restore Default” function in the “Save & Exit” screen will not clear the old password. Make sure to follow the steps below.

If you forgot the administrator or user password, follow the steps below to clear the old password.

1. Power-off the system or turn off the power supply.

2. Set the Clear CMOS jumper to “Clear CMOS” mode. Wait for a few seconds and set the jumper back to its default setting.

3. Power-on the system. When the “CMOS Checksum Error” message appears, press

<Delete> to enter the BIOS.

4. Select “Save & Exit”. In the “Save & Exit” screen, select “Save Change & Reset” and then press Enter.

Updating the BIOS

To update the BIOS, you will need the new BIOS file and a flash utility, AFUDOS.EXE. Please contact technical support or your sales representative for the files.

To execute the utility, type: A:> AFUDOS BIOS_File_Name /b /p /n then press <Enter>.

C:\AFU\AFUDOS>afudos ﬁ lename /B /P /N

+--------------------------------------------------------------------------------------------------------+

| |

+--------------------------------------------------------------------------------------------------------+

Reading ﬁ le ..............................

Erasing ﬂ ash .............................

Writing ﬂ ash .............................

Verifying ﬂ ash ..........................

Erasing BootBlock ....................

Writing BootBlock ....................

Verifying BootBlock .................

C:\AFU\AFUDOS>

AMI Firmware Update Utility(APTIO) v2.25

done done done done done done done

After finishing BIOS update, please turn off the AC power. Wait about 10 seconds and then turn on the AC power again.

| |

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Chapter 4

Notice: BIOS SPI ROM

1. The Intel® Management Engine has already been integrated into this system board. Due to the safety concerns, the BIOS (SPI ROM) chip cannot be removed from this system board and used on another system board of the same model.

2. The BIOS (SPI ROM) on this system board must be the original equipment from the factory and cannot be used to replace one which has been utilized on other system boards.

®

3. If you do not follow the methods above, the Intel updated and will cease to be effective.

Note:

a. You can take advantage of flash tools to update the default configuration of the BIOS (SPI ROM) to the latest version anytime. b. When the BIOS IC needs to be replaced, you have to populate it properly onto the

system board after the EEPROM programmer has been burned and follow the technical person's instructions to confirm that the MAC address should be burned or not.

Management Engine will not be

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Chapter 5 - Supported Software

The CD that came with the system board contains drivers, utilities and software applications required to enhance the performance of the system board.

Insert the CD into a CD-ROM drive. The autorun screen (Mainboard Utility CD) will appear. If after inserting the CD, “Autorun” did not automatically start (which is, the Mainboard Utility CD screen did not appear), please go directly to the root directory of the CD and double-click “Setup”.

Chapter 5

Auto Run Pages (for Windows 7)

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Chapter 5

Microsoft .NET Framework 3.5 (for Windows XP only)

Note:

Before installing Microsoft .NET Framework 3.5, make sure you have updated your Windows XP operating system to Service Pack 3.

To install the driver, click “Microsoft .NET Framework 3.5” on the main menu.

1. Read the license agreement carefully.

Click “I have read and accept the terms of the License Agreement” then click Install.

2. Setup is now installing the driver.

3. Click Exit.

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Chapter 5

Intel Chipset Device Software

The Intel Chipset Device Software is used for updating Windows chipset can be recognized and configured properly in the system.

To install the utility, click “Intel Chipset Device Software” on the main menu.

1. Setup is ready to install the utility. Click Next.

2. Read the license agreement then click Yes.

®

INF files so that the Intel

3. Go through the readme document for more installation tips then click Next.

4. After all setup operations are

done, click Next.

5. Click “Yes, I want to restart this computer now” then click Finish.

Restarting the system will allow the new software installation to take effect.

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Chapter 5

Intel HD Graphics Drivers (for Windows 7)

To install the driver, click “Intel HD Graphics Drivers” on the main menu.

1. Setup is now ready to install the graphics driver. Click Next.

By default, the “Automatically run WinSAT and enable the Windows Aero desktop theme” is enabled. With this enabled, after installing the graphics driver and the system rebooted, the screen will turn blank for 1 to 2 minutes (while WinSAT is running) before the Windows Vista desktop appears. The “blank screen” period is the time Windows is testing the graphics performance.

We recommend that you skip this process by disabling this function then click Next.

2. Read the license agreement then click Yes.

3. Go through the readme document for system requirements and installation tips then click Next.

4. Setup is now installing the driver. Click Next to continue

.

5. Click “Yes, I want to restart this computer now” then click Finish.

Restarting the system will allow the new software installation to take effect.

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Chapter 5

Intel HD Graphics Drivers (for Windows XP)

Note:

Before installing Intel HD Graphics Drivers, make sure you have installed Microsoft .NET Framework 3.5 SP1.

1. Setup is ready to install the graphics driver. Click Next

2. Read the license agreement then click Yes.

.

3. Go through the readme document for more installation tips then click Next.

4. Setup is currently installing the driver. After installation has completed, click Next.

5. Click “Yes, I want to restart this computer now.” then click Finish.

Restarting the system will allow the new software installlation to take effect.

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Chapter 5

Intel Management Engine Drivers

To install the driver, click “Intel Management Engine Drivers” on the main menu.

1. Setup is ready to install the driver. Click Next.

2. Read the license agreement then click Yes.

3. Setup is currently installing the driver. After installation has completed, click Next.

4. After completing installation, click Finish.

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Chapter 5

Audio Drivers (for COM331-B Carrier Board)

To install the driver, click “Audio Drivers (for COM331-B Carrier Board” on the main menu.

1. Setup is now ready to install the audio driver. Click Next.

2. Follow the remainder of the steps on the screen; clicking “Next” each time you finish a step.

3. Click “Yes, I want to restart my computer now” then click Finish.

Restarting the system will allow the new software installation to take effect.

Intel LAN Drivers

To install the driver, click “Intel LAN Drivers” on the main menu.

1. Setup is ready to install the driver. Click Install Drivers and Sofeware.

2. Setup is now ready to install the LAN driver. Click Next.

3. Click “I accept the terms in the license agreement” then click

.

“Next”

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Chapter 5

4. Select the program featuers you want installed then click Next.

5. Click Install to begin the installation.

DFI Utility

DFI Utility provides information about the board, HW Health, Watchdog, DIO, and Backlight. To access the utility, click “DFI Utility” on the main menu.

Note:

If you are using Windows 7, you need to access the operating system as an administrator to be able to install the utility.

1. Setup is ready to install the DFI Utility drifer. Click “Next”.

2. Click “I accept the terms in the license agreement” then click

.

“Next”

6. After completing installation, click Finish.

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Chapter 5

3. Enter “User Name” and “Orga-

nization” information then click

.

“Next”

4. Click Install to begin the installation.

The DFI Utility icon will appear on the desktop. Double-click the icon to open the utility.

5. After completing installation,

click Finish.

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Chapter 5

Microsoft DirectX 9.0C Driver (for Windows XP only)

To install the utility, click “Microsoft DirectX 9.0C Driver” on the main menu.

1. Click “I accept the agree-

ment” then click Next.

2. To start installation, click

Next.

Intel Rapid Storage Technology

The Intel Rapid Storage Technology is a utility that allows you to monitor the current status of the SATA drives. It enables enhanced performance and power management for the storage subsystem.

To install the driver, click “Intel Rapid Storage Technology” on the main menu.

1. Setup is now ready to install

2. Read the warning then click

Note:

Windows Vista is not supported.

the utility. Click Next.

Yes.

3. Click Finish. Reboot the

system for DirectX to take effect.

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Chapter 5

3. Read the license agreement then

click Yes.

4. Go through the readme document

for system requirements and installation tips then click Next.

6. Click “Yes, I want to restart my computer now” then click Finish.

Restarting the system will allow the new software installation to take effect.

7. Run the Intel Matrix Storage

Console utility to view the hard drives’ configuration.

5. Setup is now installing the utility. Click Next to continue.

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Chapter 5

Intel Turbo Boost Monitor (for Windows 7 only)

To install the driver, click “Intel Turbo Boost Monitor” on the main menu.

1. The setup program is configuring

the new software installation

2. Click Next.

.

F6 Floppy

This is used to create a floppy driver diskette needed when you install Windows® XP using the F6 installation method. This will allow you to install the operating system onto a hard drive when in AHCI mode.

1. Insert a blank floppy diskette.

2. Locate for the drivers in the CD then copy them to the floppy diskette. The CD includes

drivers for both 32-bit and 64-bit operating systems. The path to the drivers are shown

below. 32-bit CD Drive:\AHCI_RAID\F6FLOPPY\f6flpy32 64-bit CD Drive:\AHCI_RAID\F6FLOPPY\f6flpy64

3. Read the license agreement and then click “I accept the terms in the license agreement”. Click Next.

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Adobe Acrobat Reader 9.3

To install the reader, click “Adobe Acrobat Reader 9.3” on the main menu.

1. Click Next to install or click Change Destination Folder to select another folder.

2. Click Install to begin installation.

Chapter 5

3. Click Finish to exit installation.

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Appendix A

Appendix A - NLITE and AHCI Installation Guide

nLite

nLite is an application program that allows you to customize your XP installation disc by integrating the RAID/AHCI drivers into the disc. By using nLite, the F6 function key usually required during installation is no longer needed.

Note:

The installation steps below are based on nLite version 1.4.9. Installation procedures may slightly vary if you’re using another version of the program.

1. Download the program from nLite’s offical website.

http://www.nliteos.com/download.html

2. Install nLite.

4. Insert the XP installation disc into an optical drive.

5. Launch nLite. The Welcome screen will appear. Click Next.

Important:

Due to it’s coding with Visual.Net, you may need to first install .NET Framework prior to installing nLite.

3. Download relevant RAID/AHCI driver files from Intel’s website. The drivers you choose will depend on the operating system and chipset used by your computer.

The downloaded driver files should include iaahci.cat, iaAHCI.inf, iastor.cat, iaStor. inf, IaStor.sys, license.txt and TXTSETUP.OEM.

6. Click Next to temporarily save the Windows installation files to the designated default folder.

If you want to save them in another folder, click Browse, select the folder and then click Next.

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Appendix A

7. Click Next.

8. In the Task Selection dialog box, click Drivers and Bootable ISO. Click Next.

9. Click Insert and then select Multiple driver folder to select the drivers you will integrate. Click Next.

10. Select only the drivers ap-

propriate for the Windows version that you are using and then click OK.

Integrating 64-bit drivers into 32-bit Windows or vice versa will cause file load errors and failed installation.

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Appendix A

11. If you are uncertain of the southbridge chip used on your motherboard, select all RAID/AHCI controllers and then click OK

12. Click Next.

.

13. The program is currently integrating the drivers and applying changes to the installation.

14. When the program is finished applying the changes, click Next.

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Appendix A

15. To create an image, select the Create Image mode under the General section and then click Next.

16. Or you can choose to burn it directly to a disc by selecting the Direct Burn mode under the General section.

Select the optical device and all other necessary settings and then click Next

.

17. You have finished customizing the Windows XP installation disc. Click Finish.

Enter the BIOS utility to configure the SATA controller to RAID/AHCI. You can now install Windows XP.

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Appendix A

AHCI

The installation steps below will guide you in configuring your SATA drive to AHCI mode.

1. Enter the BIOS utility and configure the SATA controller to IDE mode.

2. Install Windows XP but do not press F6.

3. Download relevant RAID/AHCI driver files supported by the motherboard chipset from Intel’s website.

Transfer the downloaded driver files to C:\AHCI.

4. Open Device Manager and right click on one of the Intel Serial ATA Storage Controllers, then select Update Driver.

If the controller you selected did not work, try selecting another one.

5. In the Hardware Update Wizard dialog box, select “No, not this time” then click Next.

6. Select “Install from a list or specific location (Advanced)” and then click Next.

7. Select “Don’t search. I will choose

the driver to install” and then click

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Appendix A

8. Click “Have Disk”.

9. Select C:\AHCI\iaAHCI.inf and then click Open.

11. A warning message appeared because the selected SATA controller did not match your hardware device.

Ignore the warning and click Yes to proceed.

12. Click Finish.

13. The system’s settings have

been changed. Windows XP requires that you restart the computer. Click Yes.

10. Select the appropriate AHCI Controller of your hardware device and then click Next.

14. Enter the BIOS utility and modify the SATA controller from IDE to AHCI. By doing so, Windows will work normally with the SATA controller that is in AHCI mode.

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Appendix B - Watchdog Sample Code

Appendix B

#include <stdio.h> //-------------------------------------------------------------#deﬁ ne EC_EnablePort 0x66 #deﬁ ne EC_DataPort 0x62 //-------------------------------------------------------------void WriteEC(char,int); void SetWDTime(int,int); int GetWDTime(void); //-------------------------------------------------------------main() { unsigned int countdown; unsigned int input,count_h,count_l;

printf("Input WD Time: "); scanf("%d",&input); printf("\n"); count_h=input>>8; count_l=input&0x00FF; SetWDTime(count_h,count_l);

while(1) { countdown = GetWDTime(); delay(100); printf("\rTime Remaining: %d ",countdown); } } //-------------------------------------------------------------void SetWDTime(int count_H,int count_L) { //Set Count WriteEC(0xB7,count_H); //High Byte WriteEC(0xB8,count_L); //Low Byte //Enable Watch Dog Timer WriteEC(0xB4,0x02); } //--------------------------------------------------------------

int GetWDTime(void) { int sum,data_h,data_l; //Select EC Read Type outportb(EC_EnablePort,0x80); delay(5); //Get Remaining Count High Byte outportb(EC_DataPort,0xF6); delay(5); data_h=inportb(EC_DataPort); delay(5); //Select EC Read Type outportb(EC_EnablePort,0x80); delay(5); //Get Remaining Count Low Byte outportb(EC_DataPort,0xF7); delay(5); data_l=inportb(EC_DataPort); delay(5);

data_h<<=8; data_h&=0xFF00; sum=data_h|data_l; return sum; } //-------------------------------------------------------------void WriteEC(char EC_Addr, int data) { //Select EC Write Type outportb(EC_EnablePort,0x81); delay(5); outportb(EC_DataPort,EC_Addr); delay(5); outportb(EC_DataPort,data); delay(5); } //--------------------------------------------------------------

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Appendix C

Appendix C - System Error Message

When the BIOS encounters an error that requires the user to correct something, either a beep code will sound or a message will be displayed in a box in the middle of the screen and the message, PRESS F1 TO CONTINUE, CTRL-ALT-ESC or DEL TO ENTER SETUP, will be shown in the information box at the bottom. Enter Setup to correct the error.

Error Messages

One or more of the following messages may be displayed if the BIOS detects an error during the POST. This list indicates the error messages for all Awards BIOSes:

CMOS BATTERY HAS FAILED

The CMOS battery is no longer functional. It should be replaced.

Important:

Danger of explosion if battery incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer. Dispose of used batteries according to the battery manufacturer’s instructions.

CMOS CHECKSUM ERROR Checksum of CMOS is incorrect. This can indicate that CMOS has become corrupt. This error

may have been caused by a weak battery. Check the battery and replace if necessary.

DISPLAY SWITCH IS SET INCORRECTLY

The display switch on the motherboard can be set to either monochrome or color. This indicates the switch is set to a different setting than indicated in Setup. Determine which setting is correct, either turn off the system and change the jumper or enter Setup and change the VIDEO selection.

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Appendix D - Troubleshooting

Appendix D

The picture seems to be constantly moving.

Troubleshooting Checklist

This chapter of the manual is designed to help you with problems that you may encounter with your personal computer. To efficiently troubleshoot your system, treat each problem individually. This is to ensure an accurate diagnosis of the problem in case a problem has multiple causes.

Some of the most common things to check when you encounter problems while using your system are listed below.

1. The power switch of each peripheral device is turned on.

2. All cables and power cords are tightly connected.

3. The electrical outlet to which your peripheral devices are connected is working. Test the outlet by plugging in a lamp or other electrical device.

4. The monitor is turned on.

5. The display’s brightness and contrast controls are adjusted properly.

6. All add-in boards in the expansion slots are seated securely.

7. Any add-in board you have installed is designed for your system and is set up correctly.

Monitor/Display

If the display screen remains dark after the system is turned on:

1. Make sure that the monitor’s power switch is on.

2. Check that one end of the monitor’s power cord is properly attached to the monitor and the other end is plugged into a working AC outlet. If necessary, try another outlet.

1. The monitor has lost its vertical sync. Adjust the monitor’s vertical sync.

2. Move away any objects, such as another monitor or fan, that may be creating a magnetic

field around the display.

3. Make sure your video card’s output frequencies are supported by this monitor.

The screen seems to be constantly wavering.

1. If the monitor is close to another monitor, the adjacent monitor may need to be turned off.

Fluorescent lights adjacent to the monitor may also cause screen wavering.

Power Supply

When the computer is turned on, nothing happens.

1. Check that one end of the AC power cord is plugged into a live outlet and the other end

properly plugged into the back of the system.

2. Make sure that the voltage selection switch on the back panel is set for the correct type of

voltage you are using.

3. The power cord may have a “short” or “open”. Inspect the cord and install a new one if

necessary.

3. Check that the video input cable is properly attached to the monitor and the system’s display adapter.

4. Adjust the brightness of the display by turning the monitor’s brightness control knob

.

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Appendix D

Hard Drive

Hard disk failure.

1. Make sure the correct drive type for the hard disk drive has been entered in the BIOS.

2. If the system is configured with two hard drives, make sure the bootable (first) hard drive is configured as Master and the second hard drive is configured as Slave. The master hard drive must have an active/bootable partition.

Excessively long formatting period.

If your hard drive takes an excessively long period of time to format, it is likely a cable connection problem. However, if your hard drive has a large capacity, it will take a longer time to format.

Serial Port

The serial device (modem, printer) doesn’t output anything or is outputting garbled

characters.

1. Make sure that the serial device’s power is turned on and that the device is on-line.

2. Verify that the device is plugged into the correct serial port on the rear of the computer.

3. Verify that the attached serial device works by attaching it to a serial port that is working and configured correctly. If the serial device does not work, either the cable or the serial device has a problem. If the serial device works, the problem may be due to the onboard I/O or the address setting.

4. Make sure the COM settings and I/O address are configured correctly.

System Board

1. Make sure the add-in card is seated securely in the expansion slot. If the add-in card is

loose, power off the system, re-install the card and power up the system.

2. Check the jumper settings to ensure that the jumpers are properly set.

3. Verify that all memory modules are seated securely into the memory sockets.

4. Make sure the memory modules are in the correct locations.

5. If the board fails to function, place the board on a flat surface and seat all socketed compo-

nents. Gently press each component into the socket.

6. If you made changes to the BIOS settings, re-enter setup and load the BIOS defaults.

Keyboard

Nothing happens when a key on the keyboard was pressed.

1. Make sure the keyboard is properly connected.

2. Make sure there are no objects resting on the keyboard and that no keys are pressed during the booting process.

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