This publication contains information that is protected by copyright. No part of it may be reproduced in any form or by any means or used to make any transformation/adaptation without
the prior written permission from the copyright holders.
This publication is provided for informational purposes only. The manufacturer makes no
representations or warranties with respect to the contents or use of this manual and specifically disclaims any express or implied warranties of merchantability or fitness for any particular
purpose. The user will assume the entire risk of the use or the results of the use of this document. Further, the manufacturer reserves the right to revise this publication and make changes
to its contents at any time, without obligation to notify any person or entity of such revisions
or changes.
Changes after the publication’s first release will be based on the product’s revision. The website
will always provide the most updated information.
Product names or trademarks appearing in this manual are for identification purpose only and
are the properties of the respective owners.
Qseven Specification Reference
http://www.qseven-standard.org/
This equipment has been tested and found to comply with the limits for a Class B digital
device, pursuant to Part 15 of the FCC rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference
to radio communications. However, there is no guarantee that interference will not occur in a
particular installation. If this equipment does cause harmful interference to radio or television
reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures:
• Reorient or relocate the receiving antenna.
• Increase the separation between the equipment and the receiver.
• Connect the equipment into an outlet on a circuit different from that to which the receiver
is connected.
• Consult the dealer or an experienced radio TV technician for help.
Notice:
1. The changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate the equipment.
2. Shielded interface cables must be used in order to comply with the emission limits.
MXM Connector Signal Description .......................................................12
Installing FS700 Series onto a Carrier Board ....................................17
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Page 4
About this Manual
Static Electricity Precautions
An electronic file of this manual is included in the CD. To view the user’s manual in the CD, insert the CD into a CD-ROM drive. The autorun screen (Main Board Utility CD) will appear. Click
“User’s Manual” on the main menu.
Warranty
1. Warranty does not cover damages or failures that arised from misuse of the product, inability to use the product, unauthorized replacement or alteration of components and product specifications.
2. The warranty is void if the product has been subjected to physical abuse, improper installation, modification, accidents or unauthorized repair of the product.
3. Unless otherwise instructed in this user’s manual, the user may not, under any circumstances, attempt to perform service, adjustments or repairs on the product, whether in or
out of warranty. It must be returned to the purchase point, factory or authorized service
agency for all such work.
4. We will not be liable for any indirect, special, incidental or consequencial damages to the
product that has been modified or altered.
It is quite easy to inadvertently damage your PC, system board, components or devices even
before installing them in your system unit. Static electrical discharge can damage computer
components without causing any signs of physical damage. You must take extra care in handling them to ensure against electrostatic build-up.
1. To prevent electrostatic build-up, leave the system board in its anti-static bag until you are
ready to install it.
2. Wear an antistatic wrist strap.
3. Do all preparation work on a static-free surface.
4. Hold the device only by its edges. Be careful not to touch any of the components, contacts
or connections.
5. Avoid touching the pins or contacts on all modules and connectors. Hold modules or connectors by their ends.
Important:
Electrostatic discharge (ESD) can damage your processor, disk drive and other components. Perform the upgrade instruction procedures described at an ESD workstation only. If such a station is not available, you can provide some ESD protection by
wearing an antistatic wrist strap and attaching it to a metal part of the system chassis. If a wrist strap is unavailable, establish and maintain contact with the system
chassis throughout any procedures requiring ESD protection.
Safety Measures
To avoid damage to the system:
• Use the correct AC input voltage range.
To reduce the risk of electric shock:
• Unplug the power cord before removing the system chassis cover for installation or servicing. After installation or servicing, cover the system chassis before plugging the power
cord.
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Page 5
About the Package
The package contains the following items. If any of these items are missing or damaged,
please contact your dealer or sales representative for assistance.
• One FS700-M60 board
• One Heat spreader (for temperature -40°C to 85°C only)
• One QR (Quick Reference)
Optional Items
• Q7A-551 carrier board kit
• WM-240 WiFi kit
• UC20 Mini-PCIe UMTS/HSPA+ Module
The board and accessories in the package may not come similar to the information listed
above. This may differ in accordance with the sales region or models in which it was sold. For
more information about the standard package in your region, please contact your dealer or
sales representative.
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Page 6
Chapter 1 - Introduction
Specifications
Chapter 1
Processor
System Memory
Graphics
Audio
LAN
Serial ATA
eMMC
microSD
Expansion
Interfaces
OS Support
Watchdog
Timer
Power
• Freescale i.MX 6 series processors
- i.MX6Q: i.MX 6Quad, up to 1.0GHz, Four Cortex-A9 cores
- i.MX6D: i.MX 6Dual, up to 1.0GHz, Two Cortex-A9 cores
- i.MX6L: i.MX 6DualLite, up to 1.0GHz, Two Cortex-A9 cores
- i.MX6S: i.MX 6Solo, up to 1.0GHz, One Cortex-A9 core
• 1GB/2GB DDR3 memory down
• Supports HDMI and LVDS interfaces
• HDMI: HDMI v1.4 resolution up to 1920x1200 @60Hz
• LVDS: 18/24-bit
- One port up to 165 Mpixels/sec (e.g. 2560x1600 @ 60Hz)
- Two ports up to 85 Mpixels/sec (e.g. WUXGA+ @ 60Hz) each
• Built-in Video, 2D graphics and 3D graphics processors
• Supports OpenCL, OpenVG 1.1 and 1080p/720p decoder/encoder
• Supports I2S interface
• One Atheros AR8033 Ethernet PHY
• Supports 10Mbps, 100Mbps and 1Gbps data transmission
• Supports 1 SATA 2.0 interface (Quad and Dual processors only)
• SATA speed up to 3Gb/s (SATA 2.0)
• Supports 4GB (standard), 8GB and 16GB eMMC onboard
DDR3 delivers increased system bandwidth and improved performance. The advantages of
DDR3 are its higher bandwidth and its increase in performance at a lower power than DDR2.
• Graphics
The integrated Intel® HD graphics engine delivers an excellent blend of graphics performance
and features to meet business needs. It provides excellent video and 3D graphics with outstanding graphics responsiveness. These enhancements deliver the performance and compatibility needed for today’s and tomorrow’s business applications. Supports HDMI and LVDS
display outputs.
• Serial ATA
Serial ATA is a storage interface that is compliant with SATA 2.0a specification. With speed of
up to 3Gb/s (SATA 2.0), it improves hard drive performance faster than the standard parallel
ATA whose data transfer rate is 100MB/s. The bandwidth of the SATA 3.0 will be limited by
carrier board design.
• Gigabit LAN
The Atheros AR8033 Ethernet Phy controller supports up to 1Gbps data transmission.
Important:
The DFI FS700 Series Qseven module provides Gigabit Ethernet with one Atheros
AR8033 Ethernet PHY. The maximum throughput that the Gigabit Ethernet performs is
limited to 470Mbps (total for Tx and Rx) due to internal bus limitations based on Freescale’s Errata ERR004512. The actual measurement of the Gigabit Ethernet controller
used on the FS700 Series system board is up to 380Mbps. This difference might be
caused by the software configuration, network environment or equipment.
Specification Comparison Table
The table below shows the Qseven standard specifications and the corresponding specifications
supported on the FS700 module.
System I/O Interface
PCI Ex
ress Lanes01 (x1 link
Serial ATA channels0021
USB 2.0
orts3485
LVDS channels00Dual Channel 24bits2
Port, TMDS
Dis
High Definition
udio/AC'97
Ethernet 10/100
Mbit
abi
ressCard support0020
Ex
Low Pin Count bus0010
Secure Digital I/O 8-bi
for SD/MMC cards
S
stem Management0110
2
C Bus
I
SPI Bus0011
CAN Bus0011
Trigge
Watchdo
Power Button1111
Power Good1111
Reset Button1111
LID Button0011
Slee
Button0011
Suspend To RAM (S3
mode
Wake0011
Batter
low alarm0011
Thermal control0010
FAN control0010
RM/RISC Based
Minimum Confi
0011
001
001 (Gigabit Ethernet)1
0011
1112
1110
0011
uration
X86 Based Minimum
Configuration
Maximum
Configuration
41
DFI FS700 Series
Configuration
2
S
I
• USB
The system board supports USB 2.0 and USB 1.1 ports. USB 1.1 supports 12Mb/second bandwidth while USB 2.0 supports 480Mb/second bandwidth providing a marked improvement in
device transfer speeds between your computer and a wide range of simultaneously accessible
external Plug and Play peripherals.
• Watchdog Timer
The Watchdog Timer function allows your application to regularly “clear” the system at the set
time interval. If the system hangs or fails to function, it will reset at the set time interval so
that your system will continue to operate.
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Chapter 2 - Hardware Installation
24 bits LVDS
Backlight
C 2
HDMI
24 bits LVDS
USBOTG
SDIO (SD3)
SATA
CAN Bus
PCIe
SPI 1
UART5
Power
ON
Reset
Power
Board Layout
Chapter 2
Block Diagram
24 bits LVDS
Boot Device Select
234
(Switch)
1
ON
DDR3DDR3
Freescale
i.MX6 Series
microSD
eMMC
PMIC
MMPF0100
USB HUB
USB2514BI
Top View
24 bits LVDS
Backlight
2
C 2
I
HDMI
RGMIIMDI
GLAN PHY
AMXM Golden Finger
UART5
SATA
PCIe
SPI 1
CAN Bus
SDIO (SD3)
HDA (I2S)
Freescale
i.MX6
SD4
SD2
I2C
MIPI CSI
UART1
DDR3
eMMC
micro SD
Sensor
Camera
Power ON
Reset
Bottom View
USB OTG
DDR3DDR3
Atheros
AR8033
USB 0-3USB
Power
USB Hub
Power
PMIC
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Chapter 2
Mechanical Diagram
FS700 Series Module
23.65
0.00
3.00
18.00
38.92
52.00
67.00
70.00
0.00
2.50
56.50
64.90
70.00
3.95
11.53
Top View
66.06
Important:
Electrostatic discharge (ESD) can damage your processor, disk drive and other components. Perform the upgrade instruction procedures described at an ESD workstation only. If such a station is not available, you can provide some ESD protection by
wearing an antistatic wrist strap and attaching it to a metal part of the system chassis. If a wrist strap is unavailable, establish and maintain contact with the system
chassis throughout any procedures requiring ESD protection.
System Memory
The system board is equipped two 1GB onboard system memorys that support DDR3.
DDR3
DDR3
Bottom View
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Chapter 2
MXM Connector
MXM Connector
The MXM connector is used to interface with the carrier board. Insert FS700 series to the MXM
connector on the carrier board. Refer to the following pages for the pin functions of this connector.
Refer to “Installing FS700 Series onto a Carrier Board” section for more information.
PCIE0_TX+
PCIE0_TXPCIE_CLK_REF+155
PCIE_CLK_REF-157
PCIE_WAKE#156I CMOS3.3V Suspend/3.3VPCI Express Wake Event: Sideband wake signal asserted by components requesting wakeup.
PCIE_RST#158O CMOS3.3V/3.3VReset Signal for external devices.
Express Card Support Pins
SignalPin#Pin TypePwr Rail /ToleranceDFI-FS700 SeriesCarrier BoardDescription
Reference clock output for all PCI Express and PCI Express Graphics
lanes.
Gigabit Ethernet Controller 0: Media Dependent Interface Differential
Pairs 0,1,2,3. The MDI can operate in 1000, 100 and 10 Mbit / sec
modes. Some pairs are unused in some modes, per the following:
1000BASE-T 100BASE-TX 10BASE-T
MDI[0]+/- B1_DA+/- TX+/- TX+/ MDI[1]+/- B1_DB+/- RX+/- RX+/ MDI[2]+/- B1_DC+/ MDI[3]+/- B1_DD+/-
Gigabit Ethernet Controller 0 1000 Mbit / sec link indicator, active low.
Gigabit Ethernet Controller 0 1000 Mbit / sec link indicator, active low.
Gigabit Ethernet Controller 0 activity indicator, active low.
Serial ATA or SAS Channel 0 receive differential pair.
Serial ATA or SAS Channel 0 transmit differential pair.
Important:
The DFI FS700 Series Qseven module provides Gigabit Ethernet with one Atheros
AR8033 Ethernet PHY. The maximum throughput that the Gigabit Ethernet performs is
limited to 470Mbps (total for Tx and Rx) due to internal bus limitations based on Freescale’s Errata ERR004512. The actual measurement of the Gigabit Ethernet controller
used on the FS700 Series system board is up to 380Mbps. This difference might be
caused by the software configuration, network environment or equipment.
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Chapter 2
USB Interface Signals
SignalPin#Pin TypePwr Rail /ToleranceDFI-FS700 SeriesCarrier BoardDescription
SDIO_CD#43I/O CMOS3.3V/3.3VSDIO Card Detect. This signal indicates when a SDIO/MMC card is present.
SDIO_CLK42O CMOS3.3V/3.3VSDIO Clock. With each cycle of this signal a one-bit transfer on the command and each data line occurs. This signal has maximum frequency of 48 MHz.
SDIO_CMD45I/O OD/PP CMOS3.3V/3.3V
SDIO_LED44O CMOS3.3V/3.3VSDIO LED. Used to drive an external LED to indicate when transfers occur on the bus.
SDIO_WP46I/O CMOS3.3V/3.3VSDIO Write Protect. This signal denotes the state of the write-protect tab on SD cards.
SDIO_PWR#47O CMOS3.3V/3.3VSDIO Power Enable. This signal is used to enable the power being supplied to a SD/MMC card device.
SDIO_DAT0-748-55I/O PP CMOS3.3V/3.3VSDIO Data lines. These signals operate in push-pull mode
High Definition Audio Signals/AC'97
SignalPin#Pin TypePwr Rail /ToleranceDFI-FS700 SeriesCarrier BoardDescription
PU 10k to 3.3VSBConnect to Overcurrent of USB Power Switch
PU 10k to 3.3VSBConnect to Overcurrent of USB Power Switch
PU 10k to 3.3VSBConnect to Overcurrent of USB Power Switch
Connect 90ಳ @100MHz Common Choke in series and ESD
suppressors to GND to USB connector
Connect 90ಳ @100MHz Common Choke in series and ESD
suppressors to GND to USB connector
Connect 90ಳ @100MHz Common Choke in series and ESD
suppressors to GND to USB connector
Connect 90ಳ @100MHz Common Choke in series and ESD
suppressors to GND to USB connector
Connect 90ಳ @100MHz Common Choke in series and ESD
suppressors to GND to USB connector
Universal Serial Bus Port 0 differential pair.I/O USB
Universal Serial Bus Port 1 differential pair.This port may be optionally used as USB client port.
Universal Serial Bus Port 2 differential pair.
Universal Serial Bus Port 3 differential pair.
Universal Serial Bus Port 4 differential pair.
USB over-current sense, USB channels 0 and 1. A pull-up for this line shall be present on the Module. An open drain driver from a USB current monitor on the Carrier Board may drive this line
low.
Do not pull this line high on the Carrier Board.
USB over-current sense, USB channels 0 and 1. A pull-up for this line shall be present on the Module. An open drain driver from a USB current monitor on the Carrier Board may drive this line
low.
Do not pull this line high on the Carrier Board.
USB over-current sense, USB channels 0 and 1.
A pull-up for this line shall be present on the Module. An open drain driver from a USB current monitor on the Carrier Board may drive this line low.
Do not pull this line high on the Carrier Board.
USB ID pin.Configures the mode of the USB Port 1. If the signal is detected as being 'high active' the BIOS will automatically configure USB Port 1 as USB Client and enable USB Client support.
This signal should be driven as OC signal by external circuitry.
USB Client Connect pin.If USB Port 1 is configured for client mode then an externally connected USB host should set this signal to high-active in order to properly make the connection with the
module's internal USB client controller.
If the external USB host is disconnected, this signal should be set to low-active in order to inform the USB client controller that the external host has been disconnected.
A level shifter/protection circuitry should be implemented on the carrier board for this signal.
SDIO Command/Response. This signal is used for card initialization and for command transfers. During initialization mode this signal is open drain. During command transfer this signal is in pushpull mode.
HDMI_CTRL_CLK (SDVO_CTRL_CLK)152I/O OD CMOS3.3V/3.3V
HDMI_CTRL_DAT (SDVO_CTRL_DAT)150I/O OD CMOS3.3V/3.3V
HDMI_HPD#153I CMOS3.3V/3.3V
O LVDS
O LVDS
O LVDS
O LVDS
O LVDS
O LVDS
O LVDS
O LVDS
O LVDS
O LVDS
O TMDS
O TMDS
O TMDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
LVDS
TMDS
TMDS
TMDS
TMDSO TMDS
PU 4.7K to 3.3VConnect to DDC clock of LVDS panel
PU 4.7K to 3.3VConnect to DDC data of LVDS panel
PU 4.7K to 3.3V
PU 4.7K to 3.3V
PU 4.7K to 3.3V
PU 4.7K to 3.3V
Connect to enable control of LVDS panel power circuit
Connect to enable control of LVDS panel backlight pow
Connect to brightness control of LVDS panel backlight power
circuit
circuit.
Connect to LVDS connector
Connect to LVDS connector
Connect to LVDS connector
Connect to LVDS connector
Connect to LVDS connector
Connect to LVDS connector
Connect to LVDS connector
Connect to LVDS connector
Connect to LVDS connector
Connect to LVDS connector
Connect AC Coupling Capacitors 0.1uF to Device
Connect AC Coupling Capacitors 0.1uF to Device
Connect AC Coupling Capacitors 0.1uF to Device
Connect AC Coupling Capacitors 0.1uF to Device
Connect AC Coupling Capacitors 0.1uF to Device
Connect AC Coupling Capacitors 0.1uF to Device
Connect AC Coupling Capacitors 0.1uF to Device
Connect AC Coupling Capacitors 0.1uF to Device
PD 1M and Connect to device Hot Plug Detect
Controls panel power enable.
Controls panel Backlight enable.
Primary functionality is to control the panel backlight brightness via pulse width modulation (PWM).
When not in use for this primary purpose it can be used as General Purpose PWM Output.
LVDS Channel A differential pairs
Ther LVDS flat panel differential pairs (LVDS_A[0:3]+/-, LVDS_B[0:3]+/-. LVDS_A_CK+/-,
LVDS_B_CK+/-) shall have 100ƻ terminations across the pairs at the destination. These
terminations may be on the Carrier Board if the Carrier Board implements a LVDS deserializer
on-board
LVDS Channel A differential clock
LVDS Channel B differential pairs
Ther LVDS flat panel differential pairs (LVDS_A[0:3]+/-, LVDS_B[0:3]+/-. LVDS_A_CK+/-,
LVDS_B_CK+/-) shall have 100ƻ terminations across the pairs at the destination. These
terminations may be on the Carrier Board if the Carrier Board implements a LVDS deserializer
on-board
LVDS Channel B differential clock
Primary functionality is DisplayID DDC clock line used for LVDS flat panel detection. If primary functionality is not used it can be as General Purpose I²C bus clock line.
Primary functionality DisplayID DDC data line used for LVDS flat panel detection. If primary functionality is not used it can be as General Purpose I²C bus data line.
Control clock signal for external SSC clock chip.
Control data signal for external SSC clock chip.
TMDS differential pair clock lines.
TMDS differential pair lines lane 0.
TMDS differential pair lines lane 1.
TMDS differential pair lines lane 2.
DDC based control signal (clock) for HDMI device.
Note: Level shifters must be implemented on the carrier board for this signal in order to be compliant with the HDMI Specification.
DDC based control signal (data) for HDMI device.
Note: Level shifters must be implemented on the carrier board for this signal in order to be compliant with the HDMI Specification
Hot plug detection signal that serves as an interrupt request.
CAN Bus Interface Signals
SignalPin#Pin TypePwr Rail /ToleranceDFI-FS700 SeriesCarrier BoardDescription
CAN0_TX129O CMOS3.3V/3.3V
CAN0_RX130I CMOS3.3V/3.3VRX input for CAN Bus channel 0. In order to connect a CAN controller device to the Qseven module's CAN bus it is necessary to add transceiver hardware to the carrier board.
Power Control Signals
SignalPin#Pin TypePwr Rail /ToleranceDFI-FS700 SeriesCarrier BoardDescription
PWGIN26I CMOS5V/5VHigh active input for the Qseven® module indicates that all power rails located on the carrier board are ready for use.
PWRBTN#20I CMOS3.3V StandbyPower Button: Low active power button input. This signal is triggered on the falling edge.
Power Management Signals
SignalPin#Pin TypePwr Rail /ToleranceDFI-FS700 SeriesCarrier BoardDescription
RSTBTN#28I CMOS3.3V/3.3VReset button input. This input may be driven active low by an external circuitry to reset the Qseven module.
BATLOW#27I CMOS3.3V Suspend/3.3VBattery low input. This signal may be driven active low by external circuitry to signal that the system battery is low or may be used to signal some other external battery management event.
WAKE#17I CMOS3.3V Suspend/3.3VExternal system wake event. This may be driven active low by external circuitry to signal an external wake-up event.
SUS_STAT#19O CMOS3.3V Suspend/3.3VSuspend Status: indicates that the system will be entering a low power state soon.
SUS_S3#18O CMOS3.3V Suspend/3.3V
SUS_S5#16O CMOS3.3V Suspend/3.3VS5 State: This signal indicates S4 or S5 (Soft Off) state.
SLP_BTN#21I CMOS3.3V Suspend/3.3VSleep button. Low active signal used by the ACPI operating system to transition the system into sleep state or to wake it up again. This signal is triggered on falling edge.
WDTRIG#70I CMOS3.3V/3.3VWatchdog trigger signal. This signal restarts the watchdog timer of the Qseven module on the falling edge of a low active pulse.
WDOUT72O CMOS3.3V/3.3VWatchdog event indicator. High active output used for signaling a missing watchdog trigger. Will be deasserted by software, system reset or a system power down.
I2C_CLK66I/O OD CMOS3.3V/3.3V
I2C_DAT68I/O OD CMOS3.3V/3.3V
SMB_CLK60I/O OD CMOS3.3V Suspend/3.3V
SMB_DAT62I/O OD CMOS3.3V Suspend/3.3V
SMB_ALERT#64O CMOS3.3V/3.3VSystem Management Bus Alert input. This signal may be driven low by SMB devices to signal an event on the SM Bus.
SPKR/GP_PWM_OUT2194O CMOS3.3V/3.3VPrimary functionality is output for audio enunciator, the“speaker” in PC AT systems. When not in use for this primary purpose it can be used as General Purpose PWM Output.
BIOS_DISABLE#/BOOT_ALT#41I CMOS3.3V/3.3V
RSVD56,124, NCDo not connect
3.3V Suspend/3.3V
3.3V Suspend/3.3V
3.3V Suspend/3.3V
3.3V Suspend/3.3V
PU 4.7K to 3.3V
PU 4.7K to 3.3V
PU 4.7K to 3.3V
PU 4.7K to 3.3V
PU 10K to 3.3V
Connect a series resistor 33ȟ to Carrier Board SPI Device SI pin
Connect a series resistor 33ȟ to Carrier Board SPI Device SO pin
Connect a series resistor 33ȟ to Carrier Board SPI Device SCK pin
Connect a series resistor 33ȟ to Carrier Board SPI Device CS# pin
Master serial output/Slave serial input signal. SPI serial output data from Qseven module to the SPI device.
Master serial input/Slave serial output signal. SPI serial input data from the SPI device to Qseven module.
SPI clock output.
SPI chip select 0 output.
CAN (Controller Area Network) TX output for CAN Bus channel 0.
In order to connect a CAN controller device to the Qseven module's CAN bus it is necessary to add transceiver hardware to the carrier board.
S3 State: This signal shuts off power to all runtime system components that are not maintained during S3 (Suspend to Ram), S4 or S5 states.
The signal SUS_S3# is necessary in order to support the optional S3 cold power state.
LID button. Low active signal used by the ACPI operating system to detect a LID switch and to bring system into sleep state or to wake it up again.
Open/Close state may be software configurable.
Clock line of I²C bus.
Data line of I²C bus.
Clock line of System Management Bus.
Data line of System Management Bus.
Module BIOS disable input signal. Pull low to disable module's on-board BIOS.
Allows off-module BIOS implementations. This signal can also be used to disable standard boot firmware flash device and enable an alternative boot firmware source, for example a boot loader.
THRM#69I CMOS3.3V/3.3VThermal Alarm active low signal generated by the external hardware to indicate an over temperature situation. This signal can be used to initiate thermal throttling.
THRMTRIP#71O CMOS3.3V/3.3VThermal Trip indicates an overheating condition of the processor. If 'THRMTRIP#' goes active the system immediately transitions to the S5 State (Soft Off).
Fan Control Implementation
SignalPin#Pin TypePwr Rail /ToleranceDFI-FS700 SeriesCarrier BoardDescription
FAN_PWMOUT/GP_PWM_OUT1196O CMOS3.3V/3.3V
FAN_TACHOIN/GP_TIMER_IN195I CMOS3.3V/3.3VPrimary functionality is fan tachometer input. When not in use for this primary purpose it can be used as General Purpose Timer Input.
Input Power Pins
SignalPin#Pin TypePwr Rail /ToleranceDFI-FS700 SeriesCarrier BoardDescription
This pin is reserved for manufacturing and debugging purposes.
May be used as JTAG_TCK signal for boundary scan purposes during production or as a vendor specific control signal. When used as a vendor specific control signal the multiplexer must be
controlled by the MFG_NC4 signal.
This pin is reserved for manufacturing and debugging purposes.
May be used as JTAG_TDO signal for boundary scan purposes during production. May also be used, via a multiplexer, as a UART_TX signal to connect a simple UART for firmware and boot loader
implementations. In this case the multiplexer must be controlled by the MFG_NC4 signal.
This pin is reserved for manufacturing and debugging purposes.
May be used as JTAG_TDI signal for boundary scan purposes during production. May also be used, via a multiplexer, as a UART_RX signal to connect a simple UART for firmware and boot loader
implementations. In this case the multiplexer must be controlled by the MFG_NC4 signal.
This pin is reserved for manufacturing and debugging purposes.
May be used as JTAG_TMS signal for boundary scan purposes during production. May also be used, via a multiplexer, as vendor specific BOOT signal for firmware and boot loader
implementations. In this case the multiplexer must be controlled by the MFG_NC4 signal.
This pin is reserved for manufacturing and debugging purposes.
May be used as JTAG_TRST# signal for boundary scan purposes during production. May also be used as control signal for a multiplexer circuit on the module enabling secondary function for
MFG_NC0..3
( JTAG / UART ).
When MFG_NC4 is high active it is being used for JTAG purposes.
When MFG_NC4 is low active it is being used for UART purposes.
Primary functionality is fan speed control. Uses the Pulse Width Modulation (PWM) technique to control the Fan's RPM based on the CPU's die temperature.
When not in use for this primary purpose it can be used as General Purpose PWM Output.
3 V backup cell input. VCC_RTC should be connected to a 3V backup cell for RTC operation and storage register non-volatility in the absence of system power.
(VCC_RTC = 2.4 - 3.3 V).
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Chapter 2
Installing FS700 Series onto a Carrier Board
Important:
The carrier board used in this section is for reference purpose only and may not
resemble your carrier board. These illustrations are mainly to guide you on how to
install FS700 Series onto the carrier board of your choice.
1. The photo below shows the locations of the mounting holes and the bolts already fixed in
place.
Mounting holeStandoff Bolts
3. Press down FS700 Series and use the mounting screw to fix FS700 Series on place.
Carrier board
FS700 Series
Short screws
2. Grasp FS700 Series by its edges, insert it into the carrier board, and you will hear a
distinctive¨click¨ indicating FS700 Series is correctly locked into the position.
FS700 Series
Carrier board
17
www.dfi .comChapter 2 Hardware Installation
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