All rights reserved.
No part of this document may be copied or reproduced
in any form or by any means without the prior written
consent of DFI, Inc.
DFI, Inc. makes no warranties with respect to this
documentation and disclaims any implied warranties of
merchantability, quality, or fitness for any particular
purpose. The information in this document is subject to
change without notice. DFI, Inc. reserves the right to
make revisions to this publication and to make changes
to any and/or all parts of its content, at any time,
without obligation to notify any person or entity of such
changes. Further, DFI, Inc. assumes no responsibility
for any errors that may appear in this document.
DFI is a registered trademark, and E586-ICP/E586-IPE
is a trademark of Diamond Flower, Inc. All other
product names mentioned are trademarks or registered
trademarks of their respective companies.
vFCC Statement on Class B
This equipment has been tested and found to comply
with the limits for a Class B digital device, pursuant to
Part 15 of the FCC rules. These limits are designed to
provide reasonable protection against harmful interference when the equipment is operated in a residential
installation. This equipment generates, uses, and can
radiate radio frequency energy and if not installed and
used in accordance with the instruction manual may
cause harmful interference to radio communications.
However, there is no guarantee that interference will not
occur in a particular installation. If this equipment does
cause harmful interference to radio or television reception, which can be determined by turning the equipment
off and on, the user is encouraged to try to correct the
interference by one or more of the following measures:
•Reorient or relocate the receiving antenna.
•Increase the separation between the equipment and
the receiver.
•Connect the equipment into an outlet on a circuit
different from that to which the receiver is
connected.
•Consult the dealer or an experienced radio TV
technician for help.
Notice:
1. The changes or modification not expressly approved
by the party responsible for compliance could void
the user's authority to operate the equipment.
2. Shielded interface cables must be used in order to
comply with the emission limits.
Appendix G: Award BIOS Hard Disk Table ...........................
A-1
B-1
C-1
D-1
E-1
F-1
G-1
This page left intentionally blank.
Read Me First
The E586-ICP/E586-IPE system board requires the installation
of the ECU (EISA Configuration Utility), found on the
provided EISA Configuration Utility diskette, for proper
operation of this system board.
The ECU configures the EISA devices and maintains system
parameters by storing them in the Extended CMOS Memory, so
the BIOS can initialize the system and expansion boards
inserted in the EISA slots once you power up your system.
The Extended CMOS Memory is equipped with an internal
battery that needs to be constantly charged. In a small number
of cases, the internal battery may have drained and the
information stored in the Extended CMOS Memory lost during
shipment. If this happens, you will get the message "EISACMOS Inoperational" when you power up your system.
Simply run the ECU software, bundled with the system board,
to reconfigure the system. Save the configuration and reboot
your system. Refer to the EISA Configuration Utility section on
page 4-1 for more detailed information.
EISA/PCI System Board
v Introduction
The E586-ICP/E586-IPE system board offers several
advanced features integrated into the system board. It is
designed based on the new PCI (Peripheral Component
Interconnect) local bus and EISA (Extended Industry
Standard Architecture) standards.
The E586-ICP/E586-IPE supports 273-pin Zero Insertion Force socket for PentiumTM processors running at
60MHz or 66MHz bus speed. It also supports an optional Flash EPROM. Flash EPROM is a memory chip
for the storage of BIOS which can be erased in bulk or
modified using a software utility.
The E586-ICP/E586-IPE comes with an EISA Configuration Utility (ECU) that must be installed and run to
configure the board and the EISA expansion boards that
will be inserted in the EISA expansion slots.
The E586-ICP/E586-IPE system board is equipped with
four EISA and four PCI local bus slots. One EISA slot
and one PCI slot are shared, meaning you may use only
one or the other of these three slots. Therefore, in
accord with the PCI standard, seven slots are useable.
The E586-ICP/E586-IPE is also equipped with one
mini-DIN-6 connector for the PS/2 mouse and an optional IDE disk interface, only if installed with the
Symphony SL82C101P chip.
The E586-ICP/E586-IPE can be configured to twentytwo different sizes from 2MB to 128MB using 256Kx36,
512Kx36, 1Mx36, 2Mx36, 4Mx36 and 8Mx36 HSIM
modules.
1-1 u Introduction
Features and Specifications
• Microprocessor
PentiumTM Processor
• Chipset
Intel 82430 PCI: system
Symphony SL82C101P: PCI IDE (optional)
• BIOS
Award system BIOS
• Cache Memory
256K or 512K Burst (sync) SRAM for 3-1-1-1
Level 2 cache access (E586-ICP)
256K or 512K Async SRAM for 3-2-2-2 Level 2
cache access (E586-IPE)
Supports direct map write-back or write-through
cache subsystem
Integrated cache tag RAM
• Memory Onboard
2MB to 128MB
E586-ICP/E586-IPE
• DRAM Type
256Kx36, 512Kx36, 1Mx36, 2Mx36, 4Mx36 and
8Mx36 SIMM
Supports single and/or double density SIMMs
Supports DRAM access time of 60ns or 70ns
Supports page mode
• ZIF Socket
273-pin ZIF socket (Intel Socket 4)
Introduction u 1-2
EISA/PCI System Board
• Slots
Three 32-bit PCI slots
One shared - PCI/EISA slot
Three 32-bit EISA slots
• Connectors
A mini-DIN-6 connector for the PS/2 mouse
One IDE disk interface (optional; only if installed
with the Symphony SL82C101P chip)
• Tooling Holes
Baby AT form factor
• PCB
4 layers
Package Checklist
The E586-ICP/E586-IPE package contains the following
items:
• The E586-ICP/E586-IPE system board
• The E586-ICP/E586-IPE user’s manual
• One EISA Configuration Utility diskette
• One DB-25S hole cover holding the PS/2 mouse port
• One 40-pin IDE hard disk cable (optional)
If any of these items is missing or damaged, please
contact your dealer or sales representative for assistance.
1-3 u Introduction
vInstallation Overview
This chapter summarizes the steps in installing the
E586-ICP/E586-IPE system board into your system unit.
It also includes a description of the area in which you
must work and directions for memory installation.
Before installing the system board, obtain the memory
you plan to install.
Preparing the Area
Before unpacking the system board, make sure the
location you have selected is relatively free of dust and
static. Excessive exposure to dust, static electricity,
direct sunlight, excessive humidity, extreme cold and
water can damage the operational capabilities of your
system board. Avoid soft surfaces such as beds and
carpeted floors which can hinder air circulation. These
areas also attract static electricity which can damage
some circuits on your system board.
E586-ICP/E586-IPE
Be sure that the power source has a properly grounded,
three-pronged socket. It is essential that the power
connection be properly grounded for correct functioning
of your system board. For further protection, we recommend that you use a surge protection socket. This will
protect the system board from damage that may result
from a power surge on the line.
Move items that generate magnetic fields away from
your system board, since magnetic fields can also damage your system board. Once you have selected the ideal
location, unpack the E586-ICP/E586-IPE system board
carefully.
Installation Overview u 2-1
EISA/PCI System Board
Handling the System Board
It is quite easy to inadvertently damage your system
board even before installing it to your system unit.
Static electrical discharge can damage computer components without causing any signs of physical damage. You
must take extra care in handling the system board to
ensure that no static build-up is present.
Tips in Handling the System Board
1) To prevent electrostatic build-up, leave the board in
its anti-static bag until you are ready to install it.
2) Wear an antistatic wriststrap.
3) Do all preparation work on a static-free surface with
components facing up.
4) Hold the system board by its edges only. Be careful
not to touch any of the components, contacts or
connections, especially gold contacts on the board.
5) Avoid touching the pins or contacts on all modules
and connectors. Hold modules and connectors by
their ends.
Hardware Installation
Memory Installation
The E586-ICP/E586-IPE system board can support 2MB
to 128MB of memory using HSIMMs. HSIMM is an
acronym for High Density Single In-line Memory Module.
2-2 u Installation Overview
E586-ICP/E586-IPE
An HSIMM consists of several RAM chips soldered
onto a small circuit board. An HSIMM connects to the
system board via a 72-pin card-edge connector.
The HSIMM sockets are divided into two banks on the
system board. The E586-ICP/E586-IPE system board
uses 256Kx36, 512Kx36, 1Mx36, 2Mx36, 4Mx36 and
8Mx36 HSIM modules.
You will need 2 to 4 pieces of HSIM modules, depending on the amount of memory you intend to install.
Your system board can be configured with 2MB, 4MB,
6MB, 8MB, 10MB, 12MB, 16MB, 18MB, 20MB,
24MB, 32MB, 34MB, 36MB, 40MB, 48MB, 64MB,
66MB, 68MB, 72MB, 80MB, 96MB or 128MB of
onboard memory.
To install the HSIM modules, first populate Bank 1 and
then Bank 2. Failure to do so will cause the system
board to work improperly.
The following table summarizes the bank locations and
modules needed for the corresponding memory sizes.
Each bank consists of 2 HSIMM sockets.
Locations of the HSIMM Sockets on the System Board
Installation Overview u 2-5
EISA/PCI System Board
Installing the Modules
HSIMMs simply snap into a socket on the system board.
Pin 1 of the HSIMM must correspond with Pin 1 of the
socket.
1. Position the HSIM module above the HSIMM
socket with the chips of the module facing the center
of the system board.
2. Seat the module at an angle into the bank. Make
sure it is completely seated. Tilt the module upright
until it locks in place in the socket.
2-6 u Installation Overview
Board Configuration
The E586-ICP/E586-IPE is designed with jumpers and
connectors onboard. Make sure that the jumpers are set
correctly before installing the system board into your
system unit.
E586-ICP/E586-IPE
J1
SL82C101P
JP1
JP2
PL1PL2
JP3
JP5
PCI Slot - Slave
PCI Slot - Master/Slave
PCI Slot - Master/Slave
PCI Slot - Master/Slave
EISA Slot
EISA Slot
EISA Slot
EISA Slot
J2
82433LX
JP6
82434
82375
82374
JP7
JP8
JP13
JP10
JP12
JP11
EPROM
82433LX
JP14
Flash
Locations of Jumpers and Connectors
on the E586-ICP System Board
JP15
JP18
JP16
JP22
JP24
JP27
JP19-JP21
ZIF
Socket
JP23
JP25
J3
J4
J6
J7
JP26
JP28
Installation Overview u 2-7
EISA/PCI System Board
J1
SL82C101P
JP70
JP1
JP2
PL1PL2
JP3
JP5
PCI Slot - Slave
PCI Slot - Master/Slave
PCI Slot - Master/Slave
PCI Slot - Master/Slave
EISA Slot
EISA Slot
EISA Slot
EISA Slot
J2
82433LX
JP8
JP6
JP10
82434
JP12
82375
82374
JP11
JP7
JP13
EPROM
Locations of Jumpers and Connectors
on the E586-IPE System Board
82433LX
JP15
JP16
JP14
Flash
JP17
JP18
JP22
ZIF
Socket
JP23
J3
J4
J6
J7
JP26
JP28
2-8 u Installation Overview
Jumper Settings
Jumper JP1
PCI Edge-Triggered Interrupt
Jumper JP1 is used to select the PCI edge-triggered
interrupt of the E586-ICP/E586-IPE system board. Set
JP1 according to the table shown below.
E586-ICP/E586-IPE
JP1
1-2 On
3-4 On
5-6 On
7-8 On
9-10 On
IRQ
15
2
1
AABC
IRQ
14
INT
Int. A
Int. A
Int. B
Int. C
Int. D
IRQ
11
IRQ
10
IRQ
IRQ15
IRQ14
IRQ11
IRQ10
IRQ9
IRQ
9
10
9
D
Installation Overview u 2-9
EISA/PCI System Board
Jumpers JP3 and JP5
Built-in IDE
The E586-ICP/E586-IPE system board is equipped with
a built-in IDE disk interface, only if installed with the
Symphony SL82C101P chip. Set JP5 to On to enable the
built-in IDE. Set JP3 to On to disable the built-in IDE.
JP3JP5
On: IDE Disabled
(Default)
Jumpers JP6 and JP8
Parity Enable/Disable
Set Jumpers JP6 and JP8 to On to enable the SRAM’s
parity bit.
On: Parity Enabled
(Default)
On: IDE Enabled
Off: Parity Disabled
2-10 u Installation Overview
Jumper JP7
PS/2 Mouse
The E586-ICP/E586-IPE package includes a DB-25S
hole cover that holds the PS/2 mouse port. The PS/2
mouse port uses IRQ12. If you set Jumper JP7 to
IRQ12 enable, make sure you connect the PS/2 mouse
port to Connector J1.
Jumper JP11
Display Type Select
Jumper JP11 sets the display adapter to color or mono.
This jumper must match the type of display adapter
installed. If you change your video adapter, make sure
this jumper is changed accordingly.
E586-ICP/E586-IPE
Off: IRQ12 DisabledOn: IRQ12 Enabled
(Default)
321
1-2 On: Color
(Default)
Installation Overview u 2-11
321
2-3 On: Mono
EISA/PCI System Board
Jumper JP13
Password Clear
If you set a password in the “Password Setting” option
and forget your password, power off your system and
set Jumper JP13 to On to clear the password stored in
your CMOS. Now power on your system. After your
system has detected the floppy or hard drive, turn it off
again and set JP13 to Off.
Jumper JP26
Flash EPROM
Jumper JP26 should be set to match the type of Flash
EPROM installed on the E586-ICP/E586-IPE system
board. See page 2-7 and 2-8 for the location of the Flash
EPROM installed on your system board.
On: Clear Password
321
1-2 On: Flash EPROM
(Default)
Off: Normal
(Default)
321
2-3 On: Normal EPROM
2-12 u Installation Overview
Cache Configuration
The E586-ICP/E586-IPE system board can be configured to two different cache sizes: 256KB and 512KB.
256KB of cache memory is the default size.
The system board supports direct map write-back or
write-through cache subsystem with tag RAM integrated
into the chipset.
The E586-ICP uses Burst SRAM for fast 3-1-1-1 Level
2 cache access. The E586-IPE uses Async SRAM for
3-2-2-2 Level 2 cache access.
E586-ICP/E586-IPE
82433LX82433LX
SL82C101P
82434
82375
82374
SRAM
SRAM
ZIF
Socket
Locations of the SRAMs on the E586-ICP System Board
Installation Overview u 2-13
SRAM
SRAM
EISA/PCI System Board
SL82C101P
Locations of the SRAMs on the E586-IPE System Board
82433LX82433LX
82434
82375
82374
SRAM
SRAM
SRAM
SRAM
ZIF
Socket
SRAM
SRAM
SRAM
SRAM
2-14 u Installation Overview
Jumper Setting for Cache Memory
Jumper JP15
Level 1 Cache
The Level 1 cache of the PentiumTM processor supports
Write Back and Write Through cache subsystem. Set
JP15 as shown below.
On: Write ThroughOff: Write Back
Jumpers JP22 and JP23
Level 2 Cache
If you have upgraded the cache size of your E586-ICP/
E586-IPE system board, change Jumpers JP22 and JP23
as shown below.
E586-ICP/E586-IPE
(Default)
L2 Cache
1-2: On
JP23
2-3 On
2-3 On
1-2 On
321
512KB
256KB*
None
321
JP22
2-3 On
1-2 On
1-2 On
2-3: On
Installation Overview u 2-15
EISA/PCI System Board
CPU Installation
The E586-ICP/E586-IPE is equipped with a 273-pin
Zero Insertion Force (ZIF) socket on location U29 of
the system board. Make sure the jumpers are set
correctly before applying power, or you may damage the
CPU or system board.
SL82C101P
82433LX82433LX
82434
U29
82375
ZIF
Socket
82374
Location of Pin 1
Location of the ZIF Socket on the E586-ICP/E586-IPE System Board
2-16 u Installation Overview
Jumper Settings for CPU
Jumper JP18
CPU Speed
Set Jumper JP18 according to the speed of the CPU
installed on the E586-ICP/E586-IPE system board.
E586-ICP/E586-IPE
On: 60MHz
Off: 66MHz
(Default)
The jumpers below are for factory testing only and
should always be set to their default configurations.
Reconfiguring these jumpers will cause problems with
your E586-ICP or E586-IPE system board.
JP10: 2-3 On
JP12: On
JP14 and JP16 : Off
JP17 and JP70: Off (E586-IPE)
JP19-JP21, JP24 & JP25: 2-3 On (E586-ICP)
JP27: Off (E586-ICP)
Installation Overview u 2-17
EISA/PCI System Board
Installing Upgrade CPUs
The E586-ICP/E586-IPE is equipped with a 273-pin
Zero Insertion Force (ZIF) socket at location U29 of the
system board.
Warning:
Open the socket only if actually installing a CPU. The
warranty on the original CPU will be voided if the S/N
seal is broken. Installation of the PentiumTM Processor
will not affect the original system warranty.
The 273-pin ZIF socket consists of four rows of pin
holes on each side.
Zero Insertion Force (ZIF) Socket
2-18 u Installation Overview
E586-ICP/E586-IPE
To install, simply move the handle upward. Remove the
original CPU from the socket. Position the CPU above
the socket. Make sure pin 1 of the CPU is aligned with
pin 1 of the socket. Lower the chip until the pins are
inserted properly in their corresponding holes.
Pin 1 of the ZIF Socket
Installation Overview u 2-19
Loading...
+ 67 hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.