
www.dfi .comChapter 1 Introduction
3
Table of Contents
Copyright .............................................................................................................2
Trademarks ........................................................................................................2
FCC and DOC Statement on Class B ..................................................... 2
About this Manual ..........................................................................................4
Warranty ..............................................................................................................4
Static Electricity Precautions ......................................................................4
Safety Measures ..............................................................................................4
About the Package .........................................................................................5
Chapter 1 - Introduction .............................................................................6
Specifications ................................................................................................6
Features ........................................................................................................7
Chapter 2 - Concept .......................................................................8
COM Express Module Standards .............................................................. 8
Specification Comparison Table ...............................................................9
Chapter 3 - Hardware Installation .............................................. 10
Board Layout ...............................................................................................10
Block Diagram ............................................................................................. 10
Mechanical Diagram ..................................................................................11
System Memory .......................................................................................... 12
Installing the DIMM Module .......................................................................12
Connectors ...................................................................................................13
CPU Fan Connector....................................................................................13
COM Express Connectors ...........................................................................14
COM Express Connectors Signal Discription .................................................17
Standby Power LED ................................................................................... 27
Cooling Option ............................................................................................27
Installing CR960-QM77/HM76 onto a Carrier Board ........................ 28
Chapter 4 - BIOS Setup ............................................................... 31
Overview ..................................................................................................... 31
AMI BIOS Setup Utility .............................................................................32
Main .........................................................................................................32
Advanced .................................................................................................. 32
Chipset ..................................................................................................... 41
Boot ......................................................................................................... 47
Security .................................................................................................... 48
Save & Exit ............................................................................................... 49
Updating the BIOS ....................................................................................50
Notice: BIOS SPI ROM .............................................................................51
Chapter 5 - Supported Software .......................................................... 52
Chapter 6 - GPIO Programming Guide...............................................69
Appendix A - nLite and AHCI Installation Guide ...........................70
nLite ............................................................................................................... 70
AHCI ..............................................................................................................74
Appendix B - Watchdog Sample Code ................................................76
Appendix C - System Error Message ................................................... 77
Appendix D - Troubleshooting ................................................................78

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Chapter 1 - Introduction
Specifications
Chapter 1
Processor
• 3rd generation Intel® CoreTM processors (22nm process technology)
- Intel
®
CoreTM i7-3615QE, 6M Cache, up to 3.30 GHz, 45W
- Intel
®
CoreTM i7-3612QE, 6M Cache, up to 3.10 GHz, 35W
- Intel
®
CoreTM i7-3555LE, 4M Cache, up to 3.20 GHz, 25W
- Intel
®
CoreTM i7-3517UE, 4M Cache, up to 2.80 GHz, 17W
- Intel
®
CoreTM i5-3610ME, 3M Cache, up to 3.30 GHz, 35W
- Intel
®
CoreTM i3-3217UE, 3M Cache, 1.60 GHz, 17W
- Intel
®
CoreTM i3-3120ME, 3M Cache, 2.40 GHz, 35W
- Intel
®
CeleronTM 1020E, 2M Cache, 2.20 GHz, 35W
- Intel
®
CeleronTM 1047UE, 2M Cache, 1.40 GHz, 17W
- Intel
®
CeleronTM 927UE, 1M Cache, 1.50 GHz, 17W
• 2nd generation Intel
®
CoreTM processors (32nm process technology)
- Intel
®
CoreTM i7-2715QE, 6M Cache, up to 3.00 GHz, 45W
- Intel
®
CoreTM i7-2655LE, 4M Cache, up to 2.90 GHz, 25W
- Intel
®
CoreTM i7-2610UE, 4M Cache, up to 2.40 GHz, 17W
- Intel
®
CoreTM i5-2515E, 3M Cache, up to 3.10 GHz, 35W
- Intel
®
CoreTM i3-2310E, 3M Cache, 2.10 GHz, 35W
- Intel
®
CoreTM i3-2340UE, 3M Cache, 1.30 GHz, 17W
- Intel
®
CeleronTM B810E, 2M Cache, 1.6GHz, 35W
- Intel
®
CeleronTM 847E, 2M Cache, 1.1GHz, 17W
- Intel
®
CeleronTM 827E, 1.5M Cache, 1.4GHz, 17W
- Intel
®
CeleronTM 807UE, 1M Cache, 1.00 GHz, 10W
Chipset
• Intel® QM77 Express Chipset (CR960-QM77)
• Intel
®
HM76 Express Chipset (CR960-HM76)
System Memory
• Two 204-pin DDR3/DDR3L SODIMM sockets
• 3rd generation processors
- Supports DDR3/DDR3L 1333/1600 MHz (i7/i5/i3)
- Supports DDR3/DDR3L 1066/1333/1600 MHz (i7 Quad Core)
• 2nd generation processors
- Supports DDR3 1066/1333 MHz (i7/i5/i3/Celeron)
- Supports DDR3 1066/1333/1600 MHz (i7 Quad Core)
• Supports dual channel memory interface
• Supports up to 16GB system memory
• DRAM device technologies: 1Gb, 2Gb and 4Gb DDR3 DRAM technologies are
supported for x8 and x16 devices, unbuffered, non-ECC
Serial ATA
• Supports 4 Serial ATA interfaces
• 2 SATA 3.0 with data transfer rate up to 6Gb/s
2 SATA 2.0 with data transfer rate up to 3Gb/s
• Integrated Advanced Host Controller Interface (AHCI) controller
• Supports RAID 0/1/5/10 (CR960-QM77 only)
LAN
• Intel® 82579LM Gigabit Ethernet PHY
• Integrated 10/100/1000 transceiver
• Fully compliant with IEEE 802.3, IEEE 802.3u, IEEE 802.3ab
Expansion
Interfaces
• Supports 4 USB 3.0 ports
• Supports 8 USB 2.0 ports
• Supports 1 PCIe x16 interface
• Supports 7 PCIe x1 interfaces
• Supports LPC interface
• Supports I
2
C interface
• Supports SMBus interface
• Supports 2 serial interfaces (TX/RX)
• Supports 4-bit input and 4-bit output GPIO
Graphics
• Intel® HD Graphics 4000 (3rd generation processors)
• Intel
®
HD Graphics 3000 (2nd generation processors)
• Intel
®
HD Graphics (Intel® CeleronTM processors)
• Supports VGA, LVDS and DDI interfaces
• VGA: resolution up to 2048x1536 @ 75Hz
• LVDS: Single Channel - 18/24-bit; Dual Channel - 36/48-bit, resolution up to
1920x1200 @ 60Hz
• Digital Display Interfaces: HDMI, DVI, DP or SDVO (for Port B)
• HDMI, DVI, DP: resolution up to 1920x1200 @ 60Hz
• Intel® Clear Video Technology
• DirectX Video Acceleration (DXVA) for accelerating video processing
- Full AVC/VC1/MPEG2 HW Decode
• Supports DirectX 11/10.1/10/9 and OpenGL 3.0 (3rd generation processors)
• Supports DirectX 10.1/10/9 and OpenGL 3.0 (2nd generation processors)
Audio
• Supports High Defi nition Audio interface
SSD
(optional)
• 2GB/4GB/8GB/16GB/32GB/64GB
• Write: 30MB/sec (max), Read: 70MB/sec (max)
• SATA to SSD onboard
Trusted
Platform
Module - TPM
(optional)
• Provides a Trusted PC for secure transactions
• Provides software license protection, enforcement and password protection
Watchdog
Timer
• Watchdog timeout programmable via software from 1 to 255 seconds
BIOS
• 64Mbit SPI BIOS
OS Support
• Windows XP Professional x86 & SP3 (32-bit)
• Windows XP Professional x64 & SP2 (64-bit)
• Windows 7 Ultimate x86 & SP1 (32-bit)
• Windows 7 Ultimate x64 & SP1 (64-bit)
• Windows 8 Enterprise x86 (32-bit)
• Windows 8 Enterprise x64 (64-bit)
Temperature
• 0oC to 60oC
Humidity
• 5% to 90%
Power
• Input: 5VSB (optional), 12V, VCC_RTC
PCB
• Dimensions
- 95mm (3.74") x 125mm (4.9")
• Compliance
- PICMG COM Express
®
R2.1 basic form factor, Type 6

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15
Chapter 3
COM Express Connectors
Row A Row B
1 GND (FIXED) B1 GND (FIXED)
2 GBE0_MDI3- B2 GBE0_ACT#
3 GBE0_MDI3+ B3 LPC_FRAME#
4 GBE0_LINK100# B4 LPC_AD0
5 GBE0_LINK1000# B5 LPC_AD1
8 GBE0_LINK# B8 LPC_DRQ0#
9 GBE0_MDI1- B9 LPC_DRQ1#
10 GBE0_MDI1+ B10 LPC_CLK
11 GND (FIXED) B11 GND (FIXED)
12 GBE0_MDI0- B12 PWRBTN#
14 GBE0_CTREF B14 SMB_DAT
15 SLP_S3# B15 SMB_ALERT#
16 SATA0_TX+ B16 SATA1_TX+
17 SATA0_TX- B17 SATA1_TX-
19 SATA0_RX+ B19 SATA1_RX+
20 SATA0_RX- B20 SATA1_RX-
21 GND (FIXED) B21 GND (FIXED)
22 SATA2_TX+ B22 SATA3_TX+
23 SATA2_TX- B23 SATA3_TX-
25 SATA2_RX+ B25 SATA3_RX+
26 SATA2_RX- B26 SATA3_RX-
28 (S)ATA_ACT# B28 AC/HDA _SDIN2
C/HDA_SYNC B29 AC/HDA _SDIN1
C/HDA _RST# B30 AC/HDA _SDIN0
31 GND (FIXED) B31 GND (FIXED)
34 BIOS_DIS0# B34 I2C_DAT
38 USB_6_7_OC# B38 USB_4_5_OC#
41 GND (FIXED) B41 GND (FIXED)
44 USB_2_3_OC# B44 USB_0_1_OC#
47 VCC_RTC B47 EXCD1_PERST#
48 EXCD0_PERST# B48 EXCD1_CPPE#
49 EXCD0_CPPE# B49 SYS_RESET#
50 LPC_SERIRQ B50 CB_RESET#
Row A Row B
51 GND (FIXED) B51 GND (FIXED)
52 PCIE_TX5+ B52 PCIE_RX5+
53 PCIE_TX5- B53 PCIE_RX5-
55 PCIE_TX4+ B55 PCIE_RX4+
56 PCIE_TX4- B56 PCIE_RX4-
58 PCIE_TX3+ B58 PCIE_RX3+
59 PCIE_TX3- B59 PCIE_RX3-
60 GND (FIXED) B60 GND (FIXED)
61 PCIE_TX2+ B61 PCIE_RX2+
62 PCIE_TX2- B62 PCIE_RX2-
64 PCIE_TX1+ B64 PCIE_RX1+
65 PCIE_TX1- B65 PCIE_RX1-
68 PCIE_TX0+ B68 PCIE_RX0+
69 PCIE_TX0- B69 PCIE_RX0-
70 GND (FIXED) B70 GND (FIXED)
77 LVDS_VDD_EN B77 LVDS_B3+
79 LVDS_A3- B79 LVDS_BKLT_EN
80 GND (FIXED) B80 GND (FIXED)
81 LVDS_A_CK+ B81 LVDS_B_CK+
82 LVDS_A_CK- B82 LVDS_B_CK-
A83 LVDS_I2C_CK B83 LVDS_BKLT_CTRL
84 LVDS_I2C_DAT B84 VCC_5V_SBY
88 PCIE0_CK_REF+ B88 BIOS_DIS1#
89 PCIE0_CK_REF- B89 VGA_RED
90 GND (FIXED) B90 GND (FIXED)
95 SPI_MOSI B95 VGA_I2C_CK
96 TPM_PP B96 VGA_I2C_DAT
100 GND (FIXED) B100 GND (FIXED)
101 SER1_TX B101 FAN_PWMOUT
102 SER1_RX B102 FAN_TACHIN
110 GND (FIXED) B110 GND (FIXED)

www.d.comChapter 3 Hardware Installation
COM Express Connectors Signal Description
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
AC/HAD_RST# A30 O CMOS 3.3V Suspend/3.3V Connect to CODEC pin 11 RESET# Reset output to CODEC, active low.
AC/HDA_SYNC A29 O CMOS 3.3V/3.3V PU 1K to 3.3VSB Connect to CODEC pin 10 SYNC Sample-synchronization signal to the CODEC(s).
AC/HDA_BITCLK A32 I/O CMOS 3.3V/3.3V Connect to CODEC pin 6 BIT_CLK Serial data clock generated by the external CODEC(s).
AC/HDA_SDOUT A33 O CMOS 3.3V/3.3V Connect to CODEC pin 5 SDATA_OUT Serial TDM data output to the CODEC.
AC/HDA_SDIN2 B28 I/O CMOS 3.3V Suspend/3.3V Connect 33 Ω in series to CODEC2 pin 8 SDATA_IN
AC/HDA_SDIN1 B29 I/O CMOS 3.3V Suspend/3.3V Connect 33 Ω in series to CODEC1 pin 8 SDATA_IN
AC/HDA_SDIN0 B30 I/O CMOS 3.3V Suspend/3.3V Connect 33 Ω in series to CODEC0 pin 8 SDATA_IN
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
GBE0_MDI0+ A13 I/O Analog 3.3V max Suspend
GBE0_MDI0- A12 I/O Analog 3.3V max Suspend
GBE0_MDI1+ A10 I/O Analog 3.3V max Suspend
GBE0_MDI1- A9 I/O Analog 3.3V max Suspend
GBE0_MDI2+ A7 I/O Analog 3.3V max Suspend
GBE0_MDI2- A6 I/O Analog 3.3V max Suspend
GBE0_MDI3+ A3 I/O Analog 3.3V max Suspend
GBE0_MDI3-
GBE0_ACT# B2 OD CMOS 3.3V Suspend/3.3V
Connect to LED and recommend current limit
resistor 150Ω to 3.3VSB
Gigabit Ethernet Controller 0 activity indicator, active low.
GBE0_LINK# A8 OD CMOS 3.3V Suspend/3.3V NC Gigabit Ethernet Controller 0 link indicator, active low.
GBE0_LINK100# A4 OD CMOS 3.3V Suspend/3.3V
Connect to LED and recommend current limit
resistor 150Ω to 3.3VSB
Gigabit Ethernet Controller 0 1000 Mbit / sec link indicator, active low.
GBE0_LINK1000# A5 OD CMOS 3.3V Suspend/3.3V
Connect to LED and recommend current limit
resistor 150Ω to 3.3VSB
Gigabit Ethernet Controller 0 1000 Mbit / sec link indicator, active low.
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
SATA0_TX+ A16 O SATA AC coupled on Module AC Coupling capacitor
SATA0_TX- A17 O SATA AC coupled on Module AC Coupling capacitor
SATA0_RX+ A19 I SATA AC coupled on Module AC Coupling capacitor
SATA0_RX- A20 I SATA AC coupled on Module AC Coupling capacitor
SATA1_TX+ B16 O SATA AC coupled on Module AC Coupling capacitor
SATA1_TX- B17 O SATA AC coupled on Module AC Coupling capacitor
SATA1_RX+ B19 I SATA AC coupled on Module AC Coupling capacitor
SATA1_RX- B20 I SATA AC coupled on Module AC Coupling capacitor
SATA2_TX+ A22 O SATA AC coupled on Module AC Coupling capacitor
SATA2_TX- A23 O SATA AC coupled on Module AC Coupling capacitor
SATA2_RX+ A25 I SATA AC coupled on Module AC Coupling capacitor
SATA2_RX- A26 I SATA AC coupled on Module AC Coupling capacitor
SATA3_TX+ B22 O SATA AC coupled on Module AC Coupling capacitor
SATA3_TX- B23 O SATA AC coupled on Module AC Coupling capacitor
SATA3_RX+ B25 I SATA AC coupled on Module AC Coupling capacitor
SATA3_RX- B26 I SATA AC coupled on Module AC Coupling capacitor
ATA_ACT# A28 I/O CMOS 3.3V / 3.3V PU 10K to 3.3V
Connect to LED and recommend current limit
resistor 220Ω to 3.3V
ATA (parallel and serial) or SAS activity indicator, active low.
Connect to Magnetics Module MDI0+/-
Connect to Magnetics Module MDI1+/-
Connect to Magnetics Module MDI2+/-
Connect to Magnetics Module MDI3+/-
Connect to SATA1 Conn RX pin
Connect to SATA0 Conn TX pin
Connect to SATA0 Conn RX pin
Connect to SATA1 Conn TX pin
Connect to SATA3 Conn RX pin
Connect to SATA2 Conn TX pin
Connect to SATA2 Conn RX pin
Connect to SATA3 Conn TX pin
Pin Types
I Input to the Module
O Output from the Module
I/O Bi-directional input / output signal
OD Open drain output
C97/HDA Signals Description
Serial TDM data inputs from up to 3 CODECs.
Gigabit Ethernet Signals Description
Serial ATA or SAS Channel 0 transmit differential pair.
Serial ATA or SAS Channel 0 receive differential pair.
Serial ATA or SAS Channel 3 transmit differential pair.
Serial ATA or SAS Channel 3 receive differential pair.
Serial ATA or SAS Channel 2 receive differential pair.
Serial ATA or SAS Channel 2 transmit differential pair.
Gigabit Ethernet Controller 0: Media Dependent Interface Differential
Pairs 0,1,2,3. The MDI can operate in 1000, 100 and 10 Mbit / sec
modes. Some pairs are unused in some modes, per the following:
1000BASE-T 100BASE-TX 10BASE-T
MDI[0]+/- B1_DA+/- TX+/- TX+/ MDI[1]+/- B1_DB+/- RX+/- RX+/ MDI[2]+/- B1_DC+/ MDI[3]+/- B1_DD+/-
Serial ATA or SAS Channel 1 receive differential pair.
SATA Signals Description
Serial ATA or SAS Channel 1 transmit differential pair.

www.d.comChapter 3 Hardware Installation
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
AC/HAD_RST# A30 O CMOS 3.3V Suspend/3.3V Connect to CODEC pin 11 RESET# Reset output to CODEC, active low.
AC/HDA_SYNC A29 O CMOS 3.3V/3.3V PU 1K to 3.3VSB Connect to CODEC pin 10 SYNC Sample-synchronization signal to the CODEC(s).
AC/HDA_BITCLK A32 I/O CMOS 3.3V/3.3V Connect to CODEC pin 6 BIT_CLK Serial data clock generated by the external CODEC(s).
AC/HDA_SDOUT A33 O CMOS 3.3V/3.3V Connect to CODEC pin 5 SDATA_OUT Serial TDM data output to the CODEC.
AC/HDA_SDIN2 B28 I/O CMOS 3.3V Suspend/3.3V Connect 33 Ω in series to CODEC2 pin 8 SDATA_IN
AC/HDA_SDIN1 B29 I/O CMOS 3.3V Suspend/3.3V Connect 33 Ω in series to CODEC1 pin 8 SDATA_IN
AC/HDA_SDIN0 B30 I/O CMOS 3.3V Suspend/3.3V Connect 33 Ω in series to CODEC0 pin 8 SDATA_IN
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
GBE0_MDI0+ A13 I/O Analog 3.3V max Suspend
GBE0_MDI0- A12 I/O Analog 3.3V max Suspend
GBE0_MDI1+ A10 I/O Analog 3.3V max Suspend
GBE0_MDI1- A9 I/O Analog 3.3V max Suspend
GBE0_MDI2+ A7 I/O Analog 3.3V max Suspend
GBE0_MDI2- A6 I/O Analog 3.3V max Suspend
GBE0_MDI3+ A3 I/O Analog 3.3V max Suspend
GBE0_MDI3-
GBE0_ACT# B2 OD CMOS 3.3V Suspend/3.3V
Connect to LED and recommend current limit
resistor 150Ω to 3.3VSB
Gigabit Ethernet Controller 0 activity indicator, active low.
GBE0_LINK# A8 OD CMOS 3.3V Suspend/3.3V NC Gigabit Ethernet Controller 0 link indicator, active low.
GBE0_LINK100# A4 OD CMOS 3.3V Suspend/3.3V
Connect to LED and recommend current limit
resistor 150Ω to 3.3VSB
Gigabit Ethernet Controller 0 1000 Mbit / sec link indicator, active low.
GBE0_LINK1000# A5 OD CMOS 3.3V Suspend/3.3V
Connect to LED and recommend current limit
resistor 150Ω to 3.3VSB
Gigabit Ethernet Controller 0 1000 Mbit / sec link indicator, active low.
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
SATA0_TX+ A16 O SATA AC coupled on Module AC Coupling capacitor
SATA0_TX- A17 O SATA AC coupled on Module AC Coupling capacitor
SATA0_RX+ A19 I SATA AC coupled on Module AC Coupling capacitor
SATA0_RX- A20 I SATA AC coupled on Module AC Coupling capacitor
SATA1_TX+ B16 O SATA AC coupled on Module AC Coupling capacitor
SATA1_TX- B17 O SATA AC coupled on Module AC Coupling capacitor
SATA1_RX+ B19 I SATA AC coupled on Module AC Coupling capacitor
SATA1_RX- B20 I SATA AC coupled on Module AC Coupling capacitor
SATA2_TX+ A22 O SATA AC coupled on Module AC Coupling capacitor
SATA2_TX- A23 O SATA AC coupled on Module AC Coupling capacitor
SATA2_RX+ A25 I SATA AC coupled on Module AC Coupling capacitor
SATA2_RX- A26 I SATA AC coupled on Module AC Coupling capacitor
SATA3_TX+ B22 O SATA AC coupled on Module AC Coupling capacitor
SATA3_TX- B23 O SATA AC coupled on Module AC Coupling capacitor
SATA3_RX+ B25 I SATA AC coupled on Module AC Coupling capacitor
SATA3_RX- B26 I SATA AC coupled on Module AC Coupling capacitor
ATA_ACT# A28 I/O CMOS 3.3V / 3.3V PU 10K to 3.3V
Connect to LED and recommend current limit
resistor 220Ω to 3.3V
ATA (parallel and serial) or SAS activity indicator, active low.
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
PCIE_TX0+ A68 AC Coupling capacitor
PCIE_TX0- A69 AC Coupling capacitor
PCIE_RX0+ B68
PCIE_RX0- B69
PCIE_TX1+ A64 AC Coupling capacitor
PCIE_TX1- A65 AC Coupling capacitor
PCIE_RX1+ B64
PCIE_RX1- B65
PCIE_TX2+ A61 AC Coupling capacitor
PCIE_TX2- A62 AC Coupling capacitor
PCIE_RX2+ B61
PCIE_RX2- B62
PCIE_TX3+ A58 AC Coupling capacitor
PCIE_TX3- A59 AC Coupling capacitor
PCIE_RX3+ B58
PCIE_RX3- B59
PCIE_TX4+ A55 AC Coupling capacitor
PCIE_TX4- A56 AC Coupling capacitor
PCIE_RX4+ B55
PCIE_RX4- B56
PCIE_TX5+ A52 AC Coupling capacitor
PCIE_TX5- A53 AC Coupling capacitor
PCIE_RX5+ B52
PCIE_RX5- B53
PCIE_TX6+ D19 AC Coupling capacitor
PCIE_TX6- D20 AC Coupling capacitor
PCIE_RX6+ C19
PCIE_RX6- C20
PCIE_TX7+ D22 NA
PCIE_TX7- D23 NA
PCIE_RX7+ C22
PCIE_RX7- C23
PCIE0_CK_REF+ A88
PCIE0_CK_REF- A89
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
PEG_TX0+ D52 AC Coupling capacitor
PEG_TX0- D53 AC Coupling capacitor
PEG_RX0+ C52
PEG_RX0- C53
PEG_TX1+ D55 AC Coupling capacitor
PEG_TX1- D56 AC Coupling capacitor
PEG_RX1+ C55
PEG_RX1- C56
PEG_TX2+ D58 AC Coupling capacitor
PEG_TX2- D59 AC Coupling capacitor
PEG_RX2+ C58
PEG_RX2- C59
PEG_TX3+ D61 AC Coupling capacitor
PEG_TX3- D62 AC Coupling capacitor
PEG_RX3+ C61
PEG_RX3- C62
PEG_TX4+ D65 AC Coupling capacitor
PEG_TX4- D66 AC Coupling capacitor
PEG_RX4+ C65
PEG_RX4- C66
PEG_TX5+ D68 AC Coupling capacitor
PEG_TX5- D69 AC Coupling capacitor
PEG_RX5+ C68
PEG_RX5- C69
Connect to Magnetics Module MDI0+/-
Connect to Magnetics Module MDI1+/-
Connect to Magnetics Module MDI2+/-
Connect to Magnetics Module MDI3+/-
Connect to SATA1 Conn RX pin
Connect to SATA0 Conn TX pin
Connect to SATA0 Conn RX pin
Connect to SATA1 Conn TX pin
Connect to SATA3 Conn RX pin
Connect to SATA2 Conn TX pin
Connect to SATA2 Conn RX pin
Connect to SATA3 Conn TX pin
Connect to PCIE device or slot
Device - Connect AC Coupling cap 0.1uF
Slot - Connect to PCIE Conn pin
Device - Connect AC Coupling cap 0.1uF
Slot - Connect to PCIE Conn pin
Connect to PCIE device or slot
Device - Connect AC Coupling cap 0.1uF
Slot - Connect to PCIE Conn pin
Pin Types
I Input to the Module
O Output from the Module
I/O Bi-directional input / output signal
OD Open drain output
Device - Connect AC Coupling cap 0.1uF
Slot - Connect to PCIE Conn pin
Connect to PCIE device or slot
Connect to PCIE device or slot
Device - Connect AC Coupling cap 0.1uF
Slot - Connect to PCIE Conn pin
NA
NA
Connect to PCIE device, PCIe CLK Buffer or slot
Connect to PCIE device or slot
Connect to PCIE device or slot
Device - Connect AC Coupling cap 0.1uF
Slot - Connect to PCIE Conn pin
Device - Connect AC Coupling cap 0.1uF
Slot - Connect to PCIE Conn pin
Connect to PCIE device or slot
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 5
Connect AC Coupling cap 0.22uF
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 5
Connect to PCIE device or slot
PCI Express Graphics transmit differential pairs 4
I PCIE AC coupled off Module
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 3
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 2
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 3
PCI Express Graphics receive differential pairs 4
O PCIE AC coupled on Module
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
Connect AC Coupling cap 0.22uF
O PCIE AC coupled on Module
I PCIE
PCI Express Graphics transmit differential pairs 2
PEG Signals Description
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 0
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 0
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 1
AC coupled off Module PCI Express Graphics receive differential pairs 1
Connect to PCIE device or slot
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
I PCIE AC coupled off Module
I PCIE AC coupled off Module
O PCIE AC coupled on Module
PCI Express Differential Receive Pairs 7
(Optional with on board LAN, Default setting as NC)
O PCIE PCIE
Reference clock output for all PCI Express and PCI Express Graphics
lanes.
PCI Express Differential Receive Pairs 6
O PCIE AC coupled on Module
PCI Express Differential Transmit Pairs 7
(Optional with on board LAN, Default setting as NC)
PCI Express Differential Transmit Pairs 4
PCI Express Differential Receive Pairs 2
PCI Express Differential Transmit Pairs 6
PCI Express Differential Transmit Pairs 3
I PCIE AC coupled off Module PCI Express Differential Receive Pairs 5
I PCIE AC coupled off Module
O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 5
I PCIE AC coupled off Module PCI Express Differential Receive Pairs 4
O PCIE AC coupled on Module
O PCIE AC coupled on Module
O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 1
PCI Express Differential Receive Pairs 1
PCI Express Differential Receive Pairs 3
O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 0
O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 2
I PCIE AC coupled off Module
I PCIE AC coupled off Module PCI Express Differential Receive Pairs 0
I PCIE AC coupled off Module
C97/HDA Signals Description
Serial TDM data inputs from up to 3 CODECs.
Gigabit Ethernet Signals Description
PCI Express Lanes Signals Description
Serial ATA or SAS Channel 0 transmit differential pair.
Serial ATA or SAS Channel 0 receive differential pair.
Serial ATA or SAS Channel 3 transmit differential pair.
Serial ATA or SAS Channel 3 receive differential pair.
Serial ATA or SAS Channel 2 receive differential pair.
Serial ATA or SAS Channel 2 transmit differential pair.
Gigabit Ethernet Controller 0: Media Dependent Interface Differential
Pairs 0,1,2,3. The MDI can operate in 1000, 100 and 10 Mbit / sec
modes. Some pairs are unused in some modes, per the following:
1000BASE-T 100BASE-TX 10BASE-T
MDI[0]+/- B1_DA+/- TX+/- TX+/-
MDI[1]+/- B1_DB+/- RX+/- RX+/-
MDI[2]+/- B1_DC+/-
MDI[3]+/- B1_DD+/-
Serial ATA or SAS Channel 1 receive differential pair.
SATA Signals Description
Serial ATA or SAS Channel 1 transmit differential pair.

www.d.comChapter 3 Hardware Installation
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
AC/HAD_RST# A30 O CMOS 3.3V Suspend/3.3V Connect to CODEC pin 11 RESET# Reset output to CODEC, active low.
AC/HDA_SYNC A29 O CMOS 3.3V/3.3V PU 1K to 3.3VSB Connect to CODEC pin 10 SYNC Sample-synchronization signal to the CODEC(s).
AC/HDA_BITCLK A32 I/O CMOS 3.3V/3.3V Connect to CODEC pin 6 BIT_CLK Serial data clock generated by the external CODEC(s).
AC/HDA_SDOUT A33 O CMOS 3.3V/3.3V Connect to CODEC pin 5 SDATA_OUT Serial TDM data output to the CODEC.
AC/HDA_SDIN2 B28 I/O CMOS 3.3V Suspend/3.3V Connect 33 Ω in series to CODEC2 pin 8 SDATA_IN
AC/HDA_SDIN1 B29 I/O CMOS 3.3V Suspend/3.3V Connect 33 Ω in series to CODEC1 pin 8 SDATA_IN
AC/HDA_SDIN0 B30 I/O CMOS 3.3V Suspend/3.3V Connect 33 Ω in series to CODEC0 pin 8 SDATA_IN
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
GBE0_MDI0+ A13 I/O Analog 3.3V max Suspend
GBE0_MDI0- A12 I/O Analog 3.3V max Suspend
GBE0_MDI1+ A10 I/O Analog 3.3V max Suspend
GBE0_MDI1- A9 I/O Analog 3.3V max Suspend
GBE0_MDI2+ A7 I/O Analog 3.3V max Suspend
GBE0_MDI2- A6 I/O Analog 3.3V max Suspend
GBE0_MDI3+ A3 I/O Analog 3.3V max Suspend
GBE0_MDI3-
GBE0_ACT# B2 OD CMOS 3.3V Suspend/3.3V
Connect to LED and recommend current limit
resistor 150Ω to 3.3VSB
Gigabit Ethernet Controller 0 activity indicator, active low.
GBE0_LINK# A8 OD CMOS 3.3V Suspend/3.3V NC Gigabit Ethernet Controller 0 link indicator, active low.
GBE0_LINK100# A4 OD CMOS 3.3V Suspend/3.3V
Connect to LED and recommend current limit
resistor 150Ω to 3.3VSB
Gigabit Ethernet Controller 0 1000 Mbit / sec link indicator, active low.
GBE0_LINK1000# A5 OD CMOS 3.3V Suspend/3.3V
Connect to LED and recommend current limit
resistor 150Ω to 3.3VSB
Gigabit Ethernet Controller 0 1000 Mbit / sec link indicator, active low.
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
SATA0_TX+ A16 O SATA AC coupled on Module AC Coupling capacitor
SATA0_TX- A17 O SATA AC coupled on Module AC Coupling capacitor
SATA0_RX+ A19 I SATA AC coupled on Module AC Coupling capacitor
SATA0_RX- A20 I SATA AC coupled on Module AC Coupling capacitor
SATA1_TX+ B16 O SATA AC coupled on Module AC Coupling capacitor
SATA1_TX- B17 O SATA AC coupled on Module AC Coupling capacitor
SATA1_RX+ B19 I SATA AC coupled on Module AC Coupling capacitor
SATA1_RX- B20 I SATA AC coupled on Module AC Coupling capacitor
SATA2_TX+ A22 O SATA AC coupled on Module AC Coupling capacitor
SATA2_TX- A23 O SATA AC coupled on Module AC Coupling capacitor
SATA2_RX+ A25 I SATA AC coupled on Module AC Coupling capacitor
SATA2_RX- A26 I SATA AC coupled on Module AC Coupling capacitor
SATA3_TX+ B22 O SATA AC coupled on Module AC Coupling capacitor
SATA3_TX- B23 O SATA AC coupled on Module AC Coupling capacitor
SATA3_RX+ B25 I SATA AC coupled on Module AC Coupling capacitor
SATA3_RX- B26 I SATA AC coupled on Module AC Coupling capacitor
ATA_ACT# A28 I/O CMOS 3.3V / 3.3V PU 10K to 3.3V
Connect to LED and recommend current limit
resistor 220Ω to 3.3V
ATA (parallel and serial) or SAS activity indicator, active low.
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
PCIE_TX0+ A68 AC Coupling capacitor
PCIE_TX0- A69 AC Coupling capacitor
PCIE_RX0+ B68
PCIE_RX0- B69
PCIE_TX1+ A64 AC Coupling capacitor
PCIE_TX1- A65 AC Coupling capacitor
PCIE_RX1+ B64
PCIE_RX1- B65
PCIE_TX2+ A61 AC Coupling capacitor
PCIE_TX2- A62 AC Coupling capacitor
PCIE_RX2+ B61
PCIE_RX2- B62
PCIE_TX3+ A58 AC Coupling capacitor
PCIE_TX3- A59 AC Coupling capacitor
PCIE_RX3+ B58
PCIE_RX3- B59
PCIE_TX4+ A55 AC Coupling capacitor
PCIE_TX4- A56 AC Coupling capacitor
PCIE_RX4+ B55
PCIE_RX4- B56
PCIE_TX5+ A52 AC Coupling capacitor
PCIE_TX5- A53 AC Coupling capacitor
PCIE_RX5+ B52
PCIE_RX5- B53
PCIE_TX6+ D19 AC Coupling capacitor
PCIE_TX6- D20 AC Coupling capacitor
PCIE_RX6+ C19
PCIE_RX6- C20
PCIE_TX7+ D22 NA
PCIE_TX7- D23 NA
PCIE_RX7+ C22
PCIE_RX7- C23
PCIE0_CK_REF+ A88
PCIE0_CK_REF- A89
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
Connect to Magnetics Module MDI0+/-
Connect to Magnetics Module MDI1+/-
Connect to Magnetics Module MDI2+/-
Connect to Magnetics Module MDI3+/-
Connect to SATA1 Conn RX pin
Connect to SATA0 Conn TX pin
Connect to SATA0 Conn RX pin
Connect to SATA1 Conn TX pin
Connect to SATA3 Conn RX pin
Connect to SATA2 Conn TX pin
Connect to SATA2 Conn RX pin
Connect to SATA3 Conn TX pin
Connect to PCIE device or slot
Device - Connect AC Coupling cap 0.1uF
Slot - Connect to PCIE Conn pin
Device - Connect AC Coupling cap 0.1uF
Slot - Connect to PCIE Conn pin
Connect to PCIE device or slot
Device - Connect AC Coupling cap 0.1uF
Slot - Connect to PCIE Conn pin
Pin Types
I Input to the Module
O Output from the Module
I/O Bi-directional input / output signal
OD Open drain output
Device - Connect AC Coupling cap 0.1uF
Slot - Connect to PCIE Conn pin
Connect to PCIE device or slot
Connect to PCIE device or slot
Device - Connect AC Coupling cap 0.1uF
Slot - Connect to PCIE Conn pin
NA
NA
Connect to PCIE device, PCIe CLK Buffer or slot
Connect to PCIE device or slot
Connect to PCIE device or slot
Device - Connect AC Coupling cap 0.1uF
Slot - Connect to PCIE Conn pin
Device - Connect AC Coupling cap 0.1uF
Slot - Connect to PCIE Conn pin
Connect to PCIE device or slot
I PCIE AC coupled off Module
I PCIE AC coupled off Module
O PCIE AC coupled on Module
PCI Express Differential Receive Pairs 7
(Optional with on board LAN, Default setting as NC)
O PCIE PCIE
Reference clock output for all PCI Express and PCI Express Graphics
lanes.
PCI Express Differential Receive Pairs 6
O PCIE AC coupled on Module
PCI Express Differential Transmit Pairs 7
(Optional with on board LAN, Default setting as NC)
PCI Express Differential Transmit Pairs 4
PCI Express Differential Receive Pairs 2
PCI Express Differential Transmit Pairs 6
PCI Express Differential Transmit Pairs 3
I PCIE AC coupled off Module PCI Express Differential Receive Pairs 5
I PCIE AC coupled off Module
O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 5
I PCIE AC coupled off Module PCI Express Differential Receive Pairs 4
O PCIE AC coupled on Module
O PCIE AC coupled on Module
O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 1
PCI Express Differential Receive Pairs 1
PCI Express Differential Receive Pairs 3
O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 0
O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 2
I PCIE AC coupled off Module
I PCIE AC coupled off Module PCI Express Differential Receive Pairs 0
I PCIE AC coupled off Module
C97/HDA Signals Description
Serial TDM data inputs from up to 3 CODECs.
Gigabit Ethernet Signals Description
PCI Express Lanes Signals Description
Serial ATA or SAS Channel 0 transmit differential pair.
Serial ATA or SAS Channel 0 receive differential pair.
Serial ATA or SAS Channel 3 transmit differential pair.
Serial ATA or SAS Channel 3 receive differential pair.
Serial ATA or SAS Channel 2 receive differential pair.
Serial ATA or SAS Channel 2 transmit differential pair.
Gigabit Ethernet Controller 0: Media Dependent Interface Differential
Pairs 0,1,2,3. The MDI can operate in 1000, 100 and 10 Mbit / sec
modes. Some pairs are unused in some modes, per the following:
1000BASE-T 100BASE-TX 10BASE-T
MDI[0]+/- B1_DA+/- TX+/- TX+/-
MDI[1]+/- B1_DB+/- RX+/- RX+/-
MDI[2]+/- B1_DC+/-
MDI[3]+/- B1_DD+/-
Serial ATA or SAS Channel 1 receive differential pair.
SATA Signals Description
Serial ATA or SAS Channel 1 transmit differential pair.
GBE0_MDI1- A9 I/O Analog 3.3V max Suspend
GBE0_MDI2+ A7 I/O Analog 3.3V max Suspend
GBE0_MDI2- A6 I/O Analog 3.3V max Suspend
GBE0_MDI3+ A3 I/O Analog 3.3V max Suspend
GBE0_MDI3-
GBE0_ACT# B2 OD CMOS 3.3V Suspend/3.3V
Connect to LED and recommend current limit
resistor 150Ω to 3.3VSB
Gigabit Ethernet Controller 0 activity indicator, active low.
GBE0_LINK# A8 OD CMOS 3.3V Suspend/3.3V NC Gigabit Ethernet Controller 0 link indicator, active low.
GBE0_LINK100# A4 OD CMOS 3.3V Suspend/3.3V
Connect to LED and recommend current limit
resistor 150Ω to 3.3VSB
Gigabit Ethernet Controller 0 1000 Mbit / sec link indicator, active low.
GBE0_LINK1000# A5 OD CMOS 3.3V Suspend/3.3V
Connect to LED and recommend current limit
resistor 150Ω to 3.3VSB
Gigabit Ethernet Controller 0 1000 Mbit / sec link indicator, active low.
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
SATA0_TX+ A16 O SATA AC coupled on Module AC Coupling capacitor
SATA0_TX- A17 O SATA AC coupled on Module AC Coupling capacitor
SATA0_RX+ A19 I SATA AC coupled on Module AC Coupling capacitor
SATA0_RX- A20 I SATA AC coupled on Module AC Coupling capacitor
SATA1_TX+ B16 O SATA AC coupled on Module AC Coupling capacitor
SATA1_TX- B17 O SATA AC coupled on Module AC Coupling capacitor
SATA1_RX+ B19 I SATA AC coupled on Module AC Coupling capacitor
SATA1_RX- B20 I SATA AC coupled on Module AC Coupling capacitor
SATA2_TX+ A22 O SATA AC coupled on Module AC Coupling capacitor
SATA2_TX- A23 O SATA AC coupled on Module AC Coupling capacitor
SATA2_RX+ A25 I SATA AC coupled on Module AC Coupling capacitor
SATA2_RX- A26 I SATA AC coupled on Module AC Coupling capacitor
SATA3_TX+ B22 O SATA AC coupled on Module AC Coupling capacitor
SATA3_TX- B23 O SATA AC coupled on Module AC Coupling capacitor
SATA3_RX+ B25 I SATA AC coupled on Module AC Coupling capacitor
SATA3_RX- B26 I SATA AC coupled on Module AC Coupling capacitor
ATA_ACT# A28 I/O CMOS 3.3V / 3.3V PU 10K to 3.3V
Connect to LED and recommend current limit
resistor 220Ω to 3.3V
ATA (parallel and serial) or SAS activity indicator, active low.
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
PCIE_TX0+ A68 AC Coupling capacitor
PCIE_TX0- A69 AC Coupling capacitor
PCIE_RX0+ B68
PCIE_RX0- B69
PCIE_TX1+ A64 AC Coupling capacitor
PCIE_TX1- A65 AC Coupling capacitor
PCIE_RX1+ B64
PCIE_RX1- B65
PCIE_TX2+ A61 AC Coupling capacitor
PCIE_TX2- A62 AC Coupling capacitor
PCIE_RX2+ B61
PCIE_RX2- B62
PCIE_TX3+ A58 AC Coupling capacitor
PCIE_TX3- A59 AC Coupling capacitor
PCIE_RX3+ B58
PCIE_RX3- B59
PCIE_TX4+ A55 AC Coupling capacitor
PCIE_TX4- A56 AC Coupling capacitor
PCIE_RX4+ B55
PCIE_RX4- B56
PCIE_TX5+ A52 AC Coupling capacitor
PCIE_TX5- A53 AC Coupling capacitor
PCIE_RX5+ B52
PCIE_RX5- B53
PCIE_TX6+ D19 AC Coupling capacitor
PCIE_TX6- D20 AC Coupling capacitor
PCIE_RX6+ C19
PCIE_RX6- C20
PCIE_TX7+ D22 NA
PCIE_TX7- D23 NA
PCIE_RX7+ C22
PCIE_RX7- C23
PCIE0_CK_REF+ A88
PCIE0_CK_REF- A89
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
PEG_TX0+ D52 AC Coupling capacitor
PEG_TX0- D53 AC Coupling capacitor
PEG_RX0+ C52
PEG_RX0- C53
PEG_TX1+ D55 AC Coupling capacitor
PEG_TX1- D56 AC Coupling capacitor
PEG_RX1+ C55
PEG_RX1- C56
PEG_TX2+ D58 AC Coupling capacitor
PEG_TX2- D59 AC Coupling capacitor
PEG_RX2+ C58
PEG_RX2- C59
PEG_TX3+ D61 AC Coupling capacitor
PEG_TX3- D62 AC Coupling capacitor
PEG_RX3+ C61
PEG_RX3- C62
PEG_TX4+ D65 AC Coupling capacitor
PEG_TX4- D66 AC Coupling capacitor
PEG_RX4+ C65
PEG_RX4- C66
PEG_TX5+ D68 AC Coupling capacitor
PEG_TX5- D69 AC Coupling capacitor
PEG_RX5+ C68
PEG_RX5- C69
PEG_TX6+ D71 AC Coupling capacitor
PEG_TX6- D72 AC Coupling capacitor
PEG_RX6+ C71
PEG_RX6- C72
PEG_TX7+ D74 AC Coupling capacitor
PEG_TX7- D75 AC Coupling capacitor
PEG_RX7+ C74
PEG_RX7- C75
PEG_TX8+ D78 AC Coupling capacitor
PEG_TX8- D79 AC Coupling capacitor
PEG_RX8+ C78
PEG_RX8- C79
PEG_TX9+ D81 AC Coupling capacitor
PEG_TX9- D82 AC Coupling capacitor
PEG_RX9+ C81
PEG_RX9- C82
PEG_TX10+ D85 AC Coupling capacitor
PEG_TX10- D86 AC Coupling capacitor
PEG_RX10+ C85
PEG_RX10- C86
PEG_TX11+ D88 AC Coupling capacitor
PEG_TX11- D89 AC Coupling capacitor
PEG_RX11+ C88
PEG_RX11- C89
PEG_TX12+ D91 AC Coupling capacitor
PEG_TX12- D92 AC Coupling capacitor
PEG_RX12+ C91
PEG_RX12- C92
PEG_TX13+ D94 AC Coupling capacitor
PEG_TX13- D95 AC Coupling capacitor
PEG_RX13+ C94
PEG_RX13- C95
PEG_TX14+ D98 AC Coupling capacitor
PEG_TX14- D99 AC Coupling capacitor
PEG_RX14+ C98
PEG_RX14- C99
PEG_TX15+ D101 AC Coupling capacitor
PEG_TX15- D102 AC Coupling capacitor
PEG_RX15+ C101
PEG_RX15- C102
PEG_LANE_RV# D54 I CMOS 3.3V / 3.3V
PCI Express Graphics lane reversal input strap. Pull low on the Carrier
board to reverse lane order.
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
EXCD0_CPPE# A49 PU 10k to 3.3V
EXCD1_CPPE# B48 PU 10k to 3.3V
EXCD0_PERST# A48
EXCD1_PERST# B47
Connect to Magnetics Module MDI1+/-
Connect to Magnetics Module MDI2+/-
Connect to Magnetics Module MDI3+/-
Connect to SATA1 Conn RX pin
Connect to SATA0 Conn TX pin
Connect to SATA0 Conn RX pin
Connect to SATA1 Conn TX pin
Connect to SATA3 Conn RX pin
Connect to SATA2 Conn TX pin
Connect to SATA2 Conn RX pin
Connect to SATA3 Conn TX pin
Connect to PCIE device or slot
Device - Connect AC Coupling cap 0.1uF
Slot - Connect to PCIE Conn pin
Device - Connect AC Coupling cap 0.1uF
Slot - Connect to PCIE Conn pin
Connect to PCIE device or slot
Device - Connect AC Coupling cap 0.1uF
Slot - Connect to PCIE Conn pin
Device - Connect AC Coupling cap 0.1uF
Slot - Connect to PCIE Conn pin
Connect to PCIE device or slot
Connect to PCIE device or slot
Device - Connect AC Coupling cap 0.1uF
Slot - Connect to PCIE Conn pin
NA
NA
Connect to PCIE device, PCIe CLK Buffer or slot
Connect AC Coupling cap 0.22uF
I PCIE AC coupled off Module
O PCIE AC coupled on Module
I PCIE AC coupled off Module
Connect to PCIE device or slot
Connect to PCIE device or slot
Device - Connect AC Coupling cap 0.1uF
Slot - Connect to PCIE Conn pin
Device - Connect AC Coupling cap 0.1uF
Slot - Connect to PCIE Conn pin
Connect to PCIE device or slot
O CMOS 3.3V /3.3V PCI ExpressCard: reset, active low, one per card
I PCIE AC coupled off Module
PCI Express Graphics receive differential pairs 14
PCI Express Graphics receive differential pairs 12
ExpressCard Signals Description
I CMOS 3.3V /3.3V
PCI ExpressCard: PCI Express capable card request, active low, one per
card
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 14
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 15
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
Connect AC Coupling cap 0.22uF PCI Express Graphics receive differential pairs 13
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 15
I PCIE AC coupled off Module
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 13
Connect to PCIE device or slot
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
PCI Express Graphics transmit differential pairs 12
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 11
I PCIE AC coupled off Module
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 11
PCI Express Graphics receive differential pairs 10Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
PCI Express Graphics receive differential pairs 8
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 10
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 9
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 9
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 8
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 5
O PCIE
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 6
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 5
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 7
AC coupled on Module PCI Express Graphics transmit differential pairs 7
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 6
Connect to PCIE device or slot
PCI Express Graphics transmit differential pairs 4
I PCIE AC coupled off Module
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 3
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 2
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 3
PCI Express Graphics receive differential pairs 4
O PCIE AC coupled on Module
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
Connect AC Coupling cap 0.22uF
O PCIE AC coupled on Module
I PCIE
PCI Express Graphics transmit differential pairs 2
PEG Signals Description
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 0
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 0
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 1
AC coupled off Module PCI Express Graphics receive differential pairs 1
Connect to PCIE device or slot
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
I PCIE AC coupled off Module
I PCIE AC coupled off Module
O PCIE AC coupled on Module
PCI Express Differential Receive Pairs 7
(Optional with on board LAN, Default setting as NC)
O PCIE PCIE
Reference clock output for all PCI Express and PCI Express Graphics
lanes.
PCI Express Differential Receive Pairs 6
O PCIE AC coupled on Module
PCI Express Differential Transmit Pairs 7
(Optional with on board LAN, Default setting as NC)
PCI Express Differential Transmit Pairs 4
PCI Express Differential Receive Pairs 2
PCI Express Differential Transmit Pairs 6
PCI Express Differential Transmit Pairs 3
I PCIE AC coupled off Module PCI Express Differential Receive Pairs 5
I PCIE AC coupled off Module
O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 5
I PCIE AC coupled off Module PCI Express Differential Receive Pairs 4
O PCIE AC coupled on Module
O PCIE AC coupled on Module
O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 1
PCI Express Differential Receive Pairs 1
PCI Express Differential Receive Pairs 3
O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 0
O PCIE AC coupled on Module PCI Express Differential Transmit Pairs 2
I PCIE AC coupled off Module
I PCIE AC coupled off Module PCI Express Differential Receive Pairs 0
I PCIE AC coupled off Module
PCI Express Lanes Signals Description
Serial ATA or SAS Channel 0 transmit differential pair.
Serial ATA or SAS Channel 0 receive differential pair.
Serial ATA or SAS Channel 3 transmit differential pair.
Serial ATA or SAS Channel 3 receive differential pair.
Serial ATA or SAS Channel 2 receive differential pair.
Serial ATA or SAS Channel 2 transmit differential pair.
1000BASE-T 100BASE-TX 10BASE-T
MDI[0]+/- B1_DA+/- TX+/- TX+/-
MDI[1]+/- B1_DB+/- RX+/- RX+/-
MDI[2]+/- B1_DC+/-
MDI[3]+/- B1_DD+/-
Serial ATA or SAS Channel 1 receive differential pair.
SATA Signals Description
Serial ATA or SAS Channel 1 transmit differential pair.

www.d.comChapter 3 Hardware Installation
PCIE_RX6+ C19
PCIE_RX6- C20
PCIE_TX7+ D22 NA
PCIE_TX7- D23 NA
PCIE_RX7+ C22
PCIE_RX7- C23
PCIE0_CK_REF+ A88
PCIE0_CK_REF- A89
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
PEG_TX0+ D52 AC Coupling capacitor
PEG_TX0- D53 AC Coupling capacitor
PEG_RX0+ C52
PEG_RX0- C53
PEG_TX1+ D55 AC Coupling capacitor
PEG_TX1- D56 AC Coupling capacitor
PEG_RX1+ C55
PEG_RX1- C56
PEG_TX2+ D58 AC Coupling capacitor
PEG_TX2- D59 AC Coupling capacitor
PEG_RX2+ C58
PEG_RX2- C59
PEG_TX3+ D61 AC Coupling capacitor
PEG_TX3- D62 AC Coupling capacitor
PEG_RX3+ C61
PEG_RX3- C62
PEG_TX4+ D65 AC Coupling capacitor
PEG_TX4- D66 AC Coupling capacitor
PEG_RX4+ C65
PEG_RX4- C66
PEG_TX5+ D68 AC Coupling capacitor
PEG_TX5- D69 AC Coupling capacitor
PEG_RX5+ C68
PEG_RX5- C69
PEG_TX6+ D71 AC Coupling capacitor
PEG_TX6- D72 AC Coupling capacitor
PEG_RX6+ C71
PEG_RX6- C72
PEG_TX7+ D74 AC Coupling capacitor
PEG_TX7- D75 AC Coupling capacitor
PEG_RX7+ C74
PEG_RX7- C75
PEG_TX8+ D78 AC Coupling capacitor
PEG_TX8- D79 AC Coupling capacitor
PEG_RX8+ C78
PEG_RX8- C79
PEG_TX9+ D81 AC Coupling capacitor
PEG_TX9- D82 AC Coupling capacitor
PEG_RX9+ C81
PEG_RX9- C82
PEG_TX10+ D85 AC Coupling capacitor
PEG_TX10- D86 AC Coupling capacitor
PEG_RX10+ C85
PEG_RX10- C86
PEG_TX11+ D88 AC Coupling capacitor
PEG_TX11- D89 AC Coupling capacitor
PEG_RX11+ C88
PEG_RX11- C89
PEG_TX12+ D91 AC Coupling capacitor
PEG_TX12- D92 AC Coupling capacitor
PEG_RX12+ C91
PEG_RX12- C92
PEG_TX13+ D94 AC Coupling capacitor
PEG_TX13- D95 AC Coupling capacitor
PEG_RX13+ C94
PEG_RX13- C95
PEG_TX14+ D98 AC Coupling capacitor
PEG_TX14- D99 AC Coupling capacitor
PEG_RX14+ C98
PEG_RX14- C99
PEG_TX15+ D101 AC Coupling capacitor
PEG_TX15- D102 AC Coupling capacitor
PEG_RX15+ C101
PEG_RX15- C102
PEG_LANE_RV# D54 I CMOS 3.3V / 3.3V
PCI Express Graphics lane reversal input strap. Pull low on the Carrier
board to reverse lane order.
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
EXCD0_CPPE# A49 PU 10k to 3.3V
EXCD1_CPPE# B48 PU 10k to 3.3V
EXCD0_PERST# A48
EXCD1_PERST# B47
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
DDI1_PAIR0+/SDVO1_RED+ D26 Connect AC Coupling Capacitors 0.1uF to Device
DDI1_PAIR0-
SDVO1_RED- D27 Connect AC Coupling Capacitors 0.1uF to Device
DDI1_PAIR1+/SDVO1_GRN+ D29 Connect AC Coupling Capacitors 0.1uF to Device
DDI1_PAIR1-/SDVO1_GRN- D30 Connect AC Coupling Capacitors 0.1uF to Device
DDI1_PAIR2+/SDVO1_BLU+ D32 Connect AC Coupling Capacitors 0.1uF to Device
DDI1_PAIR2-/SDVO1_BLU- D33 Connect AC Coupling Capacitors 0.1uF to Device
DDI1_PAIR3+/SDVO1_CK+ D36 Connect AC Coupling Capacitors 0.1uF to Device
DDI1_PAIR3-/SDVO1_CK- D37 Connect AC Coupling Capacitors 0.1uF to Device
DDI1_PAIR4+/SDVO1_INT+ C25 Connect AC Coupling Capacitors 0.1uF to Device
DDI1_PAIR4-/SDVO1_INT- C26 Connect AC Coupling Capacitors 0.1uF to Device
DDI1_PAIR5+/SDVO1_TVCLKIN+ C29 Connect AC Coupling Capacitors 0.1uF to Device
DDI1_PAIR5-/SDVO1_TVCLKIN- C30 Connect AC Coupling Capacitors 0.1uF to Device
DDI1_PAIR6+/SDVO1_FLDSTALL+ C15 Connect AC Coupling Capacitors 0.1uF to Device
DDI1_PAIR6-/SDVO1_FLDSTALL- C16 Connect AC Coupling Capacitors 0.1uF to Device
I/O PCIE AC coupled on Module
PD 49.9K to GND
(S/W IC between
Rpd/PCH)
Connect to DP AUX+ DP AUX+ function if DDI1_DDC_AUX_SEL is no connect
I/O OD CMOS 3.3V / 3.3V
PU 2.2K to 3.3V, PD
49.9K to GND
(S/W IC between
2.2K/49.9K resistor)
Connect to HDMI/DVI I2C CTRLCLK HDMI/DVI I2C CTRLCLK if DDI1_DDC_AUX_SEL is pulled high
I/O PCIE AC coupled on Module
PU 100K to 3.3V
(S/W IC between
Rpu/PCH)
Connect to DP AUX- DP AUX- function if DDI1_DDC_AUX_SEL is no connect
I/O OD CMOS 3.3V / 3.3V
PU 2.2K to 3.3V/PU
100K to 3.3V
(S/W IC between
2.2K/100K resistor)
Connect to HDMI/DVI I2C CTRLDATA HDMI/DVI I2C CTRLDATA if DDI1_DDC_AUX_SEL is pulled high
DDI1_HPD C24 I CMOS 3.3V / 3.3V PD 1M and Connect to device Hot Plug Detect DDI Hot-Plug Detect
DDI1_DDC_AUX_SEL D34 I CMOS 3.3V / 3.3V PD 1M PU 100K to 3.3V for DDC(HDMI/DVI)
Selects the function of DDI1_CTRLCLK_AUX+ and DDI1_CTRLDATA_AUX-.
DDI[n]_DDC_AUX_SEL shall be pulled to 3.3V on the Carrier with a 100K Ohm
resistor to configure the DDI[n]_AUX pair as the DDC channel.
Carrier DDI[n]_DDC_AUX_SEL should be connected to pin 13 of the DisplayPort
DDI2_PAIR0+ D39 Connect AC Coupling Capacitors 0.1uF to Device
DDI2_PAIR0- D40 Connect AC Coupling Capacitors 0.1uF to Device
DDI2_PAIR1+ D42 Connect AC Coupling Capacitors 0.1uF to Device
DDI2_PAIR1- D43 Connect AC Coupling Capacitors 0.1uF to Device
DDI2_PAIR2+ D46 Connect AC Coupling Capacitors 0.1uF to Device
DDI2_PAIR2- D47 Connect AC Coupling Capacitors 0.1uF to Device
DDI2_PAIR3+ D49 Connect AC Coupling Capacitors 0.1uF to Device
DDI2_PAIR3- D50 Connect AC Coupling Capacitors 0.1uF to Device
I/O PCIE AC coupled on Module
PD 49.9K to GND
(S/W IC between
Rpd/PCH)
Connect to DP AUX+ DP AUX+ function if DDI2_DDC_AUX_SEL is no connect
I/O OD CMOS 3.3V / 3.3V
PU 2.2K to 3.3V, PD
49.9K to GND
(S/W IC between
2.2K/49.9K resistor)
Connect to HDMI/DVI I2C CTRLCLK HDMI/DVI I2C CTRLCLK if DDI2_DDC_AUX_SEL is pulled high
I/O PCIE AC coupled on Module
PU 100K to 3.3V
(S/W IC between
Rpu/PCH)
Connect to DP AUX- DP AUX- function if DDI2_DDC_AUX_SEL is no connect
I/O OD CMOS 3.3V / 3.3V
PU 2.2K to 3.3V/PU
100K to 3.3V
(S/W IC between
2.2K/100K resistor)
Connect to HDMI/DVI I2C CTRLDATA HDMI/DVI I2C CTRLDATA if DDI2_DDC_AUX_SEL is pulled high
AC coupled off Module Serial Digital Video Field Stall input differential pair.
O PCIE
O PCIE AC coupled off Module DDI 1 Pair 3 differential pairs/Serial Digital Video B clock output differential pair.
I PCIE
I PCIE AC coupled off Module Serial Digital Video TVOUT synchronization clock input differential pair.
AC coupled off Module
Device - Connect AC Coupling cap 0.1uF
Slot - Connect to PCIE Conn pin
NA
NA
Connect to PCIE device, PCIe CLK Buffer or slot
Connect AC Coupling cap 0.22uF
I PCIE AC coupled off Module
O PCIE AC coupled on Module
I PCIE AC coupled off Module
DDI1_CTRLCLK_AUX+/SDVO1_CTRLCLK D15
DDI1_CTRLCLK_AUX-/SDVO1_CTRLDATA
DDI 2 Pair 0 differential pairs
O PCIE AC coupled off Module DDI 1 Pair 0 differential pairs/Serial Digital Video B red output differential pair
I PCIE
AC coupled off Module DDI 1 Pair 2 differential pairs/Serial Digital Video B blue output differential pair
Serial Digital Video B interrupt input differential pair.
O PCIE AC coupled off Module
O PCIE AC coupled off Module DDI 2 Pair 3 differential pairs
O PCIE AC coupled off Module DDI 2 Pair 2 differential pairs
O PCIE AC coupled off Module DDI 2 Pair 1 differential pairs
DDI2_CTRLCLK_AUX+ C32
DDI2_CTRLCLK_AUX- C33
O CMOS 3.3V /3.3V PCI ExpressCard: reset, active low, one per card
O PCIE AC coupled off Module DDI 1 Pair 1 differential pairs/Serial Digital Video B green output differential pair
DDI Signals Description
I PCIE AC coupled off Module
PCI Express Graphics receive differential pairs 14
PCI Express Graphics receive differential pairs 12
ExpressCard Signals Description
I CMOS 3.3V /3.3V
PCI ExpressCard: PCI Express capable card request, active low, one per
card
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 14
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 15
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
Connect AC Coupling cap 0.22uF PCI Express Graphics receive differential pairs 13
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 15
I PCIE AC coupled off Module
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 13
Connect to PCIE device or slot
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
PCI Express Graphics transmit differential pairs 12
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 11
I PCIE AC coupled off Module
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 11
PCI Express Graphics receive differential pairs 10Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
PCI Express Graphics receive differential pairs 8
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 10
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 9
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 9
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 8
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 5
O PCIE
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 6
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 5
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 7
AC coupled on Module PCI Express Graphics transmit differential pairs 7
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 6
Connect to PCIE device or slot
PCI Express Graphics transmit differential pairs 4
I PCIE AC coupled off Module
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 3
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 2
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 3
PCI Express Graphics receive differential pairs 4
O PCIE AC coupled on Module
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
Connect AC Coupling cap 0.22uF
O PCIE AC coupled on Module
I PCIE
PCI Express Graphics transmit differential pairs 2
PEG Signals Description
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 0
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 0
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 1
AC coupled off Module PCI Express Graphics receive differential pairs 1
Connect to PCIE device or slot
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
Connect AC Coupling cap 0.22uF
Connect to PCIE device or slot
I PCIE AC coupled off Module
I PCIE AC coupled off Module
PCI Express Differential Receive Pairs 7
(Optional with on board LAN, Default setting as NC)
O PCIE PCIE
Reference clock output for all PCI Express and PCI Express Graphics
lanes.
PCI Express Differential Receive Pairs 6
O PCIE AC coupled on Module
PCI Express Differential Transmit Pairs 7
(Optional with on board LAN, Default setting as NC)

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Chapter 3
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
USB0+ A46
USB0- A45
USB1+ B46
USB1- B45
USB2+ A43
USB2- A42
USB3+ B43
USB3- B42
USB4+ A40
USB4- A39
USB5+ B40
USB5- B39
Connect 90ಳ @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90ಳ @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90ಳ @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90ಳ @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90ಳ @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90ಳ @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
I/O USB 3.3V Suspend/3.3V USB differential pairs 5
3.3V Suspend/3.3V USB differential pairs 4
I/O USB 3.3V Suspend/3.3V USB differential pairs 3
USB Signals Description
I/O USB 3.3V Suspend/3.3V USB differential pairs 0
I/O USB
I/O USB 3.3V Suspend/3.3V USB differential pairs 2
I/O USB 3.3V Suspend/3.3V USB differential pairs 1
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
DDI Signals Description
DDI2_HPD D44 I CMOS 3.3V / 3.3V PD 1M and Connect to device Hot Plug Detect DDI Hot-Plug Detect
DDI2_DDC_AUX_SEL C34 I CMOS 3.3V / 3.3V PD 1M to GND PU 100K to 3.3V for DDC(HDMI/DVI)
Selects the function of DDI2_CTRLCLK_AUX+ and DDI2_CTRLDATA_AUX-.
DDI[n]_DDC_AUX_SEL shall be pulled to 3.3V on the Carrier with a 100K Ohm
resistor to configure the DDI[n]_AUX pair as the DDC channel.
Carrier DDI[n]_DDC_AUX_SEL should be connected to pin 13 of the DisplayPort
DDI3_PAIR0+ C39 Connect AC Coupling Capacitors 0.1uF to Device
DDI3_PAIR0- C40 Connect AC Coupling Capacitors 0.1uF to Device
DDI3_PAIR1+ C42 Connect AC Coupling Capacitors 0.1uF to Device
DDI3_PAIR1- C43 Connect AC Coupling Capacitors 0.1uF to Device
DDI3_PAIR2+ C46 Connect AC Coupling Capacitors 0.1uF to Device
DDI3_PAIR2- C47 Connect AC Coupling Capacitors 0.1uF to Device
DDI3_PAIR3+ C49 Connect AC Coupling Capacitors 0.1uF to Device
DDI3_PAIR3- C50 Connect AC Coupling Capacitors 0.1uF to Device
I/O PCIE AC coupled on Module
PD 49.9K to GND
(S/W IC between
Rpd/PCH)
Connect to DP AUX+ DP AUX+ function if DDI3_DDC_AUX_SEL is no connect
I/O OD CMOS 3.3V / 3.3V
PU 2.2K to 3.3V, PD
49.9K to GND
(S/W IC between
2.2 k/49.9K resistor)
Connect to HDMI/DVI I2C CTRLCLK HDMI/DVI I2C CTRLCLK if DDI3_DDC_AUX_SEL is pulled high
I/O PCIE AC coupled on Module
PU 100K to 3.3V
(S/W IC between
Rpu/PCH)
Connect to DP AUX- DP AUX- function if DDI3_DDC_AUX_SEL is no connect
I/O OD CMOS 3.3V / 3.3V
PU 2.2K to 3.3V/PU
100K to 3.3V
(S/W IC between
2.2K/100K resistor)
Connect to HDMI/DVI I2C CTRLDATA HDMI/DVI I2C CTRLDATA if DDI3_DDC_AUX_SEL is pulled high
DDI3_HPD C44 I CMOS 3.3V / 3.3V PD 1M and Connect to device Hot Plug Detect DDI Hot-Plug Detect
DDI3_DDC_AUX_SEL C38 I CMOS 3.3V / 3.3V PD 1M to GND PU 100K to 3.3V for DDC(HDMI/DVI)
Selects the function of DDI3_CTRLCLK_AUX+ and DDI3_CTRLDATA_AUX-.
DDI[n]_DDC_AUX_SEL shall be pulled to 3.3V on the Carrier with a 100K Ohm
resistor to configure the DDI[n]_AUX pair as the DDC channel.
Carrier DDI[n]_DDC_AUX_SEL should be connected to pin 13 of the DisplayPort
AC coupled off Module
DDI3_CTRLCLK_AUX- C37
O PCIE AC coupled off Module
O PCIE AC coupled off Module DDI 3 Pair 3 differential pairs
DDI3_CTRLCLK_AUX+ C36
DDI 3 Pair 2 differential pairs
O PCIE DDI 3 Pair 1 differential pairs
O PCIE AC coupled off Module DDI 3 Pair 0 differential pairs

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Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
USB0+ A46
USB0- A45
USB1+ B46
USB1- B45
USB2+ A43
USB2- A42
USB3+ B43
USB3- B42
USB4+ A40
USB4- A39
USB5+ B40
USB5- B39
USB6+ A37
USB6- A36
USB7+ B37
USB7- B36
USB_0_1_OC# B44 I CMOS 3.3V Suspend/3.3V PU 10k to 3.3VSB Connect to Overcurrent of USB Power Switch
USB over-current sense, USB channels 0 and 1. A pull-up for this line
shall be present on the Module. An open drain driver from a USB
current monitor on the Carrier Board may drive this line low. Do not
pull this line high on the Carrier Board.
USB_2_3_OC# A44 I CMOS 3.3V Suspend/3.3V PU 10k to 3.3VSB Connect to Overcurrent of USB Power Switch
USB over-current sense, USB channels 2 and 3. A
shall be present on the Module. An open drain driver from a USB
current monitor on the Carrier Board may drive this line low. Do not
pull this line high on the Carrier Board.
USB_4_5_OC# B38 I CMOS 3.3V Suspend/3.3V PU 10k to 3.3VSB Connect to Overcurrent of USB Power Switch
USB over-current sense, USB channels 4 and 5. A pull-up for this line
shall be present on the Module. An open drain driver from a USB
current monitor on the Carrier Board may drive this line low. Do not
ull this line high on the Carrier Board.
USB_6_7_OC# A38 I CMOS 3.3V Suspend/3.3V PU 10k to 3.3VSB Connect to Overcurrent of USB Power Switch
USB over-current sense, USB channels 6 and 7. A pull-up for this line
shall be present on the Module. An open drain driver from a USB
current monitor on the Carrier Board may drive this line low. Do not
pull this line high on the Carrier Board.
USB_SSTX0+ D4 AC Coupling capacitor
USB_SSTX0- D3 AC Coupling capacitor
USB_SSRX0+ C4
USB_SSRX0- C3
USB_SSTX1+ D7 AC Coupling capacitor
USB_SSTX1- D6 AC Coupling capacitor
USB_SSRX1+ C7
USB_SSRX1- C6
USB_SSTX2+ D10 AC Coupling capacitor
USB_SSTX2- D9 AC Coupling capacitor
USB_SSRX2+ C10
USB_SSRX2- C9
USB_SSTX3+ D13 AC Coupling capacitor
USB_SSTX3- D12 AC Coupling capacitor
USB_SSRX3+ C13
USB_SSRX3- C12
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
I PCIE AC coupled off Modul Additional receive signal differential pairs for the SuperSpeed USB data path.
Additional receive signal differential pairs for the SuperSpeed USB data path.
O PCIE AC coupled on Module Additional transmit signal differential pairs for the SuperSpeed USB data path.
I PCIE AC coupled off Modul Additional receive signal differential pairs for the SuperSpeed USB data path.
O PCIE AC coupled on Module Additional transmit signal differential pairs for the SuperSpeed USB data path.
I PCIE AC coupled off Modul Additional receive signal differential pairs for the SuperSpeed USB data path.
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
O PCIE AC coupled on Module Additional transmit signal differential pairs for the SuperSpeed USB data path.
I PCIE AC coupled off Modul
O PCIE AC coupled on Module Additional transmit signal differential pairs for the SuperSpeed USB data path.
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
I/O USB 3.3V Suspend/3.3V USB differential pairs 6
I/O USB 3.3V Suspend/3.3V USB differential pairs 5
I/O USB 3.3V Suspend/3.3V
USB differential pairs 7, USB7 may be configured as a USB client or as a host, or both, at the
Module designer's discretion.(CR901-B default set as a host)
3.3V Suspend/3.3V USB differential pairs 4
I/O USB 3.3V Suspend/3.3V USB differential pairs 3
USB Signals Description
I/O USB 3.3V Suspend/3.3V USB differential pairs 0
I/O USB
I/O USB 3.3V Suspend/3.3V USB differential pairs 2
I/O USB 3.3V Suspend/3.3V USB differential pairs 1

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Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
USB0+ A46
USB0- A45
USB1+ B46
USB1- B45
USB2+ A43
USB2- A42
USB3+ B43
USB3- B42
USB4+ A40
USB4- A39
USB5+ B40
USB5- B39
USB6+ A37
USB6- A36
USB7+ B37
USB7- B36
USB_0_1_OC# B44 I CMOS 3.3V Suspend/3.3V PU 10k to 3.3VSB Connect to Overcurrent of USB Power Switch
USB over-current sense, USB channels 0 and 1. A pull-up for this line
shall be present on the Module. An open drain driver from a USB
current monitor on the Carrier Board may drive this line low. Do not
pull this line high on the Carrier Board.
USB_2_3_OC# A44 I CMOS 3.3V Suspend/3.3V PU 10k to 3.3VSB Connect to Overcurrent of USB Power Switch
USB over-current sense, USB channels 2 and 3. A
shall be present on the Module. An open drain driver from a USB
current monitor on the Carrier Board may drive this line low. Do not
ull this line high on the Carrier Board.
USB_4_5_OC# B38 I CMOS 3.3V Suspend/3.3V PU 10k to 3.3VSB Connect to Overcurrent of USB Power Switch
USB over-current sense, USB channels 4 and 5. A pull-up for this line
shall be present on the Module. An open drain driver from a USB
current monitor on the Carrier Board may drive this line low. Do not
ull this line high on the Carrier Board.
USB_6_7_OC# A38 I CMOS 3.3V Suspend/3.3V PU 10k to 3.3VSB Connect to Overcurrent of USB Power Switch
USB over-current sense, USB channels 6 and 7. A pull-up for this line
shall be present on the Module. An open drain driver from a USB
current monitor on the Carrier Board may drive this line low. Do not
ull this line high on the Carrier Board.
USB_SSTX0+ D4 AC Coupling capacitor
USB_SSTX0- D3 AC Coupling capacitor
USB_SSRX0+ C4
USB_SSRX0- C3
USB_SSTX1+ D7 AC Coupling capacitor
USB_SSTX1- D6 AC Coupling capacitor
USB_SSRX1+ C7
USB_SSRX1- C6
USB_SSTX2+ D10 AC Coupling capacitor
USB_SSTX2- D9 AC Coupling capacitor
USB_SSRX2+ C10
USB_SSRX2- C9
USB_SSTX3+ D13 AC Coupling capacitor
USB_SSTX3- D12 AC Coupling capacitor
USB_SSRX3+ C13
USB_SSRX3- C12
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
LVDS_A0+ A71
LVDS_A0- A72
LVDS_A1+ A73
LVDS_A1- A74
LVDS_A2+ A75
LVDS_A2- A76
LVDS_A3+ A78
LVDS_A3- A79
LVDS_A_CK+ A81
LVDS_A_CK- A82
LVDS_B0+ B71
LVDS_B0- B72
LVDS_B1+ B73
LVDS_B1- B74
LVDS_B2+ B75
LVDS_B2- B76
LVDS_B3+ B77
LVDS_B3- B78
LVDS_B_CK+ B81
LVDS_B_CK- B82
LVDS_VDD_EN A77 O CMOS 3.3V / 3.3V PD 100K to GND
Connect to enable control of LVDS
circuit
LVDS panel power enable
LVDS_BKLT_EN B79 O CMOS 3.3V / 3.3V PD 100K to GND
Connect to enable control of LVDS panel backlight
ower circuit.
LVDS panel backlight enable
LVDS_BKLT_CTRL B83 O CMOS 3.3V / 3.3V PD 100K to GND
Connect to brightness control of LVDS panel
backlight power circuit.
LVDS panel backlight brightness control
LVDS_I2C_CK A83 I/O OD CMOS 3.3V / 3.3V PU 2.2K to 3.3V Connect to DDC clock of LVDS panel I2C clock output for LVDS display use
LVDS_I2C_DAT A84 I/O OD CMOS 3.3V / 3.3V PU 2.2K to 3.3V Connect to DDC data of LVDS panel I2C data line for LVDS display use
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
LPC_AD0 B4
LPC_AD1 B5
LPC_AD2 B6
LPC_AD3 B7
LPC_FRAME# B3 O CMOS 3.3V / 3.3V LPC frame indicates the start of an LPC cycle
LPC_DRQ0# B8
LPC_DRQ1# B9
LPC_SERIRQ A50 I/O CMOS 3.3V / 3.3V PU 10K to 3.3V LPC serial interrupt
LPC_CLK B10 O CMOS 3.3V / 3.3V LPC clock output - 33MHz nominal
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
3.3V / 3.3V LPC serial DMA request
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
LVDS Channel B differential clock
O LVDS LVDS Connect to LVDS connector
Connect to LVDS connector
LVDS Channel A differential clockO LVDS LVDS Connect to LVDS connector
O LVDS
O LVDS LVDS Connect to LVDS connector
O LVDS LVDS Connect to LVDS connector
I/O CMOS 3.3V / 3.3V
Connect to LPC device
LVDS Channel B differential pairs
Ther LVDS flat panel differential pairs (LVDS_A[0:3]+/-, LVDS_B[0:3]+/-. LVDS_A_CK+/-,
LVDS_B_CK+/-) shall have 100Ω terminations across the pairs at the destination. These
terminations may be on the Carrier Board if the Carrier Board implements a LVDS deserializer
on-board
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
O LVDS LVDS Connect to LVDS connector
LVDS Channel A differential pairs
Ther LVDS flat panel differential pairs (LVDS_A[0:3]+/-, LVDS_B[0:3]+/-. LVDS_A_CK+/-,
LVDS_B_CK+/-) shall have 100Ω terminations across the pairs at the destination. These
terminations may be on the Carrier Board if the Carrier Board implements a LVDS deserializer
on-board
O LVDS Connect to LVDS connector
O LVDS LVDS
Connect to LVDS connector
LVDS
LVDS
Connect to LVDS connector
O LVDS LVDS
LPC multiplexed address, command and data bus
O LVDS LVDS Connect to LVDS connector
I PCIE AC coupled off Modul Additional receive signal differential pairs for the SuperSpeed USB data path.
Additional receive signal differential pairs for the SuperSpeed USB data path.
O PCIE AC coupled on Module Additional transmit signal differential pairs for the SuperSpeed USB data path.
I PCIE AC coupled off Modul Additional receive signal differential pairs for the SuperSpeed USB data path.
O PCIE AC coupled on Module Additional transmit signal differential pairs for the SuperSpeed USB data path.
I PCIE AC coupled off Modul Additional receive signal differential pairs for the SuperSpeed USB data path.
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
O PCIE AC coupled on Module Additional transmit signal differential pairs for the SuperSpeed USB data path.
I PCIE AC coupled off Modul
O PCIE AC coupled on Module Additional transmit signal differential pairs for the SuperSpeed USB data path.
Connect 90Ω @100MHz Common Choke in series
and ESD suppressors to GND to USB connector
I/O USB 3.3V Suspend/3.3V USB differential pairs 6
I/O USB 3.3V Suspend/3.3V USB differential pairs 5
I/O USB 3.3V Suspend/3.3V
USB differential pairs 7, USB7 may be configured as a USB client or as a host, or both, at the
Module designer's discretion.(CR901-B default set as a host)
3.3V Suspend/3.3V USB differential pairs 4
I/O USB 3.3V Suspend/3.3V USB differential pairs 3
USB Signals Description
I/O USB 3.3V Suspend/3.3V USB differential pairs 0
I/O USB
I/O USB 3.3V Suspend/3.3V USB differential pairs 2
I/O USB 3.3V Suspend/3.3V USB differential pairs 1

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24
Chapter 3
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
SPI_CS# B97 O CMOS 3.3V Suspend/3.3V
Connect a series resistor 33
to Carrier
Board SPI Device CS# pin
Chip select for Carrier Board SPI - may be sourced from chipset SPI0 or SPI1
SPI_MISO A92 I CMOS 3.3V Suspend/3.3V
Connect a series resistor 33
to Carrier
Board SPI Device SO pin
Data in to Module from Carrier SPI
SPI_MOSI A95 O CMOS 3.3V Suspend/3.3V
Connect a series resistor 33
to Carrier
Board SPI Device SI pin
Data out from Module to Carrier SPI
SPI_CLK A94 O CMOS 3.3V Suspend/3.3V
Connect a series resistor 33
to Carrier
Board SPI Device SCK pin
Clock from Module to Carrier SPI
SPI_POWER A91 O 3.3V Suspend/3.3V
Power supply for Carrier Board SPI – sourced from Module – nominally
3.3V. The Module shall provide a minimum of 100mA on SPI_POWER.
Carriers shall use less than 100mA of SPI_POWER. SPI_POWER
shall only be used to power SPI devices on the Carrier
BIOS
34
BIOS_DIS1# B88
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
VGA_RED B89 O Analog Analog PD 150R PD 150R Red for monitor. Analog output
VGA_GRN B91 O Analog Analog PD 150R PD 150R Green for monitor. Analog output
VGA_BLU B92 O Analog Analog PD 150R PD 150R Blue for monitor. Analog output
VGA_HSYNC B93 O CMOS 3.3V / 3.3V Horizontal sync output to VGA monitor
VGA_VSYNC B94 O CMOS 3.3V / 3.3V Vertical sync output to VGA monitor
VGA_I2C_CK B95 I/O OD CMOS 3.3V / 3.3V PD 2.2K to 3.3V DDC clock line (I2C port dedicated to identify VGA monitor capabilities)
VGA_I2C_DAT B96 I/O OD CMOS 3.3V / 3.3V PD 2.2K to 3.3V DDC data line.
SPI Signals Description
NA
Selection straps to determine the BIOS boot device.
The Carrier should only float these or pull them low, please refer to
COM Express Module Base Specification Revision 2.1 for strapping options of BIOS disable signals.
I CMOS
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
I2C_CK B33 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K to 3.3VSB General purpose I2C port clock output
I2C_DAT B34 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K to 3.3VSB General purpose I2C port data I/O line
SPKR B32 O CMOS 3.3V / 3.3V
Output for audio enunciator - the "speaker" in PC-AT systems.
This port provides the PC beep signal and is mostly intended for
debugging purposes.
WD
B27 O CMOS 3.3V / 3.3V Output indicating that a watchdog time-out event has occurred.
FAN_PWNOUT B101 O OD CMOS 3.3V / 12V Fan speed control. Uses the Pulse Width Modulation (PWM) technique to control the fan's RPM.
FAN_TACHIN B102 I OD CMOS 3.3V / 12V Fan tachometer input for a fan with a two pulse output.
TPM_PP A96 I CMOS 3.3V / 3.3V PD 1K
Trusted Platform Module (TPM) Physical Presence pin. Active high.
TPM chip has an internal pull down. This signal is used to indicate
Physical Presence to the TPM.
Miscellaneous Signal Descriptions
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
SER0_TX A98 O CMOS 5V/5V PD 4.7K General purpose serial port 0 transmitter
SER0_RX A99 I CMOS 3.3V/5V PU 47K to 3.3V General purpose serial port 0 receiver
SER1_TX A101 O CMOS 5V/5V PD 4.7K General purpose serial port 1 transmitter
SER1_RX A102 I CMOS 3.3V/5V PU 47K to 3.3V General purpose serial port 1 receiver
Serial Interface Signals Descriptions

www.dfi .comChapter 3 Hardware Installation
25
Chapter 3
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
PWRBTN# B12 I CMOS 3.3V Suspend/3.3V PU 10K to 3.3VSB
A falling edge creates a power button event. Power button events can
be used to bring a system out of S5 soft off and other suspend states,
as well as powering the system down.
SYS_RESET# B49 I CMOS 3.3V Suspend/3.3V PU 10K to 3.3V
Reset button input. Active low request for Module to reset and reboot.
May be falling edge sensitive. For situations when SYS_RESET# is
not able to reestablish control of the system, PWR_OK or a power
cycle may be used.
CB_RESET# B50 O CMOS 3.3V Suspend/3.3V
Reset output from Module to Carrier Board. Active low. Issued by
Module chipset and may result from a low SYS_RESET# input, a low
PWR_OK input, a VCC_12V power input that falls below the minimum
specification, a watchdog timeout, or may be initiated by the Module
software.
PWR_OK B24 I CMOS 3.3V / 3.3V PU 10K to 3.3V
Power OK from main power supply. A high value indicates that the
power is good. This signal can be used to hold off Module startup to
allow Carrier based FPGAs or other configurable devices time to be
programmed.
SUS_STAT# B18 O CMOS 3.3V Suspend/3.3V Indicates imminent suspend operation; used to notify LPC devices.
SUS_S3# A15 O CMOS 3.3V Suspend/3.3V
Indicates system is in Suspend to RAM state. Active low output. An
inverted copy of SUS_S3# on the Carrier Board may be used to
enable the non-standby power on a typical ATX supply.
SUS_S4# A18 O CMOS 3.3V Suspend/3.3V Indicates system is in Suspend to Disk state. Active low output.
SUS_S5# A24 O CMOS 3.3V Suspend/3.3V Indicates system is in Soft Off state.
WAKE0# B66 I CMOS 3.3V Suspend/3.3V PU 10K to 3.3VSB PCI Express wake up signal.
WAKE1# B67 I CMOS 3.3V Suspend/3.3V PU 10K to 3.3VSB
General purpose wake up signal. May be used to implement wake-up
on PS2 keyboard or mouse activity.
BATLOW# A27 I CMOS 3.3V Suspend/ 3.3V PU 10K to 3.3VSB
Indicates that external battery is low.
This port provides a battery-low signal to the Module for orderly
transitioning to power saving or power cut-off ACPI modes.
LID# A103 I OD CMOS 3.3V Suspend/12V LID switch. Low active signal used by the ACPI operating system for a LID switch.
SLEEP# B103 I OD CMOS 3.3V Suspend/12V PU 10K to 3.3VSB
Sleep button. Low active signal used by the ACPI operating system to bring the
system to sleep state or to wake it up again.
THRM# B35 I CMOS 3.3V / 3.3V PU 10K to 3.3V Input from off-Module temp sensor indicating an over-temp situation.
THRMTRIP# A35 O CMOS 3.3V / 3.3V PU 10K to 3.3V Active low output indicating that the CPU has entered thermal shutdown.
SMB_CK B13 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K to 3.3VSB System Management Bus bidirectional clock line.
SMB_DAT B14 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K to 3.3VSB System Management Bus bidirectional data line.
SMB_ALERT# B15 I CMOS 3.3V Suspend/3.3V
System Management Bus Alert – active low input can be used to
generate an SMI# (System Management Interrupt) or to wake the system.
Power and System Management Signals Descriptions
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
GPO0 A93
GPO1 B54
GPO2 B57
GPO3 B63
GPI0 A54 PU 47K to 3.3V
GPI1 A63 PU 47K to 3.3V
GPI2 A67 PU 47K to 3.3V
GPI3 A85 PU 47K to 3.3V
I CMOS 3.3V / 3.3V General purpose input pins.
GPIO Signals Descriptions
O CMOS General purpose output pins.3.3V / 3.3V

www.d.comChapter 3 Hardware Installation
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
SPI_CS# B97 O CMOS 3.3V Suspend/3.3V
Connect a series resistor 33Ω
to Carrier
Board SPI Device CS# pin
Chip select for Carrier Board SPI - may be sourced from chipset SPI0 or SPI1
SPI_MISO A92 I CMOS 3.3V Suspend/3.3V
Connect a series resistor 33Ω
to Carrier
Board SPI Device SO pin
Data in to Module from Carrier SPI
SPI_MOSI A95 O CMOS 3.3V Suspend/3.3V
Connect a series resistor 33Ω
to Carrier
Board SPI Device SI pin
Data out from Module to Carrier SPI
SPI_CLK A94 O CMOS 3.3V Suspend/3.3V
Connect a series resistor 33Ω
to Carrier
Board SPI Device SCK pin
Clock from Module to Carrier SPI
SPI_POWER A91 O 3.3V Suspend/3.3V
Power supply for Carrier Board SPI – sourced from Module – nominally
3.3V. The Module shall provide a minimum of 100mA on SPI_POWER.
Carriers shall use less than 100mA of SPI_POWER. SPI_POWER
shall only be used to power SPI devices on the Carrier
BIOS
34
BIOS_DIS1# B88
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
VGA_RED B89 O Analog Analog PD 150R PD 150R Red for monitor. Analog output
VGA_GRN B91 O Analog Analog PD 150R PD 150R Green for monitor. Analog output
VGA_BLU B92 O Analog Analog PD 150R PD 150R Blue for monitor. Analog output
VGA_HSYNC B93 O CMOS 3.3V / 3.3V Horizontal sync output to VGA monitor
VGA_VSYNC B94 O CMOS 3.3V / 3.3V Vertical sync output to VGA monitor
VGA_I2C_CK B95 I/O OD CMOS 3.3V / 3.3V PD 2.2K to 3.3V DDC clock line (I2C port dedicated to identify VGA monitor capabilities)
VGA_I2C_DAT B96 I/O OD CMOS 3.3V / 3.3V PD 2.2K to 3.3V DDC data line.
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
SER0_TX A98 O CMOS 3.3V/5V PD 4.7K General purpose serial port 0 transmitter
SER0_RX A99 I CMOS 3.3V/5V PU 47K to 3.3V General purpose serial port 0 receiver
SER1_TX A101 O CMOS 3.3V/5V PD 4.7K General purpose serial port 1 transmitter
SER1_RX A102 I CMOS 3.3V/5V PU 47K to 3.3V General purpose serial port 1 receiver
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
I2C_CK B33 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K to 3.3VSB General purpose I2C port clock output
I2C_DAT B34 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K to 3.3VSB General purpose I2C port data I/O line
SPKR B32 O CMOS 3.3V / 3.3V
Output for audio enunciator - the "speaker" in PC-AT systems.
This port provides the PC beep signal and is mostly intended for
debugging purposes.
WD
B27 O CMOS 3.3V / 3.3V Output indicating that a watchdog time-out event has occurred.
FAN_PWNOUT B101 O OD CMOS 3.3V / 12V Fan speed control. Uses the Pulse Width Modulation (PWM) technique to control the fan's RPM.
FAN_TACHIN B102 I OD CMOS 3.3V / 12V Fan tachometer input for a fan with a two pulse output.
TPM_PP A96 I CMOS 3.3V / 3.3V PD 1K
Trusted Platform Module (TPM) Physical Presence pin. Active high.
TPM chip has an internal pull down. This signal is used to indicate
Physical Presence to the TPM.
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
PWRBTN# B12 I CMOS 3.3V Suspend/3.3V PU 10K to 3.3VSB
A falling edge creates a power button event. Power button events can
be used to bring a system out of S5 soft off and other suspend states,
as well as powering the system down.
SYS_RESET# B49 I CMOS 3.3V Suspend/3.3V PU 10K to 3.3V
Reset button input. Active low request for Module to reset and reboot.
May be falling edge sensitive. For situations when SYS_RESET# is
not able to reestablish control of the system, PWR_OK or a power
cycle may be used.
CB_RESET# B50 O CMOS 3.3V Suspend/3.3V
Reset output from Module to Carrier Board. Active low. Issued by
Module chipset and may result from a low SYS_RESET# input, a low
PWR_OK input, a VCC_12V power input that falls below the minimum
specification, a watchdog timeout, or may be initiated by the Module
software.
PWR_OK B24 I CMOS 3.3V / 3.3V PU 10K to 3.3V
Power OK from main power supply. A high value indicates that the
power is good. This signal can be used to hold off Module startup to
allow Carrier based FPGAs or other configurable devices time to be
programmed.
SUS_STAT# B18 O CMOS 3.3V Suspend/3.3V Indicates imminent suspend operation; used to notify LPC devices.
SUS_S3# A15 O CMOS 3.3V Suspend/3.3V
Indicates system is in Suspend to RAM state. Active low output. An
inverted copy of SUS_S3# on the Carrier Board may be used to
enable the non-standby power on a typical ATX supply.
SUS_S4# A18 O CMOS 3.3V Suspend/3.3V Indicates system is in Suspend to Disk state. Active low output.
SUS_S5# A24 O CMOS 3.3V Suspend/3.3V Indicates system is in Soft Off state.
WAKE0# B66 I CMOS 3.3V Suspend/3.3V PU 10K to 3.3VSB PCI Express wake up signal.
WAKE1# B67 I CMOS 3.3V Suspend/3.3V PU 10K to 3.3VSB
General purpose wake up signal. May be used to implement wake-up
on PS2 keyboard or mouse activity.
BATLOW# A27 I CMOS 3.3V Suspend/ 3.3V PU 10K to 3.3VSB
Indicates that external battery is low.
This port provides a battery-low signal to the Module for orderly
transitioning to power saving or power cut-off ACPI modes.
LID# A103 I OD CMOS 3.3V Suspend/12V LID switch. Low active signal used by the ACPI operating system for a LID switch.
SLEEP# B103 I OD CMOS 3.3V Suspend/12V PU 10K to 3.3VSB
Sleep button. Low active signal used by the ACPI operating system to bring the
system to sleep state or to wake it up again.
THRM# B35 I CMOS 3.3V / 3.3V PU 10K to 3.3V Input from off-Module temp sensor indicating an over-temp situation.
THRMTRIP# A35 O CMOS 3.3V / 3.3V PU 10K to 3.3V Active low output indicating that the CPU has entered thermal shutdown.
SMB_CK B13 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K to 3.3VSB System Management Bus bidirectional clock line.
SMB_DAT B14 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K to 3.3VSB System Management Bus bidirectional data line.
SMB_ALERT# B15 I CMOS 3.3V Suspend/3.3V
System Management Bus Alert – active low input can be used to
generate an SMI# (System Management Interrupt) or to wake the system.
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
GPO0 A93
GPO1 B54
GPO2 B57
GPO3 B63
GPI0 A54 PU 100K to 3.3V
GPI1 A63 PU 100K to 3.3V
GPI2 A67 PU 100K to 3.3V
GPI3 A85 PU 100K to 3.3V
Signal Pin# Pin Type Pwr Rail /Tolerance CR960 Carrier Board Description
VCC_12V
A104~A109
B104~B109
C104~C109
D104~D109
Power Primary power input: +12V nominal. All available VCC_12V pins on the connector(s) shall be used.
VCC_5V_SBY B84~B87 Power
Standby power input: +5.0V nominal. If VCC5_SBY is used, all
available VCC_5V_SBY pins on the connector(s) shall be used. Only
used for standby and suspend functions. May be left unconnected if
these functions are not used in the system design.
VCC_RTC A47 Power Real-time clock circuit-power input. Nominally +3.0V.
GND
A1, A11, A21,
A31, A41, A51,
A57, A60, A66,
A70, A80, A90,
A100, A110, B1,
B11, B21 ,B31,
B41, B51, B60,
B70, B80, B90,
B100, B110, C1,
C2, C5, C8, C11,
C14, C21, C31,
C41, C51, C60,
C70, C73, C76,
C80, C84, C87,
C90, C93, C96,
C100, C103,
C110, D1, D2,
D5, D8, D11,
D14, D21, D31,
D51, D60, D67,
D70, D73, D76,
D80, D84, D87,
D90, D93, D96,
D100, D103,
D110
Power
Ground - DC power and signal and AC signal return path.
All available GND connector pins shall be used and tied to Carrier
Board GND plane.
Power and GND Signal Descriptions
I CMOS 3.3V / 3.3V General purpose input pins.
Power and System Management Signals Descriptions
O CMOS General purpose output pins.
3.3V / 3.3V
NA
Selection straps to determine the BIOS boot device.
The Carrier should only float these or pull them low, please refer to
COM Express Module Base Specification Revision 2.1 for strapping options of BIOS disable signals.
Serial Interface Signals Descriptions

www.dfi .comChapter 4 BIOS Setup
34
Chapter 4
CPU Configuration
This section is used to configure the CPU. It will also display the detection of CPU information.
Limit CPUID Maximum
The CPUID instruction of some newer CPUs will return a value greater than 3. The
default is Disabled because this problem does not exist in the Windows series
operating systems. If you are using an operating system other than Windows, this
problem may occur. To avoid this problem, enable this field to limit the return value to
3 or less than 3
.
Intel Virtualization Technology
When this field is set to Enabled, the VMM can utilize the additional hardware
capabilities provided by the Intel Virtualization technology. A full reset is required to
change the setting.
Disabled for Windows XP.
Aptio Setup Utility - Copyright (C) 2011 American Megatrends, Inc.
Version 2.14.1219. Copyright (C) 2011 American Megatrends, Inc.
Advanced
Select Screen
Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
ESC: Exit
CPU Confi guration
Intel(R) Celeron(R) CPU 827E @1.40GHz
CPU Signature
Microcode Patch
Max CPU Speed
Min CPU Speed
CPU Speed
Processor Cores
Intel HT Technology
Intel VT-X Technology
Intel SMX Technology
64-bit
L1 Data Cache
L1 Code Cache
L2 Cache
L3 Cache
Limit CPUID Maximum
Intel Virtualization Technology
206a7
25
1400 MHz
800 MHz
1400 MHz
1
Not Supported
Supported
Not Supported
Supported
32 KB x 1
32 KB x 1
256 KB x 1
1536 KB
[Disabled]
[Diaabled]
SATA Configuration
This section is used to configure the settings of SATA device.
Enable or disable SATA
Device.
Aptio Setup Utility - Copyright (C) 2011 American Megatrends, Inc.
Version 2.14.1219. Copyright (C) 2011 American Megatrends, Inc.
SATA Controller(s)
SATA Mode Selection
SATA Test Mode
Serial ATA Port 0
Software Preserve
Serial ATA Port 1
Software Preserve
Serial ATA Port 2
Software Preserve
Serial ATA Port 3
Software Preserve
Advanced
SATA Controller(s)
This field is used to enable or disable the Serial ATA device.
SATA Mode Selection
The mode selection determines how the SATA controller(s) operates.
IDE Mode
This option configures the Serial ATA drives as Parallel ATA storage devices.
AHCI Mode
This option allows the Serial ATA devices to use AHCI (Advanced Host Controller
Interface).
RAID Mode
This option allows the Serial ATA devices to use RAID 0/1/5/10/Recovery (Redundant
Array of Independent Disks).
SATA Test Mode
This field is used to enable or disable the Serial ATA Test Mode.
[Enabled]
[IDE]
[Disabled]
ST500DM002-1BD (500.1)
SUPPORTED
Empty
Unknown
ATAPI iHOS10 ATAPI
N/A
Empty
Unknown
Select Screen
Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
ESC: Exit

www.dfi .comChapter 4 BIOS Setup
35
Chapter 4
When AHCI is selected in the SATA Mode Selection, it will display the following information:
Alternate ID
Report the alternate device ID.
Port 0/1/2/3
Enable or disable the Serial ATA port 0/1/2/3.
Hot Plug
Designate the Serial ATA port 0/1/2/3 as Hot Pluggable.
External SATA
Enable or disable the support of external Serial ATA device.
SATA Device Type
Identify the Serial ATA port connected to Solid State Drive or Hard Disk Drive.
Spin Up Device
On an edge detect from 0 to 1, the PCH starts a sequence of COMRESET initialization
to the device.
Aptio Setup Utility - Copyright (C) 2011 American Megatrends, Inc.
Version 2.14.1219. Copyright (C) 2011 American Megatrends, Inc.
Advanced
Select Screen
Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
ESC: Exit
SATA Controller(s)
SATA Mode Selection
SATA Test Mode
Aggressive LPM Support
Software Feature Mask Confi guration
Serial ATA Port 0
Software Preserve
Port 0
Hot Plug
External SATA
SATA Device Type
Spin Up Device
Serial ATA Port 1
Software Preserve
Port 1
Hot Plug
External SATA
SATA Device Type
Spin Up Device
Serial ATA Port 2
Software Preserve
Port 2
Hot Plug
External SATA
Spin Up Device
Serial ATA Port 3
Software Preserve
Port 3
Hot Plug
External SATA
Spin Up Device
[Enabled]
[AHCI]
[Disabled]
[Enabled]
ST500DM002-1BD (500.1)
SUPPORTED
[Enabled]
[Disabled]
[Disabled]
[Hard Disk Driver]
[Disabled]
Empty
Unknown
[Enabled]
[Disabled]
[Disabled]
[Hard Disk Driver]
[Disabled]
ATAPI iHOS10 ATAPI
N/A
[Enabled]
[Disabled]
[Disabled]
[Disabled]
Empty
Unknown
[Enabled]
[Disabled]
[Disabled]
[Disabled]
Determines how SATA
controller(s) operate.
When RAID is selected in the SATA Mode Selection, it will display the following information:
Aptio Setup Utility - Copyright (C) 2011 American Megatrends, Inc.
Version 2.14.1219. Copyright (C) 2011 American Megatrends, Inc.
Advanced
Select Screen
Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
ESC: Exit
SATA Controller(s)
SATA Mode Selection
SATA Test Mode
Aggressive LPM Support
Software Feature Mask Confi guration
Alternate ID
Serial ATA Port 0
Software Preserve
Port 0
Hot Plug
External SATA
SATA Device Type
Spin Up Device
Serial ATA Port 1
Software Preserve
Port 1
Hot Plug
External SATA
SATA Device Type
Spin Up Device
Serial ATA Port 2
Software Preserve
Port 2
Hot Plug
External SATA
Spin Up Device
Serial ATA Port 3
Software Preserve
Port 3
Hot Plug
External SATA
Spin Up Device
[Enabled]
[RAID]
[Disabled]
[Enabled]
[Disabled]
ST500DM002-1BD (500.1)
SUPPORTED
[Enabled]
[Disabled]
[Disabled]
[Hard Disk Driver]
[Disabled]
Empty
Unknown
[Enabled]
[Disabled]
[Disabled]
[Hard Disk Driver]
[Disabled]
ATAPI iHOS10 ATAPI
N/A
[Enabled]
[Disabled]
[Disabled]
[Disabled]
Empty
Unknown
[Enabled]
[Disabled]
[Disabled]
[Disabled]
Determines how SATA
controller(s) operate.
Aggressive LPM Support
Enable PCH to aggressively enter link power state.

www.dfi .comChapter 4 BIOS Setup
38
Chapter 4
Intel(R) Anti-Theft Technology Configuration
This section disables the Intel(R) AT Service in order to allow users to login into the platform.
This is strictly used for testing only. This does not disable Intel(R) AT Service in ME.
Intel(R) Anti-Theft Technology
Enable or disable Intel(R) Anti-Theft Technology in BIOS for testing only.
Intel(R) Anti-Theft Technology Rec
Set the number of times Recovery attempted will be allowed.
Enter Intel(R) AT Suspend Mode
The options are Enabled and Disabled (Default).
Aptio Setup Utility - Copyright (C) 2011 American Megatrends, Inc.
Version 2.14.1219. Copyright (C) 2011 American Megatrends, Inc.
Intel(R) Anti-Theft Technology Confi guration
Intel(R) Anti-Theft Technology
Intel(R) Anti-Theft Technology Rec
Enter Intel(R) AT Suspend Mode
Advanced
[Disabled]
3
[Disabled]
Select Screen
Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
ESC: Exit
Enable/Disable Intel(R)
AT in BIOS for testing
only.
USB Configuration
This section is used to configure the parameters of USB device.
Legacy USB Support
Enabled
Enable legacy USB.
Auto
Disable support for legacy when no USB devices are connected.
Disabled
Keep USB devices available only for EFI applications.
USB 3.0 Support
Enable or disable the support of USB 3.0 (XHCI) Controller.
XHCI Hand-off
This is a workaround for OSes without the support of XHCI hand-off. The change of
XHCI ownership should be claimed by the XHCI driver.
EHCI Hand-off
This is a workaround for OSes without the support of EHCI hand-off. The change of
EHCI ownership should be claimed by the EHCI driver.
USB transfer time-out
The time-out value for Control, Bulk and Interrupt transfers.
Enables Legacy USB
support. AUTO option
disables legacy support if
no USB devices are
connected. DISABLE
option will keep USB
devices available only for
EFI applications.
Aptio Setup Utility - Copyright (C) 2011 American Megatrends, Inc.
Version 2.14.1219. Copyright (C) 2011 American Megatrends, Inc.
USB Confi guration
USB Devices:
1 Keyboard, 1 Mouse, 2 Hubs
Legacy USB Support
USB3.0 Support
XHCI Hand-off
EHCI Hand-off
USB hardware delays and time-outs:
USB transfer time-out
Device reset time-out
Device power-up delay
Advanced
[Enabled]
[Enabled]
[Enabled]
[Disabled]
[20 sec]
[20 sec]
[Auto]
Select Screen
Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
ESC: Exit

www.dfi .comChapter 4 BIOS Setup
45
Chapter 4
LCD Control
Select the Video Device
which will be activated
during POST. This has no
effect if external graphics
present.
Secondary boot display
selection will appear based
on your selection.
VGA modes will be supported only on primary
display.
Aptio Setup Utility - Copyright (C) 2011 American Megatrends, Inc.
Version 2.14.1219. Copyright (C) 2011 American Megatrends, Inc.
LCD Control
Primary IGFX Boot Display
LCD Panel Type
[VBIOS Default]
[VBIOS Default]
Chipset
Select LCD panel used
by Internal Graphics
Device by selecting the
appropriate setup item.
Aptio Setup Utility - Copyright (C) 2011 American Megatrends, Inc.
Version 2.14.1219. Copyright (C) 2011 American Megatrends, Inc.
LCD Control
Primary IGFX Boot Display
LCD Panel Type
[VBIOS Default]
Chipset
LCD Panel Type
VBIOS Default
Type 1-640x480
Type 2-800x600
Type 3-1024x768
Type 4-1280x1024
Type 5-1400x1050 (108MHz)
Type 6-1400x1050 (122MHz)
Type 7-1600x1200
Type 8-1366x768
Type 9-1680x1050
Type 10-1920x1200
Type 11-1440x900
Type 12-1024x768
Type 13-1280x1024
Type 14-1280x800
Type 15-1920x1080
Type 16-2048x1536
18 Bit
18 Bit
18 Bit
36 Bit
36 Bit
36 Bit
36 Bit
18 Bit
36 Bit
36 Bit
36 Bit
24 Bit
48 Bit
36 Bit
48 Bit
48 Bit
Select Screen
Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
ESC: Exit
Select Screen
Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
ESC: Exit
Primary IGFX Boot Display
Select the Video Device which will be activated during POST. This has no effect if the
external graphics presents. The selection of secondary boot display will appear based
on your selection. VGA modes will be supported only on primary display.
LCD Panel Type
Select LCD panel used by Internal Graphics Device by selecting the appropriate setup
item.
When any device is selected in the Primary IGFX Boot Display, it will display the
following information:
Select the Video Device
which will be activated
during POST. This has no
effect if external graphics
present.
Secondary boot display
selection will appear based
on your selection.
VGA modes will be supported only on primary
display.
Aptio Setup Utility - Copyright (C) 2011 American Megatrends, Inc.
Version 2.14.1219. Copyright (C) 2011 American Megatrends, Inc.
LCD Control
Primary IGFX Boot Display
Secondary IGFX Boot Display
LCD Panel Type
[CRT]
[Disabled]
[VBIOS Default]
Chipset
Secondary IGFX Boot Display
Selects secondary display device.
Select Screen
Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
ESC: Exit

www.dfi .comChapter 4 BIOS Setup
48
Chapter 4
Hard Drive BBS Priorities
Sets the order of the legacy devices in this group.
CD/DVD ROM Drive BBS Priorities
This field is used to select the boot sequence of the CD/DVD-ROM drives. Move the
cursor to this field then press <Enter>. Use the Up or Down arrow keys to select a
device then press <+> to move it up or <-> to move it down the list.
CSM
Controls the execution of
UEFI and Legacy PXE
OpROM.
Aptio Setup Utility - Copyright (C) 2011 American Megatrends, Inc.
Version 2.14.1219. Copyright (C) 2011 American Megatrends, Inc.
Launch PXE OpROM policy
Launch Storage OpROM policy
Save & ExitChipset
Advanced
Security
Main
Boot
Select Screen
Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
ESC: Exit
[Do not launch]
[Legacy only]
Launch PXE OpROM policy
Control the execution of UEFI and legacy PXE OpROM.
Launch Storage OpROM policy
Control the execution of UEFI and legacy storage OpROM.
Security
Administrator Password
Set the administrator password.
User Password
Set the user password.
HDD0: ST500DM002-1
Set the HDD password.
Set Administrator
Password.
Aptio Setup Utility - Copyright (C) 2011 American Megatrends, Inc.
Version 2.14.1219. Copyright (C) 2011 American Megatrends, Inc.
Password Description
If ONLY the Administrator’s password is set,
then this only limits access to Setup and is only
asked for when entering Setup.
If ONLY the User’s password is set, then this
is a power on password and must be entered to
boot or enter Setup. In Setup the User will have
Administrator rights.
The password length must be
in the following range:
Minimum length 3
Maximum length 20
Administrator Password
User Password
HDD Security Confi guration:
HDD0: ST500DM002-1
Save & ExitChipset
Advanced
Main
Boot Security
Select Screen
Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
ESC: Exit
Set HDD User Password.
*** Advisable to Power
Cycle System after setting
Hard Disk Passwords **
Aptio Setup Utility - Copyright (C) 2011 American Megatrends, Inc.
Version 2.14.1219. Copyright (C) 2011 American Megatrends, Inc.
HDD Password Description:
Allows Access to Set, Modify and Clear
HardDisk User and Master Passwods.
User Password need to be installed for
Enabling Security. Master Password can
be modifi ed only when successfully unlocked
with Master password in POST.
HDD PASSWORD CONFIGURATION:
Security Supported
Security Enabled
Security Locked
Security Frozen
HDD User Pwd Status
HDD Master Pwd Status
Set User Password
Save & ExitChipset
Advanced
Main
Boot Security
Select Screen
Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
ESC: Exit
:
:
:
:
Yes
No
No
No
NOT INSTALLED
INSTALLED

www.dfi .comAppendix D Troubleshooting
78
Appendix D
Appendix D - Troubleshooting
Troubleshooting Checklist
This chapter of the manual is designed to help you with problems that you may encounter
with your personal computer. To efficiently troubleshoot your system, treat each problem individually. This is to ensure an accurate diagnosis of the problem in case a problem has multiple
causes.
Some of the most common things to check when you encounter problems while using your
system are listed below.
1. The power switch of each peripheral device is turned on.
2. All cables and power cords are tightly connected.
3. The electrical outlet to which your peripheral devices are connected is working. Test the
outlet by plugging in a lamp or other electrical device.
4. The monitor is turned on.
5. The display’s brightness and contrast controls are adjusted properly.
6. All add-in boards in the expansion slots are seated securely.
7. Any add-in board you have installed is designed for your system and is set up correctly.
Monitor/Display
If the display screen remains dark after the system is turned on:
1. Make sure that the monitor’s power switch is on.
2. Check that one end of the monitor’s power cord is properly attached to the monitor and the
other end is plugged into a working AC outlet. If necessary, try another outlet.
3. Check that the video input cable is properly attached to the monitor and the system’s
display adapter.
4. Adjust the brightness of the display by turning the monitor’s brightness control knob
.
The picture seems to be constantly moving.
1. The monitor has lost its vertical sync. Adjust the monitor’s vertical sync.
2. Move away any objects, such as another monitor or fan, that may be creating a magnetic
field around the display.
3. Make sure your video card’s output frequencies are supported by this monitor.
The screen seems to be constantly wavering.
1. If the monitor is close to another monitor, the adjacent monitor may need to be turned off.
Fluorescent lights adjacent to the monitor may also cause screen wavering.
Power Supply
When the computer is turned on, nothing happens.
1. Check that one end of the AC power cord is plugged into a live outlet and the other end
properly plugged into the back of the system.
2. Make sure that the voltage selection switch on the back panel is set for the correct type of
voltage you are using.
3. The power cord may have a “short” or “open”. Inspect the cord and install a new one if
necessary.