Desktop Motherboard M810 Schematics

5

4

3

2

1

Schematics Page Index (Title / Revision / Change Date)

Page

01
02
03

D D

04
05
06
07
08
09
10
11
12
13
14
15
16
17

C C

18
19
20
21
22
23
24
25
26
27
28
29
30
31

B B

32
33
34
35
36
37
38
39

Title of Schematics Page
Index Page
Block Diagram(System)
CLOCK GEN
CPU HOST 1/3
CPU THERMAL 2/3
CPU POWER 3/3
Eaglelake HOST/PCI-E 1/7
Eaglelake VGA/MISC 2/7
Eaglelake DDRII CH A 3/7
Eaglelake DDRII CH B 4/7
Eaglelake POWER 5/7
Eaglelake POWER 6/7
Eaglelake GND 7/7
DDRII(CHA DIMM0) 1/2
DDRII(CHB DIMM1) 2/2
DDRII Termination
ICH10 (PCIe/USB/PCI) 1/5
ICH10 (HOST/SATA) 2/5
ICH10 (PM/LAN/HDA) 3/5
ICH10 (Power) 4/5
ICH10 (Ground) 5/5
Flash ROM& Debug
Power Sequence 1/2
Power Sequence 2/2
INTEL GLAN Boazman
PCIe WLAN
TV-TUNER
PCI BUS (Bridge) 1/2
PCI BUS(MS/SD/iLink) 2/2
SATA HDD /SATA ODD
USB Port
CIR&BT
CAMERA
FELICA
Thermal & BL

FAN

LED
DB CONN(PSwitch)
NB9M (PCI-E) 1/9

Rev.

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

Date

2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20

Page

40
41
42

Title of Schematics Page
NB9M(PCIE TX) 2/9
NB9M (PCIE RX&STRAP) 3/9

NB9M (GDDR) 4/9
43 NB9M (CRT)5/9
44 NB9M (LVDS) 6/9
45
46
47

NB9M (XTAL/GPIO) 7/9

NB9M(CRYSTAL&SSIC)8/9

NB9M (GROUND) 9/9

VRAM(GDDR)48
49

VRAM(BYPASS)
50 SDVO TO LVDS
51
52
53
54
55
56
57
58
59
60
61
62
63

63
64
65
66
67
68
69
70
71
72
73
74
75
76

77
78

LVDS-Inverter

CRT

AUDIO Block Diagram(All)

AUDIO(CODEC & POWER)

AUDIO(HP)

AUDIO(SPK AMP)

AUDIO( EXT MIC & LINE IN)

AUDIO (MUTE)

AUDIO(EQ)

Power Block Diagram

DCIN

SYSPWR(+3V/+5V)

DDR2PWR(+1_8V/+0_9V)

SYSPWR(+1_1V/+1_5V)

VGAPWR

VHCORE (1)---ISL6334A

VHCORE (2) ---ISL6208

HDD PWR(+12V)

SYSPWR(+1_2V)

OVP Protect

Others PWR Plane

Corwin spring(3_3/1_1V_CL)

Hole & BOSS

Revision History(1)

Revision History(2)

Revision History(3)

Revision History(4)

Revision History(5)

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

1.0

DateRev.

2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/06/14
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/03/20
2008/04/02

Design byP. Leader Check by

A A

Project Code & Schematics Subject: PCB P/NM810 Main Board

5

4

1P-0086J00-6010

3

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.

FOXCONN

FOXCONN

FOXCONN

Title

Title

Title

Index Page

Index Page

Index Page

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

A3

A3

A3
Date: Sheet

Date: Sheet

2

Date: Sheet

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CCPBG - R&D Division

CCPBG - R&D Division

of

of

of

180Tuesday, July 15, 2008

180Tuesday, July 15, 2008

1

180Tuesday, July 15, 2008

5

4

3

2

1

M810 Block Diagram

D D

For debug

Daughter
Board

CRT

20" WSXGA+
1680 x 1050

Int. Speaker

3.0 Watt x 2

Page56

SPK_OUT_R+/-SPK_OUT_L+/-

EQ RC45801

2.5W AMP
YDA139

Page56

C C

Jack

Camera &Digital
Mic in Module

B B

MS Pro/DUO
SD Card

Page 29

EQ RC45801

Page55

Ext. Mic
In Jack

Wire
Cable

Page59

S/PDIF OUT

Page56

Line In

Page57

Page57

Int. Digital MIC. CONN
(combine into one CONN
with Camera ).

RICOH R5C833
CardReader
i.LINK

i.LINK

Page 29

default case

A A

CRT
CONN

Page 52

LVDS CONN

Page 51

Video RAM0

Page48

Video RAM1

Page48

EQ RC45801

Page59Page59

EQ RC45801

Page59

LINE_IN_R/L

Pre-AMP

Page57

Page 28

NB9M-GS
(GB1-64)

SPK_L

HP_OUT_R/LHead Phone

S/PDIF_OUT

MICI_L/R

DMIC

P39-47

SPK_R

Audio Codec

ALC889DSD

Page 54

PCI BUS

Page 50

SDVO LVDS
Transmitter

CH7308B-TF

SDVO

PCIEx16

HD_Link

HOST

PCI BUS

Page 36

CPU Fan1

CPU Fan2

Chassis Fan
(RESERVED)

SST SST

EMC1133-AIZL-TR

Local NC
Remote for VGA
Remote for Inverter
Remote for ODD

Page 35

Processor

Wolfdale/Conroe

HOST

PECI DTS

Page 4,5,6

FSB
800/1066/1333MHz

North Bridge

Eaglelake-P/G

Page7,8,9,10,11,12,13

DMIC-link

HOST

South Bridge

ICH10

PECI

PWM0

TACH0

PWM1

TACH1

PWM2
TACH2

SST

Page17,18,
19,20,21

Q S T

SST

EMC1133-AIZL-TR

local for DDR
Remote for Inverter(back up)
Remote for ODD(back up)

667/800MHz

667/800MHz

PCIEx3

LCI

SATAx2

USB2.0x8

SPI

Page 35

CK-505 Clock Generator

IDTCV183-2

Channel A

DDRII

SO-DIMM0

Channel B

DDRII

SO-DIMM1

PCIE 1

PCIE 2

PCIE 6(G-LCI)

SATA0

SATA2

USB 2.0x8

Flash BIOS 8M
(32M)

Page 22

Page
14

Page
15

Page 3

Mini-Card WLAN

802.11bgn

MINI TUNER SLOT

(JP Digital TV)

82567-V

(G-LAN)

Page 25

SATA HDD CONN

Page 30

SATA ODD CONN

Page 30

USB 6

USB 9

USB 8

USB0-4

USB 7

Page 26

Page 27

Netswap
NS682403P

Page 25

Cable

Cable

Felica Card CONN.

Page 34

Blue Tooth CONN.

Page 32

Camera CONN
Combine into one
with digital mic in

USB2.0 Portx5

Page 31

CIR

Page 32

3.5 SATA HDD

ODD Blu-ray/BD-Combo

Page 30

Page 33

Page 25

Page 30

FFC

Felica Card

Cable

Blue Tooth

B/B

Module

Wire

Camera &Digital

Cable

Mic Module

RJ45

reserved case

Only for debug

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CCPBG - R&D Division

FOXCONN

FOXCONN

FOXCONN

Title

Title

Title

Block Diagram(System)

Block Diagram(System)

Block Diagram(System)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

AIO-C Mother Board MP

AIO-C Mother Board MP

AIO-C Mother Board MP

A3

A3

A3
Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

CCPBG - R&D Division

280Tuesday, July 15, 2008

280Tuesday, July 15, 2008

1

280Tuesday, July 15, 2008

1.1

1.1

1.1

of

of

of

5

+3VRUN

R2

1 2

NCS_0_J

12

DVT:04/07:Change from
+3V_CL to +3VALW

D D

R1749

R1749

0402

0402

SLP_M19,24,72

1 2

CS_10K_J

CS_10K_J

C1429

C1429

CS_4.7U_6.3V_K

CS_4.7U_6.3V_K

0603_X5R

0603_X5R

+3VALW

23

Q148

Q148

S

S

G

G

1

D

D

12

NCS_0_J

C1139

C1139

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

R1748

R1748

1 2

NC_0_J0603

NC_0_J0603

DVT:03/26:Change Q148

CS_SI2303BDS

CS_SI2303BDS

R1750

R1750

1 2

CS_0_J0603

CS_0_J0603

0603R2

0603

0603_X5R

0603_X5R

250mA

12

C144.7U_6.3V_K

C144.7U_6.3V_K

For corwin spring

PCLK_CB
CK_P_33M_ICH
CK_48M_USB_ICH

CK_14M_ICH
CK_14M_SDVO

C C

DVT:03/23: For corwin spring

SMB ADDRESS:D2H(W)/D3H(R)

05/07: Correct
DVT1 net error
issue.

B B

CK_REF_R
CK_USB_R

CK_REF_R

A A

NC_10P_50V_J 0402_NPO

NC_10P_50V_J 0402_NPO

1 2

C24

C24

NC_10P_50V_J 0402_NPO

NC_10P_50V_J 0402_NPO

1 2

C25

C25

10P_50V_J 0402_NPO

10P_50V_J 0402_NPO

1 2

C26

C26

33P_50V_J 0402_NPO

33P_50V_J 0402_NPO

1 2

C1286

C1286

1 2

C1287 CA_33P_50V_J 0402_NPOC1287 CA_33P_50V_J 0402_NPO

CLK_ENABLE24

H_FSBSEL15,8

SMB_THRM_DATA_Q14,15,19
SMB_THRM_CLK_Q14,15,19

12

C5 27P_50V_J

C5 27P_50V_J

0402_NPO

0402_NPO

C6

C6

1 2

27P_50V_J

27P_50V_J

0402_NPO

0402_NPO

CLK_PCIE_MINI26

CLK_PCIE_MINI#26

MCH_CLK_N8
MCH_CLK_P8

H_CPU_CLK#5

H_CPU_CLK5

R1410 NV_33_J

R1410 NV_33_J

1 2

R51

1 2

R60 33_J 0402R60 33_J 0402

1 2

R1367 CA_22_J 0402R1367 CA_22_J 0402

CA_22_J

CA_22_J

1 2

5

0402

0402

0402R51

0402

CLK_ENABLE

R25 1K_J

R25 1K_J

1 2

R15 0_J 0402R15 0_J 0402

1 2

R16 0_J 0402R16 0_J 0402

1 2

R1543

R1543

1 2

0_J 0402

0_J 0402

Y1

Y1

14.31818M_20P_30PPM

14.31818M_20P_30PPM

1 2

TXC_9C14300166

TXC_9C14300166

VDD_CLK

12

12

R48

R48
47K_J

47K_J

0402

0402

12

12

R53

R53
33K_J

33K_J

0402

0402

CK14M_XTALOUT_R

12

R1768

R1768

DVT:04/14:Change the

NC_10M_J

NC_10M_J

position of R1768

0402

0402

0404_4P2R RP49

0404_4P2R

4

0404_4P2R

0404_4P2R

4

0404_4P2R

0404_4P2R

4

R58

R58
47K_J

47K_J

0402

0402

R62

R62
33K_J

33K_J

0402

0402

CK_14M_ICH 19
CK_48M_USB_ICH 17

CK_14M_SDVO 50

33

33

33

33

33

33

1. Clock Request Table

Clock Request

PIN 1
PIN 33

PCI0/CR#_A

SRCT11/CR#_H TUNER_CLKREQ#

R1767 1K_J0402R1767 1K_J0402

1 2

0402

0402

DVT:04/15:Add R15 R16

RP49

1
23

RP42

RP42

23
1

23
1

RP43

RP43

Clock Request Function

SATACLKREQ#

4

R4

R4

1 2

0_J

0_J

0402

0402

R6

R6

1 2

0_J 0402

0_J 0402

R9

R9

1 2

0_J 0402

0_J 0402

R10

R10

1 2

0_J 0402

0_J 0402

R12

R12

1 2

0_J 0402

0_J 0402

VDD_CK_VDD_PCI
VDD_CK_VDD_48

VDD_CK_VDD_SRC
VDD_CK_VDD_CPU
VDD_CK_VDD_REF

TESTMODE_FSB1_CK505

CK14M_XTALIN_R

VDD_CLK_IO
CK_PE_SRC8_R_DP

CK_PE_SRC8_R_DN
CK_H_MCH_R_DN

CK_H_MCH_R_DP
CK_H_CPU_R_DN

CK_H_CPU_R_DP

4

3

VDD_CK_VDD_PCIVDD_CLK

12

C2

C2

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

12

C3

C3

4.7U_6.3V_K

4.7U_6.3V_K

0603_X5R

0603_X5R

12

C7

C7

4.7U_6.3V_K

4.7U_6.3V_K

0603_X5R

0603_X5R

12

C13

C13

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

12

C15

C15

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

U1

U1

2

VDD_PCI

9

VDD_48

16

VDD_PLL3

39

VDD_SRC

55

VDD_CPU

61

VDD_REF

56

CKPWRGD/PD#

57

FS_B/TestMode

63

SDA

64

SCL

59

XTAL_OUT

60

XTAL_IN

12

VDD_IO

20

VDD_PLL3_IO

26

VDD_SRC_IO_2

36

VDD_SRC_IO_1

45

VDD_SRC_IO_3

49

VDD_CPU_IO

47

SRCT8/CPU_ITPT

46

SRCC8/CPU_ITPC

50

CPUC1

51

CPUT1

53

CPUC0

54

CPUT0

52

VSS_CPU

15

VSS_IO

23

VSS_SRC_1

19

VSS_PLL3

29

VSS_SRC_2

42

VSS_SRC_3

58

VSS_REF

11

VSS_48

8

VSS_PCI

IDTCV183-2

IDTCV183-2

VDD_CK_VDD_48

VDD_CK_VDD_SRC

VDD_CK_VDD_CPU

VDD_CK_VDD_REF

null

null

VDD_CLK_IO

12

C4

C4

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

12

C8

C8

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

REF/FS_C/TestSel

PCIF5/ITP_EN

PCI4/SRC5_EN

PCI3/CFGP

PCI2/TME
PCI1/CR#_B
PCI0/CR#_A

USB48/FS_A

IO_VOUT

SRCC11/CR#_G

SRCT11/CR#_H

SRCC10
SRCT10

SRCC9
SRCT9

SRCC7/CR#_E

SRCT7/CR#_F

SRCC6
SRCT6

CPU_Stop#/SRCC5

PCI_Stop#/SRCT5

SRCC4

SRCT4

SRCC3/CR#_D

SRCT3/CR#_C

SATAC/SRCC2

SATAT/SRCT2

SRCC1/SE2
SRCT1/SE1

SRCC0/DOT96C

SRCT0/DOT96T

12

C17

C17

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

12

C10

C10
10U_6.3V_M

10U_6.3V_M

0603_X5R

0603_X5R

CK_REF_R

62

CK_PCIF5_R

7

CK_PCI4_R

6

CK_PCI3_R

5

PCI2_STRAP

4
3

CK_PCI0_R

1
10

CK505_VOUT

48
32

CR#_H_TUNER

33

CK_PE_SRC10_R_DN

35

CK_PE_SRC10_R_DP

34
31

30

CK_PE_SRC7_R_DN

43

CK_PE_SRC7_R_DP

44

CK_PE_SRC6_R_DN

40

CK_PE_SRC6_R_DP

41

SB_STP_CPU#_R

37

SB_STP_PCI#_R

38
28

27

CK_PE_SRC3_R_DN

25

CK_PE_SRC3_R_DP

24

CK_PE_SRC2_R_DN

22

CK_PE_SRC2_R_DP

21
18

17

CK_96M_DOT_R_DN

14

CK_96M_DOT_R_DP

13

12

C18

C18

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

12

C9

C9
10U_6.3V_M

10U_6.3V_M

0603_X5R

0603_X5R

R19

R19

1 2

1K_J0402

1K_J0402

R1166

R1166
10K_J 0402

10K_J 0402
R26

R26

1 2

1K_J0402

1K_J0402

1 2

33_J 0402

33_J 0402

R1167

R1167
10K_J 0402

10K_J 0402

RP50 CA_33 0404_4P2RRP50 CA_33 0404_4P2R

12

CK_FSBSEL2

R54 33_J 0402R54 33_J 0402

1 2

R55 33_J 0402R55 33_J 0402

1 2

R52 33_J 0402R52 33_J 0402

1 2
12

R18

R18

12

TV_33 0404_4P2R

TV_33 0404_4P2R

RP41

RP41

1
2 3

RP45

2 3
1

33

33

RP48

2 3
1

33

33

R38 1K_JR38 1K_J

1 2

R40 1K_JR40 1K_J

1 2

1
2 3

33

33

RP44

1
2 3

CA_33 0404_4P2R

CA_33 0404_4P2R

RP47

RP47

1
2 3

C20

C20

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

CK_FSBSEL0
CK_USB_R

CK505_VOUT_R

1. Clock Request Table

FSC FSB FSA CPU SRC[7:0] PCI USB DOT REF

1 0 0 333.33 100 33 48 96 14.318
0 0 0 266.66 100 33 48 96 14.318
0 1 0 200 100 33 48 96 14.318

Clock Output

SRC2
SRC10

BYTE BIT
5

7

6 4 CR#_H mode

1

CR#_A mode 5

Control SRC10

3

BYTE BIT61

12

C19

C19

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

VDD_CLK

VDD_CLK

4

0404_4P2RRP45

0404_4P2R

4

0404_4P2RRP48

0404_4P2R

4

SB_STP_CPU#_Q
SB_STP_PCI#_Q

4

0404_4P2RRP44

0404_4P2R

4

4

SRC2

12

C21

C21

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

DVT2:05/07:Add
R1166,R1167 to
pull up pin3 &
Pin32

12

C22

C22

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

CK_P_33M_ICH 17
PCLK_CB 28

PCLK_JIG 22

CLK_PCIE_TUNER# 27
CLK_PCIE_TUNER 27

CK_PE_100M_ICH_DN 17
CK_PE_100M_ICH_DP 17

CK_PE_100M_MCH_DN 7
CK_PE_100M_MCH_DP 7

CK_REFSSCLK_DN 8
CK_REFSSCLK_DP 8

SATA_CLKN 18
SATA_CLKP 18

CK_96M_DREF_DN 8
CK_96M_DREF_DP 8

EVT2:01/28:Add this
circuit for +3VRUN
leakage in S3,S4,S5
stage

SB_STP_CPU#19

2

H_FSBSEL25,8
H_FSBSEL05,8

12

C23

C23
100P_50V_J

100P_50V_J

0402_NPO

0402_NPO

CR#_H_TUNER
CK_PCI0_R

Q126A

Q126A

3 4

1 2

NC_0_J 0402

NC_0_J 0402

2

VDD_CLK

VDD_CLK

H_FSBSEL25,8

H_FSBSEL05,8

12

R13

R13
15_J

15_J

0603

0603

NCK

Q3

Q3

C

C

B

B

1

E

E

PMBT3904.215

PMBT3904.215

2 3

null

null

CK_PE_SRC3_R_DN
CK_PE_SRC3_R_DP

VDD_CLK

R1165 475_FR1165 475_F

1 2

R59 475_FR59 475_F

1 2

DVT:03/27:Add the MINI_CARD_DET#

+5VRUN

R1654

R1654
10K_J

10K_J

0402

0402

1 2
5

G

G

SB_STP_CPU#_Q

SB_STP_CPU#_Q

S

D

S

D

2N7002DW-7-F

2N7002DW-7-F
R1868

R1868

PVT:06/11:Back up R1867 and R1868.

1

R5

R5

1 2

1K_J

1K_J

0402

0402

1 2

R8

R8

1 2

4.7K_J 0402

4.7K_J 0402

VDD_CLK

12

R14

R14
NC_0_J

NC_0_J

0402

0402

VDD_CLK_IO

NC_0_J 0402

NC_0_J 0402
NC_0_J 0402

NC_0_J 0402

GATE2_FSBSEL2

R7

R7

1K_J

1K_J

0402

0402

GATE1_FSBSEL2

R11

R11

1 2

4.7K_J 0402

4.7K_J 0402

CK_PCIF5_R
CK_PCI4_R
CK_PCI3_R
PCI2_STRAP

R1

R1

1 2

R3

R3

1 2

CH3904SPT

CH3904SPT

B

B

2

null

null

B

B

1

12

R1448

R1448

NC_10K_J

NC_10K_J

0402

0402

12

R1449

R1449
10K_J

10K_J

0402

0402

C

C

E

E

4 3

C

C

E

E

5 6

Q1BCH3904SPT

Q1BCH3904SPT

GATE2_FSBSEL0

Q2A

Q2A

null

null

null

null

GATE1_FSBSEL0

12

R36

R36

NC_10K_J

NC_10K_J

0402

0402

12

R45

R45
10K_J

10K_J

0402

0402

CK_FSBSEL2
CK_FSBSEL0

Q1A

Q1A

C

C

B

B

1

null

null

E

E

5 6

Q2B

Q2B

C

C

CH3904SPT

CH3904SPT

B

B

2

E

E

4 3

12

R46

R46

10K_J

10K_J

0402

0402

12

R49

R49
10K_J

10K_J

0402

0402

CH3904SPT

CH3904SPT

VDD_CLK

12

R47

R47

NC_10K_J

NC_10K_J

0402

0402

12

R50

R50
10K_J

10K_J

0402

0402

STRAP Pin

NV_33 0404_4P2R

NV_33 0404_4P2R

RP46

RP46

2 3
1

4

12

C1465

C1465
NC_5P_50V_C

NC_5P_50V_C

0402_NPO

0402_NPO

R1164

R1164

R61

R61

10K_J

10K_J

10K_J

10K_J

0402

0402

0402

0402

1 2

1 2

SB_STP_PCI#19

FOXCONN

FOXCONN

FOXCONN

Title

Title

Title

CLOCK GEN

CLOCK GEN

CLOCK GEN

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

Date: Sheet

Date: Sheet of

Date: Sheet of

DVT:04/22:Add C1465 C1466
and NC for RF request.

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CCPBG - R&D Division

CCPBG - R&D Division

12

C1466

C1466
NC_5P_50V_C

NC_5P_50V_C

0402_NPO

0402_NPO

TUNER_CLKREQ# 27
SATA_CLKREQ# 18

+5VRUN

1 2

Q126B

Q126B

2

G

G

6 1

D

D

2N7002DW-7-F

2N7002DW-7-F

R1867

R1867

1 2

NC_0_J 0402

NC_0_J 0402

1

CLK_PCIE_PEG# 39
CLK_PCIE_PEG 39

R1655

R1655
10K_J

10K_J

0402

0402

SB_STP_PCI#_Q

S

S

of

380Tuesday, July 15, 2008

380Tuesday, July 15, 2008

380Tuesday, July 15, 2008

5

4

3

2

1

U2A

H_A#[35..3]7

D D

H_REQ#[4..0]7

H_ADSTB0#7

H_A#[35..3]7

C C

H_ADSTB1#7

H_GTLREF0
H_GTLREF1

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

GTLREF Voltage: 0.635*VTT

PVT:06/13:Change R1861and
R70 from 57.6_F to 49.9_F

V_FSB_VTT V_FSB_VTT

12

R1860

R1860

57.6_F

B B

57.6_F

0402

0402

for GTLREF adjust.

12

R69

R69
NC_57.6_F

NC_57.6_F

0402

0402

1 2

12

12

C28

C28

R73

R73

1U_10V_K

1U_10V_K

100_F

100_F

0402_X5R

0402_X5R

0402

0402

R71

R71

10_J 0402

10_J 0402

12

C27

C27
NC_220P_50V_K

NC_220P_50V_K

0402_X7R

0402_X7R

U2A

L5
P6

M5

L4

M4

R4
T5
U6
T4
U5
U4
V5
V4

W5

K4

J5

M6

K6

J6

R6

AB6

W6

Y6

Y4
AA4
AD6
AA5
AB5
AC5
AB4
AF5
AF4
AG6
AG4
AG5
AH4
AH5

AJ5
AJ6

AD5

H1

H2

CPU SOCKET_775P

CPU SOCKET_775P

FOX_PE077526-1041-0D

FOX_PE077526-1041-0D

Max:200uA

A03#
A04#
A05#
A06#
A07#
A08#
A09#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
ADSTB0#

A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#
ADSTB1#

GTLREF0
GTLREF1

D2

ADS#

C2

BNR#

P3

INIT#

AC2

DBR#

G8

BPRI#

B2

DBSY#

C1

DRDY#

K3

A20M#

C3

LOCK#

E3

TRDY#

D4

HIT#

E4

HITM#

FERR#/PBE#

PWRGOOD

ADDRESS

ADDRESS

R3
F3

BR0#

N2

IGNNE#

L1

LINT1

K1

LINT0

P2

SMI#

G7

DEFER#

AB2

IERR#

M3

STPCLK#

N1
G23

RESET#

B3

RS0#

F5

RS1#

A3

RS2#

T1

COMP1

G2

COMP2

A13

COMP0

R1

COMP3

B13

COMP8

G10

GTLREF2

F2

GTLREF3

12/24:Change VTT_OUT_RIGHT
to VTT_OUT_LEFT

VTT_OUT_LEFTVTT_OUT_LEFT

12

R1861

R1861

57.6_F

57.6_F

0402

0402

PVT:06/11:Add the +1_2VRUN and NC R69 R70 follow CRB.

DVT:04/14:Change R1333 from NC to stuff

H_ADS# 7
H_BNR# 7

H_DBR#

H_IERR#

H_RS#0
H_RS#1
H_RS#2

H_COMP1
H_COMP2
H_COMP0
H_COMP3
H_COMP8

TP_GTLREF2
TP_GTLREF3

12/20:Add test piont for
H_GTLREF2 and H_GTLREF3

H_INIT# 18

1 2

H_BPRI# 7
H_DBSY# 7
H_DRDY# 7
H_A20M# 18
H_LOCK# 7

H_TRDY# 7
H_HIT# 7
H_ITM# 7

H_FERR# 18

H_BR0# 7

H_IGNNE# 18
H_NMI 18
H_INTR 18
H_SMI# 18
H_DEFER# 7

H_STPCLK# 18
H_CPUPWRGD 18
H_CPU_RESET# 7

R64 49.9_F 0402R64 49.9_F0402

1 2

R65 49.9_F 0402R65 49.9_F0402

1 2

R66 49.9_F 0402R66 49.9_F0402

1 2

R67 49.9_F 0402R67 49.9_F0402

1 2

R68 24.9_F0402R68 24.9_F0402

1 2

TP482 tpc26tTP482 tpc26t

1

TP483 tpc26tTP483 tpc26t

1

0_J 0402

0_J 0402
R1333

R1333

VTT_OUT_RIGHT

H_RS#[2..0] 7

12/21:Change R70

12

R70

R70
NC_57.6_F

NC_57.6_F

0402

0402

GTLREF1_DIVIDERGTLREF0_DIVIDER

12

R74

R74
100_F

100_F

0402

0402

1 2

12

C29

C29
1U_10V_K

1U_10V_K

0402_X5R

0402_X5R

R72

R72

10_J 0402

10_J 0402

Max:200uA

H_GTLREF1H_GTLREF0

12

C30

C30
NC_220P_50V_K

NC_220P_50V_K

0402_X7R

0402_X7R

SB_SYS_RESET# 19,22

R63

R63
62_F

62_F

0402

0402

1 2

Layout note:Place near the proccessor

12/24:Change VTT_OUT_RIGHT to VTT_OUT_LEFT

VTT_OUT_LEFT

VTT_OUT_LEFT

NC_100_J 0402

NC_100_J 0402

PVT:06/20:NC R1857.

12/20:Delete H_GTLREF2 and H_GTLREF3 circuit

GTLREF Layout note:

1.voltage divider should be within 1.5 inches of the processor’s GTLREF pin;

2.220p Cap should be placed as close to the processor GTLREF pin as possible;

3.IC should be within 2.5 inches of the;

4.Trace width is 4 mils minimum at breakout and as should be as wide as possible
between the breakout and the resistor divider network

A A

5

4

Layout:
Connect test
point with no
stub

H_ADS#

H_CPU_RESET#
H_CPUPWRGD

H_STPCLK#

R78

R78

1 2

62_F 0402

62_F 0402

R75

R75

1 2

R1049

R1049

1 2

62_F 0402

62_F 0402

CPU_GTLREF_CTRL119

CPU_GTLREF_CTRL218

Note:GPIO20 don't pull-H, internal pull-D

TP7 tpc26tTP7 tpc26t

1

TP8 tpc26tTP8 tpc26t

1

TP9 tpc26tTP9 tpc26t

1

TP396 tpc26tTP396 tpc26t

1

H_CPU_RESET#

H_CPUPWRGD

H_BR0#

+3VALW

+3VALW

H_D#[63..0]7

H_D#[63..0]7

CPU SIGNAL TERMINATION

12

R1851

R1851
NC_10K_J

NC_10K_J

0402

0402

12

R1857

R1857
NC_10K_J

NC_10K_J

0402

0402

R1852

R1852

1 2

NC_1K_J 0402

NC_1K_J 0402

R1858

R1858

1 2

NC_1K_J 0402

NC_1K_J 0402

GTLREF FUNCTION TABLE

CPU_GTLREF_CTRL1CPU_GTLREF_CTRL2 Ratio Set

00

0

1

11

3

1

0

U2B

U2B

H_D#0

B4

H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14

H_DBI0#7
H_DSTBN0#7
H_DSTBP0#7

H_DBI1#7
H_DSTBN1#7
H_DSTBP1#7

H_D#15

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

D00#

C5

D01#

A4

D02#

C6

D03#

A5

D04#

B6

D05#

B7

D06#

A7

D07#

A10

D08#

A11

D09#

B10

D10#

C11

D11#

D8

D12#

B12

D13#

C12

D14#

D11

D15#

A8

DBI0#

C8

DSTBN0#

B9

DSTBP0#

G9

D16#

F8

D17#

F9

D18#

E9

D19#

D7

D20#

E10

D21#

D10

D22#

F11

D23#

F12

D24#

D13

D25#

E13

D26#

G13

D27#

F14

D28#

G14

D29#

F15

D30#

G15

D31#

G11

DBI1#

G12

DSTBN1#

E12

DSTBP1#

CPU SOCKET_775P

CPU SOCKET_775P

FOX_PE077526-1041-0D

FOX_PE077526-1041-0D

D32#
D33#
D34#
D35#

FSB DATA

FSB DATA

D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#

DBI2#
DSTBN2#
DSTBP2#

D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DBI3#
DSTBN3#
DSTBP3#

G16
E15
E16
G18
G17
F17
F18
E18
E19
F20
E21
F21
G21
E22
D22
G22
D19
G20
G19

D20
D17
A14
C15
C14
B15
C18
B16
A17
B18
C21
B21
B19
A19
A22
B22
C20
A16
C17

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_DBI2# 7
H_DSTBN2# 7
H_DSTBP2# 7

H_DBI3# 7
H_DSTBN3# 7
H_DSTBP3# 7

PVT:06/13:Change this portion from NC to stuff for GTLREF adjust.

DC_OUT

CPU_GTL1

CPU_GTL4

Q174

Q174

1

Q176

Q176

1

R1850

R1850
NC_1K_J

NC_1K_J

0402

0402

1 2

C

C

B

B

E

E

NC_MMBT3904.215

NC_MMBT3904.215

2 3

DC_OUT

R1856

R1856
NC_1K_J

NC_1K_J

0402

0402

1 2

C

C

B

B

E

E

NC_MMBT3904.215

NC_MMBT3904.215

2 3

CPU_GTL3

R1849

R1849

1 2

NC_0_J 0402

NC_0_J 0402

Q173

Q173

D

D

G

CPU_GTL2

CPU_GTL5

G

1

S

S

NC_CHM2304PT

NC_CHM2304PT

2 3
12

R1853

R1853
NC_1.3K_F

NC_1.3K_F

0402

0402

CPU_GTL6

1 2

NC_0_J 0402

NC_0_J 0402

Q175

Q175

D

D

G

G

1

S

S

NC_CHM2304PT

NC_CHM2304PT

2 3
12

R1859

R1859
NC_576_F

NC_576_F

0402

0402

PVT:06/06:Add GTLREF voltage control circuit
PVT:06/20:NC GTLREF voltage control circuit

R1855

R1855

GTLREF1_DIVIDER

GTLREF1_DIVIDER_R

1 2

R1854

R1854
NC_0_J

NC_0_J

0402

0402

0.615 X VTT

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.

0.63 X VTT

0.65 X VTT

0.67 X VTT

2

FOXCONN

FOXCONN

FOXCONN

Title

Title

Title

CPU HOST 1/3

CPU HOST 1/3

CPU HOST 1/3

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

Date: Sheet

Date: Sheet of

Date: Sheet of

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CCPBG - R&D Division

CCPBG - R&D Division

1

H_D#[63..0] 7

H_D#[63..0] 7

of

480Tuesday, July 15, 2008

480Tuesday, July 15, 2008

480Tuesday, July 15, 2008

5

U2C

U2C

TP_SKTOCC#

TP10tpc26t TP10tpc26t

1

R116

R116

R114

R114

H_PECI

H_PROCHOT#

TP_CPU_THERMDA

1

TP_CPU_THERMDC

1

TESTHI_0

TESTHI_2_7

R97 0_J 0402R97 0_J 0402

1 2

R98

R98

1 2

0_J 0402

0_J 0402

TP_CPU_RESERVED

TP39tpc26t TP39tpc26t

1

TP_CPU_RSVD1

TP41tpc26t TP41tpc26t

1

TP_CPU_RSVD2

TP43tpc26t TP43tpc26t

1

TP_CPU_RSVD3

TP45tpc26t TP45tpc26t

1

TP_CPU_RSVD4

TP47tpc26t TP47tpc26t

1

TP_CPU_RSVD9

TP49tpc26t TP49tpc26t

1

TP_CPU_RSVD11

TP51tpc26t TP51tpc26t

1

TP_CPU_RSVD12

TP53tpc26t TP53tpc26t

1

TP_CPU_RSVD13

TP55tpc26t TP55tpc26t

1

TESTHI_1

TESTHI_10
TESTHI_11
TESTHI_13

D D

12/06:NC THERMDA THERMDC use PECI

V_FSB_VTT

H_DPSLP#18

C C

TP383tpc26t TP383tpc26t
TP384tpc26t TP384tpc26t

1 2

51_J 0402

51_J 0402

1 2

51_J 0402

51_J 0402

PM_SLP#8

H_PECI18

H_THRMTRIP#19

AE8

SKTOCC#

G5

PECI

M2

THERMTRIP#

AL2

PROCHOT#

AL1

THERMDA

AK1

THERMDC

F26

TESTHI00

W3

TESTHI01

F25

TESTHI02

G25

TESTHI03

G27

TESTHI04

G26

TESTHI05

G24

TESTHI06

F24

TESTHI07

H5

TESTHI10

P1

TESTHI11

L2

TESTHI13

V2

RESERVED

N4

RSVD1

P5

RSVD2

AC4

RSVD3

AE4

RSVD4

F29

RSVD9

G6

RSVD11

AH2

RSVD12

N5

RSVD13

CPU SOCKET_775P

CPU SOCKET_775P

FOX_PE077526-1041-0D

FOX_PE077526-1041-0D

VRDSEL

THRM

THRM

RSVD14
RSVD17

RSVTESTHI

RSVTESTHI

RSVD18
RSVD19
RSVD21
RSVD31
RSVD33
RSVD34
RSVD35

MSID0
MSID1

FC

FC

FC0
FC3
FC4

FC8
FC10
FC15
FC17
FC18
FC20
FC21
FC22
FC23
FC26
FC29
FC30
FC31
FC32
FC33
FC34
FC35
FC36
FC37
FC39
FC40

4

TP_MSID0

W1

TP_MSID1

V1

TP_VRDSEL

AL3

FC0

Y1

TP_FC3

J2

FC4

T2

H_FORCEPH

AK6
E24

TP_FC15

H29

PSI#

Y3

TP_FC18

AE3

TP_FC20

E5

FC21

F6

TP_FC22

J3

TP_FC23

A24

TP_FC26

E29

TP_FC29

U2

TP_FC30

U3

TP_FC31

J16

TP_FC32

H15

TP_FC33

H16

TP_FC34

J17

TP_FC35

H4

TP_FC36

AD3

TP_FC37

AB3

TP_FC39

AA2

VRM_PWRGD_R

AM6

TP_CPU_RSVD14

AE6

TP_CPU_RSVD17

D16

TP_CPU_RSVD18

A20
E23

TP_CPU_RSVD21

F23

TP_CPU_RSVD31

E7

TP_CPU_RSVD33

D14

TP_CPU_RSVD34

E6

TP_CPU_RSVD35

D1

TP11 tpc26tTP11 tpc26t

1

TP12 tpc26tTP12 tpc26t

1

TP15 tpc26tTP15 tpc26t

1

R92

R92

51_J 0402

51_J 0402

1 2
1

TP16 tpc26tTP16 tpc26t
TP526 tpc26tTP526 tpc26t

1

TP19 tpc26tTP19 tpc26t

1

TP22 tpc26tTP22 tpc26t

1

TP24 tpc26tTP24 tpc26t

1

TP26 tpc26tTP26 tpc26t

1

TP27 tpc26tTP27 tpc26t

1

TP28 tpc26tTP28 tpc26t

1

TP29 tpc26tTP29 tpc26t

1

TP30 tpc26tTP30 tpc26t

1

TP31 tpc26tTP31 tpc26t

1

TP32 tpc26tTP32 tpc26t

1

TP33 tpc26tTP33 tpc26t

1

TP34 tpc26tTP34 tpc26t

1

TP35 tpc26tTP35 tpc26t

1

TP36 tpc26tTP36 tpc26t

1

TP37 tpc26tTP37 tpc26t

1

TP38 tpc26tTP38 tpc26t

1

01/11:Delete TP46,TP18 for layout

1
1
1

1
1
1
1
1

TP40 tpc26tTP40 tpc26t
TP42 tpc26tTP42 tpc26t
TP44 tpc26tTP44 tpc26t

TP48 tpc26tTP48 tpc26t
TP50 tpc26tTP50 tpc26t
TP52 tpc26tTP52 tpc26t
TP54 tpc26tTP54 tpc26t
TP56 tpc26tTP56 tpc26t

01/05:Add R1547

R93

R93

1 2

0_J 0402

0_J 0402

FC21

VRM_PWRGD_R 24

PVT:06/04:Change +1_1VRUN to
+1_2VRUN by Intel's suggestion.

SB_DPRSTP# 8,19

PSI# 66

12

R95

R95
51_J

51_J

0402

0402

3

DVT:03/14:Change R85~R91 from
1R-0000620-F200 to 1R-0000620-J200

R85NC_62R_J 0402R85NC_62R_J 0402

1 2

R8762R_J 0402R8762R_J 0402

1 2

R9062R_J 0402R9062R_J 0402

1 2

R9162R_J 0402R9162R_J 0402

1 2

R8962R_J 0402R8962R_J 0402

1 2

XDP_BPMb0#
XDP_BPMb1#
XDP_BPMb2#
XDP_BPMb3#

Max: 580mA
Max: 580mA

TP21tpc26t TP21tpc26t
TP23tpc26t TP23tpc26t

TP25tpc26t TP25tpc26t

VTT_OUT_LEFT
VTT_OUT_RIGHT

H_FSBSEL03,8
H_FSBSEL13,8
H_FSBSEL23,8

V_FSB_VTT

TP505tpc26t TP505tpc26t

TP_VCCA

1

TP_VSSA

1

TP_VCCIOPLL

1

H_VCC_MB_REG
H_VSS_MB_REG
H_VSS_SENSE
H_VCC_SENSE

TP_VTT_SEL

1

R118

R118

1 2

470_J 0402

470_J 0402

R122

R122

1 2

470_J 0402

470_J 0402

R124

R124

1 2

470_J 0402

470_J 0402

2

VTT(1.045v~1.145v,Typ 1.1V):
Wolfdale--max 4.6A
Yorkfied--max 8A

U2D

U2D

TDO

AF1

TDO

TDI_M

W2

TDI_M

TDI

AD1

TDI

TRST#

HVCCPLL

H_FSBSEL0

H_FSBSEL1

H_FSBSEL2

TMS

AC1
AG1

AN5
AN6
AN4
AN3

A23
B23
D23
C23

F27
AA1
G29

H30
G30

G1

C9
G4
G3

J1

ITPCLKOUT0

TMS

ITPCLKOUT1

TRST#

XDP

XDP

BPMb0#
BPMb1#
BPMb2#
BPMb3#

VCCA

VID_SELECT
VSSA
VCCPLL
VCCIOPLL
VCC_MB_REG
VSS_MB_REG
VSSSENSE
VCCSENSE

VTT_SEL
VTT_OUT_LEFT
VTT_OUT_RIGHT

BSEL0
BSEL1
BSEL2

CPU SOCKET_775P

CPU SOCKET_775P

FOX_PE077526-1041-0D

FOX_PE077526-1041-0D

12/06:Only connect to output of
voltage regulator thermal monitor

H_VCC_SENSE VCC_SENSEVCC_SENSEVCC_SENSEVCC_SENSE
H_VCC_MB_REG

TDO_M

BPM0#
BPM1#
BPM2#
BPM3#
BPM4#
BPM5#

VID0
VID1
VID2
VID3
VID4
VID5
VID6
VID7

BCLK0
BCLK1

TCK

U1
AE1
AK3
AJ3

AJ2
AJ1
AD2
AG2
AF2
AG3

AN7
AM2
AL5
AM3
AL6
AK4
AL4
AM5
AM7

TDO_M
TCK

XDP_CLKOUT_DP
XDP_CLKOUT_DN

XDP_BPM0#
XDP_BPM1#
XDP_BPM2#
XDP_BPM3#
XDP_BPM4#
XDP_BPM5#

VID_SEL

R86NC_62R_J 0402R86NC_62R_J 0402

1 2

R8862R_J 0402R8862R_J 0402

1 2

1
1

DVT:03/05:Delete R1050~R1057

F28
G28

R100

R100

1 2

NC_0_J0402

NC_0_J0402

R101

R101

1 2

0_J 0402

0_J 0402

VCC_SENSEVCC_SENSEVCC_SENSEVCC_SENSE

1

VTT_OUT_RIGHTVTT_OUT_RIGHT

TP13 tpc26tTP13 tpc26t
TP14 tpc26tTP14 tpc26t

12/07:NC VID_SELECT

VID0 66
VID1 66
VID2 66
VID3 66
VID4 66
VID5 66
VID6 66
VID7 66

H_CPU_CLK 3

H_CPU_CLK# 3

VCC_SENSE 66

H_VSS_SENSE VSS_SENSE

H_VSS_MB_REG

+3VRUN +3VRUN

Q142

Q142

1

C

C

B

B

E

E

12

R1733

R1733
10K_J

10K_J

0402

0402

PMBT3904.215

PMBT3904.215

2 3

null

null

SB_THRM# 19

DVT:03/19:Change 51 ohm from
1R-0000510-F200 to 1R-0000510-J200

3

12

R1732

B B

VTT_OUT_RIGHT

+3VRUN

12

R104

R104
10K_J

10K_J

0402

0402

PWRLIMIT#_Q4R

Q4

Q4

C

PWRLIMIT#70

A A

1 2

1K_J 0402

1K_J 0402

DVT:03/05:Change Q4,add R1740

5

PWRLIMIT#_Q4L

R1740

R1740

C

B

B

1

E

E

PMBT3904.215

PMBT3904.215

2 3

null

null

12

R105

R105
NC_130_F

NC_130_F

0402

0402

H_PROCHOT#

Q5

Q5

C

C

B

B

1

E

E

PMBT3904.215

PMBT3904.215

2 3

null

null

D

D

VR_HOT66

1

G

G

S

S

2 3

4

R1758

R1758

1 2

1K_J

1K_J

0402

0402

Q118

Q118

2N7002EPT

2N7002EPT

Q143_1

R1732
10K_J

10K_J

0402

0402

SB_THRM

Q143

Q143

C

C

B

B

1

E

E

PMBT3904.215

PMBT3904.215

2 3

null

null

DVT:02/21:Add this circuit

DVT:04/12:change TESTHI_1,10,11,13
pull up from +1_1VRUN to VTT_OUT_LEFT

VTT_OUT_LEFT

R123

R123

0402

0402

R115

R115
R117

R117
R120

R120

R106

R106
R108

R108
R109

R109
R110

R110
R111

R111
R112

R112
NC_680_J

NC_680_J

0402R1323

0402

TESTHI_1

TESTHI_10
TESTHI_11
TESTHI_13

XDP_BPMb1#
XDP_BPMb2#
XDP_BPMb3#

XDP_BPM0#
XDP_BPM1#
XDP_BPM2#
XDP_BPM3#
XDP_BPM4#
XDP_BPM5#
VID_SEL

2

R1548

R1548

1 2

51_J 0402

51_J 0402

R119

R119

1 2

51_J 0402

51_J 0402

R121

R121

1 2

NC_51_J 0402

NC_51_J 0402

1 2

NC_51_J

NC_51_J

1 2

NC_51_J 0402

NC_51_J 0402

1 2

51_J 0402

51_J 0402

1 2

51_J 0402

51_J 0402

VTT_OUT_RIGHT

1 2

51_J 0402

51_J 0402

1 2

51_J 0402

51_J 0402

1 2

51_J 0402

51_J 0402

1 2

51_J 0402

51_J 0402

1 2

51_J 0402

51_J 0402

1 2

51_J 0402

51_J 0402

1 2

R1323

DVT:04/12:Change R1323 to
NC following DG Page 98

+1_5VRUN

12

R107

R107
0_J

0_J

0603

0603

12

C35

C35
10U_10V_M

10U_10V_M

0805_X5R

0805_X5R

1 2

0_J 0402

0_J 0402

R102

R102

1 2

NC_0_J 0402

NC_0_J 0402

R103

R103

1 2

0_J 0402

0_J 0402

XDP_BPMb0#

R113

R113

placed within 500 mils
of the CPU socket

Max:130mA

HVCCPLL

12

C36

C36

0.01U_10V_K

0.01U_10V_K

0402_X7R

0402_X7R

EVT2:02/12:Change C36 HH P/N
from 1C-2B20103-K100 to 1C-2B20103-K200

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.

FOXCONN

FOXCONN

FOXCONN

Title

Title

Title

CPU THERMAL 2/3

CPU THERMAL 2/3

CPU THERMAL 2/3

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

A3

Date: Sheet of

Date: Sheet of

Date: Sheet of

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CCPBG - R&D Division

CCPBG - R&D Division

1

VSS_SENSE 66

580Tuesday, July 15, 2008

580Tuesday, July 15, 2008

580Tuesday, July 15, 2008

5

VHCORE(0.85V-1.45V,VCC_BOOT=1.1V):
Wolfdale--max 75A
Yorkfied--max 125A

VHCORE VHCORE

U2E

U2E

AG22

VCCP1

D D

C C

B B

A A

K29

VCCP2

AM26

VCCP3

AL8

VCCP4

AE12

VCCP5

AE11

VCCP6

W23

VCCP7

W24

VCCP8

W25

VCCP9

T25

VCCP10

Y28

VCCP11

AL18

VCCP12

AC25

VCCP13

W30

VCCP14

Y30

VCCP15

AN14

VCCP16

AD28

VCCP17

Y26

VCCP18

AC29

VCCP19

M29

VCCP20

U24

VCCP21

J23

VCCP22

AC27

VCCP23

AM18

VCCP24

AM19

VCCP25

AB8

VCCP26

AC26

VCCP27

J8

VCCP28

J28

VCCP29

T30

VCCP30

AM9

VCCP31

AF15

VCCP32

AC8

VCCP33

AE14

VCCP34

N23

VCCP35

W29

VCCP36

U29

VCCP37

AC24

VCCP38

AC23

VCCP39

Y23

VCCP40

AN26

VCCP41

AN25

VCCP42

AN11

VCCP43

AN18

VCCP44

Y27

VCCP45

Y25

VCCP46

AD24

VCCP47

AE23

VCCP48

AE22

VCCP49

AN19

VCCP50

V8

VCCP51

K8

VCCP52

AE21

VCCP53

AM30

VCCP54

AE19

VCCP55

AC30

VCCP56

AE15

VCCP57

M30

VCCP58

K27

VCCP59

M24

VCCP60

AN21

VCCP61

T8

VCCP62

AC28

VCCP63

N25

VCCP64

AE18

VCCP65

W26

VCCP66

AD25

VCCP67

M8

VCCP68

N30

VCCP69

AD26

VCCP70

AJ26

VCCP71

AM29

VCCP72

M25

VCCP73

M26

VCCP74

L8

VCCP75

U25

VCCP76

Y8

VCCP77

AJ12

VCCP78

AD27

VCCP79

U23

VCCP80

M23

VCCP81

AG29

VCCP82

N27

VCCP83

AM22

VCCP84

U28

VCCP85

K28

VCCP86

U8

VCCP87

AK18

VCCP88

AD8

VCCP89

K24

VCCP90

AH28

VCCP91

AH21

VCCP92

CPU SOCKET_775P

CPU SOCKET_775P

FOX_PE077526-1041-0D

FOX_PE077526-1041-0D

5

VCCP93
VCCP94
VCCP95
VCCP96
VCCP97
VCCP98

VCCP99
VCCP100
VCCP101
VCCP102
VCCP103
VCCP104
VCCP105
VCCP106
VCCP107
VCCP108
VCCP109
VCCP110
VCCP111
VCCP112
VCCP113
VCCP114
VCCP115
VCCP116
VCCP117
VCCP118
VCCP119
VCCP120
VCCP121
VCCP122
VCCP123
VCCP124
VCCP125
VCCP126
VCCP127
VCCP128
VCCP129
VCCP130
VCCP131
VCCP132
VCCP133
VCCP134
VCCP135
VCCP136
VCCP137
VCCP138
VCCP139
VCCP140
VCCP141
VCCP142
VCCP143
VCCP144
VCCP145
VCCP146
VCCP147
VCCP148
VCCP149
VCCP150
VCCP151
VCCP152
VCCP153
VCCP154
VCCP155
VCCP156
VCCP157
VCCP158
VCCP159
VCCP160
VCCP161
VCCP162
VCCP163
VCCP164
VCCP165
VCCP166
VCCP167
VCCP168
VCCP169
VCCP170
VCCP171
VCCP172
VCCP173
VCCP174
VCCP175
VCCP176
VCCP177
VCCP178
VCCP179
VCCP180
VCCP181
VCCP182
VCCP183
VCCP184

AK12
AH22
T29
AM14
AM25
AE9
Y29
AK25
AK19
AG15
J22
T24
AG21
AM21
J25
U30
AL21
AG25
AJ18
J19
AH30
J15
AG12
AJ22
J20
AH18
AH26
W27
AL25
AN8
AH14
U27
T23
R8
AK22
AN29
AG11
AK26
J10
AJ15
AG26
AN9
AH15
AF18
AL15
J26
J18
J21
AG27
AK15
AF11
AD23
AM15
AF8
AK21
AG30
AJ21
AM11
AL11
AJ11
K30
AL14
AN30
AH25
AL12
AJ9
AK11
AG14
N29
AL30
AJ25
AH9
J29
J11
K25
P8
K23
AL19
AM8
T26
N28
AH12
AL22
AN15
AJ8
U26
AJ19
T27
AK8
AN12
AG9
N26

VHCORE

4

U2F

U2F

AF9

VCCP185

AF22

VCCP186

AH11

VCCP187

AJ14

VCCP188

AH19

VCCP189

AH29

VCCP190

AH27

VCCP191

AG28

VCCP192

AL26

VCCP193

AM12

VCCP194

J24

VCCP195

J13

VCCP196

T28

VCCP197

W28

VCCP198

J12

VCCP199

J27

VCCP200

AG19

VCCP201

AL9

VCCP202

AD30

VCCP203

AF21

VCCP204

Y24

VCCP205

AK14

VCCP206

J9

VCCP207

M27

VCCP208

AF14

VCCP209

J30

VCCP210

AG18

VCCP211

AA8

VCCP212

AG8

VCCP213

AL29

VCCP214

AD29

VCCP215

W8

VCCP216

AH8

VCCP217

N24

VCCP218

AN22

VCCP219

J14

VCCP220

K26

VCCP221

AF19

VCCP222

N8

VCCP223

AF12

VCCP224

M28

VCCP225

AK9

VCCP226

C10

VSS1

D12

VSS2

C24

VSS4

K2

VSS5

C22

VSS6

AN1

VSS7

B14

VSS8

K7

VSS9

AE16

VSS10

B11

VSS11

AL10

VSS12

AK23

VSS13

H12

VSS14

AF7

VSS15

AK7

VSS16

H7

VSS17

E14

VSS18

L28

VSS19

Y5

VSS20

E11

VSS21

AL24

VSS23

D21

VSS26

AL20

VSS27

D18

VSS28

AN2

VSS29

AK16

VSS30

AK20

VSS31

AM27

VSS32

AM1

VSS33

AL13

VSS34

AL17

VSS35

C19

VSS36

E28

VSS37

AH7

VSS38

AK30

VSS39

D24

VSS40

AL23

VSS41

A12

VSS42

L25

VSS43

J7

VSS44

AE28

VSS45

AE29

VSS46

CPU SOCKET_775P

CPU SOCKET_775P

FOX_PE077526-1041-0D

FOX_PE077526-1041-0D

4

PVT:06/04:Change +1_1VRUN to
+1_2VRUN by Intel's suggestion.

A26
B27
C28
A25
A28
A27
C30
A30
C25
C26
C27
B26
D27
D28
D25
D26
B28
D29
D30
B29
B30
C29
A29
B25

AL16
AK13
K5
J4
AE30
AN20
AF10
AE24
AM24
AN23
H9
H8
H13
AC6
AC7
AH6
C16
AM16
AE25
AE27
AJ28
AJ7
F19
AH13
AD7
AH16
AK17
E17
AH17
AH20
AE5
AH23
AE7
AM13
AH24
AJ30
AJ10
AF3
AK5
AJ16
AF6
AK29
AJ17
F22
AH3
AK10
AM10
F16
AJ23
F13
AG7
F10
L26
AD4

V_FSB_VTT

VTT

VTT

VTT6
VTT7
VTT8

VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24

VTT3

VTT4

VTT5

VTT1

VTT2

VSS22
VSS24
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

3

U2G

U2G

H11

VSS99

L24

VSS100

L23

VSS101

AM23

VSS102

A15

VSS103

AH10

VSS104

B24

VSS106

L3

VSS107

H27

VSS108

A21

VSS109

AE2

VSS110

AJ29

VSS111

AK27

VSS113

AK28

VSS114

B20

VSS115

AM20

VSS116

H26

VSS117

B17

VSS118

H25

VSS119

H24

VSS120

AA3

VSS121

AA7

VSS122

H23

VSS123

AA6

VSS124

H10

VSS125

H22

VSS126

H21

VSS127

H20

VSS128

H19

VSS129

H18

VSS130

AB7

VSS131

H17

VSS132

AJ24

VSS133

AM17

VSS134

AC3

VSS135

H14

VSS136

P28

VSS137

V6

VSS138

AK2

VSS139

P27

VSS140

P26

VSS141

AM28

VSS142

AJ13

VSS143

W4

VSS144

P25

VSS145

AJ20

VSS146

W7

VSS147

P23

VSS148

AG13

VSS149

AG16

VSS150

AG17

VSS151

C7

VSS152

Y2

VSS153

L30

VSS154

L29

VSS155

D15

VSS156

AL27

VSS157

Y7

VSS158

L27

VSS159

AA29

VSS160

N6

VSS161

N7

VSS162

AA28

VSS163

AN13

VSS164

AA27

VSS165

AA26

VSS166

P4

VSS167

AA25

VSS168

AA24

VSS169

P7

VSS170

E26

VSS171

V30

VSS172

R2

VSS173

V29

VSS174

V28

VSS175

R5

VSS176

V27

VSS177

R7

VSS178

E20

VSS179

AN10

VSS180

V25

VSS181

T3

VSS182

V24

VSS183

V23

VSS184

T6

VSS185

AL7

VSS186

CPU SOCKET_775P

CPU SOCKET_775P

FOX_PE077526-1041-0D

FOX_PE077526-1041-0D

3

VSS187
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276

E25
R29
R28
R27
R26
R25
U7
R24
R23
P30
V3
P29
AF16
AE10
AF13
H6
A18
A2
E2
D9
C4
A6
D6
D5
A9
D3
B1
B5
B8
AJ4
AE26
AH1
V7
C13
AK24
AB30
L6
L7
AB29
M1
AB28
E8
AG20
AN17
AB27
AB26
AN16
M7
AB25
AB24
AB23
N3
AA30
F4
AG10
AE13
AF30
H28
F7
AF29
AF28
AF27
AF26
AF25
AN28
AN27
AF24
AF23
AG24
AF17
AN24
H3
P24
AE20
AE17
E27
T7
R30
AJ27
AB1
AM4
V26
AA23
AL28
AF20
AG23

2

Wolfdale--max 75A

VHCORE

V_FSB_VTT

MAX=4.6A

2

1

12

C952

C952
22U_6.3V_M

22U_6.3V_M

0805_X5R

0805_X5R

12

C957

C957
22U_6.3V_M

22U_6.3V_M

0805_X5R

0805_X5R

12

C962

C962
22U_6.3V_M

22U_6.3V_M

0805_X5R

0805_X5R

12

12

CAP27

CAP27

+

100U_6.3V_7343

+

100U_6.3V_7343

EEFCX0J101R

EEFCX0J101R

C1419

C1419

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C953

C953
22U_6.3V_M

22U_6.3V_M

0805_X5R

0805_X5R

12

C958

C958
22U_6.3V_M

22U_6.3V_M

0805_X5R

0805_X5R

12

C963

C963
22U_6.3V_M

22U_6.3V_M

0805_X5R

0805_X5R

12

12

C1420

C1420

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C954

C954
22U_6.3V_M

22U_6.3V_M

0805_X5R

0805_X5R

12

C959

C959
22U_6.3V_M

22U_6.3V_M

0805_X5R

0805_X5R

12

C964

C964
22U_6.3V_M

22U_6.3V_M

0805_X5R

0805_X5R

C967

C967
NC_10U_6.3V_M

NC_10U_6.3V_M

1206_X5R

1206_X5R

12

C955

C955
22U_6.3V_M

22U_6.3V_M

0805_X5R

0805_X5R

12

C960

C960
22U_6.3V_M

22U_6.3V_M

0805_X5R

0805_X5R

12

C965

C965
22U_6.3V_M

22U_6.3V_M

0805_X5R

0805_X5R

EVT2:0205: Add 2 pcs 0.1uF cap for VHCORE

EVT2:01/27:Add CAP51

12

CAP51

CAP51

+

330U_2V_T

+

330U_2V_T

EEFSX0D331ER

EEFSX0D331ER

12

C1168

C1168

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C1172

C1172
22U_6.3V_M

22U_6.3V_M

0805_X5R

0805_X5R

12

C1154

C1154

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C1169

C1169

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C1173

C1173
22U_6.3V_M

22U_6.3V_M

0805_X5R

0805_X5R

FOXCONN

FOXCONN

FOXCONN

Title

Title

Title

CPU POWER 3/3

CPU POWER 3/3

CPU POWER 3/3

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet of

Date: Sheet of

12

C1155

C1155

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C1170

C1170

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

12

C1156

C1156

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C1171

C1171

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CCPBG - R&D Division

CCPBG - R&D Division

1

12

C956

C956
22U_6.3V_M

22U_6.3V_M

0805_X5R

0805_X5R

12

C961

C961
22U_6.3V_M

22U_6.3V_M

0805_X5R

0805_X5R

12

C966

C966
22U_6.3V_M

22U_6.3V_M

0805_X5R

0805_X5R

12

C1167

C1167

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

680Tuesday, July 15, 2008

680Tuesday, July 15, 2008

680Tuesday, July 15, 2008

5

4

3

2

1

PEG_RXP[0..15]40,41

R136

R136
100_F

100_F

0402

0402

PEG_RXN[0..15]40,41

1 OF 10

PCIEDMI

PCIEDMI

EXP_ICOMPO

EXP_RCOMPO

1 OF 10

PEG_TXP_0
PEG_TXN_0
PEG_TXP_1
PEG_TXN_1
PEG_TXP_2
PEG_TXN_2
PEG_TXP_3
PEG_TXN_3
PEG_TXP_4
PEG_TXN_4
PEG_TXP_5
PEG_TXN_5
PEG_TXP_6
PEG_TXN_6
PEG_TXP_7
PEG_TXN_7
PEG_TXP_8
PEG_TXN_8
PEG_TXP_9

PEG_TXN_9
PEG_TXP_10
PEG_TXN_10
PEG_TXP_11
PEG_TXN_11
PEG_TXP_12
PEG_TXN_12
PEG_TXP_13
PEG_TXN_13
PEG_TXP_14
PEG_TXN_14
PEG_TXP_15
PEG_TXN_15

EXP_COMPI

EXP_RBIAS

EXP_CLKP
EXP_CLKN

DMI_TXP_0
DMI_TXN_0
DMI_TXP_1
DMI_TXN_1
DMI_TXP_2
DMI_TXN_2
DMI_TXP_3
DMI_TXN_3

C11
B11
A10
B9
C9
D8
B8
C7
B7
B6
B3
B4
D2
C2
H2
G2
J2
K2
K1
L2
P2
M2
T2
R1
U2
V2
W4
V3
AA4
Y4
AC1
AB2

Y6
Y8
Y7
AG1
D9
E9

AC2
AD2
AD4
AE4
AE2
AF2
AF4
AG4

PEG_TXP0
PEG_TXN0
PEG_TXP1
PEG_TXN1
PEG_TXP2
PEG_TXN2
PEG_TXP3
PEG_TXN3
PEG_TXP4
PEG_TXN4
PEG_TXP5
PEG_TXN5
PEG_TXP6
PEG_TXN6
PEG_TXP7
PEG_TXN7
PEG_TXP8
PEG_TXN8
PEG_TXP9
PEG_TXN9
PEG_TXP10
PEG_TXN10
PEG_TXP11
PEG_TXN11
PEG_TXP12
PEG_TXN12
PEG_TXP13
PEG_TXN13
PEG_TXP14
PEG_TXN14
PEG_TXP15
PEG_TXN15

EXP_COMP

EXP_RBIAS

R126

R126

1 2

49.9_F

49.9_F

0402

0402

R129

R129

1 2

750_F 0402

750_F 0402

U3A

N10

R10
U10

AA9

AA10

AA7
AA6

AB10

AB9
AB3

AA2
AD10
AD11

H17

F15

F6

G7

H6

G4

J6

J7
L6
L7
N9

N7
N6
R7
R6
R9

U9
U6
U7

R4
P4

U3A

PEG_RXP_0
PEG_RXN_0
PEG_RXP_1
PEG_RXN_1
PEG_RXP_2
PEG_RXN_2
PEG_RXP_3
PEG_RXN_3
PEG_RXP_4
PEG_RXN_4
PEG_RXP_5
PEG_RXN_5
PEG_RXP_6
PEG_RXN_6
PEG_RXP_7
PEG_RXN_7
PEG_RXP_8
PEG_RXN_8
PEG_RXP_9
PEG_RXN_9
PEG_RXP_10
PEG_RXN_10
PEG_RXP_11
PEG_RXN_11
PEG_RXP_12
PEG_RXN_12
PEG_RXP_13
PEG_RXN_13
PEG_RXP_14
PEG_RXN_14
PEG_RXP_15
PEG_RXN_15

EXP_SM
EXP_SLR

PEG_RXP0
PEG_RXN0
PEG_RXP1
PEG_RXN1
PEG_RXP2
PEG_RXN2
PEG_RXP3
PEG_RXN3
PEG_RXP4
PEG_RXN4
PEG_RXP5
PEG_RXN5
PEG_RXP6
PEG_RXN6
PEG_RXP7
PEG_RXN7
PEG_RXP8
PEG_RXN8
PEG_RXP9
PEG_RXN9
PEG_RXP10
PEG_RXN10
PEG_RXP11
PEG_RXN11
PEG_RXP12
PEG_RXN12
PEG_RXP13
PEG_RXN13
PEG_RXP14
PEG_RXN14
PEG_RXP15
PEG_RXN15

R1271K_J 0603 R1271K_J 0603

1 2

R128NC_1K_J 0603 R128NC_1K_J0603

1 2

EXP_SM
EXP_SLR

12/20:NC R128

DMI_RXP017
DMI_RXN017
DMI_RXP117
DMI_RXN117
DMI_RXP217
DMI_RXN217

12

R130

R130
301_F

301_F

0603

0603

12

R132

R132
100_F

100_F

0603

0603

R135

R135

12

V_FSB_VTT

57.6_F

57.6_F

0402

0402

DMI_RXP317
DMI_RXN317

AD7

DMI_RXP_0

AD8

DMI_RXN_0

AE9

DMI_RXP_1

AE10

DMI_RXN_1

AE6

DMI_RXP_2

AE7

DMI_RXN_2

AF9

DMI_RXP_3

AF8

DMI_RXN_3

EAGLELAKE-P

EAGLELAKE-P

null

null

EXP_SM:
0 = Only SDVO or PCI Express
1 = Both SDVO and PCI Express.

EXP_SLR:
0 =BTX(LAN Reverse)
1 = Normal operation (ATX)

2 OF 10

U3B

M45

AA35

AA37
AA36

G38

G39

G43
G42

G44

H39

N39
N35
N37

N40
R35

T36
R36
R34
R37
R39
U38
T37
U34
U40
T34
Y36
U35

U37
Y37
Y34
Y38

K35
C43

T39
C39

B39
B40
K31

F33
K25

F26
C32
D32
D30

K44
H45
H40

H37
H42
D27

L36
L37
J38
F40

L38
L43

J41

J39

J40

J31
J25

L44

J42
L40
J43

L42
J44

U3B

FSB_AB_3
FSB_AB_4
FSB_AB_5
FSB_AB_6
FSB_AB_7
FSB_AB_8
FSB_AB_9
FSB_AB_10
FSB_AB_11
FSB_AB_12
FSB_AB_13
FSB_AB_14
FSB_AB_15
FSB_AB_16
FSB_AB_17
FSB_AB_18
FSB_AB_19
FSB_AB_20
FSB_AB_21
FSB_AB_22
FSB_AB_23
FSB_AB_24
FSB_AB_25
FSB_AB_26
FSB_AB_27
FSB_AB_28
FSB_AB_29
FSB_AB_30
FSB_AB_31
FSB_AB_32
FSB_AB_33
FSB_AB_34
FSB_AB_35

FSB_REQB_0
FSB_REQB_1
FSB_REQB_2
FSB_REQB_3
FSB_REQB_4

FSB_ADSTBB_0
FSB_ADSTBB_1

FSB_DSTBPB_0
FSB_DSTBNB_0
FSB_DINVB_0
FSB_DSTBPB_1
FSB_DSTBNB_1
FSB_DINVB_1
FSB_DSTBPB_2
FSB_DSTBNB_2
FSB_DINVB_2
FSB_DSTBPB_3
FSB_DSTBNB_3
FSB_DINVB_3

FSB_RSB_0
FSB_RSB_1
FSB_RSB_2

FSB_ADSB
FSB_TRDYB
FSB_DRDYB
FSB_DEFERB
FSB_HITMB
FSB_HITB
FSB_LOCKB
FSB_BREQ0B
FSB_BNRB
FSB_BPRIB
FSB_DBSYB
FSB_CPURSTB

EAGLELAKE-P

EAGLELAKE-P

null

null

H_A#[35..3]4

D D

C C

H_REQ#[4..0]4

H_ADSTB0#4
H_ADSTB1#4

H_DSTBP0#4
H_DSTBN0#4
H_DBI0#4
H_DSTBP1#4
H_DSTBN1#4
H_DBI1#4
H_DSTBP2#4
H_DSTBN2#4
H_DBI2#4
H_DSTBP3#4
H_DSTBN3#4

H_RS#[2..0]4

B B

H_DBI3#4

H_ADS#4

H_TRDY#4

H_DRDY#4

H_DEFER#4

H_ITM#4
H_HIT#4
H_LOCK#4
H_BR0#4
H_BNR#4

H_BPRI#4

H_DBSY#4

H_CPU_RESET#4

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

FSB_DB_0
FSB_DB_1
FSB_DB_2
FSB_DB_3
FSB_DB_4
FSB_DB_5
FSB_DB_6
FSB_DB_7
FSB_DB_8

FSB_DB_9
FSB_DB_10
FSB_DB_11
FSB_DB_12
FSB_DB_13
FSB_DB_14
FSB_DB_15
FSB_DB_16
FSB_DB_17
FSB_DB_18
FSB_DB_19
FSB_DB_20
FSB_DB_21
FSB_DB_22
FSB_DB_23
FSB_DB_24
FSB_DB_25
FSB_DB_26
FSB_DB_27
FSB_DB_28
FSB_DB_29
FSB_DB_30
FSB_DB_31
FSB_DB_32
FSB_DB_33
FSB_DB_34

FSB

FSB

FSB_DB_35
FSB_DB_36
FSB_DB_37
FSB_DB_38
FSB_DB_39
FSB_DB_40
FSB_DB_41
FSB_DB_42
FSB_DB_43
FSB_DB_44
FSB_DB_45
FSB_DB_46
FSB_DB_47
FSB_DB_48
FSB_DB_49
FSB_DB_50
FSB_DB_51
FSB_DB_52
FSB_DB_53
FSB_DB_54
FSB_DB_55
FSB_DB_56
FSB_DB_57
FSB_DB_58
FSB_DB_59
FSB_DB_60
FSB_DB_61
FSB_DB_62
FSB_DB_63

FSB_SWING

FSB_RCOMP

FSB_DVREF

FSB_ACCVREF

2 OF 10

H_D#0

F44

H_D#1

C44

H_D#2

D44

H_D#3

C41

H_D#4

E43

H_D#5

B43

H_D#6

D40

H_D#7

B42

H_D#8

B38

H_D#9

F38

H_D#10

A38

H_D#11

B37

H_D#12

D38

H_D#13

C37

H_D#14

D37

H_D#15

B36

H_D#16

E37

H_D#17

J35

H_D#18

H35

H_D#19

F37

H_D#20

G37

H_D#21

J33

H_D#22

L33

H_D#23

G33

H_D#24

L31

H_D#25

M31

H_D#26

M30

H_D#27

J30

H_D#28

G31

H_D#29

K30

H_D#30

M29

H_D#31

G30

H_D#32

J29

H_D#33

F29

H_D#34

H29

H_D#35

L25

H_D#36

K26

H_D#37

L29

H_D#38

J26

H_D#39

M26

H_D#40

H26

H_D#41

F25

H_D#42

F24

H_D#43

G25

H_D#44

H24

H_D#45

L24

H_D#46

J24

H_D#47

N24

H_D#48

C28

H_D#49

B31

H_D#50

F35

H_D#51

C35

H_D#52

B35

H_D#53

D35

H_D#54

D31

H_D#55

A34

H_D#56

B32

H_D#57

F31

H_D#58

D28

H_D#59

A29

H_D#60

C30

H_D#61

B30

H_D#62

E27

H_D#63

B28

0.25 xVTT_FSB

HSWING

B24

HRCOMP

R133 16.5_F 0603R133 16.5_F 0603

A23
C22
B23

1 2

MCH_GTLREF MCH_GTLREF_D

500 mils max

HSWING:

1.500 mils max

2.breakout should be kept as short as possible
and should be routed as wide as possible.

PVT:06/04:Change +1_1VRUN to
+1_2VRUN by Intel's suggestion.

R131

R131

1 2

49.9_F

49.9_F

R134

R134

1 2

49.9_F 0402

49.9_F 0402

12

C39

C39
NC_220P_50V_K

NC_220P_50V_K

0402_X7R

0402_X7R

H_D#[63..0] 4

0402

0402

HSWING_C

12

C37

C37

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

12

C38

C38
1U_10V_K

1U_10V_K

0402_X5R

0402_X5R

V_FSB_VTT

12

PEG_TXP[0..15] 40
PEG_TXN[0..15] 40

W = 10 mils
S = 6 mils spacing for 300 mils
10 mils spacing after that

+1_1VRUN

CK_PE_100M_MCH_DP 3

CK_PE_100M_MCH_DN 3

DMI_TXP0 17
DMI_TXN0 17
DMI_TXP1 17
DMI_TXN1 17
DMI_TXP2 17
DMI_TXN2 17
DMI_TXP3 17
DMI_TXN3 17

MCH_GTLREF:

A A

5

1.voltage divider should be within 1.5 inches of it’s

GMCH’s GTLREF pin.

2.C39 should be placed as close to the MCH pin as possible.

3.Trace width is 4 mils minimum at breakout and as should

be as wide as possible between the breakout and the

resistor divider network.

4

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.

FOXCONN

FOXCONN

FOXCONN

Title

Title

Title

Eaglelake HOST/PCI-E 1/7

Eaglelake HOST/PCI-E 1/7

Eaglelake HOST/PCI-E 1/7

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

A3

Date: Sheet

Date: Sheet of

3

2

Date: Sheet of

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CCPBG - R&D Division

CCPBG - R&D Division

of

780Tuesday, July 15, 2008

780Tuesday, July 15, 2008

1

780Tuesday, July 15, 2008

5

D D

U3E

W30

U32
R42

BE44

BE2

BD45

BD1
B45
B14

AW44

AN17
AN16
AK15

AF30
AE30
AD42
AD30
AC30

A44

U31
U30

R32
R31
R15
R14
N25
M17
M16

K16

G15

BE45

BE1

AN30
AN29
AK33

AJ33
AD13
AB15
AB13

A45

T15
T14

L13
L11

J20
J16
J15

U3E

NC_19
NC_18
NC_17
NC_16
NC_15
NC_14
NC_13
NC_12
NC_11
NC_10
NC_9
NC_8
NC_7
NC_6
NC_5
NC_4
NC_3
NC_2
NC_1

RSVD_29
RSVD_28
RSVD_27
RSVD_26
RSVD_25
RSVD_24
RSVD_23
RSVD_22
RSVD_21
RSVD_20
RSVD_19
RSVD_18
RSVD_17
RSVD_16
RSVD_15
RSVD_14
RSVD_13
RSVD_12
RSVD_11
RSVD_10

B2

RSVD_9
RSVD_8
RSVD_7
RSVD_6
RSVD_5
RSVD_4
RSVD_3
RSVD_2
RSVD_1

EAGLELAKE-P

EAGLELAKE-P

null

null

RSVD NC

RSVD NC

VGA

VGA

MISC

MISC

TP435tpc26t TP435tpc26t

1

TP436tpc26t TP436tpc26t

1

TP437tpc26t TP437tpc26t

1

TP438tpc26t TP438tpc26t

1

TP439tpc26t TP439tpc26t

1

TP447tpc26t TP447tpc26t

1

TP448tpc26t TP448tpc26t

1

TP440tpc26t TP440tpc26t

1

TP441tpc26t TP441tpc26t

1

TP442tpc26t TP442tpc26t

1

TP449tpc26t TP449tpc26t

1

TP443tpc26t TP443tpc26t

1

TP450tpc26t TP450tpc26t

1

TP446tpc26t TP446tpc26t

1

TP453tpc26t TP453tpc26t

1

DVT:03/01:connect U3

C C

pin AC30,
AD30,AE30,AF30 to GND

TP95tpc26t TP95tpc26t
TP97tpc26t TP97tpc26t
TP98tpc26t TP98tpc26t
TP99tpc26t TP99tpc26t
TP100tpc26t TP100tpc26t
TP101tpc26t TP101tpc26t
TP102tpc26t TP102tpc26t
TP103tpc26t TP103tpc26t
TP104tpc26t TP104tpc26t
TP105tpc26t TP105tpc26t
TP107tpc26t TP107tpc26t
TP385tpc26t TP385tpc26t
TP109tpc26t TP109tpc26t
TP111tpc26t TP111tpc26t
TP112tpc26t TP112tpc26t
TP113tpc26t TP113tpc26t
TP114tpc26t TP114tpc26t
TP115tpc26t TP115tpc26t
TP116tpc26t TP116tpc26t
TP117tpc26t TP117tpc26t
TP118tpc26t TP118tpc26t

B B

A A

TP119tpc26t TP119tpc26t
TP120tpc26t TP120tpc26t
TP121tpc26t TP121tpc26t
TP122tpc26t TP122tpc26t
TP123tpc26t TP123tpc26t
TP124tpc26t TP124tpc26t
TP125tpc26t TP125tpc26t
TP126tpc26t TP126tpc26t

TP_NC_19
TP_NC_18
TP_NC_17
TP_NC_16
TP_NC_15
TP_NC_14
TP_NC_13
TP_NC_12
TP_NC_11
TP_NC_10
TP_NC_9
TP_NC_8
TP_NC_7

TP_NC_4

TP_NC_1

TP_MCH_RSVD29

1

TP_MCH_RSVD28

1

TP_MCH_RSVD27

1

TP_MCH_RSVD26

1

TP_MCH_RSVD25

1

TP_MCH_RSVD24

1

TP_MCH_RSVD23

1

TP_MCH_RSVD22

1

TP_MCH_RSVD21

1

TP_MCH_RSVD20

1

TP_MCH_RSVD19

1

TP_MCH_RSVD18

1

TP_MCH_RSVD17

1

TP_MCH_RSVD16

1
1

TP_MCH_RSVD14

1

TP_MCH_RSVD13

1

TP_MCH_RSVD12

1

TP_MCH_RSVD11

1

TP_MCH_RSVD10

1

TP_MCH_RSVD9

1

TP_MCH_RSVD8

1

TP_MCH_RSVD7

1

TP_MCH_RSVD6

1

TP_MCH_RSVD5

1

TP_MCH_RSVD4

1

TP_MCH_RSVD3

1

TP_MCH_RSVD2

1

TP_MCH_RSVD1

1

4

5 OF 10

5 OF 10

CRT_RED

CRT_GREEN

CRT_BLUE

DAC_IREF
CRT_HSYNC
CRT_VSYNC

DualX8_Enable

CRT_IRTN

DPL_REFSSCLKINP
DPL_REFSSCLKINN

DPL_REFCLKINP

DPL_REFCLKINN

CRT_DDC_CLK

CRT_DDC_DATA
DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

JTAG_TMS

JTAG_TCK

JTAG_TDO

JTAG_TDI

RSTINB

SLPB

DPRSTPB

ICH_SYNCB

PWROK

XORTEST
ALLZTEST
ITPM_ENB

BSCANTEST

BSEL2
BSEL1
BSEL0

HPL_CLKINP

HPL_CLKINN

HDA_BCLK
HDA_RSTB

HDA_SDI

HDA_SDO

HDA_SYNC

HDA

HDA

CL_PWROK

CL_RSTB
CL_VREF

CL

CL

CL_CLK

CL_DATA

CEN

CRT_RED

B18

CRT_GREEN

D18

CRT_BLUE

C18

DAC_RSET

B15

CRT_HSYNC

D14

CRT_VSYNC

C14

DualX8_Enable

F20
F13

G8
G9

E15
D15

MCH_DDC_CLK

M15

MCH_DDC_DATA

L15

TP_DDPC_CTRLCLK

J11

TP_DDPC_CTRLDATA

F11

SDVO_CTRLCLK

G13

SDVO_CTRLDATA

J13

AN9
AN11

TP_MCH_JTAG_TDO

AN10
AR7

AN6
P42

MCH_DPRSTBP

P43
K15
AR4

CEN

J17
N17
M20

ITPM_EN#

L17
G20

MCH_BSEL2TP_MCH_RSVD15

P15

MCH_BSEL1

G16

MCH_BSEL0

F17
P29
P30

MCH_HDA_BCLK

AU4

MCH_HDA_RSTB

AV4

MCH_HDA_SDI

AU2

MCH_HDA_SDO

AV1

MCH_HDA_SYNC

AU3

AN8
AW2
AN13
AY2
AY4

R148 NC_CA_33_F 0402R148 NC_CA_33_F 0402

1 2

R149 NC_CA_33_F 0402R149 NC_CA_33_F 0402

1 2

R150

1 2

NC_1K_J

NC_1K_J

500 mils max

TP_MCH_JTAG_TMS
TP_MCH_JTAG_TCK

TP_MCH_JTAG_TDI

R159 0_J 0402R159 0_J 0402

1 2

R160

R160

1 2

CS_1K_J 0603

CS_1K_J 0603

R161

R161

1 2

NC_1K_J 0603

NC_1K_J 0603

1 2
1 2
1 2
1 2
1 2

CL_VREF_MCH

0402R150

0402

TP90 tpc26tTP90 tpc26t

1

TP91 tpc26tTP91 tpc26t

1

SDVO_CTRLCLK 50
SDVO_CTRLDATA 50

TP92 tpc26tTP92 tpc26t

1

TP93 tpc26tTP93 tpc26t

1

TP94 tpc26tTP94 tpc26t

1

TP96 tpc26tTP96 tpc26t

1

TP106 tpc26tTP106 tpc26t

1

TP108 tpc26tTP108 tpc26t

1

TP110 tpc26tTP110 tpc26t

1

R165 0_J 0402R165 0_J 0402
R166 0_J 0402R166 0_J 0402
R167 0_J 0402R167 0_J 0402
R168 0_J 0402R168 0_J 0402
R169 0_J 0402R169 0_J 0402

H_CL_CLK0 18
H_CL_DATA0 18

3

PVT:06/11:Back up CRT function:
when use CRT,stuff R144 R145
R146 R147 and NC R1489 R1488
R1487 R1481 in L sku;use the
default setting in H sku.

DVT:04/12: add option resistor
for H SKU and L SKU

PVT:06/02:Del R144 R145 R146 and R147 for
cancel CRT;Change R1489 R1488 R1487 and
R1481 from NV to normal stuff.

CRT_RED 52
CRT_GREEN 52
CRT_BLUE 52

HSYNC_3V 52
VSYNC_3V 52

PVT:06/02:Del the R148 , R149,and the
signal ports for cancel CRT function

CK_REFSSCLK_DP 3
CK_REFSSCLK_DN 3

CK_96M_DREF_DP 3
CK_96M_DREF_DN 3

MCH_DDC_CLK 52
MCH_DDC_DATA 52

PVT:06/02:Del the
MCH_DDC_CLK&DATA port for
cancel CRT.

PLT_RST# 19,22,26,27,39,50

PM_SLP# 5

SB_DPRSTP# 5,19

H_MCH_SYNC# 19

SB_PWROK 19,24

DVT:04/14: Mount R160 for
corwin spring.

MCH_CLK_P 3
MCH_CLK_N 3

12/23:Change R165~ R169

CL_PWROK 19,24
H_CL_RST0# 18

MCH_CL_REF:

1.MCH_CL_REF=0.35V;

2.Trace width/Spacing: 4mil(min)/10mil(min.) for main route;

3.Breakout area: width>5mils, L<300mils;

4. 0.1 µF cap placed as close as possible to MCH_CL_REF pin.

CL_VREF_MCH

12

C42

C42

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

Place close to MCH,
<500mil to MCH BALL

12/07:Change R148 R149
from 30 Ohm to 33 Ohm
Change R147 from 255 to 1K

+1_1V_CL

2

CRT_RED

CRT_GREEN

CRT_BLUE

DVT:04/12: change R147
(1.02k) from 5% to 1%

DAC_RSET

SDVO_CTRLDATA

SDVO_CTRLDATA

R1489

R1489
0_J

0_J
R144

R144

1 2

NC_CA_150_J 0402

NC_CA_150_J 0402

R1488

R1488
0_J

0_J

R145

R145

1 2

NC_CA_150_J 0402

NC_CA_150_J 0402

R1487

R1487
0_J

0_J
R146

R146

1 2

NC_CA_150_J0402

NC_CA_150_J0402

R1481

R1481
0_J

0_J

R147

R147

1 2

NC_CA_1.02K_F0402

NC_CA_1.02K_F0402

12

12

12

12

Place VGA RGB resistors close to MCH,
<250mils to MCH BALLs

DualX8_Enable:
2x8 PEG port Bifurcation:
0=2x8 PCIe Ports Enable
1=1x16 PCIe Port Enable

CEN:
Pulldown: Enable TCEN
Float: Disable TCEN

ITPM_ENB:
Pulldown: Enable TPM
Float: Disable TPM

SDVO DISABLED (DEFAULT INTERNAL PD)L

H SDVO CARD PRESENT/PEG DISABLED

12/21:Add R153 R154

SDVO_CTRLCLK
SDVO_CTRLDATA

12

C2620

C2620
NC_CA_15P_50V_J

NC_CA_15P_50V_J

0402_NPO

0402_NPO

MCH_DDC_DATA
MCH_DDC_CLK

1 2

NC_CA_2.2K_J 0402

NC_CA_2.2K_J 0402

1 2

NC_CA_2.2K_J 0402

NC_CA_2.2K_J 0402

12

C2621

C2621
NC_CA_15P_50V_J

NC_CA_15P_50V_J

0402_NPO

0402_NPO

R151

R151

1 2

2.2K_J 0402

2.2K_J 0402
R152

R152

1 2

2.2K_J 0402

2.2K_J 0402

EVT2:01/22:Change R157 R158 from 10Kohm to 0ohm

CK_96M_DREF_DP
CK_REFSSCLK_DP
CK_96M_DREF_DN

DVT:03/23: for corwin
spring:change from
+1_1VRUN to +1_1V_CL

12

R170

R170
1K_F

1K_F

0402

0402

12

R171

R171
464_F

464_F

0402

0402

DVT:02/20:change
R171 from 475
ohm to 464 ohm

H_FSBSEL03,5
H_FSBSEL13,5
H_FSBSEL23,5

CK_REFSSCLK_DN

1 2

10K_J 0402

10K_J 0402

1 2

10K_J 0402

10K_J 0402

1 2

10K_J 0402

10K_J 0402

12/23:Change R162 R163 R164

1

+3VRUN

R153

R153
R154

R154

1 2

NV_10K_J 0402

NV_10K_J 0402

1 2

NV_10K_J 0402

NV_10K_J 0402

R157

R157

1 2

NV_0_J 0402

NV_0_J 0402

R158

R158

1 2

NV_0_J 0402

NV_0_J 0402

R162

R162
R163

R163
R164

R164

PVT:05/30:Change R153
and R154 from CA to NC.

PVT:05/28:Back up C2620 and
C2621 for black screen issue.

+3VRUN

+1_1VRUN

R155

R155
R156

R156

MCH_BSEL0
MCH_BSEL1

MCH_BSEL2

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.

FOXCONN

FOXCONN

FOXCONN

Title

Title

Title

Eaglelake VGA/MISC 2/7

Eaglelake VGA/MISC 2/7

Eaglelake VGA/MISC 2/7

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

Date: Sheet

Date: Sheet of

5

4

3

2

Date: Sheet of

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CCPBG - R&D Division

CCPBG - R&D Division

of

880Tuesday, July 15, 2008

880Tuesday, July 15, 2008

1

880Tuesday, July 15, 2008

5

D D

DDR_A_SBS014,16
DDR_A_SBS114,16
DDR_A_SBS214,16

DDR_A_CSB014,16
DDR_A_CSB114,16

DDR_A_SCKE014,16

C C

B B

DDR_A_SCKE114,16

DDR_A_ODT014,16
DDR_A_ODT114,16

4

U3C

DDR_A_MA[14..0]14,16

TP59tpc26t TP59tpc26t
TP60tpc26t TP60tpc26t

TP63tpc26t TP63tpc26t
TP64tpc26t TP64tpc26t

TP67tpc26t TP67tpc26t
TP68tpc26t TP68tpc26t

DDR_A_CK014
DDR_A_CK#014
DDR_A_CK114
DDR_A_CK#114

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14

DDR_A_SBS0
DDR_A_SBS1
DDR_A_SBS2

DDR_A_CSB0
DDR_A_CSB1

TP_DDR_A_CSB2

1

TP_DDR_A_CSB3

1

DDR_A_SCKE0
DDR_A_SCKE1

TP_DDR_A_SCKE2

1

TP_DDR_A_SCKE3

1

DDR_A_ODT0
DDR_A_ODT1

TP_DDR_A_ODT2

1

TP_DDR_A_ODT3

1

DDR_A_CK0
DDR_A_CK#0
DDR_A_CK1
DDR_A_CK#1

BC41
BC35
BB32
BC32
BD32
BB31
AY31
BA31
BD31
BD30

AW43

BC30
BB30
AM42
BD28

AV45
AY44
BC28

AU43
AR40
AU44
AM43

BB27
BD27
BA27
AY26

AR42
AM44
AR44

AL40

AY37
BA37

AW29

AY29
AU37
AV37
AU33
AT33
AT30
AR30

AW38

AY38

U3C

DDR_A_MA_0
DDR_A_MA_1
DDR_A_MA_2
DDR_A_MA_3
DDR_A_MA_4
DDR_A_MA_5
DDR_A_MA_6
DDR_A_MA_7
DDR_A_MA_8
DDR_A_MA_9
DDR_A_MA_10
DDR_A_MA_11
DDR_A_MA_12
DDR_A_MA_13
DDR_A_MA_14

DDR_A_BS_0
DDR_A_BS_1
DDR_A_BS_2

DDR_A_CSB_0
DDR_A_CSB_1
DDR_A_CSB_2
DDR_A_CSB_3

DDR_A_CKE_0
DDR_A_CKE_1
DDR_A_CKE_2
DDR_A_CKE_3

DDR_A_ODT_0
DDR_A_ODT_1
DDR_A_ODT_2
DDR_A_ODT_3

DDR_A_CK_0
DDR_A_CKB_0
DDR_A_CK_1
DDR_A_CKB_1
DDR_A_CK_2
DDR_A_CKB_2
DDR_A_CK_3
DDR_A_CKB_3
DDR_A_CK_4
DDR_A_CKB_4
DDR_A_CK_5
DDR_A_CKB_5

3

3 OF 10

3 OF 10

DDR_A_DQ_0
DDR_A_DQ_1
DDR_A_DQ_2
DDR_A_DQ_3
DDR_A_DQ_4
DDR_A_DQ_5
DDR_A_DQ_6
DDR_A_DQ_7
DDR_A_DQ_8

DDR_A_DQ_9
DDR_A_DQ_10
DDR_A_DQ_11
DDR_A_DQ_12
DDR_A_DQ_13
DDR_A_DQ_14
DDR_A_DQ_15
DDR_A_DQ_16
DDR_A_DQ_17
DDR_A_DQ_18
DDR_A_DQ_19
DDR_A_DQ_20
DDR_A_DQ_21
DDR_A_DQ_22
DDR_A_DQ_23
DDR_A_DQ_24
DDR_A_DQ_25
DDR_A_DQ_26
DDR_A_DQ_27
DDR_A_DQ_28
DDR_A_DQ_29
DDR_A_DQ_30
DDR_A_DQ_31
DDR_A_DQ_32
DDR_A_DQ_33
DDR_A_DQ_34
DDR_A_DQ_35
DDR_A_DQ_36
DDR_A_DQ_37
DDR_A_DQ_38
DDR_A_DQ_39
DDR_A_DQ_40
DDR_A_DQ_41
DDR_A_DQ_42
DDR_A_DQ_43
DDR_A_DQ_44
DDR_A_DQ_45
DDR_A_DQ_46
DDR_A_DQ_47
DDR_A_DQ_48
DDR_A_DQ_49
DDR_A_DQ_50
DDR_A_DQ_51
DDR_A_DQ_52
DDR_A_DQ_53
DDR_A_DQ_54
DDR_A_DQ_55
DDR_A_DQ_56
DDR_A_DQ_57
DDR_A_DQ_58
DDR_A_DQ_59
DDR_A_DQ_60
DDR_A_DQ_61
DDR_A_DQ_62
DDR_A_DQ_63

BC2
BD3
BD7
BB7
BB2
BA3
BE6
BD6
BB8
AY8
BD11
BB11
BC7
BE8
BD10
AY11
BB14
BC14
BC16
BB16
BC11
BE12
BA15
BD16
AW21
AY22
AV24
AY24
AU21
AT21
AR24
AU24
AL41
AK43
AG42
AG44
AL42
AK44
AH44
AG41
AF43
AF42
AC44
AC42
AF40
AF44
AD44
AC41
AB43
AA42
W42
W41
AB42
AB44
Y44
Y40
V42
U45
R40
P44
V44
V43
R41
R44

DDR_A_DQ0
DDR_A_DQ1
DDR_A_DQ2
DDR_A_DQ3
DDR_A_DQ4
DDR_A_DQ5
DDR_A_DQ6
DDR_A_DQ7
DDR_A_DQ8
DDR_A_DQ9
DDR_A_DQ10
DDR_A_DQ11
DDR_A_DQ12
DDR_A_DQ13
DDR_A_DQ14
DDR_A_DQ15
DDR_A_DQ16
DDR_A_DQ17
DDR_A_DQ18
DDR_A_DQ19
DDR_A_DQ20
DDR_A_DQ21
DDR_A_DQ22
DDR_A_DQ23
DDR_A_DQ24
DDR_A_DQ25
DDR_A_DQ26
DDR_A_DQ27
DDR_A_DQ28
DDR_A_DQ29
DDR_A_DQ30
DDR_A_DQ31
DDR_A_DQ32
DDR_A_DQ33
DDR_A_DQ34
DDR_A_DQ35
DDR_A_DQ36
DDR_A_DQ37
DDR_A_DQ38
DDR_A_DQ39
DDR_A_DQ40
DDR_A_DQ41
DDR_A_DQ42
DDR_A_DQ43
DDR_A_DQ44
DDR_A_DQ45
DDR_A_DQ46
DDR_A_DQ47
DDR_A_DQ48
DDR_A_DQ49
DDR_A_DQ50
DDR_A_DQ51
DDR_A_DQ52
DDR_A_DQ53
DDR_A_DQ54
DDR_A_DQ55
DDR_A_DQ56
DDR_A_DQ57
DDR_A_DQ58
DDR_A_DQ59
DDR_A_DQ60
DDR_A_DQ61
DDR_A_DQ62
DDR_A_DQ63

DDR_A_DQ[63..0] 14

2

1

01/03:Delete test piont for layout

DDR_A_DQS#0

DDR_A_DQSB_0
DDR_A_DQSB_1
DDR_A_DQSB_2

DDR_A_DQS[7..0]14

DDR_A_DM[7..0]14

A A

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

BC5

BB9
BD15
AR22
AH43
AD43

BC3

BD9
BD14
AV22
AK42
AE45
AA45

Y43
T44

T42

DDR_A_DQS_0
DDR_A_DQS_1
DDR_A_DQS_2
DDR_A_DQS_3
DDR_A_DQS_4
DDR_A_DQS_5
DDR_A_DQS_6
DDR_A_DQS_7

DDR_A_DM_0
DDR_A_DM_1
DDR_A_DM_2
DDR_A_DM_3
DDR_A_DM_4
DDR_A_DM_5
DDR_A_DM_6
DDR_A_DM_7

DDR_A_DQSB_3
DDR_A_DQSB_4
DDR_A_DQSB_5
DDR_A_DQSB_6
DDR_A_DQSB_7

DDR_A_RASB
DDR_A_CASB

DDR_A_WEB

BD4
BC9
BB15
AT22
AH42
AE42
Y42
T43

AV42
AU42
AW42

DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_RAS# 14,16
DDR_A_CAS# 14,16
DDR_A_WE# 14,16

DDR_A_DQS#[7..0] 14

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.

DDR_A

DDR_A

EAGLELAKE-P

EAGLELAKE-P

null

null

5

4

3

2

FOXCONN

FOXCONN

FOXCONN

Title

Title

Title

Eaglelake DDRII CH A 3/7

Eaglelake DDRII CH A 3/7

Eaglelake DDRII CH A 3/7

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

A3

Date: Sheet

Date: Sheet of

Date: Sheet of

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CCPBG - R&D Division

CCPBG - R&D Division

of

980Tuesday, July 15, 2008

980Tuesday, July 15, 2008

1

980Tuesday, July 15, 2008

5

DDR_B_MA[14..0]15,16

D D

DDR_B_SBS015,16
DDR_B_SBS115,16
DDR_B_SBS215,16

DDR_B_CSB015,16
DDR_B_CSB115,16

DDR_B_SCKE015,16
DDR_B_SCKE115,16

C C

DDR_B_ODT015,16
DDR_B_ODT115,16

DDR_B_CK015
DDR_B_CK#015
DDR_B_CK115
DDR_B_CK#115

TP57tpc26t TP57tpc26t
TP58tpc26t TP58tpc26t

TP61tpc26t TP61tpc26t
TP62tpc26t TP62tpc26t

01/03:Delete test piont for layout

DDR_B_DQS[7..0]15

B B

DDR_B_DM[7..0]15

A A

5

4

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14

DDR_B_SBS0
DDR_B_SBS1
DDR_B_SBS2

DDR_B_CSB0
DDR_B_CSB1

TP_DDR_B_CSB2

1

TP_DDR_B_CSB3

1

DDR_B_SCKE0
DDR_B_SCKE1

TP_DDR_B_SCKE2

1

TP_DDR_B_SCKE3

1

DDR_B_ODT1

DDR_B_CK0
DDR_B_CK#0
DDR_B_CK1
DDR_B_CK#1

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

4

BD24
BB23
BB24
BD23
BB22
BD22
BC22
BC20
BB20
BD20
BC26
BD19
BB19
BE38
BA19

BD26
BB26
BD18

BB35
BD39
BB37
BD40

BC18
AY20
BE17
BB18

BD37
BC39
BB38
BD42

AY33

AW33

AV31
AW31
AW35

AY35

AT31

AU31

AP31

AP30
AW37

AV35

AW8
AT15
AR20
AU26
AR38
AK34

AF37
AB35

AY6
AR15
AU17
AV25
AU39

AL37
AJ35

AD37

U3D

U3D

DDR_B_MA_0
DDR_B_MA_1
DDR_B_MA_2
DDR_B_MA_3
DDR_B_MA_4
DDR_B_MA_5
DDR_B_MA_6
DDR_B_MA_7
DDR_B_MA_8
DDR_B_MA_9
DDR_B_MA_10
DDR_B_MA_11
DDR_B_MA_12
DDR_B_MA_13
DDR_B_MA_14

DDR_B_BS_0
DDR_B_BS_1
DDR_B_BS_2

DDR_B_CSB_0
DDR_B_CSB_1
DDR_B_CSB_2
DDR_B_CSB_3

DDR_B_CKE_0
DDR_B_CKE_1
DDR_B_CKE_2
DDR_B_CKE_3

DDR_B_ODT_0
DDR_B_ODT_1
DDR_B_ODT_2
DDR_B_ODT_3

DDR_B_CK_0
DDR_B_CKB_0
DDR_B_CK_1
DDR_B_CKB_1
DDR_B_CK_2
DDR_B_CKB_2
DDR_B_CK_3
DDR_B_CKB_3
DDR_B_CK_4
DDR_B_CKB_4
DDR_B_CK_5
DDR_B_CKB_5

DDR_B_DQS_0
DDR_B_DQS_1
DDR_B_DQS_2
DDR_B_DQS_3
DDR_B_DQS_4
DDR_B_DQS_5
DDR_B_DQS_6
DDR_B_DQS_7

DDR_B_DM_0
DDR_B_DM_1
DDR_B_DM_2
DDR_B_DM_3
DDR_B_DM_4
DDR_B_DM_5
DDR_B_DM_6
DDR_B_DM_7

EAGLELAKE-P

EAGLELAKE-P

null

null

4 OF 10

4 OF 10

DDR_B_DQ_0
DDR_B_DQ_1
DDR_B_DQ_2
DDR_B_DQ_3
DDR_B_DQ_4
DDR_B_DQ_5
DDR_B_DQ_6
DDR_B_DQ_7
DDR_B_DQ_8

DDR_B_DQ_9
DDR_B_DQ_10
DDR_B_DQ_11
DDR_B_DQ_12
DDR_B_DQ_13
DDR_B_DQ_14
DDR_B_DQ_15
DDR_B_DQ_16
DDR_B_DQ_17
DDR_B_DQ_18
DDR_B_DQ_19
DDR_B_DQ_20
DDR_B_DQ_21
DDR_B_DQ_22
DDR_B_DQ_23
DDR_B_DQ_24
DDR_B_DQ_25
DDR_B_DQ_26
DDR_B_DQ_27
DDR_B_DQ_28
DDR_B_DQ_29
DDR_B_DQ_30
DDR_B_DQ_31
DDR_B_DQ_32
DDR_B_DQ_33
DDR_B_DQ_34
DDR_B_DQ_35
DDR_B_DQ_36
DDR_B_DQ_37
DDR_B_DQ_38
DDR_B_DQ_39
DDR_B_DQ_40
DDR_B_DQ_41
DDR_B_DQ_42
DDR_B_DQ_43
DDR_B_DQ_44
DDR_B_DQ_45
DDR_B_DQ_46
DDR_B_DQ_47
DDR_B_DQ_48
DDR_B_DQ_49
DDR_B_DQ_50
DDR_B_DQ_51
DDR_B_DQ_52
DDR_B_DQ_53
DDR_B_DQ_54
DDR_B_DQ_55
DDR_B_DQ_56
DDR_B_DQ_57
DDR_B_DQ_58
DDR_B_DQ_59
DDR_B_DQ_60
DDR_B_DQ_61
DDR_B_DQ_62

DDR_B

DDR_B

DDR_B_DQ_63

DDR_B_DQSB_0
DDR_B_DQSB_1
DDR_B_DQSB_2
DDR_B_DQSB_3
DDR_B_DQSB_4
DDR_B_DQSB_5
DDR_B_DQSB_6
DDR_B_DQSB_7

DDR_B_RASB

DDR_B_CASB

DDR_B_WEB

DDR_RPD
DDR_RPU

DDR_SPD
DDR_SPU

DDR_VREF

DDR3_DRAM_PWROK

DDR3_DRAMRSTB

DDR3_A_CSB1

DDR3_A_MA0

SMMS

SMMS

DDR3_A_WEB
DDR3_B_ODT3

3

DDR_B_DQ0

AV7

DDR_B_DQ1

AW4

DDR_B_DQ2

BA9

DDR_B_DQ3

AU11

DDR_B_DQ4

AU7

DDR_B_DQ5

AU8

DDR_B_DQ6

AW7

DDR_B_DQ7

AY9

DDR_B_DQ8

AY13

DDR_B_DQ9

AP15

DDR_B_DQ10

AW15

DDR_B_DQ11

AT16

DDR_B_DQ12

AU13

DDR_B_DQ13

AW13

DDR_B_DQ14

AP16

DDR_B_DQ15

AU16

DDR_B_DQ16

AY17

DDR_B_DQ17

AV17

DDR_B_DQ18

AR21

DDR_B_DQ19

AV20

DDR_B_DQ20

AP17

DDR_B_DQ21

AW16

DDR_B_DQ22

AT20

DDR_B_DQ23

AN20

DDR_B_DQ24

AT25

DDR_B_DQ25

AV26

DDR_B_DQ26

AU29

DDR_B_DQ27

AV29

DDR_B_DQ28

AW25

DDR_B_DQ29

AR25

DDR_B_DQ30

AP26

DDR_B_DQ31

AR29

DDR_B_DQ32

AR36

DDR_B_DQ33

AU38

DDR_B_DQ34

AN35

DDR_B_DQ35

AN37

DDR_B_DQ36

AV39

DDR_B_DQ37

AW39

DDR_B_DQ38

AU40

DDR_B_DQ39

AU41

DDR_B_DQ40

AL35

DDR_B_DQ41DDR_B_ODT0

AL36

DDR_B_DQ42

AK36

DDR_B_DQ43

AJ34

DDR_B_DQ44

AN39

DDR_B_DQ45

AN40

DDR_B_DQ46

AK37

DDR_B_DQ47

AL39

DDR_B_DQ48

AJ38

DDR_B_DQ49

AJ37

DDR_B_DQ50

AF38

DDR_B_DQ51

AE37

DDR_B_DQ52

AK40

DDR_B_DQ53

AJ40

DDR_B_DQ54

AF34

DDR_B_DQ55

AE35

DDR_B_DQ56

AD40

DDR_B_DQ57

AD38

DDR_B_DQ58

AB40

DDR_B_DQ59

AA39

DDR_B_DQ60

AE36

DDR_B_DQ61

AE39

DDR_B_DQ62

AB37

DDR_B_DQ63

AB38

DDR_B_DQS#0

AW9

DDR_B_DQS#1

AU15

DDR_B_DQS#2

AR17

DDR_B_DQS#3

AT26

DDR_B_DQS#4

AR37

DDR_B_DQS#5

AL34

DDR_B_DQS#6

AF36

DDR_B_DQS#7

AD35

BD35
BC37
BD36

DDR_RPD

AY42

DDR_RPU

BA43

DDR_SPD

BC43

DDR_SPU

BC44

MCH_DDR_VREF

BB44

MCH_DRAM_PWROK

AR6

TP_DRAM_PWROK

BC24

TP_DDR3_A_CSB1

AR43

TP_DDR3_A_MA0

BB40

TP_DDR3_A_WEB

AT44

TP_DDR3_B_ODT3

AV40

3

DDR_B_DQ[63..0] 15

DDR_B_DQS#[7..0] 15

DDR_B_RAS# 15,16
DDR_B_CAS# 15,16
DDR_B_WE# 15,16

R141

R141

1 2

0_J 0402

0_J 0402

2

DDR_RPU
DDR_SPU

DDR_RPD
DDR_SPD

EVT2:01/16:Change R142
R143 from 0603 to 0402

TP85 tpc26tTP85 tpc26t

1

TP86 tpc26tTP86 tpc26t

1

TP87 tpc26tTP87 tpc26t

1

TP88 tpc26tTP88 tpc26t

1

TP89 tpc26tTP89 tpc26t

1

R137 80.6_F 0402R137 80.6_F 0402

1 2

R138 80.6_F 0402R138 80.6_F 0402

1 2

close to MCH
Pin as possible

MCH_DDR_VREF Layout Note:
1 Trace width/Spcing: 10 mils (Min.)/10mils(Min.)
2 Breakout area Trace width/Spcing: 5 mils (Min.)/5mils(
Min.) for maximum of 300 mils ;
3 0.1 µF cap placed as close as possible to the MCH
SMVREF pin.

2

12/07:Placed on the VCCSM side of
the resistor not the GMCH side

+1_8VSUS

C40

C40

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

R139 80.6_F 0402R139 80.6_F 0402

12

R140 249_F 0402R140 249_F 0402

12

MCH_DDR_VREF

12

C1450

C1450
330P_50V_K

330P_50V_K

0402_X7R

0402_X7R

1 2

12

C41

C41

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

+1_8VSUS

12

12

DVT:04/08:Add C1450

FOXCONN

FOXCONN

FOXCONN

Title

Title

Title

Eaglelake DDRII CH B 4/7

Eaglelake DDRII CH B 4/7

Eaglelake DDRII CH B 4/7

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

A3

Date: Sheet

Date: Sheet of

Date: Sheet of

R142

R142
1K_F

1K_F

0402

0402

R143

R143
1K_F

1K_F

0402

0402

1 2

1

C1166

C1166

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CCPBG - R&D Division

CCPBG - R&D Division

1

of

10 80Tuesday, July 15, 2008

10 80Tuesday, July 15, 2008

10 80Tuesday, July 15, 2008

5

4

3

2

1

+1_1VRUN

D D

C C

B B

L1

L1

1 2

1UH_0805 EBLS2012-1R0K

1UH_0805 EBLS2012-1R0K

+1_1V_CL

DVT:03/14:Change +1_1VRUN to
+1_1V_CL for corwin spring

+1_1VRUN

IVCCA_HPLL: 38mA

L3

L3

1 2

1UH_0805 EBLS2012-1R0K

1UH_0805 EBLS2012-1R0K

+1_1V_CL

IVCCA_HPLL:
Discrete Gfx: 25.4 mA
Integrated Gfx: 26.7A

IVCCA_MPLL:
Discrete Gfx: 75mA
Integrated Gfx: 79mA

1 2

2.2UH_0805

2.2UH_0805

TL201209-2R2K

+1_1VRUN

IVCCA_DPLLA:
Discrete Gfx: 23.3mA
Integrated Gfx: 90.4mA

IVCCA_DPLLB:
Discrete Gfx: 23.3mA
Integrated Gfx: 90.4mA

TL201209-2R2K

L6

L6

1 2

10UH_0805

10UH_0805

EBLS2012-100K

EBLS2012-100K

10UH_0805

10UH_0805

12/22:Change L6 L8 CAP2 CAP3

1.5 V PCI Express*
Analog Supply Voltage

L10

+3VRUN

DVT:02/20:change R186
from 237 ohm to 40.2 ohm;
change R189 from 200 ohm
to 39. 2ohm.

A A

+1_5VRUN

5

L10

600R-100MHZ_0603

600R-100MHZ_0603

EBMS160808A601

EBMS160808A601

CA_600R-100MHZ_0603

CA_600R-100MHZ_0603

EBMS160808A601

EBMS160808A601

12/16:Change R174 from 1ohm to 0ohm NC R175 C58 C49

R174 0_JR174 0_J

VCCDPLL_EXP_L

12/16:Change R177 from 1ohm to 0ohm NC R176 C63 C64

VCCAPLL_EXP_L

1 2

R175

R175

1 2

NC_1_F 0402

NC_1_F 0402

NC_10U_6.3V_M

NC_10U_6.3V_M

0805_X5R

0805_X5R

R177 0_JR177 0_J

1 2

1 2

NC_1_F 0402

NC_1_F 0402

R1388 0_JR1388 0_J

1 2

R176

R176

12

C58

C58

12

12/26:Change L4 L5

Host PLL Analog Supply Voltage(MAX.1.21V)

L4

L4

1 2

0.27UH_0805

0.27UH_0805

TL201209-R27M

TL201209-R27M

L5

L5

L8

L8

1 2

EBLS2012-100K

EBLS2012-100K

VCCA_DAC_EXP

12

C86

C86
1U_10V_K

1U_10V_K

0402_X5R

0402_X5R

VCCDQ_CRT_L

L11

L11

VCCA_DPLLA

12

CAP2

CAP2

+

220U_6.3V_7343

+

220U_6.3V_7343

6TPE220MI

6TPE220MI

12

+

220U_6.3V_7343

+

220U_6.3V_7343

6TPE220MI

6TPE220MI

CA_1_F 0402

CA_1_F 0402
R186

R186

1 2

40.2_F 0402

40.2_F 0402

12

VCCA_DPLLB

CAP3

CAP3

R184

R184

1 2

12

C82

C82
NC_0.1U_6.3V_K

NC_0.1U_6.3V_K

0402_X5R

0402_X5R

12

C88

C88
CA_1U_10V_K

CA_1U_10V_K

0402_X5R

0402_X5R

System Memory PLL Analog Supply(max.1.21v)

12

C84

C84
NC_0.1U_6.3V_K

NC_0.1U_6.3V_K

0402_X5R

0402_X5R

IVCCA_DAC: 81.6mA

IVCCA_EXP: 50mA

R187

R187

1 2

1_F 0402

1_F 0402

R189

R189

39.2_F

39.2_F

0603

0603

PVT:06/12:Change R189 from 0402
to 0603 for intel suggestion.

R190

R190

1 2

CA_1_F 0402

CA_1_F 0402

4

VCCDPLL_EXP_R

12

C49

C49
NC_0.1U_6.3V_K

NC_0.1U_6.3V_K

0402_X5R

0402_X5R

VCCD_HPLL

12

C56

C56
NC_2.2U_10V_M

NC_2.2U_10V_M

0603_X5R

0603_X5R

PCI Express* PLL Analog Supply

VCCAPLL_EXP_R

C63

C63
NC_10U_6.3V_M

NC_10U_6.3V_M

0805_X5R

0805_X5R

12

R178

R178

NC_1_F

NC_1_F

DAC Analog Supply

VCCA_HPLL

C74

C74
NC_2.2U_10V_M

NC_2.2U_10V_M

0603_X5R

0603_X5R

VCCA_MPLL

0402

0402

1 2
12

C78

C78
NC_10U_6.3V_M

NC_10U_6.3V_M

0805_X5R

0805_X5R

+1_5VRUN

VCCA_EXP

12

C64

C64
NC_0.1U_6.3V_K

NC_0.1U_6.3V_K

0402_X5R

0402_X5R

R179

R179
NC_1_F

NC_1_F

0402

0402

1 2

1 2

NC_0_J 0603

NC_0_J 0603

0_J

0_J

VCCA_DAC

IVCCDQ_CRT: 28mA

VCCDQ_CRT

1.5 V Display DAC

R1390

R1390

Quiet Digital Supply

NV_0_J

NV_0_J

1 2

12/16:Add R1390

VCCDPLL_EXP_R
VCCD_HPLL
VCCAPLL_EXP_R

+3VRUN

R182

R182
R183

0603R183

0603

12

VCCA_DAC

R1389

R1389
NV_0_J

NV_0_J

12/16:Add R1389

1 2

VCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB

8.8mA

VCC_HDA

VCCA_EXP

VCCDQ_CRT

7 OF 10

AA31
AA32
AA33
AB31
AB32
AB33
AC31
AD31
AD32
AD33
AE31
AE32
AE33

AF31

AF32
AG30
AG31

AJ15

AJ27

AJ29

AJ30

AJ31

AJ32
AK14
AK16
AK17
AK19
AK20
AK21
AK22
AK23
AK24
AK25
AK26
AK27
AK29
AK30
AK31

AL1
AL10
AL11
AL12
AL14

B12

U33

B16

B22

A21

D20

C20

E19

AR2

B19

D19

A17

B20

U3G

U3G

VCC_CL_1
VCC_CL_2
VCC_CL_3
VCC_CL_4
VCC_CL_5
VCC_CL_6
VCC_CL_7
VCC_CL_8
VCC_CL_9
VCC_CL_10
VCC_CL_11
VCC_CL_12
VCC_CL_13
VCC_CL_14
VCC_CL_15
VCC_CL_16
VCC_CL_17
VCC_CL_18
VCC_CL_19
VCC_CL_20
VCC_CL_21
VCC_CL_22
VCC_CL_23
VCC_CL_24
VCC_CL_25
VCC_CL_26
VCC_CL_27
VCC_CL_28
VCC_CL_29
VCC_CL_30
VCC_CL_31
VCC_CL_32
VCC_CL_33
VCC_CL_34
VCC_CL_35
VCC_CL_36
VCC_CL_37
VCC_CL_38
VCC_CL_39
VCC_CL_40
VCC_CL_41
VCC_CL_42
VCC_CL_43

VCCDPLL_EXP
VCCD_HPLL
VCCAPLL_EXP

VCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB

VCC3_3
VCC_HDA

VCCA_DAC_1
VCCA_DAC_2

VCCA_EXP

VCCDQ_CRT

EAGLELAKE-P

EAGLELAKE-P

null

null

VCC_CL_44
VCC_CL_45
VCC_CL_46
VCC_CL_47
VCC_CL_48
VCC_CL_49
VCC_CL_50
VCC_CL_51
VCC_CL_52
VCC_CL_53
VCC_CL_54
VCC_CL_55
VCC_CL_56
VCC_CL_57
VCC_CL_58
VCC_CL_59
VCC_CL_60
VCC_CL_61
VCC_CL_62
VCC_CL_63
VCC_CL_64
VCC_CL_65
VCC_CL_66
VCC_CL_67
VCC_CL_68
VCC_CL_69
VCC_CL_70
VCC_CL_71
VCC_CL_72
VCC_CL_73
VCC_CL_74
VCC_CL_75
VCC_CL_76
VCC_CL_77
VCC_CL_78

POWER

POWER

VCC_CL_79
VCC_CL_80
VCC_CL_81
VCC_CL_82
VCC_CL_83
VCC_CL_84
VCC_CL_85

VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8

VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15

VCC_SMCLK_1
VCC_SMCLK_2
VCC_SMCLK_3
VCC_SMCLK_4

VCCCML_DDR

VCCAVRM_EXP

7 OF 10

AL15
AL16
AL17
AL19
AL2
AL20
AL21
AL22
AL23
AL24
AL25
AL26
AL27
AL29
AL30
AL4
AL5
AL6
AL7
AL8
AL9
AM15
AM16
AM17
AM2
AM20
AM21
AM22
AM24
AM25
AM26
AM29
AM3
AM4
AP1
AP2
W31
Y29
Y30
Y31
Y32
Y33

AP44
AT45
AV44
AY40
BA41
BB39
BD21
BD25
BD29
BD34
BD38
BE23
BE27
BE31
BE36

AK32
AL31
AL32
AM31

AM30

AG2

VCCCML_DDR

VCCAVRM_EXPVCCA_EXP_R

12

DVT:03/26:Delete GP6

DVT:03/14:Open GP6 for corwin spring
Short GP6 for no support corwin spring.

3

IVCC_CL:
Discrete Gfx---max 2.08A
Integrated Gfx--max 1.31A

+1_1V_CL

12

C55

C55
10U_6.3V_M

10U_6.3V_M

0805_X5R

0805_X5R

Place in VCC_CL plane as close to
(G)MCH as possible.

IVCC_DDR2:
Discrete Gfx: 0.9229A
Integrated Gfx:2.0597A

12

C66

C66

2.2U_10V_M

2.2U_10V_M

0603_X5R

0603_X5R

12

C75

C75

2.2U_10V_M

2.2U_10V_M

0603_X5R

0603_X5R

12

C1302

C1302

2.2U_10V_M

2.2U_10V_M

0603_X5R

0603_X5R

12

C59

C59
10U_6.3V_M

10U_6.3V_M

0805_X5R

0805_X5R

12

C67

C67

2.2U_10V_M

2.2U_10V_M

0603_X5R

0603_X5R

12

C76

C76

2.2U_10V_M

2.2U_10V_M

0603_X5R

0603_X5R

12

C1303

C1303

2.2U_10V_M

2.2U_10V_M

0603_X5R

0603_X5R

12/30:Add C1302~C1304

IVCC_CKDDR2: 0.2626A

12

C1432

C1432
330P_50V_K

330P_50V_K

0402_X7R

0402_X7R

PLACE CAPS AND
L CLOSE TO MCH BALLS

1 2

0.09UH_0805

0.09UH_0805

SWF2012CF-90NM

SWF2012CF-90NM

C87

C87

4.7U_6.3V_K

4.7U_6.3V_K

0603_X5R

0603_X5R

L9

L9

R185

R185

1 2

0_J 0603

0_J 0603

R188

R188

1 2

NC_0_J 0603

NC_0_J 0603

12

C83

C83

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12/24:Stuff R188;NC R185

2

12

C1435

C1435
NC_22U_6.3V_M

NC_22U_6.3V_M

0805_X5R

0805_X5R

12

C1434

C1434
NC_22U_6.3V_M

NC_22U_6.3V_M

0805_X5R

0805_X5R

DVT:03/23:Reserved for corwin spring.

+1_8VSUS

12

C68

C68

2.2U_10V_M

2.2U_10V_M

0603_X5R

0603_X5R

12

C77

C77

2.2U_10V_M

2.2U_10V_M

0603_X5R

0603_X5R

12

C1304

C1304

2.2U_10V_M

2.2U_10V_M

0603_X5R

0603_X5R

L7

L7

1 2

150NH_0805

150NH_0805

12

R180

R180

TW201209-R15M

TW201209-R15M

R181

R181

0_J

0_J

NC_1_F

NC_1_F

0603

0603

1 2

12

C85

C85
22U_6.3V_M

22U_6.3V_M

0805_X5R

0805_X5R

+1_1V_CL

+1_1VRUN

+1_5VRUN

FOXCONN

FOXCONN

FOXCONN

Title

Title

Title
Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3
Date: Sheet

Date: Sheet

Date: Sheet

12

C1431

C1431
330P_50V_K

330P_50V_K

0402_X7R

0402_X7R

12

C1426

C1426
330P_50V_K

330P_50V_K

0402_X7R

0402_X7R

DVT:04/06:Add C1426 C1431 C1432 and
C1433 for simulation

+1_8VSUS

DVT:04/21:Change L7 from
1L-DEBLS20-1200 to 1L-DTW2012-0900

PVT:06/11:Change R185 from NC to stuff
and R188 from stuff to NC follow intel.

Eaglelake POWER 5/7

Eaglelake POWER 5/7

Eaglelake POWER 5/7

AIO-C Mother Board MP

AIO-C Mother Board MP

AIO-C Mother Board MP

12

C1433

C1433
330P_50V_K

330P_50V_K

0402_X7R

0402_X7R

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CCPBG - R&D Division

CCPBG - R&D Division

1

1.1

1.1

1.1

of

of

of

11 80Tuesday, July 15, 2008

11 80Tuesday, July 15, 2008

11 80Tuesday, July 15, 2008

5

4

3

2

1

12

C45

C45
10U_6.3V_M

10U_6.3V_M

0805_X5R

0805_X5R

12

C54

C54
1U_10V_K

1U_10V_K

0603_X5R

0603_X5R

+1_1VRUN

AA19
AA21
AA23
AA25
AA27
AA29
AA30
AB20
AB22
AB24
AB26
AB29
AB30
AC16
AC17
AC19
AC21
AC23
AC25
AC27
AC29

AC4
AD16
AD17
AD20
AD22
AD24
AD26
AD29
AE16
AE17
AE19
AE21
AE23
AE25
AE27
AE29

AF16
AF17
AF19
AF20
AF21
AF22
AF23
AF24
AF25
AF26
AF27
AF29

AF3
AG16
AG17
AG20
AG22
AG24
AG26
AG29

AJ16
AJ17
AJ19
AJ21
AJ23
AJ25

R25

R26

R27

R29

T21

T22

T23

T24

T25

T26

T27

T29

U21

U22

U23

U24

U25

U26

U27

U29

W19
W21
W23
W25
W27
W29

Y20

Y22

Y24

Y26

F9
H4
L3
P3

V4

U3F

U3F

VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_60
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
VCC_74
VCC_75
VCC_76
VCC_77
VCC_78
VCC_79
VCC_80
VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_86
VCC_87
VCC_88
VCC_89
VCC_90
VCC_91
VCC_92
VCC_93
VCC_94
VCC_95
VCC_96
VCC_97
VCC_98

EAGLELAKE-P

EAGLELAKE-P

null

null

3

VCC_EXP_1
VCC_EXP_2
VCC_EXP_3
VCC_EXP_4
VCC_EXP_5
VCC_EXP_6
VCC_EXP_7
VCC_EXP_8

VCC_EXP_9
VCC_EXP_10
VCC_EXP_11
VCC_EXP_12
VCC_EXP_13
VCC_EXP_14
VCC_EXP_15
VCC_EXP_16
VCC_EXP_17
VCC_EXP_18
VCC_EXP_19
VCC_EXP_20
VCC_EXP_21
VCC_EXP_22
VCC_EXP_23
VCC_EXP_24
VCC_EXP_25
VCC_EXP_26
VCC_EXP_27
VCC_EXP_28
VCC_EXP_29
VCC_EXP_30
VCC_EXP_31
VCC_EXP_32
VCC_EXP_33
VCC_EXP_34
VCC_EXP_35
VCC_EXP_36
VCC_EXP_37
VCC_EXP_38

POWER

POWER

VTT_FSB_1
VTT_FSB_2
VTT_FSB_3
VTT_FSB_4
VTT_FSB_5
VTT_FSB_6
VTT_FSB_7
VTT_FSB_8

VTT_FSB_9
VTT_FSB_10
VTT_FSB_11
VTT_FSB_12
VTT_FSB_13
VTT_FSB_14
VTT_FSB_15
VTT_FSB_16
VTT_FSB_17
VTT_FSB_18
VTT_FSB_19
VTT_FSB_20
VTT_FSB_21
VTT_FSB_22
VTT_FSB_23
VTT_FSB_24
VTT_FSB_25
VTT_FSB_26
VTT_FSB_27
VTT_FSB_28
VTT_FSB_29
VTT_FSB_30
VTT_FSB_31
VTT_FSB_32
VTT_FSB_33
VTT_FSB_34
VTT_FSB_35

6 OF 10

6 OF 10

AA14
AA15
AB14
AC15
AD14
AD15
AE14
AE15
AF14
AF15
AG15
AJ1
AJ10
AJ11
AJ12
AJ13
AJ14
AJ2
AJ6
AJ7
AJ8
AJ9
AK10
AK11
AK12
AK13
AK2
AK3
AK4
AK6
AK7
AK8
AK9
U14
U15
W15
Y14
Y15

A25
B25
B26
C24
C26
D22
D23
D24
E23
F21
F22
G21
G22
H21
H22
J21
J22
K21
K22
L21
L22
M21
M22
N20
N21
N22
P20
P21
P22
P24
R20
R21
R22
R23
R24

+1_1VRUN

PCI Express* and DMI Supply

12

C46

C46

2.2U_10V_Y

2.2U_10V_Y

0603_Y5V

0603_Y5V

Place in the VCC_EXP plane as
close the (G)MCH as possible

IVCC_EXP:
Discrete Gfx---max 3.939A
Integrated Gfx--max 1.2485A

VTT_FSB(MAX 1.32V):
Discrete Gfx---max 1.009A
Integrated Gfx--max 0.9092A

12

C79

C79

2.2U_10V_Y

2.2U_10V_Y

0603_Y5V

0603_Y5V

as close to the (G)MCH as
possible(100mils from the package.)

12

C47

C47

2.2U_10V_Y

2.2U_10V_Y

0603_Y5V

0603_Y5V

System Bus Input Voltage

12

C80

C80

2.2U_10V_Y

2.2U_10V_Y

0603_Y5V

0603_Y5V

2

12

C48

C48

2.2U_10V_Y

2.2U_10V_Y

0603_Y5V

0603_Y5V

V_FSB_VTT

PVT:06/04:Change +1_1VRUN to
+1_2VRUN by Intel's suggestion.

12

C81

C81

2.2U_10V_Y

2.2U_10V_Y

0603_Y5V

0603_Y5V

FOXCONN

FOXCONN

FOXCONN

Title

Title

Title
Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Date: Sheet

Date: Sheet

Date: Sheet

Eaglelake POWER 6/7

Eaglelake POWER 6/7

Eaglelake POWER 6/7

AIO-C Mother Board MP

AIO-C Mother Board MP

AIO-C Mother Board MP

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CCPBG - R&D Division

CCPBG - R&D Division

1.1

1.1

12 80Tuesday, July 15, 2008

12 80Tuesday, July 15, 2008

1

12 80Tuesday, July 15, 2008

1.1

of

of

of

For GMCH CORE POWER

VCC(MAX 1.21V):
Discrete Gfx---max 18.51A
Integrated Gfx--max 26.40A

D D

+1_1VRUN

12/31:Delete CAP49

12

CAP47

CAP47

+

330U_2V_T

+

330U_2V_T

EEFSX0D331ER

EEFSX0D331ER

12

CAP48

CAP48

+

330U_2V_T

+

330U_2V_T

EEFSX0D331ER

EEFSX0D331ER

12

C43

C43
10U_6.3V_M

10U_6.3V_M

0805_X5R

0805_X5R

12

C44

C44
10U_6.3V_M

10U_6.3V_M

0805_X5R

0805_X5R

12/20:Add CAP47 CAP48

12

C61

C61
22U_6.3V_M

22U_6.3V_M

0805_X5R

0805_X5R

12

C69

C69
10U_6.3V_M

10U_6.3V_M

0805_X5R

0805_X5R

12

C57

C57
1U_10V_K

1U_10V_K

0603_X5R

0603_X5R

12

C50

C50
1U_10V_K

1U_10V_K

0603_X5R

0603_X5R

Backside cap sites, placed directly underneath the
VCC_Core center-array pins, with sufficient via
connections

12

C60

C60
22U_6.3V_M

22U_6.3V_M

0805_X5R

0805_X5R

C C

12

C65

C65
10U_6.3V_M

10U_6.3V_M

0805_X5R

0805_X5R

Top-side caps. Place along the (G)MCH edge.

12

C1424

C1424

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C1421

C1421

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

12

C70

C70
10U_6.3V_M

10U_6.3V_M

0805_X5R

0805_X5R

12

12

C51

C51
1U_10V_K

1U_10V_K

0603_X5R

0603_X5R

C62

C62
22U_6.3V_M

22U_6.3V_M

0805_X5R

0805_X5R

12

C1422

C1422

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

C71

C71
1U_10V_K

1U_10V_K

0603_X5R

0603_X5R

12

C52

C52
1U_10V_K

1U_10V_K

0603_X5R

0603_X5R

12

C72

C72
1U_10V_K

1U_10V_K

0603_X5R

0603_X5R

12

C1423

C1423

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C53

C53
1U_10V_K

1U_10V_K

0603_X5R

0603_X5R

12

C73

C73
1U_10V_K

1U_10V_K

0603_X5R

0603_X5R

EVT2:0205: Add 4 pcs 0.1uF cap for +1_1VRUN

B B

A A

5

4

5

8 OF 10

U3H

U3H

A12

VSS_1

A15

VSS_2

A19

VSS_3

A27

VSS_4

A31

VSS_6

A36

VSS_7

AA1
AA11
AA12
AA13
AA16
AA17
AA20
AA22
AA24
AA26
AA34
AA38
AA40
AA44

AA8
AB11
AB12
AB16
AB17
AB19
AB21
AB23
AB25
AB27
AB34
AB36
AB39

AB4

AB6

AB7

AB8
AC20
AC22
AC24
AC26
AC45

AC5
AD12
AD19
AD21
AD23
AD25
AD27

AD3
AD34
AD36
AD39

AD6

AD9

AE1
AE11
AE12
AE13
AE20
AE22
AE24
AE26
AE34
AE38
AE40
AE44

AE8

AF10
AF11
AF12
AF13
AF33
AF35
AF39

AF6

AF7
AG19
AG21
AG23
AG25
AG27
AG45

AG5

AH2

AH3

AH4

AJ20
AJ22
AJ24
AJ26

A40

VSS_8

A8

VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96

GND

GND

D D

C C

B B

A A

8 OF 10

VSS_97
VSS_98

VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_185
VSS_233
VSS_187
VSS_188
VSS_189
VSS_190

AJ36
AJ39
AJ44
AJ45
AK35
AK38
AK39
AL38
AL44
AL45
AN21
AN22
AN24
AN25
AN26
AN33
AN36
AN38
AN7
AP20
AP21
AP22
AP24
AP25
AP29
AP45
AR10
AR11
AR13
AR16
AR26
AR3
AR31
AR33
AR35
AR39
AR8
AR9
AT1
AT11
AT13
AT17
AT2
AT24
AT29
AT35
AU20
AU22
AU25
AU30
AU35
AU5
AU6
AU9
AV11
AV13
AV15
AV16
AV2
AV21
AV30
AV33
AV38
AV6
AV8
AV9
AW11
AW17
AW20
AW22
AW24
AW26
AW3
AW30
AY1
AY15
AY16
AY21
AY25
AY30
AY45
B10
B17
B21
B27
B29
B34
BA23
F8
BB21
BB25
BB28
BB6

4

BD12
BD17
BD43

BD8
BE10
BE15
BE19
BE21
BE25
BE29
BE34
BE40

C16

D11
D16
D21
D25
D26
D39

E31
E41

F16
F30
F42

F45
G11
G17
G24
G26
G29

G35
H11

H13
H15
H16
H20
H25
H30
H31
H33
H38
H44

K11
K13
K17
K20
K24
K29
K33
K45

U11
U12
U13
U16
U17
U19
U20
U36
U39
U44

W16

3

C3
C5

D6
D7

E3

E5
F2
F4

G3
H1

H7
H8
H9

J3

J37

J4
J5
J8
J9

L10
L16
L20

U8

W1

U3I

U3I

VSS_193
VSS_194
VSS_196
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_206
VSS_207
VSS_210
VSS_211
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344

EAGLELAKE-P

EAGLELAKE-P

null

null

9 OF 10

9 OF 10

VSS_345
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319

GND

GND

VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
VSS_360
VSS_361
VSS_362
VSS_363
VSS_364
VSS_365
VSS_366
VSS_367
VSS_368
VSS_369

W17
L26
L30
L35
L39
L4
L8
L9
M1
M24
M25
M44
N11
N13
N16
N26
N29
N30
N33
N36
N38
N8
P16
P17
P25
P26
P31
R11
R12
R16
R17
R19
R2
R30
R38
R45
R5
R8
T10
T11
T12
T13
T16
T17
T19
T20
T3
T30
T31
T32
T33
T35
T38
T4
T40
T6
T7
T8
T9
U1
W2
W20
W22
W24
W26
W44
W45
W5
Y10
Y11
Y12
Y13
Y16
Y17
Y19
Y2
Y21
Y23
Y25
Y27
Y3
Y35
Y39
Y9

2

10 OF 10

GND

GND

10 OF 10

VSS_184
VSS_191
VSS_192
VSS_195
VSS_197
VSS_205
VSS_208
VSS_209
VSS_212
VSS_226
VSS_186

U3J

U3J

EAGLELAKE-P

EAGLELAKE-P

null

null

VSS_5
VSS_9

VSS_10

A3
A43
A6
B44
BC1
BC45
BD2
BD44
BE3
BE43
C1
C45
F1
BA5

1

EAGLELAKE-P

EAGLELAKE-P

null

null

5

4

3

2

FOXCONN

FOXCONN

FOXCONN

Title

Title

Title

Eaglelake GND 7/7

Eaglelake GND 7/7

Eaglelake GND 7/7

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

A3

Date: Sheet

Date: Sheet of

Date: Sheet of

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CCPBG - R&D Division

CCPBG - R&D Division

of

13 80Tuesday, July 15, 2008

13 80Tuesday, July 15, 2008

13 80Tuesday, July 15, 2008

1

5

DDR2_VREF

12

C89

C89

0.1U_16V_M_B

0.1U_16V_M_B

0402

0402

D D

C C

B B

0.1 µF and 2.2 µF placed
close to VREF pins

12

C90

C90

2.2U_10V_M

2.2U_10V_M

0603_X5R

0603_X5R

DDR_A_SCKE09,16

DDR_A_SBS29,16

DDR_A_SBS09,16

DDR_A_WE#9,16

DDR_A_CAS#9,16

DDR_A_CSB19,16
DDR_A_ODT19,16

DVT:03/26:Delete the GAP PJ26

03/11
Reserved,need to
Open to support
corwin spring

A A

DVT:03/23: For corwin spring

SMB_THRM_DATA_Q3,15,19

SMB_THRM_CLK_Q3,15,19

R1759

+3VRUN

+3_3V_CL

For corwin spring

5

R1759

NCS_0_J

NCS_0_J

R1760

R1760
CS_0_J

CS_0_J

12

12

C98

C98

2.2U_10V_M

2.2U_10V_M

12

0603_X5R

0603_X5R

4

DDR2_VREF

DDR_A_DQ0
DDR_A_DQ1

DDR_A_DQS#0
DDR_A_DQS0

DDR_A_DQ2
DDR_A_DQ3

DDR_A_DQ8
DDR_A_DQ9

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_DQ10
DDR_A_DQ11

DDR_A_DQ16
DDR_A_DQ17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_DQ18
DDR_A_DQ19

DDR_A_DQ24
DDR_A_DQ25

DDR_A_DM3

DDR_A_DQ26
DDR_A_DQ27

DDR_A_MA12
DDR_A_MA9
DDR_A_MA8

DDR_A_MA5
DDR_A_MA3
DDR_A_MA1

DDR_A_MA10

DDR_A_DQ32
DDR_A_DQ33

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_DQ34
DDR_A_DQ35

DDR_A_DQ40
DDR_A_DQ41

DDR_A_DM5
DDR_A_DQ42

DDR_A_DQ43
DDR_A_DQ48

DDR_A_DQ49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_DQ50
DDR_A_DQ51

DDR_A_DQ56
DDR_A_DQ57

DDR_A_DM7
DDR_A_DQ58

DDR_A_DQ59

12

C97

C97

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

4

1.8V per DIMM=4.06A

201

CN1

CN1

1
3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99

101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

202

VREF
VSS47
DQ0
DQ1
VSS37
DQS#0
DQS0
VSS48
DQ2
DQ3
VSS38
DQ8
DQ9
VSS49
DQS#1
DQS1
VSS39
DQ10
DQ11
VSS50

VSS18
DQ16
DQ17
VSS1
DQS#2
DQS2
VSS19
DQ18
DQ19
VSS22
DQ24
DQ25
VSS23
DM3
NC4
VSS9
DQ26
DQ27
VSS4
CKE0
VDD7
NC1
A16_BA2
VDD9
A12
A9
A8
VDD5
A5
A3
A1
VDD10
A10/AP
BA0
WE#
VDD2
CAS#
S1#
VDD3
ODT1
VSS11
DQ32
DQ33
VSS26
DQS#4
DQS4
VSS2
DQ34
DQ35
VSS27
DQ40
DQ41
VSS29
DM5
VSS51
DQ42
DQ43
VSS40
DQ48
DQ49
VSS52
NCTEST
VSS30
DQS#6
DQS6
VSS31
DQ50
DQ51
VSS33
DQ56
DQ57
VSS3
DM7
VSS34
DQ58
DQ59
VSS14
SDA
SCL
VDD(SPD)

VSS46

DQ4
DQ5

VSS15

SMDFIX1

SMDFIX2

DM0

VSS5

DQ6
DQ7

VSS16

DQ12
DQ13

VSS17

DM1

VSS53

CK0

CK0#

VSS41

DQ14
DQ15

VSS54
VSS20

DQ20
DQ21
VSS6

NC3
DM2

VSS21

DQ22
DQ23

VSS24

DQ28
DQ29

VSS25

DQS#3

DQS3

VSS10

DQ30
DQ31

VSS8
CKE1
VDD8

A15
A14

VDD11

A11

VDD4

VDD12

BA1

RAS#

S0#
VDD1
ODT0

A13
VDD6

NC2

VSS12

DQ36
DQ37

VSS28

DDR2 SDRAM SO-DIMM

(200P)

DDR2 SDRAM SO-DIMM

(200P)

DM4

4 mm

VSS42

DQ38
DQ39

VSS55

DQ44
DQ45

VSS43

DQS#5

DQS5

VSS56

DQ46
DQ47

VSS44

DQ52
DQ53

VSS57

CK1

CK1#

VSS45

DM6

VSS32

DQ54
DQ55

VSS35

DQ60
DQ61
VSS7

DQS#7

DQS7

VSS36

DQ62
DQ63

VSS13

SA0

SA1

NPTH1

NPTH2

DDR2_200P

DDR2_200P

FOX_AS0A426-N2SN-7F

FOX_AS0A426-N2SN-7F

203

204

DIMM_0

3

+1_8VSUS+1_8VSUS

2

DDR_A_DQ4

4

DDR_A_DQ5

6
8

DDR_A_DM0

10
12

DDR_A_DQ6

14

DDR_A_DQ7

16
18

DDR_A_DQ12

20

DDR_A_DQ13

22
24

DDR_A_DM1

26
28
30
32
34

DDR_A_DQ14

36

DDR_A_DQ15

38
40

42

DDR_A_DQ20

44

DDR_A_DQ21

46
48

DDR2_EXTTS#0

50

DDR_A_DM2

52
54

DDR_A_DQ22

56

DDR_A_DQ23

58
60

DDR_A_DQ28

62

DDR_A_DQ29

64
66

DDR_A_DQS#3

68

DDR_A_DQS3

70
72

DDR_A_DQ30

74

DDR_A_DQ31

76
78
80
82
84
86
88
90
92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_A_MA14
DDR_A_MA11

DDR_A_MA7
DDR_A_MA6

DDR_A_MA4
DDR_A_MA2
DDR_A_MA0

DDR_A_MA13

DDR_A_DQ36
DDR_A_DQ37

DDR_A_DM4
DDR_A_DQ38

DDR_A_DQ39
DDR_A_DQ44

DDR_A_DQ45
DDR_A_DQS#5

DDR_A_DQS5
DDR_A_DQ46

DDR_A_DQ47
DDR_A_DQ52

DDR_A_DQ53

DDR_A_DM6

DDR_A_DQ54
DDR_A_DQ55

DDR_A_DQ60
DDR_A_DQ61

DDR_A_DQS#7
DDR_A_DQS7

DDR_A_DQ62
DDR_A_DQ63

SA0_DIM0
SA1_DIM0

3

DDR_A_CK0 9
DDR_A_CK#0 9

TP455 tpc26tTP455 tpc26t

1

DDR_A_SCKE1 9,16

DDR_A_SBS1 9,16
DDR_A_RAS# 9,16
DDR_A_CSB0 9,16

DDR_A_ODT0 9,16

DDR_A_CK1 9
DDR_A_CK#1 9

SMBus Address: A0H(W)/A1H(R)

R195 10K_J 0402R195 10K_J 0402
R196 10K_J 0402R196 10K_J 0402

12
12

DDR_A_DM[7..0] 9
DDR_A_DQ[63..0] 9
DDR_A_DQS[7..0] 9
DDR_A_DQS#[7..0] 9
DDR_A_MA[14..0] 9,16

12

Place these Caps near So-DIMM0

12

Place DIMM_0 near GMCH

2

DVT:03/26:Delete the R197 and
it's power DDRDIMM_VREF

DDR2_VREF

DDR2_VREF

C109

(20 mil)

C109

0.1U_16V_M_B

0.1U_16V_M_B

0402

0402

DVT:03/07:NC R197,stuff R1727,R1728

Place these Caps near So-DIMM0

C99

C99

2.2U_10V_Y_Y

2.2U_10V_Y_Y

0603

0603

C110

C110

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C100

C100

2.2U_10V_Y_Y

2.2U_10V_Y_Y

0603

0603

12

C111

C111

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C101

C101

2.2U_10V_Y_Y

2.2U_10V_Y_Y

0603

0603

12

C112

C112

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12/15:Change C110~C117

FOXCONN

FOXCONN

FOXCONN

Title

Title

Title
Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet of

2

Date: Sheet of

1

+1_8VSUS

12

R1727

R1727
1K_F

1K_F

0402

0402

12

R1728

R1728
1K_F

1 2

A3

1K_F

0402

0402

12

C102

C102

2.2U_10V_Y_Y

2.2U_10V_Y_Y

0603

0603

+1_8VSUS

12

C113

C113

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

DVT:04/06:Add C1436 and
C1446 for simulation.

DDRII(CHA DIMM0) 1/2

DDRII(CHA DIMM0) 1/2

DDRII(CHA DIMM0) 1/2

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

DVT:04/09:Reserved C149 for sinulation.

12

C149

C149
NC_2.2U_10V_Y_Y

NC_2.2U_10V_Y_Y

0603

0603

+1_8VSUS

12

C103

C103

2.2U_10V_Y_Y

2.2U_10V_Y_Y

0603

0603

12

C1436

C1436
330P_50V_K

330P_50V_K

0402_X7R

0402_X7R

12

C1446

C1446
330P_50V_K

330P_50V_K

0402_X7R

0402_X7R

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CCPBG - R&D Division

CCPBG - R&D Division

1

of

14 80Tuesday, July 15, 2008

14 80Tuesday, July 15, 2008

14 80Tuesday, July 15, 2008

5

DDR2_VREF

12

C91

C91

0.1U_16V_M_B

0.1U_16V_M_B

0402

0402

D D

C C

B B

A A

0.1 µF and 2.2 µF placed
close to VREF pins

DVT:03/23: For corwin spring

+3VRUN

+3_3V_CL

SMB_THRM_DATA_Q3,14,19

SMB_THRM_CLK_Q3,14,19

12

C92

C92

R1761

R1761
NCS_0_J

NCS_0_J
R1764

R1764
CS_0_J

CS_0_J

2.2U_10V_M

2.2U_10V_M

0603_X5R

0603_X5R

DDR_B_SCKE010,16

DDR_B_SBS210,16

DDR_B_SBS010,16
DDR_B_WE#10,16

DDR_B_CAS#10,16

DDR_B_CSB110,16
DDR_B_ODT110,16

12

12

For corwin spring

5

4

1.8V per DIMM=4.06A

DDR_B_DQ0
DDR_B_DQ1

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_DQ2
DDR_B_DQ3

DDR_B_DQ8
DDR_B_DQ9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_DQ10
DDR_B_DQ11

DDR_B_DQ16
DDR_B_DQ17

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_DQ18
DDR_B_DQ19

DDR_B_DQ24
DDR_B_DQ25

DDR_B_DM3

DDR_B_DQ26
DDR_B_DQ27

DDR_B_MA12
DDR_B_MA9
DDR_B_MA8

DDR_B_MA5
DDR_B_MA3
DDR_B_MA1

DDR_B_MA10

DDR_B_DQ32
DDR_B_DQ33

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_DQ34
DDR_B_DQ35

DDR_B_DQ40
DDR_B_DQ41

DDR_B_DM5
DDR_B_DQ42

DDR_B_DQ43
DDR_B_DQ48

DDR_B_DQ49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_DQ50
DDR_B_DQ51

DDR_B_DQ56
DDR_B_DQ57

DDR_B_DM7
DDR_B_DQ58

DDR_B_DQ59

SPDD_PWR

12

C94

C94

2.2U_10V_M

2.2U_10V_M

0603_X5R

0603_X5R

4

12

C96

C96

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

3

+1_8VSUS +1_8VSUS

1
3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99

101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

201

CN2

CN2

202

VREF
VSS47
DQ0
DQ1
VSS37
DQS#0
DQS0
VSS48
DQ2
DQ3
VSS38
DQ8
DQ9
VSS49
DQS#1
DQS1
VSS39
DQ10
DQ11
VSS50

VSS18
DQ16
DQ17
VSS1
DQS#2
DQS2
VSS19
DQ18
DQ19
VSS22
DQ24
DQ25
VSS23
DM3
NC4
VSS9
DQ26
DQ27
VSS4
CKE0
VDD7
NC1
A16_BA2
VDD9
A12
A9
A8
VDD5
A5
A3
A1
VDD10
A10/AP
BA0
WE#
VDD2
CAS#
S1#
VDD3
ODT1
VSS11
DQ32
DQ33
VSS26
DQS#4
DQS4
VSS2
DQ34
DQ35
VSS27
DQ40
DQ41
VSS29
DM5
VSS51
DQ42
DQ43
VSS40
DQ48
DQ49
VSS52
NCTEST
VSS30
DQS#6
DQS6
VSS31
DQ50
DQ51
VSS33
DQ56
DQ57
VSS3
DM7
VSS34
DQ58
DQ59
VSS14
SDA
SCL
VDD(SPD)

DIMM_1

SMDFIX1

8 mm

NPTH1

203

2

VSS46

4

DQ4

6

DQ5

8

VSS15

SMDFIX2

10

DM0

12

VSS5

14

DQ6

16

DQ7

18

VSS16

20

DQ12

22

DQ13

24

VSS17

26

DM1

28

VSS53

30

CK0

32

CK0#

34

VSS41

36

DQ14

38

DQ15

40

VSS54

42

VSS20

44

DQ20

46

DQ21

48

VSS6

50

NC3

52

DM2

54

VSS21

56

DQ22

58

DQ23

60

VSS24

62

DQ28

64

DQ29

66

VSS25

68

DQS#3

70

DQS3

72

VSS10

74

DQ30

76

DQ31

78

VSS8

80

CKE1

82

VDD8

84

A15

86

A14

88

VDD11

90

A11

92

A7

94

A6

96

VDD4

98

A4

100

A2

102

A0

104

VDD12

106

BA1

108

RAS#

110

S0#

112

VDD1

114

ODT0

116

A13

118

VDD6

120

NC2

122

VSS12

124

DQ36

126

DQ37

128

VSS28

DDR2 SDRAM SO-DIMM

(200P)

DDR2 SDRAM SO-DIMM

(200P)

130

DM4

132

VSS42

134

DQ38

136

DQ39

138

VSS55

140

DQ44

142

DQ45

144

VSS43

146

DQS#5

148

DQS5

150

VSS56

152

DQ46

154

DQ47

156

VSS44

158

DQ52

160

DQ53

162

VSS57

164

CK1

166

CK1#

168

VSS45

170

DM6

172

VSS32

174

DQ54

176

DQ55

178

VSS35

180

DQ60

182

DQ61

184

VSS7

186

DQS#7

188

DQS7

190

VSS36

192

DQ62

194

DQ63

196

VSS13

198

SA0

200

SA1

NPTH2

DDR2_200P

DDR2_200P

FOX_AS0A426-NASN-7F

FOX_AS0A426-NASN-7F

204

DIMM_1 is placed farther from the GMCH than DIMM_0

3

DDR_B_DQ4
DDR_B_DQ5

DDR_B_DM0
DDR_B_DQ6

DDR_B_DQ7
DDR_B_DQ12

DDR_B_DQ13
DDR_B_DM1

DDR_B_DQ14
DDR_B_DQ15

DDR_B_DQ20
DDR_B_DQ21

DDR2_EXTTS#1
DDR_B_DM2

DDR_B_DQ22
DDR_B_DQ23

DDR_B_DQ28
DDR_B_DQ29

DDR_B_DQS#3
DDR_B_DQS3

DDR_B_DQ30
DDR_B_DQ31

DDR_B_DQ36
DDR_B_DQ37

DDR_B_DM4
DDR_B_DQ38

DDR_B_DQ39
DDR_B_DQ44

DDR_B_DQ45
DDR_B_DQS#5

DDR_B_DQS5
DDR_B_DQ46

DDR_B_DQ47
DDR_B_DQ52

DDR_B_DQ53

DDR_B_DM6
DDR_B_DQ54

DDR_B_DQ55
DDR_B_DQ60

DDR_B_DQ61
DDR_B_DQS#7

DDR_B_DQS7
DDR_B_DQ62

DDR_B_DQ63
SA0_DIM1

SA1_DIM1

DDR_B_CK0 10
DDR_B_CK#0 10

TP454 tpc26tTP454 tpc26t

1

DDR_B_SCKE1 10,16

DDR_B_MA14
DDR_B_MA11

DDR_B_MA7
DDR_B_MA6

DDR_B_MA4
DDR_B_MA2
DDR_B_MA0

DDR_B_SBS1 10,16
DDR_B_RAS# 10,16
DDR_B_CSB0 10,16

12
12

DDR_B_ODT0 10,16

DDR_B_CK1 10
DDR_B_CK#1 10

DDR_B_MA13

R193 10K_J 0402R193 10K_J 0402
R194 10K_J 0402R194 10K_J 0402

SMBus Address: A4(W)/A5(R)

2

DDR_B_DM[7..0] 10
DDR_B_DQ[63..0] 10
DDR_B_DQS[7..0] 10
DDR_B_DQS#[7..0] 10
DDR_B_MA[14..0] 10,16

Place these Caps near So-DIMM1.

12

C104

C104

2.2U_10V_Y_Y

2.2U_10V_Y_Y

0603

0603

12

C105

C105

2.2U_10V_Y

2.2U_10V_Y

0603_Y5V

0603_Y5V

Place these Caps near So-DIMM1.

12

C114

C114

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C115

C115

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C116

C116

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

DVT:03/26:Delete the R1762&R1763

SPDD_PWR

For corwin spring

2

1

+1_8VSUS

12

C106

C106

2.2U_10V_Y_Y

2.2U_10V_Y_Y

0603

0603

12

C117

C117

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C107

C107

2.2U_10V_Y_Y

2.2U_10V_Y_Y

0603

0603

12

C1447

C1447
330P_50V_K

330P_50V_K

0402_X7R

0402_X7R

DVT:04/06:Add C1447 and
C1448 for simulation.

12

12

C1448

C1448
330P_50V_K

330P_50V_K

0402_X7R

0402_X7R

C108

C108

2.2U_10V_Y_Y

2.2U_10V_Y_Y

0603

0603

+1_8VSUS

12

C1449

C1449
470P_50V_K

470P_50V_K

0402_X7R

0402_X7R

DVT:04/08:Add C1449.

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.

FOXCONN

FOXCONN

FOXCONN

Title

Title

Title

DDRII(CHB DIMM0) 2/2

DDRII(CHB DIMM0) 2/2

DDRII(CHB DIMM0) 2/2

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

Date: Sheet

Date: Sheet of

Date: Sheet of

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CCPBG - R&D Division

CCPBG - R&D Division

of

15 80Tuesday, July 15, 2008

15 80Tuesday, July 15, 2008

1

15 80Tuesday, July 15, 2008

5

+0_9VRUN

4

3

2

1

12

C118

D D

C118

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C119

C119

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C120

C120

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C121

C121

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C122

C122

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C123

C123

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C124

C124

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C125

C125

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C126

C126

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C127

C127

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C128

C128

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C129

C129

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C130

C130

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C131

C131

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C1174

C1174

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C1175

C1175

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C1176

C1176

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

Layout note: Place 1 cap close to every 2 Rtt to +0_9VRUN

12/15:Change these caps

+0_9VRUN

12

C132

C132

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C133

C133

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C134

C134

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C135

C135

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C136

C136

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C137

C137

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C138

C138

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C139

C139

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C140

C140

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C141

C141

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C142

C142

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C143

C143

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C144

C144

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C1178

C1178

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C1179

C1179

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C1180

C1180

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

12

C1177

C1177

0.1U_6.3V_K

0.1U_6.3V_K

0402_X5R

0402_X5R

Layout note: Place 1 cap close to every 2Rtt to +0_9VRUN

C C

DDR_A_MA[14..0]9,14

0804RP6

0804

0804RP10

0804

DDR_B_MA[14..0]10,15

+0_9VRUN

+0_9VRUN

+0_9VRUN

+0_9VRUN

+0_9VRUN

DDR_B_CSB010,15
DDR_B_ODT110,15
DDR_B_CSB110,15

DDR_B_ODT010,15 DDR_B_SBS110,15

DDR_B_SBS010,15

DDR_B_SCKE110,15

DDR_B_SCKE010,15

DDR_B_SBS210,15

DDR_B_CSB0
DDR_B_ODT1
DDR_B_CSB1
DDR_B_ODT0

DDR_B_MA5
DDR_B_MA8
DDR_B_MA9
DDR_B_MA12

DDR_B_SBS0
DDR_B_MA10
DDR_B_MA1
DDR_B_MA3

DDR_B_SCKE1
DDR_B_SCKE0

DDR_B_SBS2

R1082 43_J0402R1082 43_J 0402

1 2

R1083 43_J0402R1083 43_J 0402

1 2

R1086 43_J0402R1086 43_J 0402

1 2

R1088 43_J0402R1088 43_J 0402

1 2

33_j

33_j

RP7

1

8

2

7

3

6

4 5

33_j

33_j

RP11

1

8

2

7

3

6

4 5

R1090 43_J0402R1090 43_J 0402

1 2

R1092 43_J0402R1092 43_J 0402

1 2

R199 33_J0402R199 33_J0402

1 2

0804RP7

0804

0804RP11

0804

+0_9VRUN

+0_9VRUN

+0_9VRUN

+0_9VRUN

DDR_B_WE#10,15
DDR_B_CAS#10,15

DDR_B_RAS#10,15

01/06:Delete RP8;Add RP52 RP53

33_j

33_j

RP4

0804RP4

RP12

RP52

RP52

RP53

RP53

33_j

33_j

330404_4P2R

330404_4P2R

0804

8
7
6

0804RP12

0804

8
7
6

4

330404_4P2R

330404_4P2R

4

DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
DDR_B_SBS1

DDR_B_MA14
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6

DDR_B_WE#
DDR_B_CAS#

DDR_B_MA13
DDR_B_RAS#

1
2
3
4 5

1
2
3
4 5

2 3
1

2 3
1

+0_9VRUN

+0_9VRUN

+0_9VRUN

+0_9VRUN

12/21:Change RP1 RP5 RP9 RP6 RP10 RP7 RP11 RP4 RP8 RP12

+0_9VRUN

33_j

33_j

RP1

0804RP1

RP5

RP9

R198

R198

33_j

33_j

33_j

33_j

0804

8
7
6

+0_9VRUN

0804RP5

0804

8
7
6

+0_9VRUN

0804RP9

0804

8
7
6

+0_9VRUN

DDR_A_CSB09,14
DDR_A_ODT19,14
DDR_A_CSB19,14
DDR_A_ODT09,14

DDR_A_SBS19,14

DDR_A_SCKE19,14
DDR_A_SCKE09,14

DDR_A_MA8

1

DDR_A_MA5

2

DDR_A_MA3

3

DDR_A_MA1

4 5

DDR_A_RAS#9,14

B B

DDR_A_WE#9,14
DDR_A_CAS#9,14

DDR_A_SBS09,14

DDR_A_SBS29,14

DDR_A_RAS#
DDR_A_WE#
DDR_A_CAS#
DDR_A_SBS0 DDR_A_MA10

DDR_A_MA14
DDR_A_SBS2
DDR_A_MA11
DDR_A_MA12

DDR_A_MA13

1
2
3
4 5

1
2
3
4 5

1 2

33_J 0402

33_J 0402

DVT:03/13:Change 43 ohm resistor from _F to _J

DDR_A_CSB0
DDR_A_ODT1
DDR_A_CSB1
DDR_A_ODT0

DDR_A_MA2
DDR_A_SBS1
DDR_A_MA0

DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA9

DDR_A_SCKE1
DDR_A_SCKE0

R1081 43_J0402R1081 43_J 0402

1 2

R1084 43_J0402R1084 43_J 0402

1 2

R1085 43_J0402R1085 43_J 0402

1 2

R1087 43_J0402R1087 43_J 0402

1 2

33_j

33_j

RP6

1

8

2

7

3

6

4 5

33_j

33_j

RP10

1

8

2

7

3

6

4 5

R1089 43_J0402R1089 43_J 0402

1 2

R1091 43_J0402R1091 43_J 0402

1 2

12/05:Change PR1 PR5 PR6 PR9 PR10 from 56 Ohm to 33 Ohm
Change PR2 fom 56 Ohm to 43 Ohm *4R

A A

Change PR13 from 56 Ohm to 43 Ohm *2R
Change R198 from 56 Ohm to 33Ohm

5

4

12/05:Change PR4 PR7 PR8 PR11 PR12 from 56 Ohm to 33 Ohm
Change PR3 fom 56 Ohm to 43 Ohm *4R
Change PR14 from 56 Ohm to 43 Ohm *2R
Change R199 from 56 Ohm to 33 Ohm

FOXCONN

FOXCONN

FOXCONN

Title

Title

Title

DDRII Termination

DDRII Termination

DDRII Termination

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

A3

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CCPBG - R&D Division

CCPBG - R&D Division

of

16 80Tuesday, July 15, 2008

16 80Tuesday, July 15, 2008

1

16 80Tuesday, July 15, 2008

5

U4A

U4A

D D

*GNT0Boot Device *SPI_CS1#

+3VRUN

12

1 2

R1080

R1080
10K_J

10K_J

0402

0402

R1325

R1325
NC_1K_J

NC_1K_J

0402

0402

01SPI
1
1

EVT2:02/01:Delete I2C_DAT

DIP_SW

PCI
LPC

C C

1 2

0
1

PCI_PAR28

PCI_DEVSEL#28

CK_P_33M_ICH3

PCI_RST#28

PCI_IRDY#28

PCI_PME#28

PCI_SERR#28
PCI_STOP#28

PCI_TRDY#28
PCI_PERR#28
PCI_FRAME#28

R1475

R1475
1K_J 0402

1K_J 0402

PCI_GNT#028

PCI_REQ#028

INT_PIRQA#28
INT_PIRQB#28

INT_SERIRQ22,28

TP480tpc26t TP480tpc26t
TP481tpc26t TP481tpc26t

PCI_PAR
PCI_DEVSEL#
CK_P_33M_ICH

PCI_RST#

PCI_IRDY#
PCI_PME#

PCI_SERR#

PCI_STOP#

PCI_LOCK#

PCI_TRDY#

PCI_PERR#
PCI_FRAME#

PCI_GNT#0

PCI_GNT#0
SB_FLASH_EN#

TP_GPIO53

1

TP_GPIO55

1

PCI_REQ#0

INT_PIRQA#
INT_PIRQB#

INT_PIRQC#

INT_PIRQD#

GPIO2

GPIO3

DIP_SW

GPIO5

INT_SERIRQ

GPIO50
GPIO52
GPIO54

G12

G13

E3
C6
B3
R2

J8
R3
K5

F10

H8
E6
F5

H5
A7
C7
F7

K7

F13

G8

J5
E1
F1
A3
K6

L7
F2

G2

N6

PAR
DEVSEL#
PCICLK
PCIRST#
IRDY#
PME#
SERR#
STOP#
PLOCK#
TRDY#
PERR#
FRAME#

GNT0#
GNT1#/GPIO51
GNT2#/GPIO53
GNT3#/GPIO55

REQ0#
REQ1#/GPIO50
REQ2#/GPIO52
REQ3#/GPIO54

PIRQA#
PIRQB#
PIRQC#
PIRQD#
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

SERIRQ

ICH10

ICH10

null

null

PCI

PCI

1 OF 6

1 OF 6

DIP_SW H:LCD;L:CRT

+3VRUN

RP15

INT_SERIRQ

+3VRUN

+3VRUN

PANEL_ID0

+3VRUN

INT_PIRQA#

INT_PIRQB#
INT_PIRQC#
INT_PIRQD#

PCI_FRAME#
PCI_STOP#
PCI_SERR#
PCI_TRDY#

PANEL_ID018,51

B B

RP15

1
2
3
4
5 6

8.2K

8.2K

1206_10P8R

1206_10P8R

1206_10P8R

1206_10P8R

8.2K

8.2K

7
8
9

10

RP16

RP16

1206_10P8R

1206_10P8R

8.2K

8.2K

7
8
9

10

RP17

RP17

10

PCI_REQ#0

9

GPIO50

8

GPIO52

7

GPIO54

56

GPIO2

4

GPIO3

3
2

GPIO5

1

56

PCI_DEVSEL#

4

PCI_LOCK#

3

PCI_PERR#

2

PCI_IRDY#

1

PCI Pull up

A A

+3VRUN

+3VRUN

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8

AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE0#
C/BE1#
C/BE2#
C/BE3#

4

PCI_AD[31..0]

PCI_AD0

C10

PCI_AD1

C8

PCI_AD2

E9

PCI_AD3

C9

PCI_AD4

A5

PCI_AD5

E12

PCI_AD6

E10

PCI_AD7

B7

PCI_AD8

B6

PCI_AD9

B4

PCI_AD10

E7

PCI_AD11

A4

PCI_AD12

H12

PCI_AD13

F8

PCI_AD14

C5

PCI_AD15

D2

PCI_AD16

E5

PCI_AD17

G7

PCI_AD18

E11

PCI_AD19

G10

PCI_AD20

G6

PCI_AD21

D3

PCI_AD22

H6

PCI_AD23

G5

PCI_AD24

C1

PCI_AD25

C2

PCI_AD26

C3

PCI_AD27

D1

PCI_AD28

J7

PCI_AD29

F3

PCI_AD30

G1

PCI_AD31

H3

PCI_C/BE#0

F11

PCI_C/BE#1

G9

PCI_C/BE#2

C4

PCI_C/BE#3

E8

DVT:03/07:Change R1699
from 10K to 20K

PCI_AD[31..0] 28

PCI_C/BE#0 28
PCI_C/BE#1 28
PCI_C/BE#2 28
PCI_C/BE#3 28

Wireless­LAN

TV

SB_FLASH_EN#

EVT2:02/01:Add R

BIOS_CRISIS#

21

PJ24

PJ24
OPEN_JUMP_OPEN2

OPEN_JUMP_OPEN2

12/14:change the pad style

3

DMI_TXN07
DMI_TXP07
DMI_TXN17
DMI_TXP17
DMI_TXN27
DMI_TXP27
DMI_TXN37
DMI_TXP37
DMI_RXN07
DMI_RXP07
DMI_RXN17
DMI_RXP17
DMI_RXN27
DMI_RXP27
DMI_RXN37

DMI_RXP37
CK_PE_100M_ICH_DN3
CK_PE_100M_ICH_DP3

1D5V_PE_ICH

2008'01/18: Del Marvel Lan& add Intel
BOAZMAN LAN

GLAN_RXN625
GLAN_RXP625

GLAN_TXN625
GLAN_TXP625
MINI_RXN126
MINI_RXP126
MINI_TXN126
MINI_TXP126
TV_RXN227
TV_RXP227
TV_TXN227
TV_TXP227

TP169tpc26t TP169tpc26t
TP170tpc26t TP170tpc26t
TP171tpc26t TP171tpc26t
TP172tpc26t TP172tpc26t
TP506tpc26t TP506tpc26t
TP507tpc26t TP507tpc26t
TP508tpc26t TP508tpc26t
TP509tpc26t TP509tpc26t
TP160tpc26t TP160tpc26t
TP162tpc26t TP162tpc26t
TP163tpc26t TP163tpc26t
TP164tpc26t TP164tpc26t

12/14:Add net LAN_RXN4 LAN_RXP4
LAN_TXN4 LAN_TXP4;add C1212 C1213

+3VRUN

12

R1699

R1699
20K_J

20K_J

0402

0402

1

R219 24.9_F 0402R219 24.9_F 0402

1
1

1

1

1
1

1

1
1
1

1
1

+3VRUN

12

R1482

R1482
10K_J

10K_J

Q117

Q117

D

D

G

G

S

S

2N7002EPT

2N7002EPT

2 3

1 2

C1212

C1212
C1213

C1213

C151

C151
C152

C152

C206

C206
C208

C208

TP_PERN3
TP_PERP3
TP_PETN3
TP_PETP3
TP_PERN4
TP_PERP4
TP_PETN4
TP_PETP4
TP_PERN5
TP_PERP5
TP_PETN5
TP_PETP5

DMICOMP

0.1U_16V_M

0.1U_16V_M

GLAN_TXN6_C

1 2

GLAN_TXP6_C

1 2

0.1U_16V_M

0.1U_16V_M

0.1U_16V_M

0.1U_16V_M

MINI_TXN1_C

1 2

MINI_TXP1_C

1 2

0.1U_16V_M

0.1U_16V_M

TV_0.1U_16V_M

TV_0.1U_16V_M

TV_TXN2_C

1 2

TV_TXP2_C

1 2

TV_0.1U_16V_M

TV_0.1U_16V_M

EVT:01/31:Remove DIP_SW
from GPIO8 to GPIO4

DVT:03/26:Add this portion

DVT:04/06:Add R417.

U4B

U4B

W28

DMI0RXN

W26

DMI0RXP

AA26

DMI1RXN

AA28

DMI1RXP

AC26

DMI2RXN

AC28

DMI2RXP

AF26

DMI3RXN

AE26

DMI3RXP

V30

DMI0TXN

V29

DMI0TXP

Y30

DMI1TXN

Y29

DMI1TXP

AB30

DMI2TXN

AB29

DMI2TXP

AD29

DMI3TXN

AD30

DMI3TXP

U26

DMI_CLKN

U25

DMI_CLKP

AF28

DMI_IRCOMP

AF30

DMI_ZCOMP

D29

PERn6/GLAN_RXN

D30

PERp6/GLAN_RXP

E26

PETn6/GLAN_TXN

E28

PETp6/GLAN_TXP

P30

PERn1

P29

PERp1

R26

PETn1

R28

PETp1

M30

PERn2

M29

PERp2

N26

PETn2

N28

PETp2

K30

PERn3

K29

PERp3

L26

PETn3

L28

PETp3

H30

PERn4

H29

PERp4

J26

PETn4

J28

PETp4

F30

PERn5

F29

PERp5

G26

PETn5

G28

PETp5

ICH10

ICH10

null

null

MB_FLASH_EN 22

2

AD6

USBP0N

AD5

USBP0P

AE3

USBP1N

AE2

USBP1P

AD1

USBP2N

AD2

USBP2P

AB6

USBP3N

AB5

USBP3P

AC3

USBP4N

AC2

USBP4P

AB1

USBP5N

AB2

USBP5P

Y6

USBP6N

Y5

USBP6P

AA3

USBP7N

DMI

DMI

OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31
OC8#/GPIO44

OC9#/GPIO45
OC10#/GPIO46
OC11#/GPIO47

PCI-E

PCI-E

2 OF 6

2 OF 6

+3VALW

USB

USB

USBRBIAS#

USBP7P
USBP8N
USBP8P
USBP9N

USBP9P
USBP10N
USBP10P
USBP11N
USBP11P

USBRBIAS

CLK48

USB_OC#4

USB_OC#5

BIOS_CRISIS#_R

USB_OC#7

+3VALW

AA2
Y1
Y2
V6
V5
W2
W3
V1
V2

P5
N3
P7
R7
N2
N1
N5
M1
P3
R6
T7
P1

AG1
AG2

AG3

DVT:04/23:Delete R1784

1

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
TP_USBP5N
TP_USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P

TP_USBP10P
TP_USBP11N
TP_USBP11P

1
1

1
1
1

USBP0N 31
USBP0P 31
USBP1N 31
USBP1P 31
USBP2N 31
USBP2P 31
USBP3N 31
USBP3P 31
USBP4N 31
USBP4P 31

TP391 tpc26tTP391 tpc26t
TP392 tpc26tTP392 tpc26t

USBP6N 34
USBP6P 34
USBP7N 32
USBP7P 32
USBP8N 33
USBP8P 33
USBP9N 32
USBP9P 32

TP154 tpc26tTP154 tpc26t
TP155 tpc26tTP155 tpc26t
TP156 tpc26tTP156 tpc26t

01/08:Delete TP153 for layout

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5

BIOS_CRISIS#_R

USB_OC#7
USB_OC#8
USB_OC#9
USB_OC#10
USB_OC#11

USBRBIAS_ICH

CK_48M_USB_ICH

RP18

RP18

1
2
3
4
5 6

8.2K

8.2K

1206_10P8R

1206_10P8R

RP19

RP19

1
2
3
4 5

8.2K 0804_8P4R

8.2K 0804_8P4R

USB_OC#0 31
USB_OC#1 31
USB_OC#2 31
USB_OC#3 31
USB_OC#4 31

R1267 0_J 0402R1267 0_J 0402

1 2

EVT2:02/05: Change BR_PRS#
from OC7#/GPIO31 to GPIO57

1 2

22.6_F

22.6_F

10
9
8
7

DVT:03/23:Change the
circuit for USB power
switch change to MOS and
cost down.

USB_OC#0

8

USB_OC#1

7

USB_OC#2

6

USB_OC#3

BIOS_CRISIS#

12/08 change BIOS_RST# to
GPIO30 and NC Pull up R

R227

0402R227

0402

CK_48M_USB_ICH 3

+3VALW

USB_OC#8
USB_OC#9
USB_OC#10
USB_OC#11

Side USB X 2

Rear USB X 3

Felica

CIR

Camera

Blue Tooth

12/11:Place BIOS_CRISIS#
at the SB side

put the pad near the DIMM door.
short the pad, BIOS will perform crisis recovery.

5

4

3

2

FOXCONN

FOXCONN

FOXCONN

Title

Title

Title

ICH10 (PCIe/USB/PCI) 1/5

ICH10 (PCIe/USB/PCI) 1/5

ICH10 (PCIe/USB/PCI) 1/5

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

A3

A3

A3
Date: Sheet

Date: Sheet

Date: Sheet

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CCPBG - R&D Division

CCPBG - R&D Division

of

of

of

17 80Tuesday, July 15, 2008

17 80Tuesday, July 15, 2008

1

17 80Tuesday, July 15, 2008

5

PVT:06/04:Change +1_1VRUN to
+1_2VRUN by Intel's suggestion.

V_FSB_VTT

R220 62_F

R220 62_F

1 2

0402

+3VALW

D D

C C

B B

+3VRUN

12

1500P_25V_K

1500P_25V_K

Layout note: place these
Cap close to ICH10 ball.

ICH_BM_BUSY19

0402

10K_J

10K_J

12

R1416

R1416
R1537

R1537

12

NC_10K_J

NC_10K_J

HW_POP_MUTE_ICH

R1724

R1724

12

NC_10K_J

NC_10K_J

R1717

R1717

1 2

10K_J 0402

10K_J 0402

R223 10K_JR223 10K_J

12

R224 10K_JR224 10K_J

12

R226 NC_10K_JR226 NC_10K_J

12

R225 10K_J 0402R225 10K_J 0402

1 2

R1172 10K_J 0402R1172 10K_J 0402

1 2

R1173 10K_J0402R1173 10K_J0402

1 2

12

C146

1 2

R1765

R1765
NC_0_J

NC_0_J

0402

0402

C146

1500P_25V_K

1500P_25V_K

0402_X7R

0402_X7R

+3_3V_CL

1 2
12

R217

R217

3.24K_F

3.24K_F

0603

0603

12

R218

R218
453_F

453_F

0603

0603

R1766

R1766
0_J

0_J

0402

0402

C145

C145

0402_X7R

0402_X7R

+3VRUN

PVT:06/09:Change R217 from 3.24K to

3.3K for system voltage fail.

H_FERR#

POWER_LED#

ICH_BM_BUSY_R

GPIO49

SB_RCIN#

SB_A20GATE

FAN1_TACH_R
FAN2_TACH_R
FAN3_TACH_R

FAN3_TACH_R
FAN2_TACH_R

FAN1_TACH_R

12

C147

C147
1500P_25V_K

1500P_25V_K

0402_X7R

0402_X7R

EVT2:0205: Reserve pull up for
HW_POP_MUTE_ICH

SB_SST

EVT2:0205: add pull up for GPIO49

DVT:02/20:Remove BL_OFF#

DVT:04/18:Change GPIO27 to BT_ON

+5VRUN

R1657

R1657
10K_J

10K_J

0402

0402

1 2
1

2 3

2N7002EPT

2N7002EPT

NC_0_J

NC_0_J

1 2

R1521

DVT:03/07:Connect
CL_VREF_ICH
from +3VRUN to +3_3V_CL
for Corwin Spring

DVT：04/23 Mount R1766 and no
mount R1765 to support Wake
up on Intel LAN

DVT:04/18:Remove WLAN_EN# to GPIO11

DVT:04/20:Add R1553.

Q172

Q172

DGS

DGS

0402R1521

0402

PVT:06/06:Add CPU_GTLREF_CTRL2 for adding
GTLREF voltage control circuit

ICH_BM_BUSY_R

PVT:06/04:Add Q172 R1657 and NC
R1521 for 3/5VRUN leakage.

0.405V

CL_VREF_ICH

12

C148

C148

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

PVT:06/13:Change the R217 back to 3.24K.

A A

4

H_A20M#4

H_FERR#4

H_IGNNE#4

H_INIT#4
H_INTR4
H_NMI4
H_SMI#4

H_STPCLK#4

H_CPUPWRGD4

H_DPSLP#5

H_CL_CLK08
H_CL_DATA08
H_CL_RST0#8

EVT2:02/12: Stuff R203,R206

R201 0_J 0402R201 0_J 0402

FAN1_PWM36
FAN2_PWM36

FAN3_PWM36
FAN1_TACH36
FAN2_TACH36
FAN3_TACH36

SB_SST35

H_PECI5

HW_POP_MUTE_ICH58

BT_ON26

CPU_GTLREF_CTRL24

WLAN_BT_SW#26

12/27:Add CN46

CN46

CN46

HEADER_2P

HEADER_2P

FOX_HB24021

FOX_HB24021

1 2

R202 0_J 0402R202 0_J 0402

1 2

R203 0_J 0402R203 0_J 0402

1 2

R204 0_J 0402R204 0_J 0402

1 2

R205 0_J 0402R205 0_J 0402

1 2

R206 0_J 0402R206 0_J 0402

1 2

1 2

R1168 0_J 0402R1168 0_J 0402

POWER_LED#37

TP525tpc26t TP525tpc26t
TP546tpc26t TP546tpc26t

TP501tpc26t TP501tpc26t

+3VRUN

R1407

R1407

4.7K_J

4.7K_J

0402

0402

1 2

FLASH_STRAP_SB

1
2

TP128tpc26t TP128tpc26t

SYS_ID5

R1271

R1271

1 2

0_J 0402

0_J 0402

1
1

R1553

1 2

0_J

0_J

1

ICH_BM_BUSY_R

SB_RCIN#
SB_A20GATE

TP_INIT3_3V#

1

CL_VREF_ICH

FAN1_PWM_R
FAN2_PWM_R
FAN3_PWM_R
FAN1_TACH_R
FAN2_TACH_R
FAN3_TACH_R

ICH_SST
ICH_PECI

POWER_LED#
GPIO49

TP_GPIO34
FLASH_STRAP_SB
TP_GPIO32

SB_BT_ON

0402R1553

0402

TP_GPIO18

3

U4C

U4C

null

null

AJ28

A20M#

AJ27

FERR#

AC22

IGNNE#

AE23

INIT#

AH27

INTR

AF24

NMI

AH26

SMI#

AJ29

STPCLK#

L3

RCIN#

P8

A20GATE

AD23

CPUPWRGD

AE24

DPSLP#

M3

INIT3_3V#

G22

CL_CLK0

H21

CL_DATA0

G20

CL_RST0#

C27

CL_VREF0

AJ21

PWM0

AJ22

PWM1

AK22

PWM2

AH21

TACH0/GPIO17

AK21

TACH1/GPIO1

AH22

TACH2/GPIO6

AK23

TACH3/GPIO7

C19

SST

AC23

PECI

F16

GPIO56

AJ25

GPIO49

AH5

GPIO34

AF6

GPIO33

K2

GPIO32

G18

GPIO28

A11

GPIO27

AF5

GPIO20

K1

GPIO18

A19

GPIO13

A9

GPIO14/JTAGTDI/QST_BMBUSY#

3 OF 6

3 OF 6

ICH10

ICH10

Projet name SYS_ID3 SYS_ID2 SYS_ID1 SYS_ID0

M810

M820

M830

M840

Model name

SYS_ID5

SYS_ID4

Panel Type

PANEL_ID0

PANEL_ID1

SATA0RXN
SATA0RXP
SATA0TXN

SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN

SATA1TXP
SATA2RXN

HOSTCLIQSTGPIO

HOSTCLIQSTGPIO

SATA2RXP
SATA2TXN

SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN

SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN

SATA4TXP
SATA5RXN

SATA

SATA

SATA5RXP
SATA5TXN

SATA5TXP

SATA_CLKN
SATA_CLKP

SATALED#

SATARBIAS#

SATARBIAS

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA2GP/GPIO36
SATA3GP/GPIO37

SATA4GP
SATA5GP

SATACLKREQ#/GPIO35

SCLOCK/GPIO22

SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48

0000

0010

0001

0011

HL

0

1

P1 P3

0

0

M

0

1

P2

011

0

2

EVT2:0204: Change the SATA Port
to port2 for MOR request

AK17
AJ17
AK19
AJ19
AJ15
AK15
AH16
AF16
AJ13
AK13
AH14
AF14
AJ11
AK11
AF12
AH12
AJ9
AK9
AF10
AH9
AJ7
AK7
AF8
AH7
AF18
AF19

AE7
AK6
AJ6

AK25
AE20
AE21
AE22
AF22
AD21

L1
AJ24
AK24
AH23
AD20

TP_SATA1RXN
TP_SATA1RXP
TP_SATA1TXN
TP_SATA1TXP

TP_SATA3RXN
TP_SATA3RXP
TP_SATA3TXN
TP_SATA3TXP
TP_SATA4RXN
TP_SATA4RXP

TP_SATA4TXP
TP_SATA5RXN
TP_SATA5RXP
TP_SATA5TXN
TP_SATA5TXP

SATARBIAS

PANEL_ID1
GPIO19
PANEL_ID0
SYS_ID4
SATA4GP
SATA5GP

SYS_ID0
SYS_ID1
SYS_ID2
SYS_ID3

1

0

P4

1

1

SATA_RXN0 30

SATA_RXP0 30
SATA_TXN0 30
SATA_TXP0 30

SATA_RXN2 30

SATA_RXP2 30
SATA_TXN2 30
SATA_TXP2 30

SATALED# 37

24.9_F

24.9_F

1 2

R208

0402R208

0402

R214 10K_JR214 10K_J

1 2

R215 10K_JR215 10K_J

1 2

1

TP129 tpc26tTP129 tpc26t

1

TP130 tpc26tTP130 tpc26t

1

TP127 tpc26tTP127 tpc26t

1

TP131 tpc26tTP131 tpc26t

1

TP132 tpc26tTP132 tpc26t

1

TP133 tpc26tTP133 tpc26t

1

TP134 tpc26tTP134 tpc26t

1

TP135 tpc26tTP135 tpc26t

1

TP136 tpc26tTP136 tpc26t

1

TP138 tpc26tTP138 tpc26t

1

TP142 tpc26tTP142 tpc26t

1

TP143 tpc26tTP143 tpc26t

1

TP144 tpc26tTP144 tpc26t

1

TP145 tpc26tTP145 tpc26t

1

TP146 tpc26tTP146 tpc26t

SATA_CLKN 3
SATA_CLKP 3

0106: Delete TP140
for layout request

PANEL_ID1 51
PANEL_ID0 17,51

SATA_CLKREQ# 3

HDD

ODD

+3VRUN

+3VRUN

R1038 NC_10K_JR1038 NC_10K_J

12

R1039 NC_10K_JR1039 NC_10K_J

12

R1040 NC_10K_JR1040 NC_10K_J

12

R1041 NC_10K_JR1041 NC_10K_J

12

R1337 NV_10K_JR1337 NV_10K_J

12

R1336 CA_10K_JR1336 CA_10K_J

12

R1534 10K_JR1534 10K_J

12

R1535 10K_JR1535 10K_J

12

12/27:Add R1534 R1535

R1042 10K_JR1042 10K_J

12

R1043 10K_JR1043 10K_J

12

R1044 10K_JR1044 10K_J

12

R1045 10K_JR1045 10K_J

12

R1284 CA_10K_JR1284 CA_10K_J

12

R1281 NV_10K_JR1281 NV_10K_J

12

DVT:03/05:NV R1281,R1337
for M810 H;
CA R1284,R1336 for M810 L

SYS_ID0
SYS_ID1
SYS_ID2
SYS_ID3
SYS_ID4

SYS_ID5
PANEL_ID1
GPIO19

SYS_ID0

SYS_ID1

SYS_ID2

SYS_ID3

SYS_ID4

SYS_ID5

1

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.

FOXCONN

FOXCONN

FOXCONN

Title

Title

Title

ICH10 (HOST/SATA) 2/5

ICH10 (HOST/SATA) 2/5

ICH10 (HOST/SATA) 2/5

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

A3

A3

A3
Date: Sheet of

Date: Sheet

5

4

3

2

Date: Sheet

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CCPBG - R&D Division

CCPBG - R&D Division

of

of

18 80Tuesday, July 15, 2008

18 80Tuesday, July 15, 2008

1

18 80Tuesday, July 15, 2008

5

+3VALW

R228 10K_JR228 10K_J

1 2

R233 1K_J 0402R233 1K_J 0402

1 2

R235 10K_JR235 10K_J

1 2

R239 10K_J 0402R239 10K_J 0402

1 2

R231 10K_J 0402R231 10K_J 0402

1 2

R241 10K_JR241 10K_J

D D

0402_NPOC924

0402_NPO

C924

+3VALW

1 2

12

12

0402_NPOC925

0402_NPO

C925

NC_22P_50V_J

NC_22P_50V_J

DVT:04/12:Change R238 & R239&R231 from

8.2K to 10k following AIO-A&AIO-B

R238 10K_J 0402R238 10K_J 0402

0402_NPOC926

0402_NPO

C926

NC_22P_50V_J

NC_22P_50V_J

1 2

12

12

0402_NPOC927

0402_NPO

C927

NC_22P_50V_J

NC_22P_50V_J

SB_RI#

SB_WAKE#

SB_TP0

SMLINK0
SMLINK1

CIR_WAKE#

ICH_AUD_SDIN0
ICH_AUD_SDOUT
ICH_AUD_SYNC
ICH_AUD_RST#

PVT:06/16:Back up C924
C925 C926 and C927 for EMI

NC_22P_50V_J

NC_22P_50V_J

SB_SYS_RESET#

EVT2:02/01:Delete I2C_CLK and add TP524

LPC_DRQ#022

LPC_FRAME#22

ICH_AUD_BCLK54

ICH_AUD_SDIN054

ICH_AUD_SDOUT54
ICH_AUD_SYNC54
ICH_AUD_RST#54,58

CK_14M_ICH3

ICH_LAN_RSTSYNC25

DVT:04/18:Delete R248

R1716 10K_J 0402R1716 10K_J 0402

1 2

R1718 10K_J 0402R1718 10K_J 0402

1 2

R1719 NC_10K_J 0402R1719 NC_10K_J 0402

C C

+3VRUN

B B

SMB_THRM_CLK
SMB_THRM_DATA

SMB_THRM_DATA_Q3,14,15

DVT:04/02:Change C153,C154

A A

from 18PF to 12PF

DVT:04/06:Change Y2 from
1F-X32M768-1000 to
1F-X32K768-1000,the same as M8230.

1 2

R1279 4.7K_J 0402R1279 4.7K_J 0402

1 2

R1280 4.7K_J 0402R1280 4.7K_J 0402

1 2

R1454 10K_JR1454 10K_J

1 2

Q160

Q160

G

Q157B

Q157B

5

1

34

D2

D2

G2

G2

S2

S2

2N7002SPT

2N7002SPT

G

SLP_M

SMB_THRM_CLK_Q3,14,15 SMB_THRM_CLK_VGA 45

R1813

R1813

1 2

CS_1K_J 0402

CS_1K_J 0402

PVT:06/04:Change theC153
from 12pF to 15pF, C154
from 12pF to 18pF.

BT_PRS#

GPIO24

SMB_THRM_CLK
SMB_THRM_DATA

ICH_BM_BUSY

DVT:04/18:Change GPIO11 to WLAN_EN#.

+5VALW

23

S

S

6

Q157A

Q157A

D1

D1

S1

S1

2N7002SPT

2N7002SPT

1

+5VRUN

12

R1826

R1826
NCS_1K_J

NCS_1K_J

0402

0402

C153 15P_50V_J

C153 15P_50V_J

1 2

0402_NPO

0402_NPO

1 2

C154 18P_50V_J

C154 18P_50V_J

0402_NPO

0402_NPO

D

D

CS_TP0610K-T1-E3

CS_TP0610K-T1-E3

12

R1814

R1814
CS_1K_J

CS_1K_J

0402

0402

5

2

G1

G1

DVT:04/23: Delete R1816,R1817 and
add R1826,Q157 for layout routing
issue

VCCRTC

Q158B

Q158B

14

23

Y2

Y2

32.768KHZ_12.5P_10PPM

32.768KHZ_12.5P_10PPM

Q13MC3061001800

Q13MC3061001800

DVT:04/12:Change R997 from
R252.1 and Y2.1,2 to R252.2
and Y2.3,4

SB_RTCRST#23
SB_SRTCRSTB23

S2

S2

LPC_AD022
LPC_AD122
LPC_AD222
LPC_AD322

ICH_LAN_RXD025
ICH_LAN_RXD125
ICH_LAN_RXD225

ICH_LAN_TXD025
ICH_LAN_TXD125
ICH_LAN_TXD225

LAN_DISABLE#25

ICH_GLAN_CLK25

SMB_THRM_CLK35
SMB_THRM_DATA35

CPU_GTLREF_CTRL14

34

D2

D2

R997

R997

G2

G2

2N7002SPT

2N7002SPT

4

TP524tpc26t TP524tpc26t

1

LPC_FRAME#

R232 33_J 0402R232 33_J 0402

1 2

TP349tpc26t TP349tpc26t
TP178tpc26t TP178tpc26t
TP173tpc26t TP173tpc26t

R875 33_J 0402R875 33_J 0402

R244 33_J 0402R244 33_J 0402
R245 33_J 0402R245 33_J 0402

1D5V_PE_ICH

WLAN_EN#37

R256 1M_J0402R256 1M_J0402

1 2

WOL_EN72

CIR_WAKE#32

BT_PRS#32

DVT:03/27:Change GPIO9 from
WLAN_EN# to WOL_EN

+5VRUN

12

PVT:06/06:Add CPU_GTLREF_CTRL1 for adding

R1815

R1815

GTLREF voltage control circuit

1K_J

1K_J

0402

0402

6

Q158A

Q158A

D1

D1

5

2

G1

G1

S1

S1

2N7002SPT

2N7002SPT

1

1 2

0_J 0603

0_J 0603

4

TP_HDA_SDIN1

1

TP_HDA_SDIN2

1

TP_HDA_SDIN3

1

1 2

1 2

1 2

R15540_J 0402R15540_J 0402

1 2

GLAN_COMP

R249

R249

1 2

24.9_F0402

24.9_F0402

ICH_RTCX1
ICH_RTCX2

SB_RTCRST#
SB_SRTCRSTB

SMB_THRM_CLK
SMB_THRM_DATA

WLAN_EN#

SMLINK0
SMLINK1

INTRUDER#

GPIO24

CIR_WAKE#
BT_PRS#

DVT:04/23:Add R1456 R1457.

+3VRUN

R1456

R1456
10K_J

10K_J

1 2

ICH_RTCX1

12

R252

R252
10M_J

10M_J

0603

0603

ICH_RTCX2

U4D

U4D

LPC_AD0

K3

LPC_AD1
LPC_AD2

LPC_AD3
LPC_DRQ#0
TP_GPIO23

GPIO12_ICHCPU_GTLREF_CTRL1

R1457

R1457
10K_J

10K_J

1 2

FWH0/LAD0

H1

FWH1/LAD1

M7

FWH2/LAD2

J1

FWH3/LAD3

L6

LDRQ0#

J3

LDRQ1#/GPIO23

L5

FWH4/LFRAME#

AH3

HDA_BIT_CLK

AK3

HDA_SDIN0

AH4

HDA_SDIN1

AH1

HDA_SDIN2

AJ3

HDA_SDIN3

AJ2

HDA_SDOUT

AK1

HDA_SYNC

AJ1

HDA_RST#

M5

CLK14

E14

LAN_RSTSYNC

G15

LAN_RXD0

H14

LAN_RXD1

E13

LAN_RXD2

F15

LAN_TXD0

F14

LAN_TXD1

G14

LAN_TXD2

A8

GPIO12

F25

GLAN_CLK

A29

GLAN_COMPO

B29

GLAN_COMPI

A21

RTCX1

B21

RTCX2

A25

RTCRST#

H20

SRTCRST#

H16

SMBCLK

E16

SMBDATA

C16

SMBALERT#/GPIO11/JTAGTDO

A15

SMLINK0

B15

SMLINK1

G21

INTRUDER#

F18

LINKALERT#/GPIO60/JTAGRST#

A14

GPIO24

A18

GPIO9

C17

GPIO10/CPU_MISSING/JTAGTMS

C12

GPIO57/TPM_PP/JTAGTCK

ICH10

ICH10

null

null

DVT:03/26: Add this circuit
for corwin spring,Default not
support.

DVT:03/26: support corwin
spring need NC 0_J

SMB_THRM_DATA_VGA 45

DVT:03/26:Change the Q149 to MOS

SB_SLP_M#

3

C14

PLTRST#

AK26

THRM#

THRMTRIP#

SLP_S3#
SLP_S4#

SLP_S5#/GPIO63

SLP_M#

S4_STATE#/GPIO26

PWROK

PWRBTN#

PM

PM

SYS_RESET#

RSMRST#

LAN_RST#

WAKE#
MCH_SYNC#
VRMPWRGD

CLPWROK

DPRSTP#

CK_PWRGD

SUS_STAT#/LPCPD/GPIO61

SUSCLK/GPIO62

DRAMPWROK/GPIO8

RTC

RTC

SMB/SMI LAN AUDIO LPC

SMB/SMI LAN AUDIO LPC

4 of 6

4 of 6

CS_10K_J 0402

CS_10K_J 0402

GPIO0

STP_PCI#/GPIO15

STP_CPU#/GPIO25

GPIO16/DPRSLPVR

INTVRMEN

LAN100_SLP

GPIO72/TP0

MISC

MISC

SPI_CLK
SPI_MISO
SPI_MOSI
SPI_CS0#

SPI

SPI

SPI_CS1#/GPIO58

R1752

R1752

1 2

SPKR

TP3
TP4
TP5
TP6
TP7

RI#

AD24
A13
B13
G17
F17
C11
C25
T3
G19
F19
F22
C21
E20
AH25
C22
T6
AK28
T8

R1
R5
A20
N7
C15
B18
M2

SB_INTVRMEN

E23

SB_LAN100_SLP

E21

HDA_SPKR

N8
C13
F20
E19
C18
A16
B16

G23
B26
C26
E25
F23

WOL_EN

12

C1430

C1430
CS_1U_6.3V_M

CS_1U_6.3V_M

0402_X5R

0402_X5R

SB_THRMTRIP#

SB_SLP_S3#
SB_SLP_S4#
SB_SLP_S5#
SB_SLP_M#
SUSPEND_LED#
SB_PWROK
PWRSW_R#
SB_RI#

SB_RSMRST#
SB_LAN_RST#
SB_WAKE#
H_MCH_SYNC#
SB_VRMPWRGD
CL_PWROK
SB_DPRSTP#
SB_CK_PWRGD

PM_SUS_STAT#

ICH_BM_BUSY
SB_STP_PCI#
SB_STP_CPU#
TP_INV_ENABLE

SB_TP0
SB_TP3
SB_TP4
SB_TP5
SB_TP6
SB_TP7

SB_SPI_CLK_R
SPI_MISO_R
SB_SPI_MOSI
SB_SPI_CS0#

SPI_CS1#

+3VALW

12

R242

R242
CS_10K_J

CS_10K_J

12

R272

R272
NC_100K_J

NC_100K_J

0402

0402

+3VALW

12

D

D

1

G

G

S

S

2 3

1

R250 330K_JR250 330K_J

1 2

R251 330K_JR251 330K_J

1 2

1
1
1
1
1
1

R253

R253

1 2

15_F 0402

15_F 0402

R254

R254

1 2

R255

R255

15_F 0402

15_F 0402

1 2

15_F 0402

15_F 0402

DVT:Add this circuit for Corwin
spring, support stuff R242

R1751

R1751
CS_150_J

CS_150_J

0402

0402

Q149

Q149

CS_2N7002EPT

CS_2N7002EPT

DVT:03/14:Add this circuit for corwin spring

3

2

PVT:06/04:Change +1_1VRUN to

PLT_RST# 8,22,26,27,39,50

SB_THRM# 5

SB_SLP_S3# 23,24
SB_SLP_S4# 23
SB_SLP_S5# 26

SUSPEND_LED# 37

SB_PWROK 8,24
PWRSW_R# 23

SB_SYS_RESET# 4,22
SB_RSMRST# 23
SB_LAN_RST# 23
SB_WAKE# 26,27
H_MCH_SYNC# 8

SB_VRMPWRGD 24
CL_PWROK 8,24
SB_DPRSTP# 5,8
SB_CK_PWRGD 24

PM_SUS_STAT# 22

WLAN_BT_OFF 26
ICH_BM_BUSY 18

SB_STP_PCI# 3

TP543 tpc26tTP543 tpc26t

TP542 tpc26tTP542 tpc26t
TP190 tpc26tTP190 tpc26t
TP191 tpc26tTP191 tpc26t
TP192 tpc26tTP192 tpc26t
TP193 tpc26tTP193 tpc26t
TP194 tpc26tTP194 tpc26t

2008'0107:Delete EEPROM U87 for cost down.BIOS will
use other methodology to store those System Information in
SPI Flash ROM instead of EEPROM

SLP_M 3,24,72

2

SB_STP_CPU# 3

DVT:03/25:Delete the net 'INV_ENABLE', and
add a TP

VCCRTC
VCCRTC

HDA_SPKR 54

To Audio, internal pull low
for reboot enable.

SPI_CLK_R 22
SPI_MISO_R 22
SPI_MOSI_R 22
SPI_CS0# 22

12/20: Add R1462 pull down SPI_CS1#,
and NC it. SB internal pull up

12

DVT:03/05: Change
ICH_RSMRST# to SB_RSMRST#

01/08:Delete TP460 for layout

DVT:03/05:Connect WLAN_BT_OFF to GPIO8

EVT2:01/31:Connect WLAN_BT_OFF to GPIO8

R1476

R1476

1 2

NC_1K_J 0402

NC_1K_J 0402

FOXCONN

FOXCONN

FOXCONN

Title

Title

Title

ICH10 (PM/LAN/HDA) 3/5

ICH10 (PM/LAN/HDA) 3/5

ICH10 (PM/LAN/HDA) 3/5

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

A3

A3

A3
Date: Sheet

Date: Sheet

Date: Sheet

+1_2VRUN by Intel's suggestion.

R234

R234

1 2

62_F 0402

62_F 0402

R236

R236

1 2

0_J 0402

0_J 0402

C1261

C1261

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

EVT2:01/30:Change SUSPEND_LED
to SUSPEND_LED#

SPI_CS1#

1

V_FSB_VTT

H_THRMTRIP# 5

0106:Add C1261

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CCPBG - R&D Division

CCPBG - R&D Division

19 80Tuesday, July 15, 2008

19 80Tuesday, July 15, 2008

1

19 80Tuesday, July 15, 2008

of

of

of

5

12/11:Place close
to ball AC9

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

VCCHDA VCCDMIPLL

12

C158

D D

C158

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

HDA decoupling caps.

EVT2:01/18: add 1U CAP,close
Cap close to ball A10&B10

VccGLANPLL LRC Filter

+1_5VRUN

L13

L13

1 2

TL321611-1R0K

TL321611-1R0K

Rated at least 100mA

EVT2:01/18:
add 1U C for intel GLAN

C C

+5VRUN

12

R1275

R1275
10_J

10_J

0402

0402

VCCSUSHDA

12

C166

C166

BACK

R257 0_JR257 0_J

1 2

12/11:Place close
to ball AC10

1D5V_PE_ICH

1U_1206

1U_1206

R1522

R1522

1 2

0_J 0402

0_J 0402

+3VRUN

V5REF / 3D3V_SYS
Power Sequencing

D30

D30
CH035H-40PT

CH035H-40PT

null

null

1 2

REF5V

12

C1137

C1137

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

C157

C157
C155

+3VALW

VCCGLANPLL

C165

C165
10U_6.3V_Y

10U_6.3V_Y

0805_Y5V

0805_Y5V

C155

VCCSATAPLL

C161 0.1U_16V_Y

C161 0.1U_16V_Y

C1316 NC_1U_10V_Y

C1316 NC_1U_10V_Y

1 2

0603_Y5V

0603_Y5V

R1418

R1418

0_J

0_J

12

C1317

C1317
1U_10V_Y

1U_10V_Y

0603_Y5V

0603_Y5V

+3VRUN

12/11:Place close to A28

12

REF5V

place cap.
near pin A6

1 2

0.1U_16V_Y

0.1U_16V_Y

1 2

0.1U_16V_Y

0.1U_16V_Y
0_J

0_J

1 2

R258

R258

+1_5VRUN

12

VCCGLAN1_5

VCCGLAN1_5

12

NC_1K_J

NC_1K_J

0402

0402

1 2

REF5V

REF5V_SUS

VCCSUSHDA
VCCHDA

VCCDMIPLL

VCCGLANPLL

VCCLAN_1_1

0402_Y5V

0402_Y5V

80 mA

R1419

R1419

1D5V_PE_ICH

646 mA

2 mA

2 mA

VCCCL1_5
VCCCL1_1

32 mA
32 mA
11 mA
47 mA

23 mA

23 mA

12/28:Change D30 D31

+5VALW

12

R1276

R1276
10_J

10_J

B B

0402

0402

12/11:Add
C1150 C1151

12/11:Place close to ball AG29 12/11:Place close to ball AG30

+1_5VRUN

A A

1 2

EBLS3225-1R0M 1A

EBLS3225-1R0M 1A

12/11:Cancel CAP4
220UF ADD C1149

+3VALW

V5REF_SUS / 3D3V_SB
Power Sequencing

D31

D31
CH035H-40PT

CH035H-40PT

null

null

REF5V_SUS

place cap.
near pin AF1

12

C1150

C1150
22U_6.3V_M

22U_6.3V_M

0805_X5R

0805_X5R

12/11:Place
close to B30

0805_X5R

0805_X5R

12

4.7U_6.3V_K

4.7U_6.3V_K
C1149

C1149

5

REF5V_SUS

12

C1151

C1151

0.01U_25V_K

0.01U_25V_K

0603_X7R

0603_X7R

1D5V_PE_ICH

0805_X5R

0805_X5R

22U_6.3V_M

22U_6.3V_M

12

C167

C167

12/11:Place close to ball U30 or AE30

1 2

12

C1138

C1138

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

+1_1VRUN

PCI-E (VCC1_5_B) Filter

L14 1U_1210

L14 1U_1210

CAP45

CAP45

6.3x5.9

6.3x5.9

12

+

+

220U_6.3V_M

220U_6.3V_M

+1_5VRUN

0805_X5R

0805_X5R

22U_6.3V_M

22U_6.3V_M

12

C168

C168

All Vcc1_5_A
1644 mA

1D5V_PE_ICH

12

C169

C169

2.2U_10V_M

2.2U_10V_M

0603_X5R

0603_X5R

50 mA

AF1
A26
A23
AC9

AC10

AK5

AK20

T30
A28
B10

A10

C30
C29
C28
B30

AA23
AA24
AA25
AB24
AB25
AC25
AD25
AD26
AD28
AE28
AE29
AE30

K23
K24
K25

M23
M24
M25
N24
N25
P23
P24
P25
R24
R25
T23
T24
T25
T26
T28
U24
U28
U29
U30
V23
V24

V25
W24
W25

Y23

Y24

Y25

AG29
AG30

H10

H11

AC11
AB23
AC18
AC20
AC13
AD11
AD12
AD13
AE11

AF11
AH10
AH11

AJ10
AK10
AC17
AD17
AE17

AF17
AH17
AH18

AJ18
AK18

A6

J24
J25

L24
L25

4

U4E

U4E

null

null

V5REF
V5REF_Sus
VccCL1_5
VccCL1_1
VccSusHDA
VccHDA
VccUSBPLL
VccSATAPLL
VccDMIPLL
VccGLANPLL
VccLAN1_1_2

VccLAN1_1_1

VccGLAN1_5_4
VccGLAN1_5_3
VccGLAN1_5_2
VccGLAN1_5_1

Vcc1_5_B_1
Vcc1_5_B_2
Vcc1_5_B_3
Vcc1_5_B_4
Vcc1_5_B_5
Vcc1_5_B_6
Vcc1_5_B_7
Vcc1_5_B_8
Vcc1_5_B_9
Vcc1_5_B_10
Vcc1_5_B_11
Vcc1_5_B_12
Vcc1_5_B_13
Vcc1_5_B_14
Vcc1_5_B_15
Vcc1_5_B_16
Vcc1_5_B_17
Vcc1_5_B_18
Vcc1_5_B_19
Vcc1_5_B_20
Vcc1_5_B_21
Vcc1_5_B_22
Vcc1_5_B_23
Vcc1_5_B_24
Vcc1_5_B_25
Vcc1_5_B_26
Vcc1_5_B_27
Vcc1_5_B_28
Vcc1_5_B_29
Vcc1_5_B_30
Vcc1_5_B_31
Vcc1_5_B_32
Vcc1_5_B_33
Vcc1_5_B_34
Vcc1_5_B_35
Vcc1_5_B_36
Vcc1_5_B_37
Vcc1_5_B_38
Vcc1_5_B_39
Vcc1_5_B_40
Vcc1_5_B_41
Vcc1_5_B_42
Vcc1_5_B_43
Vcc1_5_B_44
Vcc1_5_B_45
Vcc1_5_B_46

VccDMI_1
VccDMI_2

Vcc1_5_A_30
Vcc1_5_A_31
Vcc1_5_A_6
Vcc1_5_A_3
Vcc1_5_A_12
Vcc1_5_A_13
Vcc1_5_A_7
Vcc1_5_A_14
Vcc1_5_A_15
Vcc1_5_A_16
Vcc1_5_A_18
Vcc1_5_A_20
Vcc1_5_A_22
Vcc1_5_A_23
Vcc1_5_A_26
Vcc1_5_A_28
Vcc1_5_A_11
Vcc1_5_A_17
Vcc1_5_A_19
Vcc1_5_A_21
Vcc1_5_A_24
Vcc1_5_A_25
Vcc1_5_A_27
Vcc1_5_A_29

ICH10

ICH10

4

Vcc1_5_A_32

Vcc1_5_A_10

VccLAN3_3_1
VccLAN3_3_2

VccSus3_3_2
VccSus3_3_7
VccSus3_3_8

VccSus3_3_9
VccSus3_3_10
VccSus3_3_11
VccSus3_3_12
VccSus3_3_13
VccSus3_3_14
VccSus3_3_15
VccSus3_3_16
VccSus3_3_17

VccSus3_3_1

VccSus3_3_3

VccSus3_3_4

VccSus3_3_5

VccSus3_3_6

VccSus1_1_1

VccSus1_1_2

VccSus1_5_2

VccSus1_5_1

5 OF 6

5 OF 6

VccCL3_3_1
VccCL3_3_2

Vcc1_5_A_1
Vcc1_5_A_2
Vcc1_5_A_4
Vcc1_5_A_5

Vcc1_5_A_8
Vcc1_5_A_9

Vcc1_1_1
Vcc1_1_2
Vcc1_1_3
Vcc1_1_4
Vcc1_1_5
Vcc1_1_6
Vcc1_1_7
Vcc1_1_8

Vcc1_1_9
Vcc1_1_10
Vcc1_1_11
Vcc1_1_12
Vcc1_1_13
Vcc1_1_14
Vcc1_1_15
Vcc1_1_16
Vcc1_1_17
Vcc1_1_18
Vcc1_1_19
Vcc1_1_20
Vcc1_1_21
Vcc1_1_22
Vcc1_1_23
Vcc1_1_24
Vcc1_1_25
Vcc1_1_26
Vcc1_1_27
Vcc1_1_28
Vcc1_1_29

V_CPU_IO_1
V_CPU_IO_2

VccGLAN3_3

Vcc3_3_6

Vcc3_3_5

Vcc3_3_3

Vcc3_3_2

Vcc3_3_4

Vcc3_3_7

Vcc3_3_8

Vcc3_3_1

Vcc3_3_9
Vcc3_3_10
Vcc3_3_11
Vcc3_3_12
Vcc3_3_13
Vcc3_3_14
Vcc3_3_15
Vcc3_3_16

VccRTC

73 mA in S3

B23
C23

AA7
AA8
AB7
AB8
T1
AC14
AC15
AC16

A24
B24
C24
E24
F24
G24
H23
H24
J23
M12
M13
M15
M17
M18
M19
N12
N19
R12
R19
U12
U19
V12
V19
W12
W13
W15
W17
W18
W19

AH28
AJ30

1 mA

A27

VCCLAN3_3_ICH

A12
B12

AH24
AF21
AC21
AC19
AD10
AH30
AK4
A2
B1
B9
G11
G3
H7
J2
K8
L8

AF2
U1
U2
U3
U5
U6
U7
U8
V8
W7
W8
Y8
A17
B20
C20
E17
H15

A22

AC7
H17

H18
AD8

3

R1720

R1720

1 2

NC_0_J 0402

NC_0_J 0402

1 2

R1721 0_J 0402R1721 0_J 0402

+1_5VRUN

All Vcc1_5_A
1644 mA

1634 mA

+1_1VRUN

12

C174

C174

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

12/24:Change CAP43 CAP44

2 mA

12/27:mount R1358
NC R1359

78 mA in S3

308 mA

+3VRUN

R1421

R1421
0_J

0_J

FSB_VTT

12

DVT:03/26:NC D45

+3VALW

DVT:02/22:Add this circuit for VCC1_5/
V_CPU_IO power sequencing

212 mA

01/07:Connect C192 from +3VALW
to VCCLAN3_3_ICH

VCCRTC

1D1V_ICH_SB

1D5V_ICH_SB

12

C179

C179

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

3

+3VRUN
+3_3V_CL

+1_1VRUN

12

+

+

place near ICH10

+3VRUN

1 2

+3_3V_CL

1 2

12

C178

C178

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

For Corwin Spring

01/02:Change L12 L13 L14

12/11:Cancel
C173 22uF

12

C159

CAP43

CAP43
1500U_6.3V_M

1500U_6.3V_M

10x12.5

10x12.5

R1358

R1358
0_J

0_J

R1359

R1359
NC_1K_J

NC_1K_J

0402

0402

C159

0.022U_25V_K

0.022U_25V_K

0402_X7R

0402_X7R

12/11:Place close to A24

+1_5VRUN

12

CAP44

CAP44

+

1500U_6.3V_M

+

1500U_6.3V_M

10x12.5

10x12.5

For +VCC1_5_A

+1_5VRUN

L77

L77

1 2

10UH_0.1A_1.15R

10UH_0.1A_1.15R

TW201212-100M

TW201212-100M

12/26:Change L77

1 2

For Corwin Spring

FSB_VTT

D45

D45
NC_CH035H-40PT

NC_CH035H-40PT

null

null

1 2

+1_5VRUN

12/11:Place close
to ball A22

12

C189

C189

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

12

C190

C190

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

Placed near A22

RTC decoupling caps.

2

+1_5VRUN

12

C160

C160

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

C1198

C1198

4.7U_6.3V_K

4.7U_6.3V_K

0603_X5R

0603_X5R

12/11:Place close
to ball AK20

Rated at least 100mA

C1199

C1199

4.7U_6.3V_K

4.7U_6.3V_K

1 2

0603_X5R

0603_X5R

12

C1216

C1216
10U_10V_Y

10U_10V_Y

0805_Y5V

0805_Y5V

12/11:Place
close to ball
B1

PCI decoupling
caps.

VCCRTC

12

C191

C191
1U_10V_Y

1U_10V_Y

0603_Y5V

0603_Y5V

2

PVT:06/04:Change +1_1VRUN to
+1_2VRUN by Intel's suggestion.

L12

L12

1U_1206

1U_1206

1 2

TL321611-1R0K

TL321611-1R0K

12

C162

C162
10U_10V_Y

10U_10V_Y

0805_Y5V

0805_Y5V

12

C163

C163

0.01U_25V_K

0.01U_25V_K

0603_X7R

0603_X7R

Place LRC near pin T30

C204

C204

0402_Y5V

0402_Y5V

12

+3VRUN

12

C1201

C1201

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

12/11:Change C188 from

0.047u to 0.022u,add C1153

12/11:Place close
to ball U1

12

C1200

C1200

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

VCCSATAPLL

12

C1152

C1152
1U_10V_Y

1U_10V_Y

0603_Y5V

0603_Y5V

0.1U_16V_Y

0.1U_16V_Y

VCCLAN3_3_ICH

12

C192

C192

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

12/11:Place close
to ball A12

LAN decoupling
caps.

FOXCONN

FOXCONN

FOXCONN

Title

Title

Title

ICH10 (Power) 4/5

ICH10 (Power) 4/5

ICH10 (Power) 4/5

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

A3

A3

A3
Date: Sheet of

Date: Sheet

Date: Sheet

1

FSB_VTT

Placed near
AH28 and AJ30

12

V_FSB_VTT

12/10:Add this circuit

CPU decoupling caps.

12/11:Place close
to ball AK18 and
AK10

+3VRUN

12/11:Place close
to ball AK4

12

SATA decoupling caps.

C186

C186

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

+1_5VRUN

12/11:Place close to ball T1 AK5

12

12

C187

C187

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

12

C175

C175

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

R1277

R1277

1 2

0_J 0402

0_J 0402

+1_5VRUN

12

12

C184

C184

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

12

C188

C188

0.022U_16V_Y

0.022U_16V_Y

0402_Y5V

0402_Y5V

12/11:Place close
to ball AF2

USB decoupling caps.

+3VALW

12

C194

C194

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

For VCCSUS3_3

12

C1214

C1214

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CCPBG - R&D Division

CCPBG - R&D Division

1

C176

C176

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

4.7U_6.3V_K

4.7U_6.3V_K

0603_X5R

0603_X5R

FSB_VTT

C180

C180
1U_10V_Y

1U_10V_Y

0603_Y5V

0603_Y5V

C185

C185

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

+3VALW

12

20 80Tuesday, July 15, 2008

20 80Tuesday, July 15, 2008

20 80Tuesday, July 15, 2008

FSB_VTT

12

C181

C181
1U_10V_Y

1U_10V_Y

0603_Y5V

0603_Y5V

12

C1153

C1153

0.022U_16V_Y

0.022U_16V_Y

0402_Y5V

0402_Y5V

C1215

C1215

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

of

of

12

C177

C177

5

U4F

U4F

G30

Vss_104

G29

Vss_103

G25

Vss_102

G16

Vss_101

F9

Vss_100

F6

Vss_99

F28

Vss_98

F26

Vss_97

F21

Vss_96

F12

Vss_95

D D

C C

B B

A A

5

E30
E29
E22

E18
E15
D28

B28
B25
B22

B19
B17
B14
B11

AK8
AK30
AK29

AK2
AK16
AK14
AK12

AJ26
AJ23
AJ20
AJ16
AJ14
AJ12

AH8
AH6

AH20

AH2
AH19
AH15
AH13
AG28

AF9

AF7
AF29
AF25
AF23
AF20
AF15
AF13

AE9

AE8

AE6

AE5

AE25
AE19
AE18
AE16
AE15
AE14
AE13
AE12
AE10

AE1

AD9
AD7

AD3
AD22
AD19
AD18
AD16
AD15
AD14

AC8

AC6

AC5
AC30
AC29
AC24
AC12

AC1

AB3
AB28
AB26

AA6

AA5
AK27

AH29

AF3

B27

Vss_94
Vss_93
Vss_92

E2

Vss_91
Vss_90
Vss_89
Vss_88

B8

Vss_87

B5

Vss_86
Vss_85
Vss_83
Vss_82

B2

Vss_81
Vss_80
Vss_79
Vss_78
Vss_77
Vss_76
Vss_75
Vss_74
Vss_72
Vss_71
Vss_70
Vss_69

AJ8

Vss_68

AJ5

Vss_67
Vss_65
Vss_64
Vss_63
Vss_62
Vss_61
Vss_60
Vss_59
Vss_58
Vss_56
Vss_55
Vss_54
Vss_53
Vss_52
Vss_51
Vss_50
Vss_49
Vss_47
Vss_46
Vss_45
Vss_44
Vss_43
Vss_42
Vss_41
Vss_40
Vss_39
Vss_38
Vss_37
Vss_36
Vss_35
Vss_34
Vss_33
Vss_32
Vss_31
Vss_30
Vss_29
Vss_28
Vss_27
Vss_26
Vss_25
Vss_24
Vss_23
Vss_22
Vss_21
Vss_20
Vss_19
Vss_18
Vss_17
Vss_16
Vss_15
Vss_14
Vss_13
Vss_12
Vss_11
Vss_10
Vss_9
Vss_8
Vss_7
Vss_6

Vss_73
Vss_57

AJ4

Vss_66
Vss_48
Vss_84

6 OF 6

6 OF 6

ICH10

ICH10

null

null

4

Vss_105
Vss_106
Vss_107
Vss_108
Vss_109
Vss_110
Vss_111
Vss_112
Vss_113
Vss_114
Vss_115
Vss_116
Vss_117
Vss_118
Vss_119
Vss_120
Vss_121
Vss_122
Vss_123
Vss_124
Vss_125
Vss_126
Vss_127
Vss_128
Vss_129
Vss_130
Vss_131
Vss_132
Vss_133
Vss_134
Vss_135
Vss_136
Vss_137
Vss_138
Vss_139
Vss_140
Vss_141
Vss_142
Vss_143
Vss_144
Vss_145
Vss_146
Vss_147
Vss_148
Vss_149
Vss_150
Vss_151
Vss_152
Vss_153
Vss_154
Vss_155
Vss_156
Vss_157
Vss_158
Vss_159
Vss_160
Vss_161
Vss_162
Vss_163
Vss_164
Vss_165
Vss_166
Vss_167
Vss_168
Vss_169
Vss_170
Vss_171
Vss_172
Vss_173
Vss_174
Vss_175
Vss_176
Vss_177
Vss_178
Vss_179
Vss_180
Vss_181
Vss_182
Vss_183
Vss_184
Vss_185
Vss_186
Vss_187
Vss_188
Vss_189
Vss_190
Vss_191
Vss_192
Vss_193
Vss_194
Vss_195
Vss_196
Vss_197
Vss_198

Vss_5
Vss_4
Vss_3
Vss_2
Vss_1

4

H13
H19
H2
H22
H25
H26
H28
H9
J29
J30
J6
K26
K28
L2
L23
L29
L30
M14
M16
M26
M28
M6
M8
N13
N14
N15
N16
N17
N18
N23
N29
N30
P12
P13
P14
P15
P16
P17
P18
P19
P2
P26
P28
P6
R13
R14
R15
R16
R17
R18
R23
R29
R30
R8
T12
T13
T14
T15
T16
T17
T18
T19
T2
T29
T5
U13
U14
U15
U16
U17
U18
U23
V13
V14
V15
V16
V17
V18
V26
V28
V3
V7
W1
W14
W16
W23
W29
W30
W5
W6
Y26
Y28
Y3
Y7
AA30
AA29
AA1
A30
A1

3

3

2

FOXCONN

FOXCONN

FOXCONN

Title

Title

Title

ICH10 (Ground) 5/5

ICH10 (Ground) 5/5

ICH10 (Ground) 5/5

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

A3

A3

A3
Date: Sheet

Date: Sheet

2

Date: Sheet

1

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CCPBG - R&D Division

CCPBG - R&D Division

of

of

of

21 80Tuesday, July 15, 2008

21 80Tuesday, July 15, 2008

1

21 80Tuesday, July 15, 2008

5

4

3

2

1

R335

R335
10K_J

10K_J

0402

0402

SPI_MISO_R
SPI_MOSI_R
SPI_CLK_R

MEMCS_MB#

1
2
3

AT26DF321-SU

AT26DF321-SU

null

null

+3_3V_CL

1
2

For Corwin Spring

U14

U14

8

CS#

VCC

7

SO

NC

6

WP#

SCK

5

GND4SI

SPI ROM

12

53

U13

U13

4

MC74HC1G32DTT1G

MC74HC1G32DTT1G

R1707

R1707

1 2

NC_0_J 0402

NC_0_J 0402

+3_3V_CL

12

C218

C218

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

SPI_ROM_NC
SPI_CLK_RSPI_ROM_WP#
SPI_MOSI_R

C217

C217

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

MEMCS_MB#

DVT:03/26:NC R1707
Please place R1707 near to SB

12

C1310

C1310
1U_10V_Y

1U_10V_Y

0603_Y5V

0603_Y5V

08'01/04:change U14 from 8Mbit to 32Mbit
for Eaglelake QST Support

+3_3V_CL

12

For Corwin Spring

R332

R332

EVT2:01/30:Stuff R332

1K_J

1K_J

0402

0402

SPI_MISO_R19

SPI_MOSI_R19
SPI_CLK_R19

01/08: change the R333,R336 and R332 from 0603 to 0402

D D

C C

+3_3V_CL

For Corwin Spring

12

R333

R333
1K_J

1K_J

0402

0402

SPI_MISO_R SPI_MISO_R_R1

12

R336

R336
NC_1K_J

NC_1K_J

0402

0402

R334

R334

1 2

15_F 0402

15_F 0402

DVT:03/26:Stuff U13

CARD_INSERT

1 2

SPI_CS0#19

B B

SB GPIO SETTING

MB_FLASH_EN17

A A

5

MB_FLASH_EN

For Corwin Spring

+3_3V_CL +3VRUN

SPI_CLK_R
SPI_MOSI_R
SPI_MISO_R_R1
SPI_CS0#

CARD_INSERT

1413

SMDFIX2

SMDFIX2

12
11
10

9
8
7
6
5
4
3
2
1

SMDFIX1

SMDFIX1

CN8

CN8

FOX_GB5RF120-1200-7F

FOX_GB5RF120-1200-7F

FPC_12P

FPC_12P

LPC_AD119 LPC_AD2 19
LPC_AD319

LPC_DRQ#019

PM_SUS_STAT#19

PLT_RST#8,19,26,27,39,50

INT_SERIRQ17,28

PWRSW#23,38

SB_SYS_RESET#4,19

SB_SYS_RESET#

+3VRUN

TP197tpc26t TP197tpc26t
TP199tpc26t TP199tpc26t

1 2

R13550_J 0402R13550_J 0402

1
1

12/13: add one 0_J resistor

EXTERNAL SPI ROM INTERFACE

4

3

CN7

CN7

SMDFIX2

SMDFIX1

SMDFIX2

SMDFIX1

32 31

LPC_AD1 LPC_AD2
LPC_DRQ#0
PLT_RST#

INT_SERIRQ

1 2
3 4
5 6
7 8

9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30

34 33

B TO B CONN_2x15P

B TO B CONN_2x15P

FOX_QT510306-L011-7F

FOX_QT510306-L011-7F

SMDFIX3

SMDFIX3

SMDFIX4

SMDFIX4

LPC_AD0
LPC_FRAME#LPC_AD3

JIG_PM_CLKRUN#

JIG-120

LPC_AD0 19
LPC_FRAME# 19

R1357 10K_JR1357 10K_J

PCLK_JIG 3

1

TP196 tpc26tTP196 tpc26t

+3VRUN+5VRUN

1

TP479 tpc26tTP479 tpc26t

1

TP198 tpc26tTP198 tpc26t

2

1 2

12/13: add one 10k resistor
and connect to gnd.

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.

FOXCONN

FOXCONN

FOXCONN

Title

Title

Title

Flash ROM& Debug

Flash ROM& Debug

Flash ROM& Debug

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

A3

A3

A3
Date: Sheet

Date: Sheet

Date: Sheet

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CCPBG - R&D Division

CCPBG - R&D Division

1

of

of

of

22 80Tuesday, July 15, 2008

22 80Tuesday, July 15, 2008

22 80Tuesday, July 15, 2008

5

4

3

2

1

RTCRST# PORTION

+3VALW

+3VALW

D D

12

R266

R266
1K_J

1K_J

0603

VCCRTC

12

R268

R268
20K_J

20K_J

0402

0402

SB_SRTCRSTB

12

C199

C199
1U_10V_K

1U_10V_K

0402_X5R

0402_X5R

C C

0603

CN3

CN3

+

+

3 4

Battery

Battery
Holder

Holder

-

-

BATTERY_2P

BATTERY_2P

2 1

FOX_BB10201-C1403-7F

FOX_BB10201-C1403-7F

SB_SRTCRSTB 19

PVT:05/28:Change R268 from 180K
to 20K follow the design guid

PVT:05/28:Change C199 from 0.1U
to 1U follow the design guid

Power Button

+3VALW

R1702

R1702
NC_10K_J

NC_10K_J

0402

0402

1 2

R1682

R1682

PWRSW#22,38

B B

1 2

33_J0402

33_J0402

width 20 mils

D1

D1

1

3

2

BAT54CPT

BAT54CPT

Battery

Battery

LITHIUM BATT

LITHIUM BATT

CR2032

CR2032

PANASONIC_CR-2032L/BE

PANASONIC_CR-2032L/BE

+3VALW

Q72

Q72

G

G

1

12

C1418

C1418

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

VCCRTC

18~25mS

Minimum 18 mS DELAY

12

R264

R264
20K_J

20K_J

0402

12

R1701

R1701
NC_10K_J

NC_10K_J

0402

0402

1 2

1 2

NC_1K_J 0402

NC_1K_J 0402

32

D

D

S

S

NC_2N7002ESPT

NC_2N7002ESPT

C196

C196
1U_10V_K

1U_10V_K

0603_X5R

0603_X5R

R1700

R1700

1 2

0_J

0_J

0402

0402

R1703

R1703

0402

12

C197

C197
1U_16V_K

1U_16V_K

0603_X5R

0603_X5R

PVT:05/30:Move PJ1 from SB_SRTCRSTB
to SB_RTCRST# follow Design guid 1.3

+3VALW

U95

U95

2 4

12

C1414

C1414
NC_0.1U_16V_Y

NC_0.1U_16V_Y

0402_Y5V

0402_Y5V

21

OPEN_JUMP_OPEN2

OPEN_JUMP_OPEN2

53

1

VCC

VCC

NC

NC

GND

GND

NC_74AHC1G14GW

NC_74AHC1G14GW

PJ1

PJ1

1 2

NC_1K_J 0402

NC_1K_J 0402

DVT:03/25:Change the RC for PWRSW_R#.

R1811

R1811

SB_RTCRST# 19

PVT:06/11:Change Q141 from
17-MMBT390-6000 to 17-MMBT390-6k00

PWRSW_R# 19

SUS POWER LOGIC

R277

R277

SB_SLP_S4#19 SUS_ON 31,37,63,71

1 2

0_J 0402

0_J 0402

12

R262

R262

3.24K_F

3.24K_F

0402

0402

12

R265

R265
100K_J

100K_J

0402

0402

12

C195

C195
10U_6.3V_M

10U_6.3V_M

0805_X5R

0805_X5R

SB_RSMRST4# SB_RSMRST#

+3VALW

DVT:02/21:Add this circuit

DVT:03/07:Remove R272,R274,R269,Q8

SLP_M_GATE_V3_3_CL72

RUN_ON

RSMRST# PORTION FOR DELAY

R261

R261

1 2

NC_0_J

NC_0_J

+3VALW

1 7

84

U5A

U5A

74AHC3G14DC

74AHC3G14DC

0402

0402

RSMRST#_2RSMRST#_1 RSMRST#_3

+3VALW

84

6 2

Minimum 10 mS DELAY --- 26mS

MMBT3906K

MMBT3906K

Q141

Q141

E

E

C

R1729

R1729

4.7K_J0402

4.7K_J0402

D43

D43

BAV99

BAV99

3

2 3

12

D42

D42

BAV99

BAV99

null

null

12

null

null

R1731

R1731

2.2K_J 0402

2.2K_J 0402

C

B

B

D47

1
12

3

D47

NC_CH500H-40PT

NC_CH500H-40PT

1 2

DVT:04/14:Change D47 to NC

12

R1796

R1796

12

1

CS_4.7K_J0402

CS_4.7K_J0402

R267

R267

1 2

NCS_0_J

NCS_0_J

0402

0402

R270

R270
10K_J

10K_J

0402

0402

1 2

DVT:04/14:Change R270 from 100k to 10k.

ALW_PGD 24,62

+3_3V_CL

12

R1795

R1795
CS_15K_J

CS_15K_J

0402

0402

Q155

Q155

C

C

B

B

CS_PMBT3904.215

CS_PMBT3904.215

E

null

E

null

2 3

DVT:03/23:Add this circuit for corwin spring.

+1_1V/+1_5VRUN/NVVDD POWER LOGIC

+3VALW

D54

D54

1 2

CH500H-40PT

CH500H-40PT

R1819

R1819

220K_J

220K_J

0402

0402

RUN_ON_Q RUN_ON_Q_R

12

12

C202

C202

0.1U_10V_K

0.1U_10V_K

0402_X5R

0402_X5R

53

U98

U98

VCC

VCC

2 4

GND

GND

74AHC1G14GW

74AHC1G14GW

1

NC

NC

U99_2

U5B

U5B

74AHC3G14DC

74AHC3G14DC

SB_RSMRST# 19

53

1

U99

U99

VCC

VCC

NC

NC

2 4

GND

GND

74AHC1G14GW

74AHC1G14GW

DVT:04/14:Change R263 from 1K to 0_J

R263

R263
0_J

0_J

SB_RSMRST4#

0402

0402

1 2

R1730

R1730

NC_10K_J

NC_10K_J

0402

0402

12

12

C1454

C1454

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

DVT:04/14:Add C1454

DVT:04/14:Change R1730 to NC

DVT:03/23: follow CRB change
the C198 from 1U to 2.2U.

12

C198

C198

2.2U_10V_M

2.2U_10V_M

0603_X5R

0603_X5R

SB_LAN_RST# 19

12

R271

R271
NC_10K_J

NC_10K_J

0402

0402

DVT:02/20:Change R271
to 10K and NC it.

DVT:03/26:Add this portion

R1818

R1818

1 2

1K_J 0402

1K_J 0402

RUN_ON1 24,64,65,69

3/5VRUN POWER LOGIC

D55

D55

R1828

R1828

12

NC_10K_J 0402

NC_10K_J 0402

R1829

R1829

12

R1844

R1844
NC_100K_J

NC_100K_J

0402

0402

5

1 2

0_J 0402

0_J 0402

+3VALW

U108

U108

53

1

4

2

NC_74AHC1G08GW

NC_74AHC1G08GW

,24

A A

SUS_PWRGD63

1 2

CH500H-40PT

CH500H-40PT

R1822

1 2

R1821

R1821
10K_J

10K_J

0402

0402

1 2

R1822

1M_J 0402

1M_J 0402

SB_SLP_S3#_R

DVT2:05/07: Change this circuit for RUN_ON pulse issue.

Delay time 100ms

U96_2

12

C1441

C1441

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

+3VALW

53

U96

U96

VCC

VCC

2 4

GND

GND

74AHC1G14GW

74AHC1G14GW

1

NC

NC

4

U96_4

+3VALW

84

U5C

U5C

3 5

74AHC3G14DC

74AHC3G14DC

SB_SLP_S3#_Q_U

R292

R292
10K_J

10K_J

0402

0402

1 2

R1820

R1820

1 2

1K_J 0402

1K_J 0402

DVT2:05/07: Change this circuit for RUN_ON1 pulse issue.

R288

R288

1 2

NV_1K_J 0402

RUN_ON 61,63,64,68,71SB_SLP_S3#

3

NV_1K_J 0402

2

Minimum 5mS DELAY -- 8mS

RUN_ON2 24,65,71RUN_PWRGD24,28,64

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.

FOXCONN

FOXCONN

FOXCONN

Title

Title

Title

Power Squence 1/2

Power Squence 1/2

Power Squence 1/2

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

A3

A3

A3
Date: Sheet

Date: Sheet

Date: Sheet

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CCPBG - R&D Division

CCPBG - R&D Division

of

of

of

23 80Tuesday, July 15, 2008

23 80Tuesday, July 15, 2008

1

23 80Tuesday, July 15, 2008

5

4

3

2

1

VCORE POWER LOGIC / CLOCK ENALBLE

R275

R275

RUN_PWRGD23,28,64

SB_CK_PWRGD19

D D

VRM_PWRGD66

+3VRUN +3VALW

R1411

R1411

R1413

R1413

NC_0_J

NC_0_J

0603

0603

0603

0603

1 2

1 2

R1746

R1746

1 2

1K_J 0402

1K_J 0402

0_J

0_J

VRM_PWRGD_QL

B

B

1

SEQ_VCC_1

R1745

R1745
10K_J

10K_J

0402

0402

1 2

VRM_PWRGD_QR

Q146A

Q146A

C

C

E

E

CH3904SPT

CH3904SPT

5 6

null

null

D53

D53

R1744

R1744
10K_J

10K_J

0402

0402

1 2

VRM_PWRGD_QR_Q VRM_PWRGD_U

Q146B

Q146B

C

C

B

B

2

E

E

CH3904SPT

CH3904SPT

4 3

null

null

1 2

CH500H-40PT

CH500H-40PT

12

R1827

R1827
100K_J

100K_J

0402

0402

R1823

R1823

1 2

100K_J 0402

100K_J 0402

12

C1417

C1417

0.1U_16V_Y

0.1U_16V_Y

0402_Y5V

0402_Y5V

1 2

CA_0_J 0402

CA_0_J 0402

R276

R276

1 2

NV_0_J 0402

NV_0_J 0402

1 2

0_J 0603

0_J 0603

53

1

U109

U109

VCC

VCC

NC

NC

2 4

GND

GND

74AHC1G14GW

74AHC1G14GW

DVT2:05/07: Change this circuit for SB_VRMPWRGD pulse issue.

C C

R1483

VRM_PWRGD_U

R1483

1 2

10K_J 0402

10K_J 0402

SEQ_VCC_1

R290

R290

2.2K_J

2.2K_J

0402

0402

1 2

VRM_PWRGD_U_Q

Q14

Q14

C

C

B

B

1

E

E

PMBT3904.215

PMBT3904.215

2 3

null

null

V_FSB_VTT

1

G

G

R1368

R1368
1K_J

1K_J

0402

0402

1 2

D

D

S

S

Q98

Q98

2 3

2N7002EPT

2N7002EPT

VRM_PWRGD

R1405

R1405

1 2

0_J 0603

0_J 0603

R1714

R1714

1 2

NC_0_J 0603

NC_0_J 0603

PVT:06/05:Change +1_1VRUN to
+1_2VRUN by Intel's suggestion.

VRM_PWRGD_R 5

DVT:04/14:Change R275,R276 from 1K to 0_J

12/14:change netname from VR_ON to VRM_ON

R280

R280

SB_VRMPWRGD/CL_PWROK /VRM_PWRGD

SEQ_VCC_1

53

1

U100

U100

VCC

VCC

NC

IVP5 U100_4SEQ_VCC_1

NC

2 4

GND

GND

74AHC1G14GW

74AHC1G14GW

SB_PWROK

+3_3V_CL

+1_1V_CL

0603_X5R

0603_X5R

1 2

1 2

R1798

R1798

1 2

CS_10K_J 0402

CS_10K_J 0402

12

C1438CS_4.7U_6.3V_K

C1438CS_4.7U_6.3V_K

VRM_ON 66NV_VDD_PWRGD65
CLK_ENABLE 3

R1713

R1713

1K_J0402

1K_J0402

R1715

R1715

NC_0_J0603

NC_0_J0603

CS_1K_J0402

CS_1K_J0402

12

R1801

R1801

12

CS_1U_6.3V_Y

CS_1U_6.3V_Y

0402_Y5V

0402_Y5V

C1437

C1437
CS_1U_10V_Y

CS_1U_10V_Y

0603_Y5V

0603_Y5V

R1800

R1800

CS_5.6K_J

CS_5.6K_J

0402

0402

2

12

C1439

C1439

1 2

+5VALW

12

C

C

B

B

E

E

4 3

R1409

R1409
0_J 0603

0_J 0603

R1408

R1408

1 2

NCS_0_J 0603

NCS_0_J 0603

1

Q152B

Q152B

CS_CH3904SPT

CS_CH3904SPT

null

null

SB_VRMPWRGD 19

CL_PWROK 8,19

R1797

R1797
CS_0_J

CS_0_J

0603

0603

1 2

Q156

Q156

C

CS_PMBT3904.215

CS_PMBT3904.215

Q152A

Q152A

C

C

B

B

E

E

CS_CH3904SPT

CS_CH3904SPT

5 6

null

null

C

B

B

E

null

E

null

2 3

R1799

R1799

1

CS_1K_J 0402

CS_1K_J 0402

12

SLP_M 3,19,72

DVT:03/23:Add this circuit for
Corwin Spring

B B

SB PWROK 99mS DELAY PORTION

+3VALW

D52

D52

1 2

CH500H-40PT

CH500H-40PT

U110

IVP1

12

12

C1442

C1442

0.22U_10V_M

0.22U_10V_M

0402_X5R

0402_X5R

R1415

R1415

0_J

0_J

0603

0603

1 2

SEQ_VCC_2

U110

R1825

SB_VRMPWRGD

A A

R1825

12

1M_J

1M_J

R1824

R1824

0402

0402

100K_J

100K_J

0402

0402

DVT2:05/07: Change this circuit for SB_PWROK pulse issue.

+3VRUN +3VALW

R1414

R1414
NC_0_J

NC_0_J

0603

0603

1 2

5

53

1

VCC

VCC

NC

NC

2 4

GND

GND

74AHC1G14GW

74AHC1G14GW

SEQ_VCC_2

IVP2

Minimum 99mS DELAY , 130mS

53

1

U101

U101

VCC

VCC

NC

NC

2 4

GND

GND

74AHC1G14GW

74AHC1G14GW

IVP3

1 2

1 2

1K_J 0402

1K_J 0402

R1830

R1830
NC_10K_J

NC_10K_J

0402

0402

4

R286

R286

SB_PWROK 8,19

+3VALW

U102

U102

53

SB_SLP_S3#19,23

ALW_PGD23,62

1
2

PWR_DWN_U_T

4

74AHC1G08GW

74AHC1G08GW

DVT:03/27:Add this portion

3

2

D1

D1

G1

G1

12

R1645

R1645
10K_J

10K_J

0402

0402

PWR_DWN_T

6

Q123A

Q123A

S1

S1

2N7002SPT

2N7002SPT

1

POWER DOWN TIMING

RUN_ON1 23,64,65,69

34

Q123B

Q123B

D2

D2

5

G2

G2

S2

S2

2N7002SPT

2N7002SPT

PWR_DWN_T

2

PWR_DWN_T

RUN_ON2 23,65,71

6

Q124A

Q124A

D1

D1

2

G1

G1

S1

S1

2N7002SPT

2N7002SPT

1

PWR_DWN_T

VRM_ON

34

Q124B

Q124B

D2

D2

5

G2

G2

S2

S2

2N7002SPT

2N7002SPT

FOXCONN

FOXCONN

FOXCONN

Title

Title

Title

Power Squence 2/2

Power Squence 2/2

Power Squence 2/2

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

AIO-C Mother Board MP 1.1

A3

A3

A3
Date: Sheet of

Date: Sheet

Date: Sheet

PWR_DWN_T

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CCPBG - R&D Division

CCPBG - R&D Division

2

5

1

SB_PWROK

6

D1

D1

G1

G1

S1

S1

1

VRM_PWRGD_U

34

D2

D2

G2

G2

S2

S2

Q138A

Q138A

2N7002SPT

2N7002SPT

Q138B

Q138B

2N7002SPT

2N7002SPT

24 80Tuesday, July 15, 2008

24 80Tuesday, July 15, 2008

24 80Tuesday, July 15, 2008

of

of